Defect detection method and device, electronic device and storage medium

Abstract

The present disclosure relates to a defect detection method and device, an electronic device, and a computer-readable storage medium, and relates to the field of semiconductor production and manufacturing technology, and can be applied to scenarios where wafers are subjected to defect detection. The method includes: obtaining defect scanning results of a wafer image, and dividing the wafer image into a first detection area and a second detection area based on the defect scanning results; the first detection area is a wafer detection area where the grain feature contrast value is greater than a feature reference threshold; according to the focal length energy matrix of the wafer image, defect integration processing is performed on the grains in the first detection area to obtain defect-integrated grains; based on the defect-integrated grains, defect detection processing is performed on the grains in the second detection area to obtain defect detection results. The present disclosure can integrate the defect information of the grains in the easy-to-detect area of ​​the wafer image, and perform defect detection on the grains in the difficult-to-detect area based on the obtained defect-integrated grains.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor production and manufacturing technology, and in particular to a defect detection method, a defect detection device, an electronic device, and a computer-readable storage medium. Background Art

[0002] In the semiconductor field, photolithography is a critical step in semiconductor device manufacturing. The PH process requires finding the optimal focus / dose conditions based on the Focus Energy Matrix (FEM) wafer to meet process requirements. The final focus / dose of the FEM wafer is determined through defect detection.

[0003] Current focal energy matrix (FEM) detection methods for real-time defect analysis (RDA) rely on surface defect detection equipment. This works by distinguishing defects based on die-to-die (D2D) differences. When defects on adjacent dies lack similarity, defect detection can be challenging and there's a risk of missing defects, affecting the final FEM window parameters (window qualification) and potentially impacting a large number of wafers.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute prior art known to ordinary technicians in the field. Summary of the Invention

[0005] The purpose of the present disclosure is to provide a defect detection method, a defect detection device, an electronic device and a computer-readable storage medium, thereby overcoming, at least to a certain extent, the problem that existing grain defect detection schemes may cause missed defects.

[0006] Other features and advantages of the present disclosure will become apparent from the following detailed description, or may be learned in part by practice of the present disclosure.

[0007] According to a first aspect of the present disclosure, a defect detection method is provided, including: obtaining defect scanning results of a wafer image, and dividing the wafer image into a first detection area and a second detection area based on the defect scanning results; the first detection area is a wafer detection area in which the grain feature contrast value is greater than a feature reference threshold; according to the focal length energy matrix of the wafer image, defect integration processing is performed on the grains in the first detection area to obtain defect integrated grains; based on the defect integrated grains, defect detection processing is performed on the grains in the second detection area to obtain defect detection results.

[0008] In an exemplary embodiment of the present disclosure, the wafer image is divided into a first detection area and a second detection area based on the defect scanning result, including: performing defect scanning processing on the wafer image by a defect detection device to obtain a defect scanning result; determining a grain feature contrast value based on the defect scanning result, the grain feature contrast value being determined by performing consistency comparison on adjacent grains; taking a wafer detection area where the grain feature contrast value is greater than a feature reference threshold as the first detection area; and taking a wafer detection area where the grain feature contrast value is less than or equal to the feature reference threshold as the second detection area.

[0009] In an exemplary embodiment of the present disclosure, defect integration processing is performed on the grains in the first detection area according to the focal length energy matrix of the wafer image to obtain defect-integrated grains, including: dividing the first detection area into multiple exposure areas according to the focal length dimension and energy dimension of the focal length energy matrix; and defect integration is performed on the grains in each of the exposure areas to obtain the defect-integrated grains.

[0010] In an exemplary embodiment of the present disclosure, the first detection area is divided into multiple exposure areas according to the focal length dimension and the energy dimension of the focal length energy matrix, including: determining multiple focal length values ​​corresponding to the focal length dimension, and multiple energy values ​​corresponding to the energy dimension; dividing the first detection area into multiple exposure areas according to the focal length values ​​and the energy values, and the grains belonging to the same exposure area have the same focal length value and the energy value.

[0011] In an exemplary embodiment of the present disclosure, determining the multiple focal length values ​​corresponding to the focal length dimension and the multiple energy values ​​corresponding to the energy dimension includes: obtaining a preconfigured focal length defect model; the focal length defect model includes a correlation relationship between defect information and focal length values; determining the multiple focal length values ​​corresponding to the focal length dimension based on the focal length defect model; obtaining a preconfigured energy defect model; the energy defect model includes a correlation relationship between defect information and energy values; determining the multiple energy values ​​corresponding to the energy dimension based on the focal length defect model.

[0012] In an exemplary embodiment of the present disclosure, defect integration is performed on the grains in each of the exposure areas to obtain the defect-integrated grains, including: obtaining a wafer image coordinate system corresponding to the wafer image, and a regional coordinate system corresponding to the exposure area; determining the defective grains in the first detection area, the defective grains including grain defect information and defective grain coordinates; based on the wafer image coordinate system and the grain defect information, integrating the defective grains in the first detection area into the same exposure area to obtain a defect-integrated area; based on the regional coordinate system and the defective grain coordinates, integrating the defective grains in the defect-integrated area into the same grain to obtain a defect-integrated grain.

[0013] In an exemplary embodiment of the present disclosure, the defective grains in the defect integration region are integrated into the same grain based on the regional coordinate system and the defective grain coordinates to obtain the defect integrated grain, including: determining a reference defective grain in the defect integration region; determining a reference grain coordinate corresponding to the reference defective grain based on the regional coordinate system; and performing coordinate conversion processing on the defective grain coordinates based on the regional coordinate system to obtain the defect integrated grain.

[0014] In an exemplary embodiment of the present disclosure, the defect detection processing is performed on the grains in the second detection area based on the defect integrated grain to obtain a defect detection result, including: obtaining the field size of the defect scanning field of view adopted by the defect detection processing; based on the field size, determining the area to be detected from the second detection area; based on the defect integrated grain, defect detection processing is performed on the grains in the area to be detected to obtain a defect detection result.

[0015] In an exemplary embodiment of the present disclosure, determining the area to be inspected from the second inspection area based on the field of view size includes: determining the initial inspection area one by one from the second inspection area based on the field of view size; deleting the repeated defect coordinates in the initial inspection area to obtain the area to be inspected; the repeated defect coordinates are the defect grain coordinates of other areas to be inspected that have appeared in the second inspection area.

[0016] In an exemplary embodiment of the present disclosure, the defect detection processing is performed on the grains in the area to be inspected based on the defect-integrated grain to obtain the defect detection result, including: determining the grain to be measured from the area to be inspected based on the defect-integrated grain; performing defect detection processing on the grain to be measured based on the defect-integrated grain to obtain the grain defect detection result; and using the grain defect detection result as the defect detection result of the area to be inspected.

[0017] In an exemplary embodiment of the present disclosure, the above method also includes: obtaining a process requirement file, and determining a review inspection area from the first inspection area according to the process requirement file; performing defect detection processing on the grains in the review inspection area based on the defect integrated grains, and obtaining a defect review inspection result corresponding to the review inspection area.

[0018] According to a second aspect of the present disclosure, a defect detection device is provided, including: an area division module for obtaining a defect scanning result of a wafer image, and dividing the wafer image into a first detection area and a second detection area based on the defect scanning result; the first detection area is a wafer detection area in which the grain feature contrast value is greater than the feature reference threshold; a defect integration module for performing defect integration processing on the grains in the first detection area according to the focal length energy matrix of the wafer image to obtain defect integrated grains; a defect detection module for performing defect detection processing on the grains in the second detection area based on the defect integrated grains to obtain defect detection results.

[0019] In an exemplary embodiment of the present disclosure, the area division module includes an area division unit, which is used to: perform defect scanning processing on the wafer image through a defect detection device to obtain a defect scanning result; determine a grain feature contrast value based on the defect scanning result, and the grain feature contrast value is determined by performing consistency comparison on adjacent grains; use the wafer detection area where the grain feature contrast value is greater than the feature reference threshold as the first detection area; use the wafer detection area where the grain feature contrast value is less than or equal to the feature reference threshold as the second detection area.

[0020] In an exemplary embodiment of the present disclosure, the defect integration module includes a defect integration unit, which is used to: divide the first detection area into multiple exposure areas according to the focal length dimension and energy dimension of the focal length energy matrix; and perform defect integration on the grains in each of the exposure areas to obtain the defect-integrated grains.

[0021] In an exemplary embodiment of the present disclosure, the defect integration unit includes an exposure area determination unit, which is used to: determine multiple focal length values ​​corresponding to the focal length dimension, and multiple energy values ​​corresponding to the energy dimension; divide the first detection area into multiple exposure areas according to the focal length value and the energy value, and the grains belonging to the same exposure area have the same focal length value and the energy value.

[0022] In an exemplary embodiment of the present disclosure, the exposure area determination unit includes an energy focal length value determination subunit, which is used to: obtain a preconfigured focal length defect model; the focal length defect model includes an association relationship between defect information and focal length values; determine the multiple focal length values ​​corresponding to the focal length dimension based on the focal length defect model; obtain a preconfigured energy defect model; the energy defect model includes an association relationship between defect information and energy values; determine the multiple energy values ​​corresponding to the energy dimension based on the focal length defect model.

[0023] In an exemplary embodiment of the present disclosure, the defect integration unit includes a defect integration sub-unit, which is used to: obtain a wafer image coordinate system corresponding to the wafer image, and a regional coordinate system corresponding to the exposure area; determine the defective grains in the first detection area, wherein the defective grains include grain defect information and defective grain coordinates; based on the wafer image coordinate system and the grain defect information, integrate the defective grains in the first detection area into the same exposure area to obtain a defect integration area; based on the regional coordinate system and the defective grain coordinates, integrate the defective grains in the defect integration area into the same grain to obtain a defect integrated grain.

[0024] In an exemplary embodiment of the present disclosure, the defect integration subunit is configured to: determine a reference defect grain in the defect integration area; determine a reference grain coordinate corresponding to the reference defect grain based on the regional coordinate system; and perform coordinate transformation processing on the defect grain coordinates based on the regional coordinate system to obtain the defect integration grain.

[0025] In an exemplary embodiment of the present disclosure, the defect detection module includes a defect detection unit, which is used to: obtain the field of view size of the defect scanning field of view adopted by the defect detection processing; based on the field of view size, determine the area to be detected from the second detection area; based on the defect integrated grains, perform defect detection processing on the grains in the area to be detected to obtain defect detection results.

[0026] In an exemplary embodiment of the present disclosure, the defect detection unit includes a subunit for determining an area to be detected, which is used to: determine the initial detection area one by one from the second detection area based on the field of view size; delete the repeated defect coordinates in the initial detection area to obtain the area to be detected; the repeated defect coordinates are the defect grain coordinates of other areas to be detected that have appeared in the second detection area.

[0027] In an exemplary embodiment of the present disclosure, the defect detection unit includes a defect detection sub-unit, which is used to: determine the grain to be measured from the area to be detected based on the defect integrated grain; perform defect detection processing on the grain to be measured based on the defect integrated grain to obtain the grain defect detection result; and use the grain defect detection result as the defect detection result of the area to be detected.

[0028] In an exemplary embodiment of the present disclosure, the above-mentioned defect detection device also includes a review detection module, which is used to: obtain a process requirement file, and determine a review detection area from the first detection area according to the process requirement file; based on the defect integrated grains, perform defect detection processing on the grains in the review detection area to obtain a defect review detection result corresponding to the review detection area.

[0029] According to a third aspect of the present disclosure, an electronic device is provided, comprising: a processor; and a memory, wherein the memory stores computer-readable instructions, and when the computer-readable instructions are executed by the processor, the defect detection method according to any one of the above items is implemented.

[0030] According to a fourth aspect of the present disclosure, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the defect detection method according to any one of the above items is implemented.

[0031] The technical solutions provided by the present disclosure may have the following beneficial effects:

[0032] The defect detection method in the exemplary embodiment of this disclosure, on the one hand, divides the wafer map into hard-to-detect and easy-to-detect areas based on defect characteristics. By integrating the defects of the grains in the easy-to-detect areas to obtain defect-integrated grains, defect detection is performed on the grains in the hard-to-detect areas based on the defect-integrated grains, thereby avoiding the problem of missed defects. Furthermore, this solution provides a more comprehensive detection of grain defects in the wafer map, thereby improving the effectiveness of the wafer.

[0033] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings described below are only some embodiments of the present disclosure, and those skilled in the art can derive other drawings based on these drawings without inventive effort. In the drawings:

[0035] Figure 1Schematically shows a defect result diagram obtained by performing defect detection on a grain in a related solution;

[0036] Figure 2 Schematically shows a flow chart of a defect detection method according to an exemplary embodiment of the present disclosure;

[0037] Figure 3 Schematically shows an effect diagram of defect comparison between two adjacent grains according to an exemplary embodiment of the present disclosure;

[0038] Figure 4 Schematically shows a result diagram of dividing a wafer image into regions according to defect scanning results according to an exemplary embodiment of the present disclosure;

[0039] Figure 5 Schematically illustrates a defect distribution map in a wafer map under a focus energy matrix according to an exemplary embodiment of the present disclosure;

[0040] Figure 6 Schematically shows an effect diagram of performing exposure processing on a wafer image according to an exemplary embodiment of the present disclosure;

[0041] Figure 7 Schematically illustrates a correlation diagram between a focal length value and defect information according to an exemplary embodiment of the present disclosure;

[0042] Figure 8 A diagram schematically illustrates a correlation between energy values ​​and defect information according to an exemplary embodiment of the present disclosure;

[0043] Figure 9 Schematically illustrates a defect detection region map that is re-divided after defect detection is performed on a wafer map according to an exemplary embodiment of the present disclosure;

[0044] Figure 10 Schematically shows a block diagram of a defect detection device according to an exemplary embodiment of the present disclosure;

[0045] Figure 11 A block diagram schematically illustrates an electronic device according to an exemplary embodiment of the present disclosure;

[0046] Figure 12 A schematic diagram schematically illustrates a computer-readable storage medium according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0047] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. Like reference numerals in the drawings represent like or similar parts, and thus repetitive description thereof will be omitted.

[0048] In addition, the described features, structures or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure can be practiced without one or more of the specific details, or other methods, components, devices, steps, etc. can be adopted. In other cases, well-known structures, methods, devices, implementations, materials or operations are not shown or described in detail to avoid obscuring various aspects of the present disclosure.

[0049] The blocks shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically separate entities. Specifically, these functional entities may be implemented in software, or in one or more software-hardened modules, or in different networks and / or processor devices and / or microcontroller devices.

[0050] Currently, defect detection of dies in wafer images is mainly performed by scanning defects between adjacent dies using surface defect detection equipment to determine the defect scanning results. Figure 1 , Figure 1 The schematic diagram shows the defect result diagram obtained by performing defect detection on the crystal grain (ie chip) in the related solution. Figure 1 As can be seen in the figure, the comparison between Chip A and Chip B shows no difference due to the small difference between them. The comparison between Chip B and Chip C also shows no difference due to the small difference between them. Therefore, the defect between Chip A and Chip C cannot be detected.

[0051] Based on this, in this example embodiment, a defect detection method is first provided. The defect detection method of the present disclosure can be implemented using a server, or the method described in the present disclosure can be implemented using a terminal device. The terminals described in the present disclosure may include mobile terminals such as mobile phones, tablet computers, laptops, PDAs, personal digital assistants (PDAs), and fixed terminals such as desktop computers. Figure 2The following schematically illustrates a defect detection method flow according to some embodiments of the present disclosure. Figure 2 , the defect detection method may include the following steps:

[0052] Step S210, obtaining defect scanning results of the wafer image, and dividing the wafer image into a first detection area and a second detection area based on the defect scanning results; the first detection area is a wafer detection area where the grain feature contrast value is greater than the feature reference threshold.

[0053] According to some exemplary embodiments of the present disclosure, the wafer map may be based on chips (or called dies), and the results of the completed tests may be marked at the positions of the individual chips with different colors, shapes or codes. The defect scan result may be the detection result of performing a defect scan on the dies in the wafer map to determine whether the dies have defects. The first detection area may be a wafer detection area where the die feature contrast value is greater than the feature reference threshold. The second detection area may be a wafer detection area where the die feature contrast value is less than or equal to the feature reference threshold. The die feature contrast value may be a feature value obtained by comparing the grayscale images of adjacent dies in the wafer map. The feature reference threshold may be a pre-configured threshold for comparing the feature value corresponding to the grayscale image of the die defect. The wafer detection area may be the area divided after defect detection of the die in the wafer map.

[0054] During the semiconductor chip production process, circuits are fabricated onto wafers using a variety of complex physical and chemical methods. At the final stage of production, various electrical tests are performed to ensure product functionality. These test results, combined with the wafer's shape, create a pattern known as a wafer map. After performing a defect scan on the wafer map, a corresponding defect scan result is obtained. This defect scan result includes a feature comparison between grayscale images of adjacent die to generate a grain feature contrast value.

[0055] After obtaining the grain feature comparison value, the grain feature comparison value can be compared with a pre-configured feature reference threshold, and the wafer detection area where the grain feature comparison value is greater than the feature reference threshold is used as the second detection area; other areas in the wafer image except the first detection area are used as the second detection area.

[0056] Step S220 , performing defect integration processing on the dies in the first inspection area according to the focal energy matrix of the wafer image to obtain defect integrated dies.

[0057] According to some exemplary embodiments of the present disclosure, a focal length energy matrix may be a set of data obtained by varying the focus value in one direction at a fixed step size and the exposure energy in another direction at a fixed step size during exposure. Defect integration processing may be a process of integrating defect information from grains in a first inspection area into a specific grain. A defect-integrated grain may be a defective grain obtained by integrating defect information from all grains in the first inspection area.

[0058] After the wafer image is divided into regions, the defect characteristics of the grains in the first detection area are more obvious, and the surface defect detection equipment can almost determine the defect information contained in all the grains in the first detection area. Since the defective grains in the first detection area are distributed in different positions of the region, the grains in the first detection area can be first subjected to defect integration processing. Specifically, the focal length energy matrix corresponding to the wafer image can be determined first, and the distribution of defects in the grains under the action of different focal length values ​​and different energy values ​​corresponding to the focal length energy matrix of the wafer image. According to the focal length energy matrix of the wafer image, the grains in the first detection area can be defect-integrated to obtain defect-integrated grains, and then the obtained defect-integrated grains can be used to detect the defects of the wafers in the second detection area.

[0059] During the integration process, since the first inspection area can include multiple exposure areas, a target area can be identified from these exposure areas, and the grain defects in the first inspection area can be integrated into the target area. Furthermore, since all grains in the same exposure area correspond to the same focal length and energy values, to improve defect detection efficiency, grain defects belonging to the same exposure area can be integrated into a single grain, resulting in a defect-integrated grain.

[0060] In step S230 , based on the defect-integrated die, defect detection processing is performed on the die in the second detection area to obtain defect detection results.

[0061] According to some exemplary embodiments of the present disclosure, the defect detection result may be a detection result obtained by performing a defect detection process on the dies in the second inspection area.

[0062] After obtaining the defect-integrated die, defect detection processing can be performed on the die in the second inspection area based on the defect-integrated die to determine whether there are defects in the die in the second inspection area at the same position as the first inspection area, thereby obtaining a final defect detection result. The defect detection result may include the defective die in the second inspection area.

[0063] The defect detection method of this exemplary embodiment, on the one hand, divides the wafer map into hard-to-detect and easy-to-detect areas based on defect characteristics. By integrating the defects of the grains in the easy-to-detect areas to obtain defect-integrated grains, defect detection is performed on the grains in the hard-to-detect areas based on the defect-integrated grains, thereby avoiding the problem of missed defects. Furthermore, this solution allows for more comprehensive detection of grain defects in the wafer map, thereby improving the effectiveness of the wafer.

[0064] The defect detection method in this exemplary embodiment will be further described below.

[0065] In an exemplary embodiment of the present disclosure, for step S210, the wafer image is divided into a first detection area and a second detection area based on the defect scanning result, including: performing defect scanning processing on the wafer image by a defect detection device to obtain a defect scanning result; determining a grain feature contrast value based on the defect scanning result, the grain feature contrast value being determined by performing consistency comparison on adjacent grains; taking a wafer detection area with a grain feature contrast value greater than a feature reference threshold as a first detection area; and taking a wafer detection area with a grain feature contrast value less than or equal to the feature reference threshold as a second detection area.

[0066] The defect detection device may be a device for performing defect scanning on dies in a wafer image, for example, the defect detection device may be a surface defect detection device.

[0067] After acquiring the wafer image, surface defect inspection equipment can be used to perform a defect scan on all the dies in the wafer image, generating a defect scan result. The defect scan result includes the grain feature comparison values ​​corresponding to the grayscale images of adjacent dies. For example, the grayscale images of two adjacent dies in the wafer image can be compared for consistency to determine the difference between them and generate a grain feature comparison value.

[0068] After obtaining the grain feature contrast value, the grain feature contrast value can be compared with a pre-configured feature reference threshold, and the wafer image can be divided into regions according to the comparison result to obtain a first detection area and a second detection area. The first detection area can be a wafer detection area in the wafer image where the grain feature contrast value is greater than the feature reference threshold, that is, an area in the wafer image where the grain defect feature is more obvious. The second detection area can be a wafer detection area where the grain feature contrast value is less than or equal to the feature reference threshold, that is, an area in the wafer image where the grain defect feature is less obvious.

[0069] refer to Figure 3 , Figure 3 The following schematically shows the effect of defect comparison between two adjacent grains according to an exemplary embodiment of the present disclosure. Figure 3In the embodiment, the grayscale image of grain 310 is compared with the grayscale image of grain 320 to obtain a grain feature contrast value between the two. The grain feature contrast value between grain 310 and grain 320 is greater than the feature reference threshold, and the difference in the grayscale images between the two is more obvious. Therefore, it can be considered that the defects of the grains are easy to detect. According to the above judgment method, the wafer detection area where the grains with more obvious defect features are located is used as the first detection area.

[0070] In addition, the grayscale image of grain 330 is compared with the grayscale image of grain 340 to obtain a grain feature contrast value between the two. The grain feature contrast value between grain 330 and grain 340 is less than the feature reference threshold, and the difference in the grayscale images between the two is small. Therefore, it can be considered that the defects of the above-mentioned grains are not easy to detect, and the wafer inspection area where such grains are located is used as the second inspection area.

[0071] refer to Figure 4 , Figure 4 The diagram schematically illustrates the results of dividing a wafer map into regions based on defect scan results according to an exemplary embodiment of the present disclosure. Using this region division method, the wafer map is divided into a first inspection region 410 and a second inspection region 420. By dividing the wafer map into regions, defect detection results from the first inspection region can be used to perform defect detection on dies in the second inspection region, thereby improving defect detection efficiency.

[0072] In an exemplary embodiment of the present disclosure, for step S220, defect integration processing is performed on the grains in the first detection area according to the focal length energy matrix of the wafer image to obtain defect-integrated grains, including: dividing the first detection area into multiple exposure areas according to the focal length dimension and energy dimension of the focal length energy matrix; and defect integration is performed on the grains in each exposure area to obtain defect-integrated grains.

[0073] The focal length dimension can be a variable dimension consisting of multiple different focal length values. The energy dimension can be a variable dimension consisting of multiple different energy values. The exposure area (shot) can be the maximum area range that a lithography machine can support for a single exposure in a lithography process.

[0074] When performing defect integration processing, it can be performed according to the focal length energy matrix corresponding to the wafer image. The focal length energy matrix includes two dimensions: focal length dimension and energy dimension. In each dimension, the focal length value and the energy value are changing. In order to facilitate the regional division of the wafer image, the first detection area can be divided into multiple exposure areas according to the changing focal length value and energy value. After obtaining multiple exposure areas, the grains in different exposure areas can be defect integrated. The defect integration processing process mainly converts the defect coordinates of the grains, integrates the defects of the grains in multiple exposure areas into the same grain, and obtains a defect-integrated grain. Through the above processing steps, the grain defect information in the first detection area can be integrated into one grain, and then the second detection area can be subjected to defect detection based on the obtained defect-integrated grain, which can improve the detection efficiency.

[0075] In an exemplary embodiment of the present disclosure, the first detection area is divided into multiple exposure areas according to the focal length dimension and the energy dimension of the focal length energy matrix, including: determining multiple focal length values ​​corresponding to the focal length dimension, and multiple energy values ​​corresponding to the energy dimension; dividing the first detection area into multiple exposure areas according to the focal length value and the energy value, and the grains belonging to the same exposure area have the same focal length value and energy value.

[0076] The focal length value can be a number of specific values ​​obtained by changing the focal length value in a fixed step size along the focal length dimension; in the focal length dimension, the values ​​of other variables are zero. The energy value can be a number of specific values ​​obtained by changing the energy value in a fixed step size along the energy dimension; in the energy dimension, the values ​​of other variables are zero.

[0077] Before determining the multiple exposure areas included in the first detection area, multiple focal length values ​​corresponding to the focal length dimension and multiple energy values ​​corresponding to the energy dimension may be determined first. Figure 5 , Figure 5 Schematically shows a defect distribution map in a wafer map under a focus energy matrix according to an exemplary embodiment of the present disclosure. Figure 5 It can be seen that the horizontal axis direction can be the focal length dimension, and the focal length dimension can have multiple different focal length values; the vertical axis direction can be the energy dimension, and the energy dimension can have multiple different energy values.

[0078] During region division, the first inspection area can be divided into multiple exposure areas based on the focal length and energy values ​​in the focal length-energy matrix. During the exposure process, the same exposure area uses the same focal length and energy values, meaning that the grains belonging to the same exposure area have the same focal length and energy values. For example, a focal length of 0 and an energy value of 5 can correspond to one or more exposure areas. This region division method allows the first inspection area to be divided into multiple exposure areas, allowing defects in the grains to be integrated based on the exposure areas, thereby improving defect integration efficiency.

[0079] In an exemplary embodiment of the present disclosure, multiple focal length values ​​corresponding to the focal length dimension and multiple energy values ​​corresponding to the energy dimension are determined, including: obtaining a preconfigured focal length defect model; the focal length defect model includes an association relationship between defect information and focal length values; based on the focal length defect model, multiple focal length values ​​corresponding to the focal length dimension are determined; obtaining a preconfigured energy defect model; the energy defect model includes an association relationship between defect information and energy values; based on the focal length defect model, multiple energy values ​​corresponding to the energy dimension are determined.

[0080] The focal length defect model may be a mathematical model for representing the correlation between defect information of a grain and a focal length value, and the energy defect model may be a mathematical model for representing the correlation between defect information of a grain and an energy value.

[0081] In the photolithography process, the wafer pattern can be illuminated, refer to Figure 6 , Figure 6 Schematically shows the effect of exposing a wafer image according to an exemplary embodiment of the present disclosure. Figure 6 It can be seen that the wafer film is covered with a layer of photoresist. In the exposure process, a light beam with a certain energy value and focal length value can be used to illuminate the wafer. The light beam passes through the transparent film and acts on the focal plane of the photoresist, forming a corresponding depth of focus.

[0082] During the photolithography process, the defect distribution patterns of different die within a wafer vary due to the varying energy and focal lengths applied to the die. Furthermore, since the presence of defects in a die varies with the energy and focal length applied to the die, the defect distribution within the wafer map can be analyzed using pre-configured focal length and energy defect models.

[0083] Get the pre-configured focus defect model, refer to Figure 7 , Figure 7 A diagram schematically illustrates a correlation between a focal length value and defect information according to an exemplary embodiment of the present disclosure. Figure 7The focal length defect model in the paper includes the relationship between defect information and focal length value. Figure 7 It can be seen that when the focal length value is within a specific numerical range, the possibility of grain defects is small; when the focal length value exceeds this numerical range, the possibility of grain defects becomes greater, and overfocus or out-of-focus may lead to an increase in the number of defects.

[0084] In addition, reference Figure 8 , Figure 8 A diagram schematically illustrates a correlation between energy values ​​and defect information according to an exemplary embodiment of the present disclosure. Figure 8 The energy defect model in [1] includes the correlation between defect information and energy value. Based on energy theory, the lower the energy, the less energy is absorbed in the same time, which is not conducive to the formation of graphics. Figure 8 It can be seen that the energy value and grain defects are generally negatively correlated. The larger the energy value, the smaller the possibility of grain defects. When it reaches a specific value, the grain defect rate in the wafer is relatively stable.

[0085] During the exposure process, the impact of energy and focal length on the number of die defects, combined with comprehensive factors such as process difficulty, can determine multiple focal length and energy values ​​used in the exposure process. Once these focal length and energy values ​​are determined, the defect information of the die in the wafer image under different focal length and energy values ​​can be analyzed, serving as the basis for subsequent defect detection.

[0086] In an exemplary embodiment of the present disclosure, defects are integrated on the grains in each exposure area to obtain defect-integrated grains, including: obtaining a wafer image coordinate system corresponding to the wafer image, and a regional coordinate system corresponding to the exposure area; determining defective grains in the first detection area, the defective grains including grain defect information and defective grain coordinates; based on the wafer image coordinate system and the grain defect information, integrating the defective grains in the first detection area into the same exposure area to obtain a defect-integrated area; based on the regional coordinate system and the defective grain coordinates, integrating the defective grains in the defect-integrated area into the same grain to obtain a defect-integrated grain.

[0087] Among them, the wafer map coordinate system can be a coordinate system applicable to the entire wafer. For example, the position coordinates of each exposure area can be determined based on the wafer map coordinate system. The regional coordinate system can be a coordinate system determined based on the exposure area. For example, each exposure area can have a corresponding regional coordinate system. The defective grain can be a grain with defects in the wafer. The grain defect information can be relevant information corresponding to the defective grain. For example, the grain defect information can include the defect type. The defective grain coordinates can be the position coordinates corresponding to the defective grain, and the defective grain coordinates can be determined based on the wafer map coordinate system and the regional coordinate system. The defect integration area can be the area obtained after integrating the grain defects in the entire wafer map into a target exposure area.

[0088] Defect integration is performed on the grains in the wafer image. For example, the defect integration process can be performed based on the wafer image coordinate system and the regional coordinate system to transform the coordinates of the defective grains. Before defect integration, the wafer image coordinate system corresponding to the wafer image and the regional coordinate system corresponding to the exposure area can be obtained. The defect integration process is mainly performed on the grains in the first inspection area. The defective grains in the first inspection area are first determined. The defective grains include grain defect information and defective grain coordinates. For example, when the grains in the first inspection area are determined, the defective grains may include the grain defect type (pattern) and the defective grain coordinates.

[0089] The defect integration process can be divided into two major steps: After the defective grains in the first inspection area are determined, the determined defective grains may include the defective grain coordinates. Since the wafer map has a specific wafer map coordinate system, the exposure areas where the defective grains in the first inspection area are located can be integrated into the same exposure area through coordinate transformation based on the wafer map coordinate system to obtain a defect integration area. For example, a specific exposure area in the first inspection area is used as the reference exposure area, and coordinate transformation is performed on other exposure areas in the first inspection area to integrate the defect information in the exposure areas to obtain a defect integration area.

[0090] In order to further improve the defect detection efficiency, the integration degree of grain defects can be further improved. After obtaining the defect integration area, since the grains in the same exposure area have the same energy value and focal length value, the grain defects in the defect integration area can be further integrated into the same grain. For example, the coordinates of the defective grains can be transformed based on the regional coordinate system, and the defective grains in the defect integration area can be integrated into the same grain to obtain defect integrated grains, so as to perform subsequent defect detection processing based on the defect integrated grains.

[0091] In an exemplary embodiment of the present disclosure, defective grains in a defect integration region are integrated into the same grain based on a regional coordinate system and defective grain coordinates to obtain defective integrated grains, including: determining a reference defective grain in the defect integration region; determining a reference grain coordinate corresponding to the reference defective grain based on the regional coordinate system; and performing coordinate conversion processing on the defective grain coordinates based on the regional coordinate system to obtain a defective integrated grain.

[0092] The reference defect grain may be a grain at a coordinate position in a positioning region coordinate system. For example, the reference defect coordinate may be a grain located at the lower left corner of an exposure region. The reference grain coordinate may be the position coordinate corresponding to the reference defect grain.

[0093] When integrating the grain defects in the defect integration region, a reference defect grain can be determined in the defect integration region. For example, the coordinates of the grain in the lower left corner of the defect integration region can be (0, 0). The first defect grain appearing in the lower left corner of the defect integration region can be used as the reference defect grain. Since the defect integration region has a corresponding regional coordinate system, the reference grain coordinates corresponding to the reference defect grain can be determined based on the regional coordinate system. For example, the determined reference grain coordinates can be (2, 3). Based on the regional coordinate system, the coordinates of the defect grain are transformed to obtain a defect-integrated grain. Through the above processing steps, a defect-integrated grain can be obtained and used in the defect detection process of the second detection region.

[0094] In an exemplary embodiment of the present disclosure, for step S230, based on the defect-integrated grains, defect detection processing is performed on the grains in the second detection area to obtain defect detection results, including: obtaining the field size of the defect scanning field of view used for defect detection processing; based on the field size, determining the area to be detected from the second detection area; based on the defect-integrated grains, defect detection processing is performed on the grains in the area to be detected to obtain defect detection results.

[0095] The defect scanning field of view may be the field of view covered by the defect scanning device during the defect detection process. The field of view size may be the specific size of the defect scanning field of view. The area to be inspected may be the area to be inspected for defects.

[0096] When performing defect detection on the second inspection area, the field of view (FOV) size of the defect scanning field can be determined first. For example, the field of view size FOV used in the defect scanning process can be 4um×4um. Then, the defect scanning field of view can cover the range of grains at one time. In a single scanning process, the area to be inspected can be determined based on the range area scanned by the FOV. After determining the area to be inspected, the grains in the area to be inspected can be integrated based on the defects, and defect detection processing can be performed on the grains in the area to be inspected to obtain defect detection results. Through the above processing steps, the area to be inspected can be determined one by one based on the field of view size, and defect detection processing can be performed on the grains in the area to be inspected.

[0097] In an exemplary embodiment of the present disclosure, based on the field of view size, the area to be inspected is determined from the second inspection area, including: determining the initial inspection area one by one from the second inspection area based on the field of view size; deleting the repeated defect coordinates in the initial inspection area to obtain the area to be inspected; the repeated defect coordinates are the defect grain coordinates of other areas to be inspected that have appeared in the second inspection area.

[0098] The initial inspection area may be an area directly intercepted from the second inspection area based on the size of the defect scanning field of view. The repeated defect coordinates may be the position coordinates of defective grains that have appeared in other areas to be inspected.

[0099] After determining the field of view size, the second detection area can be scanned based on the field of view size, and the area that falls within the field of view size during one scan process can be used as the initial detection area. For the initial detection area, some of the grains contained in the area may be defective grains that have been determined in the previous defect detection process. Therefore, in this defect detection process, the defective grains that have been obtained in other areas to be detected can be used as repeated defective grains, and the repeated defective grains correspond to repeated defect coordinates. After determining the repeated defect coordinates, the repeated defect coordinates can be deleted from the initial detection area, that is, all repeated defects (defects) appearing in the FOV are deleted to obtain the area to be detected. By deleting the repeated defect coordinates in the initial detection area to obtain the area to be detected, and performing defect detection processing based on the area to be detected, the defect detection efficiency can be further improved.

[0100] In an exemplary embodiment of the present disclosure, defect detection processing is performed on the grains in the area to be inspected based on defect-integrated grains to obtain defect detection results, including: determining the grains to be measured from the area to be inspected based on the defect-integrated grains; performing defect detection processing on the grains to be measured based on the defect-integrated grains to obtain grain defect detection results; and using the grain defect detection results as the defect detection results of the area to be inspected.

[0101] The die to be measured may be a die waiting for defect detection, and the die defect detection result may be a detection result of whether the die has defects.

[0102] After deleting duplicate defect coordinates to obtain the area to be inspected, the die to be measured can be identified from the area to be inspected based on the defect-integrated die. After scanning the wafer using a surface defect inspection device, defects in some of the die in the second inspection area have already been identified. When performing defect inspection on the die in the area to be inspected based on the defect-integrated die, the die to be measured can be identified from the area to be inspected, i.e., the die that has not been determined to have defects after being scanned by the surface defect inspection device.

[0103] After determining the die to be measured, defect detection can be performed on the die to be measured based on the defect-integrated die. Since the defect-integrated die can include relevant information such as the defect type, a consistency comparison between the defect-integrated die and the die to be measured can be performed to determine whether the die to be measured has defects. The obtained detection result is used as the die defect detection result. When all the die to be measured in the area to be tested have been tested, the die defect detection result is used as the defect detection result for the area to be tested.

[0104] In an exemplary embodiment of the present disclosure, a process requirement file is obtained, and a review inspection area is determined from the first inspection area according to the process requirement file; based on the defect integrated grains, defect inspection processing is performed on the grains in the review inspection area to obtain defect review inspection results corresponding to the review inspection area.

[0105] The process requirement document may be a requirement document used during the production and processing of the wafer. The review inspection area may be an area that requires re-defect inspection and exposure. The defect review inspection result may be a result obtained by re-defect inspection of the die in the review inspection area.

[0106] Typically, after defect-integrated grains are determined based on the grain defect information in the first inspection area, the defect-integrated grains can be directly used to perform defect inspection on the grains in the second inspection area. For production scenarios with special manufacturing process requirements, process requirement files corresponding to such production scenarios can be obtained. After scanning the wafer using surface defect inspection equipment, the window parameters (PH FEM window qualification) corresponding to the wafer image in the exposure process can be determined based on the divided first and second inspection areas, including the focal length and energy values ​​corresponding to the wafer image, and the determined window parameters are stored in the process requirement file.

[0107] After obtaining the window parameters based on the process requirement file, since the boundary between the first detection area and the second detection area can be determined in combination with the window parameters, the review detection area can be determined from the first detection area based on the window parameters. The review detection area can be an area where it is necessary to re-inspect whether the grains contained therein have defects. After determining the review detection area, defect detection processing can be performed on the grains in the review detection area based on the defect-integrated grains to obtain defect review detection results corresponding to the review detection area. The specific method of performing defect detection processing on the review detection area based on the defect-integrated grains is the same as the method of performing defect detection processing on the second detection area based on the defect-integrated grains, and will not be repeated in this disclosure.

[0108] refer to Figure 9 , Figure 9 Schematically shows a defect detection area map that is re-divided after defect detection of a wafer image according to an exemplary embodiment of the present disclosure. Figure 9 As can be seen in the figure, the division results of the inspection area corresponding to the wafer image have changed accordingly. After re-dividing the area, the division results are obtained, namely area 910 and area 920. The dotted box marked area 930 may be the area where the defect detection results obtained by the second defect detection process differ from those obtained by the first defect scanning process. By performing defect detection on the composite inspection area, the window parameters corresponding to the wafer image in the exposure process can be adjusted according to the detection results, making the final determined window parameters more accurate.

[0109] In summary, the defect detection method disclosed herein obtains the defect scanning results of the wafer image, and divides the wafer image into a first detection area and a second detection area based on the defect scanning results; the first detection area is the wafer detection area where the grain feature contrast value is greater than the feature reference threshold; according to the focal length energy matrix of the wafer image, the grains in the first detection area are defect-integrated to obtain defect-integrated grains; based on the defect-integrated grains, the grains in the second detection area are defect-detected to obtain defect detection results. On the one hand, according to the defect characteristics, the wafer image is divided into a difficult-to-detect area and an easy-to-detect area, and by integrating the grain defects in the easy-to-detect area to obtain defect-integrated grains, the grains in the difficult-to-detect area are defect-detected based on the defect-integrated grains, which can avoid the problem of missed defect detection. On the other hand, by performing more comprehensive detection of grain defects in the wafer image through this solution, the effectiveness of the wafer can be improved. On the other hand, by re-defectively detecting the grains in the review detection area, the window parameters can be re-determined based on the detection results, so that the determined window parameters are more accurate.

[0110] It should be noted that although the steps of the method of the present invention are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in this specific order, or that all steps must be performed to achieve the desired results. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0111] In addition, in this exemplary embodiment, a defect detection device is also provided. Figure 10 , the defect detection device 1000 may include:

[0112] Specifically, the area division module 1010 is used to obtain the defect scanning results of the wafer image, and divide the wafer image into a first detection area and a second detection area based on the defect scanning results; the first detection area is a wafer detection area where the grain feature contrast value is greater than the feature reference threshold; the defect integration module 1020 is used to perform defect integration processing on the grains in the first detection area according to the focal length energy matrix of the wafer image to obtain defect integrated grains; the defect detection module 1030 is used to perform defect detection processing on the grains in the second detection area based on the defect integrated grains to obtain defect detection results.

[0113] In an exemplary embodiment of the present disclosure, the region division module 1010 includes a region division unit, which is used to: perform defect scanning processing on the wafer image through a defect detection device to obtain a defect scanning result; determine a grain feature contrast value based on the defect scanning result, and the grain feature contrast value is determined by performing consistency comparison on adjacent grains; use a wafer detection area with a grain feature contrast value greater than a feature reference threshold as a first detection area; and use a wafer detection area with a grain feature contrast value less than or equal to the feature reference threshold as a second detection area.

[0114] In an exemplary embodiment of the present disclosure, the defect integration module 1020 includes a defect integration unit for: dividing the first detection area into multiple exposure areas according to the focal length dimension and the energy dimension of the focal length energy matrix; and performing defect integration on the grains in each exposure area to obtain defect-integrated grains.

[0115] In an exemplary embodiment of the present disclosure, the defect integration unit includes an exposure area determination unit, which is used to: determine multiple focal length values ​​corresponding to the focal length dimension, and multiple energy values ​​corresponding to the energy dimension; divide the first detection area into multiple exposure areas according to the focal length value and the energy value, and the grains belonging to the same exposure area have the same focal length value and energy value.

[0116] In an exemplary embodiment of the present disclosure, the exposure area determination unit includes an energy focal length value determination subunit, which is used to: obtain a preconfigured focal length defect model; the focal length defect model includes an association relationship between defect information and focal length values; determine multiple focal length values ​​corresponding to the focal length dimension based on the focal length defect model; obtain a preconfigured energy defect model; the energy defect model includes an association relationship between defect information and energy values; determine multiple energy values ​​corresponding to the energy dimension based on the focal length defect model.

[0117] In an exemplary embodiment of the present disclosure, the defect integration unit includes a defect integration sub-unit, which is used to: obtain a wafer image coordinate system corresponding to the wafer image, and a regional coordinate system corresponding to the exposure area; determine the defective grains in the first detection area, the defective grains including grain defect information and defective grain coordinates; based on the wafer image coordinate system and the grain defect information, integrate the defective grains in the first detection area into the same exposure area to obtain a defect integration area; based on the regional coordinate system and the defective grain coordinates, integrate the defective grains in the defect integration area into the same grain to obtain a defect integrated grain.

[0118] In an exemplary embodiment of the present disclosure, the defect integration subunit is configured to: determine a reference defect grain in the defect integration region; determine a reference grain coordinate corresponding to the reference defect grain based on a regional coordinate system; and perform coordinate transformation processing on the defect grain coordinates based on the regional coordinate system to obtain a defect integrated grain.

[0119] In an exemplary embodiment of the present disclosure, the defect detection module 1030 includes a defect detection unit for: obtaining the field of view size of the defect scanning field of view used in defect detection processing; determining the area to be detected from the second detection area based on the field of view size; and performing defect detection processing on the grains in the area to be detected based on defect integrated grains to obtain defect detection results.

[0120] In an exemplary embodiment of the present disclosure, the defect detection unit includes a subunit for determining an area to be detected, which is used to: determine the initial detection area one by one from the second detection area based on the field of view size; delete the repeated defect coordinates in the initial detection area to obtain the area to be detected; the repeated defect coordinates are the coordinates of defective grains that have appeared in other areas to be detected in the second detection area.

[0121] In an exemplary embodiment of the present disclosure, the defect detection unit includes a defect detection sub-unit, which is used to: determine the grains to be measured from the area to be detected based on the defect-integrated grains; perform defect detection processing on the grains to be measured based on the defect-integrated grains to obtain grain defect detection results; and use the grain defect detection results as the defect detection results of the area to be detected.

[0122] In an exemplary embodiment of the present disclosure, the above-mentioned defect detection device 1000 also includes a review detection module, which is used to: obtain a process requirement file, and determine a review detection area from the first detection area according to the process requirement file; based on the defect integrated grains, perform defect detection processing on the grains in the review detection area to obtain a defect review detection result corresponding to the review detection area.

[0123] The specific details of the virtual modules of each defect detection device mentioned above have been described in detail in the corresponding defect detection method, so they will not be repeated here.

[0124] It should be noted that although several modules or units of the defect detection device are mentioned in the detailed description above, this division is not mandatory. In fact, according to the embodiments of the present disclosure, the features and functions of two or more modules or units described above can be embodied in a single module or unit. Conversely, the features and functions of a single module or unit described above can be further divided and embodied by multiple modules or units.

[0125] In addition, in an exemplary embodiment of the present disclosure, an electronic device capable of implementing the above method is also provided.

[0126] Those skilled in the art will appreciate that various aspects of the present invention may be implemented as systems, methods, or program products. Accordingly, various aspects of the present invention may be implemented as a complete hardware embodiment, a complete software embodiment (including firmware, microcode, etc.), or a combination of hardware and software embodiments, which may be collectively referred to herein as "circuits," "modules," or "systems."

[0127] Refer to the following Figure 11 1100 according to this embodiment of the present disclosure is described. Figure 11 The electronic device 1100 shown is merely an example and should not limit the functions and scope of use of the embodiments of the present disclosure.

[0128] like Figure 11 As shown, electronic device 1100 is implemented as a general-purpose computing device. Components of electronic device 1100 may include, but are not limited to, the aforementioned at least one processing unit 1110, the aforementioned at least one storage unit 1120, a bus 1130 connecting various system components (including storage unit 1120 and processing unit 1110), and a display unit 1140.

[0129] The storage unit stores program codes, which can be executed by the processing unit 1110, so that the processing unit 1110 executes the steps according to various exemplary embodiments of the present disclosure described in the above “Exemplary Method” section of this specification.

[0130] The storage unit 1120 may include a readable medium in the form of a volatile storage unit, such as a random access memory unit (RAM) 1121 and / or a cache memory unit 1122 , and may further include a read-only memory unit (ROM) 1123 .

[0131] The storage unit 1120 may also include a program / utility 1124 having a set (at least one) of program modules 1125, such program modules 1125 including but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment.

[0132] Bus 1130 may represent one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus architectures.

[0133] Electronic device 1100 can also communicate with one or more external devices 1170 (e.g., a keyboard, pointing device, Bluetooth device, etc.), one or more devices that enable a user to interact with electronic device 1100, and / or any device that enables electronic device 1100 to communicate with one or more other computing devices (e.g., a router, modem, etc.). Such communication can occur via input / output (I / O) interface 1150. Furthermore, electronic device 1100 can communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN), and / or a public network such as the Internet) via network adapter 1160. As shown, network adapter 1160 communicates with other modules of electronic device 1100 via bus 1130. It should be understood that, although not shown, other hardware and / or software modules can be used in conjunction with electronic device 1100, including but not limited to microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0134] Through the description of the above embodiments, it is easy for those skilled in the art to understand that the example embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solution according to the embodiments of the present disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, and includes a number of instructions to enable a computing device (which can be a personal computer, a server, a terminal device, or a network device, etc.) to execute the method according to the embodiments of the present disclosure.

[0135] In exemplary embodiments of the present disclosure, a computer-readable storage medium is also provided, storing a program product capable of implementing the aforementioned methods of this specification. In some possible embodiments, various aspects of the present invention may also be implemented in the form of a program product comprising program code. When the program product is executed on a terminal device, the program code is configured to cause the terminal device to perform the steps according to various exemplary embodiments of the present invention described in the "Exemplary Methods" section of this specification.

[0136] refer to Figure 12 , a program product 1200 for implementing the above-described method according to an embodiment of the present invention is described. The program product 1200 may be a portable compact disc read-only memory (CD-ROM) and include program code, and may be run on a terminal device, such as a personal computer. However, the program product of the present invention is not limited thereto. In this document, a readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0137] The program product may be implemented in any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or component, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof.

[0138] A computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, which carries readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A readable signal medium may also be any readable medium other than a readable storage medium that can transmit, propagate, or transfer a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0139] The program code embodied on the readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0140] The program code for performing the operations of the present invention may be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, C++, and the like, as well as conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a stand-alone software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving a remote computing device, the remote computing device may be connected to the user computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0141] Furthermore, the above-described figures are merely illustrative of the processes included in the method according to exemplary embodiments of the present invention and are not intended to be limiting. It is readily understood that the processes illustrated in the above-described figures do not indicate or limit the temporal order of these processes. Furthermore, it is readily understood that these processes may be executed synchronously or asynchronously, for example, in multiple modules.

[0142] Other embodiments of the present disclosure will readily occur to those skilled in the art after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow from the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the claims.

[0143] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes can be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A defect detection method, characterized in that: include: Obtaining a defect scan result of a wafer image, dividing the wafer image into a first detection area and a second detection area based on the defect scan result, performing feature comparison between grayscale images of adjacent grains in the defect scan result to obtain a grain feature contrast value, wherein the first detection area is a wafer detection area having a grain feature contrast value greater than a feature reference threshold, and the second detection area is a wafer detection area having a grain feature contrast value less than or equal to the feature reference threshold; performing defect integration processing on the dies in the first inspection area according to the focal length energy matrix of the wafer image to obtain defect integrated dies; Based on the defect-integrated die, defect detection processing is performed on the die in the second detection area to obtain a defect detection result.

2. The method according to claim 1, characterized in that The step of dividing the wafer image into a first inspection area and a second inspection area based on the defect scanning result includes: Performing defect scanning on the wafer image by a defect detection device to obtain a defect scanning result; Determining a grain feature comparison value based on the defect scanning result, wherein the grain feature comparison value is determined by performing consistency comparison on adjacent grains; The wafer inspection area where the grain feature contrast value is greater than the feature reference threshold is used as the first inspection area; A wafer inspection area in which the grain feature contrast value is less than or equal to the feature reference threshold is used as the second inspection area.

3. The method according to claim 1, characterized in that The step of performing defect integration processing on the dies in the first inspection area according to the focal length energy matrix of the wafer image to obtain defect integrated dies includes: Dividing the first detection area into a plurality of exposure areas according to a focal length dimension and an energy dimension of the focal length energy matrix; Defect integration is performed on the grains in each of the exposed areas to obtain the defect-integrated grains.

4. The method according to claim 3, characterized in that The step of dividing the first detection area into a plurality of exposure areas according to the focal length dimension and the energy dimension of the focal length energy matrix includes: Determining a plurality of focal length values ​​corresponding to the focal length dimension and a plurality of energy values ​​corresponding to the energy dimension; The first detection area is divided into a plurality of exposure areas according to the focal length value and the energy value, and the grains belonging to the same exposure area have the same focal length value and the energy value.

5. The method according to claim 4, characterized in that The determining of the multiple focal length values ​​corresponding to the focal length dimension and the multiple energy values ​​corresponding to the energy dimension includes: Obtaining a pre-configured focal length defect model; the focal length defect model includes an association relationship between defect information and focal length values; Determining, according to the focal length defect model, a plurality of focal length values ​​corresponding to the focal length dimension; Obtaining a pre-configured energy defect model; the energy defect model includes an association relationship between defect information and energy values; According to the focal length defect model, a plurality of energy values ​​corresponding to the energy dimension are determined.

6. The method according to claim 3, characterized in that The step of integrating defects of the grains in each of the exposed regions to obtain the defect-integrated grains comprises: Obtaining a wafer image coordinate system corresponding to the wafer image and a regional coordinate system corresponding to the exposure area; Determining defective grains in the first detection area, wherein the defective grains include grain defect information and defective grain coordinates; Based on the wafer map coordinate system and the die defect information, the defective dies in the first inspection area are integrated into the same exposure area to obtain a defect integration area; Based on the region coordinate system and the defective grain coordinates, the defective grains in the defect integration region are integrated into a same grain to obtain a defect integrated grain.

7. The method according to claim 6, characterized in that The step of integrating the defective grains in the defect integration region into a same grain based on the region coordinate system and the defective grain coordinates to obtain a defect integrated grain comprises: determining a reference defective grain in the defect integration region; Determining reference grain coordinates corresponding to reference defective grains based on the regional coordinate system; Based on the regional coordinate system, coordinate transformation processing is performed on the coordinates of the defective grain to obtain the defective integrated grain.

8. The method according to claim 1, characterized in that The step of performing defect detection on the dies in the second detection area based on the defect-integrated dies to obtain defect detection results includes: Obtaining the size of the defect scanning field of view used in the defect detection process; determining an area to be detected from the second detection area based on the field of view size; Based on the defect-integrated dies, defect detection processing is performed on the dies in the area to be detected to obtain defect detection results.

9. The method according to claim 8, characterized in that The determining the area to be detected from the second detection area based on the field of view size includes: determining initial detection areas one by one from the second detection areas based on the field of view size; The repeated defect coordinates in the initial inspection area are deleted to obtain the area to be inspected; the repeated defect coordinates are the coordinates of defective grains that have appeared in other areas to be inspected in the second inspection area.

10. The method according to claim 8, characterized in that The step of performing defect detection processing on the dies in the area to be detected based on the defect-integrated dies to obtain defect detection results includes: Determining a die to be measured from the area to be inspected based on the defect-integrated die; Based on the defect-integrated die, performing defect detection processing on the die to be measured to obtain the die defect detection result; The grain defect detection result is used as the defect detection result of the area to be detected.

11. The method according to claim 1, characterized in that The method further comprises: Obtaining a process requirement document, and determining a review inspection area from the first inspection area according to the process requirement document; Based on the defect-integrated dies, defect detection processing is performed on the dies in the review inspection area to obtain defect review inspection results corresponding to the review inspection area.

12. A defect detection device, characterized in that: include: A region division module is configured to obtain a defect scan result of a wafer image, perform feature comparison between grayscale images of adjacent grains in the defect scan result to obtain a grain feature contrast value, and divide the wafer image into a first detection region and a second detection region based on the defect scan result; the first detection region is a wafer detection region where the grain feature contrast value is greater than a feature reference threshold, and the second detection region is a wafer detection region where the grain feature contrast value is less than or equal to the feature reference threshold; a defect integration module, configured to perform defect integration processing on the dies in the first inspection area according to the focal length energy matrix of the wafer image to obtain defect-integrated dies; The defect detection module is configured to perform defect detection processing on the dies in the second detection area based on the defect-integrated dies to obtain defect detection results.

13. An electronic device, characterized in that: include: processor; as well as A memory having computer-readable instructions stored thereon, wherein the computer-readable instructions, when executed by the processor, implement the defect detection method according to any one of claims 1 to 11.

14. A computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the defect detection method according to any one of claims 1 to 11 is implemented.

Images