Bidirectional switching device and method for manufacturing the same, chip

Abstract

The application provides a bidirectional switch device and a preparation method and a chip thereof. The bidirectional switch device comprises a drift layer, a carrier layer, a P-body region, a P+ region, an N+ region, a dielectric layer, a gate layer, a passivation layer and an emitter. The P-body region, the P+ region and the N+ region on each carrier layer are equivalent to a base region, a collector region and an emitter region of an IGBT respectively, so that two reverse parallel IGBTs are equivalently formed, a bidirectional switch is formed on a semiconductor, the structure of the bidirectional switch is simplified, the design cost is reduced, and the bidirectional switch device adopts a vertical IGBT integrated structure, the conduction loss of the device is reduced, and the device can be applied to the super-high voltage field.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor technology, and in particular relates to a bidirectional switch device, a preparation method thereof, and a chip. Background Art

[0002] At present, bidirectional switches have the functions of controlling current and blocking voltage in forward and reverse directions, and are the basic components of power conversion topologies.

[0003] Traditional bidirectional switch devices are mainly composed of an IGBT and a diode connected in reverse parallel and then connected in series with another IGBT and diode connected in reverse parallel, or two IGBTs connected in reverse parallel. The components of the bidirectional switch are complex and the cost is high. Summary of the Invention

[0004] The purpose of this application is to provide a bidirectional switch device, aiming to simplify the bidirectional switch structure and reduce design costs.

[0005] A first aspect of an embodiment of the present application provides a bidirectional switch device, comprising:

[0006] a drift layer, and carrier layers respectively arranged on both sides of the drift layer along a first direction;

[0007] four P-body regions disposed adjacent to corners of the carrier layer, the P-body regions being located within the carrier layer;

[0008] four P+ regions disposed adjacent to corners of each of the P-body regions, and N+ regions disposed adjacent to each of the P+ regions along a second direction, one P+ region and one N+ region being located in one of the P-body regions, and the first direction intersecting the second direction;

[0009] A dielectric layer stacked on each of the carrier layers along the first direction, wherein each of the dielectric layers is located between two of the N+ regions on the carrier layer and partially overlaps with each other;

[0010] along the first direction, a gate layer stacked on each of the dielectric layers, wherein both sides of each gate layer are aligned with an adjacent dielectric layer;

[0011] A passivation layer is stacked on each of the gate layers along the first direction, wherein each of the passivation layers covers sides of an adjacent dielectric layer and a adjacent gate layer;

[0012] Along the first direction, the emitters are respectively stacked on the passivation layers, and the emitters cover the P+ regions and the N+ regions on the adjacent passivation layers and the adjacent carrier layers.

[0013] Optionally, each of the P-body regions is symmetrically arranged relative to the drift layer.

[0014] Optionally, each of the P+ regions is symmetrically arranged relative to the drift layer.

[0015] Optionally, each of the N+ regions is symmetrically arranged relative to the drift layer.

[0016] Optionally, each of the P-body regions has an equal ion concentration.

[0017] Optionally, each of the P+ regions has an equal ion concentration.

[0018] Optionally, each of the N+ regions has an equal ion concentration.

[0019] Optionally, each of the carrier layers has an equal ion concentration.

[0020] Optionally, the drift layer is a low-doped N-layer.

[0021] Optionally, the semiconductor material of the bidirectional switching device is silicon carbide or silicon or gallium nitride.

[0022] A second aspect of the embodiments of the present application provides a preparation method of a bidirectional switching device, the preparation method comprising:

[0023] forming carrier layers on both sides of the drift layer in a first direction;

[0024] forming four P-body regions adjacent to the corners of the carrier layers, the P-body regions being located in the carrier layers;

[0025] forming four P+ regions adjacent to the corners of each of the P-body regions, and forming N+ regions adjacent to each of the P+ regions in a second direction, one P+ region and one N+ region being located in one P-body region, the first direction intersecting the second direction;

[0026] stacking dielectric layers on each of the carrier layers in the first direction, one dielectric layer being located between two N+ regions on one carrier layer and partially overlapping;

[0027] stacking gate layers on each of the dielectric layers in the first direction, one gate layer being aligned with two adjacent dielectric layers;

[0028] stacking passivation layers on each of the gate layers in the first direction, one passivation layer covering the side edges of adjacent dielectric layers and gate layers;

[0029] stacking emitters on each of the passivation layers in the first direction, one emitter covering adjacent passivation layers and each of the P+ regions and each of the N+ regions on adjacent carrier layers.

[0030] Optionally, before the step of forming carrier layers on both sides of the drift layer along the first direction, the method further includes:

[0031] A drift layer is epitaxially formed on a substrate and the substrate is removed.

[0032] Optionally, the P-body regions are symmetrically arranged relative to the drift layer and have equal ion concentrations;

[0033] The P+ regions are symmetrically arranged relative to the drift layer and have equal ion concentrations;

[0034] The N+ regions are symmetrically arranged relative to the drift layer and have equal ion concentrations;

[0035] The ion concentrations of the carrier layers are equal.

[0036] Optionally, the drift layer is a low-doped N-layer;

[0037] The semiconductor material of the bidirectional switch device is silicon carbide, silicon or gallium nitride.

[0038] A third aspect of the embodiments of the present application provides a chip comprising the bidirectional switch device described above.

[0039] Compared with the prior art, the embodiments of the present application have the following beneficial effects: the above-mentioned bidirectional switch device is composed of a drift layer, a carrier layer, a P-body region, a P+ region, an N+ region, a dielectric layer, a gate layer, a passivation layer, and an emitter, wherein the P-body region, the P+ region, and the N+ region on each carrier layer are equivalent to the base region, the collector region, and the emitter region of the IGBT, respectively, thereby forming two reverse-parallel IGBTs, and a bidirectional switch is integrated on the semiconductor, which simplifies the structure of the bidirectional switch and reduces the design cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 A schematic cross-sectional view of a bidirectional switch device according to an embodiment of the present application;

[0041] Figure 2 Schematic diagram of an equivalent circuit of a bidirectional switch device provided in an embodiment of the present application;

[0042] Figure 3 A first flow chart of a method for manufacturing a bidirectional switch device according to an embodiment of the present application;

[0043] Figure 4 A second flow chart of the method for preparing a bidirectional switch device provided in an embodiment of the present application;

[0044] Figure 5 for Figure 4A schematic cross-sectional structural diagram of a bidirectional switch device corresponding to step S18 in the method for preparing the bidirectional switch device shown;

[0045] Figure 6 for Figure 4 A schematic cross-sectional structural diagram of a bidirectional switch device corresponding to step S11 in the method for preparing the bidirectional switch device shown;

[0046] Figure 7 for Figure 4 A schematic cross-sectional structural diagram of a bidirectional switch device corresponding to step S12 in the method for preparing the bidirectional switch device shown;

[0047] Figure 8 for Figure 4 A schematic cross-sectional structural diagram of a bidirectional switch device corresponding to step S13 in the method for preparing the bidirectional switch device shown;

[0048] Figure 9 for Figure 4 A schematic cross-sectional structural diagram of a bidirectional switch device corresponding to step S14 and step S15 in the method for preparing the bidirectional switch device shown;

[0049] Figure 10 for Figure 4 FIG. 1 is a schematic diagram of the cross-sectional structure of a bidirectional switch device corresponding to step S16 in the method for preparing the bidirectional switch device. DETAILED DESCRIPTION

[0050] In order to make the technical problems, technical solutions and beneficial effects to be solved by this application more clearly understood, this application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0051] It should be noted that when an element is referred to as being “fixed on” or “disposed on” another element, it may be directly on the other element or indirectly on the other element. When an element is referred to as being “connected to” another element, it may be directly connected to the other element or indirectly connected to the other element.

[0052] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application.

[0053] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0054] The first aspect of the embodiment of the present application provides a bidirectional switch device, such as Figure 1 As shown, Figure 1 This is a schematic diagram of the cross-sectional structure of a bidirectional switch device provided in an embodiment of the present application. In this embodiment, the bidirectional switch device includes a drift layer 10, and carrier layers respectively arranged on both sides of the drift layer 10 along a first direction X, four P-body regions arranged near the corners of the carrier layer, the P-body region is located in the carrier layer, four P+ regions are arranged near the corners of each P-body region, and N+ regions are respectively arranged near each P+ region along a second direction Y. A P+ region and an N+ region are located in a P-body region, and the first direction X intersects with the second direction Y.

[0055] Among them, the carrier layer includes a first carrier layer 21 and a second carrier layer 22 respectively arranged on both sides of the drift layer 10. The drift layer 10 can be formed by epitaxial growth or ion implantation on the substrate 100. The carrier layer can be formed by ion implantation or doping. The drift layer 10 forms a carrier channel, which can also be called an N-base region.

[0056] The P-body region includes a first P-body region 31 and a second P-body region 32 spaced apart on the first carrier layer 21 along the second direction Y, and a third P-body region 33 and a fourth P-body region 34 spaced apart on the second carrier layer 22. The four P-body regions are respectively arranged at the two corner positions of the two carrier layers. Similarly, the P-body region can be formed by ion implantation or doping.

[0057] The P+ region and the N+ region include a first P+ region 41 and a first N+ region 51 adjacent to the first P-body region 31, a second N+ region 52 and a second P+ region 42 adjacent to the second P-body region 32, a third P+ region 43 and a third N+ region 53 adjacent to the third P-body region 33, and a fourth N+ region 54 and a fourth P+ region 44 adjacent to the fourth P-body region 34. The four P+ regions are respectively arranged at the corner positions of their respective P-body regions, and the N+ regions are away from the corner positions of their respective P-body regions.

[0058] The P-body region, P+ region and N+ region on each carrier layer are equivalent to the base region, collector region and emitter region of the IGBT respectively.Figure 2 As shown, two reverse-parallel IGBTs are equivalently formed, a bidirectional switch is formed on the semiconductor, the structure of the bidirectional switch is simplified, and the design cost is reduced.

[0059] Meanwhile, in order to form the pin structure of the IGBT, the bidirectional switch device further comprises a dielectric layer stacked on each carrier layer in the first direction X, a gate layer stacked on each dielectric layer, a passivation layer stacked on each gate layer, and an emitter stacked on each passivation layer.

[0060] The dielectric layer is located between and partially overlaps the two N+ regions on each carrier layer, i.e., the dielectric layer comprises a first dielectric layer 61 provided on the first N+ region 51 and the second N+ region 52, and a second dielectric layer 62 provided on the third N+ region 53 and the fourth N+ region 54.

[0061] The gate layer is aligned with the two sides of the adjacent dielectric layer, and the gate layer comprises a first gate layer 71 stacked on the first dielectric layer 61 and a second gate layer 72 stacked on the second dielectric layer 62, and the gate layer constitutes the base pin of the IGBT and leads out the base region of the IGBT through the dielectric layer. The passivation layer covers the side edges of the adjacent dielectric layer and gate layer, and the emitter covers each P+ region and each N+ region on the adjacent passivation layer and carrier layer. The passivation layer comprises a first passivation layer 81 stacked on the first gate layer 71 and a second passivation layer 82 stacked on the second gate layer 72, and the emitter comprises a first emitter 91 stacked on the first passivation layer 81, the first P+ region 41, the first N+ region 51, the second P+ region 42, and the second N+ region 52, and a second emitter 92 provided on the second passivation layer 82, the third P+ region 43, the third N+ region 53, the fourth P+ region 44, and the fourth N+ region 54. The passivation layer is used to isolate the gate layer and the emitter, and the emitter leads out the collector region and the emitter region of the IGBT by contacting the P+ region and the N+ region, thereby forming an equivalent bidirectional switch structure. The bidirectional switch device adopts a vertical IGBT integrated structure, can reduce the on-state loss of the device, and can be applied to the super-high voltage field.

[0062] The material of the dielectric layer can be an oxide dielectric layer, a nitride dielectric layer, or a High-k gate dielectric layer.

[0063] The gate layer can be a polycrystalline silicon material or a metal material, and the passivation layer can be made of a corresponding solution material, such as Si, Si3N4, etc.

[0064] In order to ensure that the two IGBTs equivalently formed by the bidirectional switch device have the same electrical path, optionally, each P-body region is symmetrically arranged relative to the drift layer 10, each P+ region is symmetrically arranged relative to the drift layer 10, and each N+ region is symmetrically arranged relative to the drift layer 10.

[0065] That is, the first P-body region 31 and the second P-body region 32 are symmetrical relative to the normal line of the first carrier layer 21 , the first P-body region 31 and the third P-body region 33 are symmetrical relative to the drift layer 10 , and the second P-body region 32 and the fourth P-body region 34 are symmetrical relative to the drift layer 10 .

[0066] The first P+ region 41 and the second P+ region 42 are symmetrical relative to the normal line of the first carrier layer 21 , the first P+ region 41 and the third P+ region 43 are symmetrical relative to the drift layer 10 , and the second P+ region 42 and the fourth P+ region 44 are symmetrical relative to the drift layer 10 .

[0067] The first N+ region 51 and the second N+ region 52 are symmetrical relative to the normal line of the first carrier layer 21 , the first N+ region 51 and the third N+ region 53 are symmetrical relative to the drift layer 10 , and the second N+ region 52 and the fourth N+ region 54 are symmetrical relative to the drift layer 10 .

[0068] At the same time, in order to further ensure that the two IGBTs equivalently formed by the bidirectional switching device have the same electrical characteristics, optionally, the ion concentration of each P-body region is equal, the ion concentration of each P+ region is equal, the ion concentration of each N+ region is equal, and the ion concentration of each carrier layer is equal, that is, the ion concentration of the first P-body region 31, the second P-body region 32, the third P-body region 33 and the fourth P-body region 34 are equal, the ion concentration of the first P+ region 41, the second P+ region 42, the third P+ region 43 and the fourth P+ region 44 are equal, the ion concentration of the first N+ region 51, the second N+ region 52, the third N+ region 53 and the fourth N+ region 54 are equal, and the ion concentration of the first carrier layer 21 and the second carrier layer 22 are equal.

[0069] By setting a symmetrical structure and equal concentration, the two IGBTs formed by the bidirectional switching device have the same electrical characteristics, and can achieve the functions of forward and reverse control current and blocking voltage when connected forward or reverse.

[0070] In order to further realize the high-voltage characteristics of the bidirectional switch, optionally, the drift layer 10 is a low-doped N-layer. Using a thick and low-doped N-layer in the drift layer 10 can be applied to the ultra-high voltage field.

[0071] At the same time, the material of the bidirectional switch device can be selected according to demand. For example, in order to further meet high voltage requirements, silicon nitride material can be selected. Optionally, the semiconductor material of the bidirectional switch device is silicon carbide or silicon or gallium nitride. When different materials are used, the manufacturing process and cost of the bidirectional switch device will change accordingly according to the material changes.

[0072] Corresponding to the bidirectional switch device, the second aspect of the embodiment of the present application proposes a method for preparing the bidirectional switch device, such as Figure 3 As shown, including:

[0073] Step S11,6: forming carrier layers on both sides of the drift layer 10 in the first direction X;

[0074] Step S12: forming four P-body regions near the corners of the carrier layer, wherein the P-body regions are located within the carrier layer;

[0075] Step S13: Form four P+ regions adjacent to corners of each P-body region, and form N+ regions adjacent to each P+ region along the second direction Y. One P+ region and one N+ region are located in one P-body region, and the first direction X intersects the second direction Y.

[0076] That is Figure 6 As shown, on the basis of the drift layer 10, a first carrier layer 21 and a second carrier layer 22 are respectively formed on both sides of the drift layer 10. The drift layer 10 can be formed by epitaxial growth or ion implantation on the substrate 100. The carrier layer can be formed by ion implantation or doping. The drift layer 10 forms a carrier channel, which can also be called an N-base region.

[0077] Then, if Figure 7 As shown, along the second direction Y, a first P-body region 31 and a second P-body region 32 are formed on the first carrier layer 21, and a third P-body region 33 and a fourth P-body region 34 are formed on the second carrier layer 22. The four P-body regions are respectively arranged at the two corner positions of the two carrier layers. Similarly, the P-body regions can be formed by ion implantation or doping.

[0078] After the P-body region is formed, Figure 8As shown, P+ regions and N+ regions are formed in the P-body region by ion implantation or doping, that is, a first P+ region 41 and a first N+ region 51 are formed adjacent to the first P-body region 31, a second N+ region 52 and a second P+ region 42 are formed adjacent to the second P-body region 32, a third P+ region 43 and a third N+ region 53 are formed adjacent to the third P-body region 33, and a fourth N+ region 54 and a fourth P+ region 44 are formed adjacent to the fourth P-body region 34. The four P+ regions are respectively arranged at the corner positions of their respective P-body regions, and the N+ regions are away from the corner positions of their respective P-body regions.

[0079] The P-body region, P+ region and N+ region on each carrier layer are equivalent to the base region, collector region and emitter region of the IGBT respectively. Figure 2 As shown, two IGBTs connected in reverse parallel are equivalently formed, and a bidirectional switch is integrated on the semiconductor, which simplifies the structure of the bidirectional switch and reduces the design cost.

[0080] At the same time, in order to form the pin structure of the IGBT, the preparation method of the bidirectional switch device further includes:

[0081] Step S14: stacking dielectric layers on a carrier layer along the first direction X, wherein a dielectric layer is located between two N+ regions on a carrier layer and partially overlaps with the two N+ regions;

[0082] Step S15: stacking gate layers on a dielectric layer along the first direction X, with a gate layer aligned with two sides of an adjacent dielectric layer;

[0083] Step S16: stacking a passivation layer on each gate layer along the first direction X, wherein each passivation layer covers sides of an adjacent dielectric layer and a gate layer;

[0084] Step S17 : stacking emitters on a passivation layer along the first direction X, wherein an emitter covers each P+ region and each N+ region on an adjacent passivation layer and an adjacent carrier layer.

[0085] Among them, such as Figure 9 As shown, the dielectric layer includes a first dielectric layer 61 formed on the first N+ region 51 and the second N+ region 52 , and a second dielectric layer 62 formed on the third N+ region 53 and the fourth N+ region 54 .

[0086] The gate layer includes a first gate layer 71 formed on the first dielectric layer 61 and a second gate layer 72 stacked on the second dielectric layer 62 . The gate layer constitutes the base pin of the IGBT and leads to the base region of the IGBT through the dielectric layer.

[0087] like Figure 10As shown, the passivation layer includes a first passivation layer 81 stacked on the first gate layer 71 and a second passivation layer 82 stacked on the second gate layer 72. Figure 1 As shown, the emitter includes a first emitter 91 stacked on the first passivation layer 81, the first P+ region 41, the first N+ region 51, the second P+ region 42, and the second N+ region 52, and a second emitter 92 formed on the second passivation layer 82, the third P+ region 43, the third N+ region 53, the fourth P+ region 44, and the fourth N+ region 54. The passivation layer is used to isolate the gate layer and the emitter. The emitter contacts the P+ region and the N+ region, thereby leading to the collector region and the emitter region of the IGBT, thereby forming a Figure 1 The equivalent bidirectional switch structure shown is shown, and the bidirectional switch device adopts a vertical IGBT integrated structure, which can reduce the conduction loss of the device and can be applied to the ultra-high voltage field.

[0088] The material of the dielectric layer may be an oxide dielectric layer, a nitride dielectric layer or a High-k gate dielectric layer.

[0089] The gate layer can be made of polysilicon material or metal material, and the passivation layer can be made of corresponding solution materials, such as Si, Si3N4 and other materials.

[0090] In order to form the drift layer 10, as shown in FIG. Figure 4 As shown, optionally, before the step of forming carrier layers on both sides of the drift layer 10 along the first direction X, the method further includes:

[0091] Step S18 , epitaxially forming a drift layer 10 on the substrate 100 and removing the substrate 100 .

[0092] like Figure 5 As shown, after the drift layer 10 is epitaxially formed on the substrate 100 , the substrate 100 is removed by physical or chemical means to leave the drift layer 10 . Optionally, the substrate 100 is removed by CMP (Chemical-Mechanical Planning).

[0093] The substrate 100 may be a crystalline silicon substrate. Alternatively, the substrate 100 may be formed of other semiconductor materials, such as silicon germanium. In addition, the substrate 100 may be a bulk substrate 100. The substrate 100 may be lightly doped with p-type impurities, such as boron or indium.

[0094] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0095] At the same time, in order to further ensure that the two IGBTs equivalently formed by the bidirectional switch device have the same electrical path and electrical characteristics, optionally, each P-body region is symmetrically arranged relative to the drift layer 10 and has the same ion concentration;

[0096] Each P+ region is symmetrically arranged relative to the drift layer 10 and has the same ion concentration;

[0097] Each N+ region is symmetrically arranged relative to the drift layer 10 and has the same ion concentration;

[0098] The ion concentrations in each carrier layer are equal.

[0099] That is, the first P-body region 31 and the second P-body region 32 are symmetrical relative to the normal line of the first carrier layer 21 , the first P-body region 31 and the third P-body region 33 are symmetrical relative to the drift layer 10 , and the second P-body region 32 and the fourth P-body region 34 are symmetrical relative to the drift layer 10 .

[0100] The first P+ region 41 and the second P+ region 42 are symmetrical relative to the normal line of the first carrier layer 21 , the first P+ region 41 and the third P+ region 43 are symmetrical relative to the drift layer 10 , and the second P+ region 42 and the fourth P+ region 44 are symmetrical relative to the drift layer 10 .

[0101] The first N+ region 51 and the second N+ region 52 are symmetrical relative to the normal line of the first carrier layer 21 , the first N+ region 51 and the third N+ region 53 are symmetrical relative to the drift layer 10 , and the second N+ region 52 and the fourth N+ region 54 are symmetrical relative to the drift layer 10 .

[0102] The ion concentrations of the first P-body region 31, the second P-body region 32, the third P-body region 33 and the fourth P-body region 34 are equal, the ion concentrations of the first P+ region 41, the second P+ region 42, the third P+ region 43 and the fourth P+ region 44 are equal, the ion concentrations of the first N+ region 51, the second N+ region 52, the third N+ region 53 and the fourth N+ region 54 are equal, and the ion concentrations of the first carrier layer 21 and the second carrier layer 22 are equal.

[0103] By setting a symmetrical structure and equal concentration, the two IGBTs formed by the bidirectional switching device have the same electrical characteristics, and can achieve the functions of forward and reverse control current and blocking voltage when connected forward or reverse.

[0104] In order to further realize the high-voltage characteristics of the bidirectional switch, optionally, the drift layer 10 is a low-doped N-layer. Using a thick and low-doped N-layer in the drift layer 10 can be applied to the ultra-high voltage field.

[0105] At the same time, the material of the bidirectional switch device can be selected according to demand. For example, in order to further meet high voltage requirements, silicon nitride material can be selected. Optionally, the semiconductor material of the bidirectional switch device is silicon carbide or silicon or gallium nitride. When different materials are used, the manufacturing process and cost of the bidirectional switch device will change accordingly according to the material changes.

[0106] Compared with the prior art, the embodiments of the present application have the following beneficial effects: the above-mentioned bidirectional switch device is composed of a drift layer 10, a carrier layer, a P-body region, a P+ region, an N+ region, a dielectric layer, a gate layer, a passivation layer, and an emitter, wherein the P-body region, the P+ region, and the N+ region on each carrier layer are equivalent to the base region, the collector region, and the emitter region of the IGBT, respectively, thereby forming two reverse-parallel IGBTs, and a bidirectional switch is integrated on the semiconductor, which simplifies the structure of the bidirectional switch and reduces the design cost.

[0107] The present application also proposes a chip, which includes a bidirectional switching device. The specific structure of the bidirectional switching device refers to the above-mentioned embodiment. Since the present chip adopts all the technical solutions of all the above-mentioned embodiments, it has at least all the beneficial effects brought by the technical solutions of the above-mentioned embodiments, which will not be described one by one here.

[0108] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present application, and should all be included in the scope of protection of the present application.

Claims

1. A bidirectional switch device, characterized in that: include: a drift layer, and carrier layers respectively arranged on both sides of the drift layer along a first direction; four P-body regions disposed adjacent to corners of the carrier layer, the P-body regions being located within the carrier layer; four P+ regions disposed adjacent to corners of each of the P-body regions, and N+ regions disposed adjacent to each of the P+ regions along a second direction, one P+ region and one N+ region being located in one of the P-body regions, and the first direction intersecting the second direction; A dielectric layer stacked on each of the carrier layers along the first direction, wherein each of the dielectric layers is located between two of the N+ regions on the carrier layer and partially overlaps with each other; along the first direction, a gate layer stacked on each of the dielectric layers, wherein both sides of each gate layer are aligned with an adjacent dielectric layer; A passivation layer is stacked on each of the gate layers along the first direction, wherein each of the passivation layers covers sides of an adjacent dielectric layer and a adjacent gate layer; Along the first direction, the emitters are respectively stacked on the passivation layers, and the emitters cover the P+ regions and the N+ regions on the adjacent passivation layers and the adjacent carrier layers.

2. The bidirectional switch device according to claim 1, wherein: Each of the P-body regions is symmetrically arranged relative to the drift layer; Each of the P+ regions is symmetrically arranged relative to the drift layer; The N+ regions are symmetrically arranged relative to the drift layer.

3. The bidirectional switch device according to claim 1, wherein: The ion concentrations in each of the P-body regions are equal; The ion concentrations of the P+ regions are equal; The ion concentrations of the N+ regions are equal; The ion concentrations of the carrier layers are equal.

4. The bidirectional switch device according to claim 1, wherein: The drift layer is a low-doped N-layer.

5. The bidirectional switch device according to claim 1, wherein: The semiconductor material of the bidirectional switch device is silicon carbide, silicon or gallium nitride.

6. A method for preparing a bidirectional switch device, characterized in that: include: forming carrier layers on both sides of the drift layer along the first direction; Four P-body regions are formed adjacent to corners of the carrier layer, and the P-body regions are located within the carrier layer; Four P+ regions are formed adjacent to corners of each of the P-body regions, and N+ regions are formed adjacent to each of the P+ regions along the second direction, one P+ region and one N+ region are located in one of the P-body regions, and the first direction intersects the second direction; Along the first direction, a dielectric layer is stacked on each of the carrier layers, wherein the dielectric layer is located between the two N+ regions on the carrier layer and partially overlaps with the two N+ regions; Along the first direction, stacking gate layers on the dielectric layers respectively, with the gate layers aligned with both sides of the adjacent dielectric layers; Along the first direction, a passivation layer is stacked on each of the gate layers, wherein each of the passivation layers covers sides of an adjacent dielectric layer and a adjacent gate layer; Along the first direction, emitters are stacked on the passivation layers respectively, and the emitter covers each of the P+ regions and each of the N+ regions on an adjacent passivation layer and an adjacent carrier layer.

7. The method for preparing a bidirectional switch device according to claim 6, wherein: Before the step of forming carrier layers on both sides of the drift layer along the first direction, the method further includes: A drift layer is epitaxially formed on a substrate and the substrate is removed.

8. The method for preparing a bidirectional switch device according to claim 6, wherein: The P-body regions are symmetrically arranged relative to the drift layer and have equal ion concentrations; The P+ regions are symmetrically arranged relative to the drift layer and have equal ion concentrations; The N+ regions are symmetrically arranged relative to the drift layer and have equal ion concentrations; The ion concentrations of the carrier layers are equal.

9. The method for preparing a bidirectional switch device according to claim 6, wherein: The drift layer is a low-doped N-layer; The semiconductor material of the bidirectional switch device is silicon carbide, silicon or gallium nitride.

10. A chip, characterized in that: The invention comprises a bidirectional switch device as claimed in any one of claims 1 to 5.

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