A predistortion extension model and a method and device for implementing predistortion thereof

Abstract

This application provides a predistortion extended model and a method and apparatus for implementing predistortion, used to improve the linearity of a power amplifier (PA) and reduce the power consumption of a base station system under conditions of limited sampling rate. The method includes: determining the input and output predicted signals corresponding to any time interval between two adjacent sampling times of the power amplifier using linear interpolation; extending the GMP model by using the input and output predicted signals as the input and output signals of the generalized memory polynomial model (GMP) to obtain an extended GMP model; querying the first lookup table (LUT) value corresponding to the first input signal using the original GMP model, and querying the second LUT value corresponding to the first input signal using the extended model; and generating the predistortion signal based on the first and second LUT values.

Description

Technical Field

[0001] This invention relates to the field of communication technology, and in particular to a predistortion extension model and a method and apparatus for implementing predistortion. Background Technology

[0002] To address the high power consumption issue of fifth-generation mobile communication systems (5G), high-efficiency radio frequency power amplifiers (PAs) using gallium nitride (GaN) technology have been widely used in base station products. However, high-efficiency PAs inevitably suffer from poor linearity. Therefore, it is particularly important to further improve PA linearity while ensuring PA efficiency. Digital pre-distortion (DPD) technology, with its advantages of excellent linearization performance and ease of hardware implementation, has been widely used in improving the linearity of power amplifiers (PAs) in base station products.

[0003] Currently, due to the ultra-high transmission speed of 5G communication, the transmission bandwidth has increased significantly. For example, the maximum continuous bandwidth of sub-6G can even reach 200MHz. For DPD, in order to ensure the modeling accuracy of the power amplifier model, the bandwidth of the feedback link is generally required to be 5 times that of the transmission bandwidth. Thus, the bandwidth of the feedback link can reach the GHz level (i.e., the sampling speed of the feedback link analog-to-digital converter (ADC) reaches the GHz level). This places high demands on the ADC and digital signal processor (DSP) in the feedback link, which greatly increases the cost of base station products. Furthermore, when performing digital predistortion processing at a higher sampling rate, it also increases the power consumption of the field programmable gate array (FPGA) and affects the heat dissipation of the base station. Summary of the Invention

[0004] This application provides a predistortion extended model and a method and apparatus for implementing predistortion, which can improve the linearity of the PA and reduce the power consumption of the base station system under the condition of limited sampling rate.

[0005] Firstly, a predistortion extension model and a method for implementing predistortion are provided, the method comprising:

[0006] The input and output predicted signals of the power amplifier are determined by linear interpolation at any time between two adjacent sampling times.

[0007] The input and output predicted signals are used as the input and output signals of the generalized memory polynomial model (GMP) to extend the GMP model, resulting in an extended GMP model. The extended GMP model includes the original GMP model and the extended model. The extended GMP model is used to generate a predistortion signal based on the input predicted signal. The input predicted signal is proportional to a first input signal, which is the input signal collected at any one of the two adjacent sampling times.

[0008] The original GMP model is used to query the first lookup table (LUT) value corresponding to the first input signal, and the extended model is used to query the second LUT value corresponding to the first input signal.

[0009] The predistorted signal is generated based on the first LUT value and the second LUT value.

[0010] Optionally, obtaining the input prediction signal and output prediction signal corresponding to any time interval in adjacent time intervals through linear interpolation includes:

[0011] Acquire the first input signal and the first output signal corresponding to the first time point, and acquire the second input signal and the second output signal corresponding to the second time point; wherein, the first time point and the second time point are the times corresponding to the two adjacent sampling times respectively;

[0012] The input prediction signal is determined based on the first input signal and the second input signal using linear interpolation, and the output prediction signal is determined based on the first output signal and the second output signal.

[0013] Optionally, generating the predistorted signal based on the LUT value includes:

[0014] The first LUT value and the second LUT value are multiplied by the first input signal respectively to obtain the first product and the second product;

[0015] The predistorted signal is obtained based on the first product and the second product.

[0016] Optionally, querying the first lookup table (LUT) value corresponding to the first input signal through the original GMP model includes:

[0017] The first amplitude index corresponding to the first input signal is determined using the original GMP model;

[0018] The first LUT value is retrieved based on the first amplitude index.

[0019] Optionally, querying the second LUT value corresponding to the first input signal through the extended model includes:

[0020] The second amplitude index corresponding to the first input signal is determined using the extended model;

[0021] Query the third LUT value based on the second amplitude index;

[0022] The extended model queries the fourth LUT value based on the signal sampling time and signal amplitude corresponding to the first input signal;

[0023] The second LUT value is obtained based on the third LUT value and the fourth LUT value.

[0024] Secondly, a predistortion extension model and an apparatus for implementing predistortion are provided, the apparatus comprising:

[0025] The processing module is used to determine the input and output prediction signals of the power amplifier at any time between two adjacent sampling time intervals using linear interpolation.

[0026] The model extension module is used to extend the GMP model by taking the input predicted signal and the output predicted signal as the input and output signals of the generalized memory polynomial model GMP, to obtain an extended GMP model; wherein, the extended GMP model includes the original GMP model and the extended model, and the extended GMP model is used to generate a predistortion signal based on the input predicted signal, wherein the input predicted signal is proportional to a first input signal, and the first input signal is the input signal collected at any one of the two adjacent sampling times;

[0027] The processing module is also used to query the first lookup table (LUT) value corresponding to the first input signal through the original GMP model, and to query the second LUT value corresponding to the first input signal through the extended model;

[0028] The processing module is further configured to generate the predistortion signal based on the first LUT value and the second LUT value.

[0029] Optionally, the processing module is specifically used for:

[0030] Acquire the first input signal and the first output signal corresponding to the first time point, and acquire the second input signal and the second output signal corresponding to the second time point; wherein, the first time point and the second time point are the times corresponding to the two adjacent sampling times respectively;

[0031] The input prediction signal is determined based on the first input signal and the second input signal using linear interpolation, and the output prediction signal is determined based on the first output signal and the second output signal.

[0032] Optionally, the processing module is specifically used for:

[0033] The first LUT value and the second LUT value are multiplied by the first input signal respectively to obtain the first product and the second product;

[0034] The predistorted signal is obtained based on the first product and the second product.

[0035] Optionally, the processing module is further configured to:

[0036] The first amplitude index corresponding to the first input signal is determined using the original GMP model;

[0037] The first LUT value is retrieved based on the first amplitude index.

[0038] Optionally, the processing module is specifically used for:

[0039] The second amplitude index corresponding to the first input signal is determined using the extended model;

[0040] Query the third LUT value based on the second amplitude index;

[0041] The extended model queries the fourth LUT value based on the signal sampling time and signal amplitude corresponding to the first input signal;

[0042] The second LUT value is obtained based on the third LUT value and the fourth LUT value.

[0043] Thirdly, an electronic device is provided, the electronic device comprising:

[0044] Memory, used to store program instructions;

[0045] A processor is configured to invoke program instructions stored in the memory and execute the steps included in any of the methods described in the first aspect, according to the obtained program instructions.

[0046] Fourthly, a computationally readable storage medium is provided, the computationally readable storage medium storing computer-executable instructions for causing a computer to perform the steps included in any of the methods described in the first aspect.

[0047] Fifthly, a computer program product containing instructions is provided, which, when run on a computer, causes the computer to execute the predistortion extension model and the method for implementing predistortion described in the various possible implementations above.

[0048] In this embodiment, the sampled signals (i.e., the input and output estimated signals) are estimated using linear interpolation, and the estimated sampled signals are used as the input and output signals of the GMP model to derive the extended GMP model. The extended GMP model can achieve pre-distortion of the input estimated signal (i.e., generating a pre-distortion signal based on the input estimated signal) through a lookup table (LUT). This allows for high-precision modeling of the input and output signals of an ultra-wide bandwidth power amplifier under relatively low feedback sampling rates, improving the linearity of the power amplifier. Furthermore, since a high sampling rate is not required, the power consumption of the base station system can be effectively reduced. Additionally, since the ADC and DSP in the feedback link do not require high-performance ADCs and DSPs, the cost of the base station product can be effectively controlled. Attached Figure Description

[0049] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application.

[0050] Figure 1 A flowchart for generating predistortion signals corresponding to a conventional GMP model provided in this application embodiment;

[0051] Figure 2 A flowchart illustrating a predistortion extension model and a method for implementing predistortion provided in this application embodiment;

[0052] Figure 3 A flowchart illustrating the generation of the predistortion signal corresponding to the extended model in the extended GMP model provided in this application embodiment;

[0053] Figure 4 A structural block diagram of a predistortion extension model and a device for implementing predistortion provided in this application embodiment;

[0054] Figure 5 This is a schematic diagram of the structure of a computer device in an embodiment of the present invention. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. Unless otherwise specified, the embodiments and features in the embodiments of this application can be arbitrarily combined with each other. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than that shown here.

[0056] The terms "first" and "second" in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the term "comprising" and any variations thereof are intended to cover non-exclusive protection. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices. The term "multiple" in this application can mean at least two, for example, two, three, or more, and the embodiments of this application do not impose limitations.

[0057] Furthermore, the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article, unless otherwise specified, generally indicates that the preceding and following related objects have an "or" relationship.

[0058] To facilitate understanding, the technical background of the embodiments of the present invention will be introduced below.

[0059] As mentioned earlier, DPD technology, with its superior linearization performance and ease of hardware implementation, is widely used in improving the linearity of power amplifiers in base station products. DPD technology works by coupling output data containing power amplifier distortion characteristics at the power amplifier output, then using the power amplifier input and output data to model the power amplifier characteristics, and finally solving the inverse model of the power amplifier characteristics in the intermediate frequency digital domain. The inverse model and the power amplifier are then cascaded to complement each other, thereby improving the power amplifier's linearity. Therefore, the key to DPD technology lies in obtaining an accurate power amplifier model.

[0060] Volterra series models are commonly used behavioral modeling models for nonlinear devices and systems. As the most important nonlinear device in base station products, power amplifiers are also suitable for Volterra series modeling. However, the disadvantages of Volterra series models are their complexity, large number of coefficients, and difficulty in engineering implementation. Therefore, various simplified models based on Volterra series, such as the Memory Polynomial (MP), Envelope Memory Polynomial (EMP), and Generalized Memory Polynomial (GMP), have been proposed. The GMP model is widely used in engineering due to its advantages such as "high cost-effectiveness" (high modeling accuracy, low model complexity, and ease of FPGA lookup implementation).

[0061] The traditional GMP (i.e., the original GMP) model formula is shown in equation (1):

[0062]

[0063] Where y(n) and x(n) are the output signal and input signal of the power amplifier after digital processing, respectively, i is the memory depth of the vector term, j is the memory depth of the modulus term, k is the nonlinear order, and b is the model coefficient. As can be seen from equation (1), the power amplifier output signal y(n) can be obtained by multiplying x(n) and its modulus term by the power of k.

[0064] As mentioned earlier, the technology often uses a lookup table approach, that is, the modulus terms with the same i and j values ​​and the corresponding coefficient b. ijk The input signal amplitude is multiplied and added together, and then quantized according to certain rules to obtain an amplitude table and a corresponding LUT table. Therefore, before looking up the table according to the GMP model, it is also necessary to generate the corresponding amplitude index and look up the corresponding LUT value according to the amplitude index. For example, the amplitude index corresponding to equation (1) is shown below:

[0065]

[0066] The process of generating predistortion signals corresponding to the traditional GMP model is as follows: Figure 1 As shown, the input signal x(n) is delayed by i to obtain Z. -i After a delay of j, we obtain Z. -j and to Z -j Take the modulus to obtain the amplitude index as shown in equation (2). Then, look up the corresponding LUT value in the LUT table according to the amplitude index shown in equation (2), and compare the result with Z. -i Multiplying them together yields the predistortion signal delayed by i and j (i.e., u). ij (n)).

[0067] However, the traditional GMP model can only achieve predistortion by looking up the acquired input signal in a table. However, in the fifth generation mobile communication system, the sampling rate of the feedback link ADC will reach the GHz level, which greatly increases the cost of base station products. Moreover, when performing digital predistortion processing at a higher sampling rate, it will also increase the power consumption of the FPGA and affect the heat dissipation of the base station.

[0068] In view of this, embodiments of this application provide a predistortion extended model and a method for implementing predistortion. The input and output predicted signals corresponding to any time interval between two adjacent sampling times of the power amplifier are determined by linear interpolation. The input and output predicted signals are used as the input and output signals of the GMP model to extend the GMP model, resulting in an extended GMP model. Predistortion of the input predicted signal is achieved by looking up a table using the extended GMP model. In this way, under the condition of limited sampling rate, the sampling signal can be increased by prediction, thereby effectively improving the linearity of the PA and reducing the power consumption of the base station system.

[0069] The predistortion extension model and its implementation method provided in this application, along with the accompanying drawings, will be described below with reference to the accompanying drawings. Please refer to [link to documentation]. Figure 2 As shown, the predistortion extension model and the method for implementing predistortion in this application embodiment are described in the following flowchart:

[0070] Step 201: Determine the input and output prediction signals of the power amplifier at any time interval between two adjacent sampling times using linear interpolation.

[0071] In this embodiment of the application, a first input signal and a first output signal corresponding to a first time in two adjacent sampling times are obtained, and a second input signal and a second output signal corresponding to a second time in two adjacent sampling times are obtained. The earlier time in two adjacent sampling times can be either the first time or the second time.

[0072] After acquiring the input and output signals corresponding to two adjacent sampling times, the predicted input and output signals for any time between the two adjacent sampling times are determined by linear interpolation based on the acquired input and output signals. Specifically, the predicted input signal is determined based on the first output signal and the second input signal, and the predicted output signal is determined based on the first output signal and the second output signal. For example, the first input signal, the first output signal, the second input signal, and the second output signal can be represented by coordinate points, with the input and output signals corresponding to the same time being a single coordinate point (first input signal a, second input signal b). Since two points determine a straight line, the coordinates of any point on the line can be determined. In this way, without increasing the sampling rate, the predicted signals between the sampled signals can be obtained through linear interpolation, achieving the effect of increasing the sampling rate, thereby improving the model's anti-aliasing ability and improving modeling accuracy.

[0073] Step 202: Extend the GMP model by using the input and output predicted signals as the input and output signals of the GMP model to obtain the extended GMP model;

[0074] The extended GMP model includes the original GMP model and the extended model. The extended GMP model can generate the corresponding predistortion signal based on the input prediction signal. That is, the extended GMP model generates the corresponding predistortion signal by looking up the lookup table (LUT) value corresponding to the input prediction signal. When the extended GMP model looks up the LUT value corresponding to the input prediction signal, it needs to look up the first input signal. Since the input prediction signal obtained by linear interpolation is proportional to the first input signal, after obtaining the input prediction signal based on the first and second input signals, the input prediction signal can be represented by the first input signal. The first input signal is the input signal collected at any one of the two adjacent sampling times, such as the input signal collected at the first time in step 201, or it can be the input signal collected at the second time in step 201.

[0075] In this embodiment, the input and output predicted signals are used as the input and output signals of the GMP model to derive the extended GMP model. Since the GMP model is a mathematical model, the process of extending the GMP model is essentially a process of deriving the polynomials corresponding to the GMP. After the model is extended, the extended GMP model includes more polynomial terms than before the extension. Therefore, the LUT value obtained by querying the extended GMP model is more than the LUT value obtained by querying the original GMP model, thereby effectively improving the linearity of PA.

[0076] Step 203: Query the first LUT value corresponding to the first input signal using the original GMP model;

[0077] In this embodiment of the application, the first amplitude index corresponding to the first input signal is determined by the original GMP model described in step 202, and the first LUT value is queried according to the first amplitude index.

[0078] Step 204: Query the second LUT value corresponding to the first input signal by expanding the model;

[0079] In this embodiment, the second amplitude index corresponding to the first input signal is determined by the extended model described in step 202. The third LUT value is then looked up based on the second amplitude index. Additionally, the fourth LUT value is looked up based on the signal sampling time and signal amplitude corresponding to the first input signal using the extended model. The third LUT value and the fourth LUT value are then multiplied to obtain the second LUT value. Since the fourth LUT value is only related to the signal sampling time and signal amplitude, the lookup table corresponding to the fourth LUT value can be shared. This reduces the Random Access Memory (RAM) resources required for model implementation, allowing for implementation using a smaller FPGA, which is beneficial for cost control in base station products.

[0080] Step 205: Generate a predistortion signal based on the first LUT value and the second LUT value.

[0081] In this embodiment of the application, after querying the first LUT value and the second LUT value through steps 203 and 204, the first LUT value and the second LUT value are multiplied by the first input signal to obtain the first product and the second product. The first product and the second product are added together to obtain the predistortion signal corresponding to the input prediction signal.

[0082] To better understand the technical solution of this application, the predistortion extension model and the method for implementing predistortion provided in this application will be explained and described below with reference to specific embodiments.

[0083] Example

[0084] Before extending the GMP model, it is necessary to first determine the input and output predicted signals at any time interval between two adjacent sampling times of the power amplifier using linear interpolation. The process of obtaining the input and output predicted signals using linear interpolation is described below:

[0085] Assuming (x1, y1) and (x2, y2) are the power amplifier input and output signals at two adjacent sampling times, and these two points determine a straight line, then the coordinates (x, y) of any point on the line can be determined based on (x1, y1) and (x2, y2), as shown in the following formula:

[0086]

[0087] When any point is located between two points (i.e., any time is the midpoint between the first and second times), we can obtain x = (x1 + x2) / 2 and y = (y1 + y2) / 2. In this embodiment, we take any time as the midpoint between the first and second times as an example (i.e., we take any point as the midpoint between two points as an example).

[0088] At this point, for the power amplifier sampling points at the first and second time points, the input prediction signal x(n′) and output prediction signal y(n′) corresponding to the midpoint between the two points are obtained by linear interpolation as follows:

[0089]

[0090]

[0091] Substituting x(n′) and y(n′) into equation (1), we get:

[0092]

[0093] Substituting equations (4) and (5) into equation (6), and performing polynomial expansion, we derive the GMP extension term after interpolation (i.e., the aforementioned extended model). and To facilitate implementation using FPGA lookup tables, the value of k2 in the extended term is set to 1. Therefore, the extended GMP model after linear interpolation can be represented by equation (7), as follows:

[0094]

[0095] The magnitude index corresponding to the original model is shown in equation (2), and the magnitude index corresponding to the extended model is shown below:

[0096]

[0097] make:

[0098]

[0099] LUT s =|AMP(n)| (10)

[0100] but:

[0101] LUT C =LUT m ×LUT s (nm±1) (11)

[0102] Among them, LUT C This is the second LUT value, LUT m This is the third LUT value, LUT s This is the fourth LUT value.

[0103] Combining equations (2), (7), and (11), after signal interpolation processing, the lookup table implementation of the extended GMP model can be expressed as:

[0104]

[0105] in, The corresponding predistortion signal generation process is as follows: Figure 1 As shown, The corresponding predistortion signal generation process is as follows: Figure 3 As shown, the input signal is delayed by m1 to obtain And on Take the modulus to get the following: The amplitude index is shown, and then the corresponding LUT value (the third LUT value) is looked up in the LUT0 table based on this amplitude index. The third LUT value is then compared with... Multiply to get the first result, and the second result. Further delay was applied to obtain And on Modulo operation yields a LUT. s =|AMP(nm±1)|, the amplitude index is used, and then the corresponding LUT value (i.e., the fourth LUT value) is looked up in the LUT_S table according to the amplitude index. Then, the third LUT value is multiplied by the first result to obtain the predistortion signal corresponding to the m1 delay. Alternatively, the third LUT value and the fourth LUT value can be multiplied to obtain the second LUT value, and then the second LUT value is multiplied by... Multiplying them together yields the predistortion signal corresponding to the m1 delay. Figure 3 The process corresponding to this method is not shown in the diagram.

[0106] Adding the predistortion signals corresponding to multiple delays yields the predistortion signal (X) corresponding to the extended term. DA _DPD(n)), and finally the predistortion signal corresponding to the extended term is compared with the predistortion signal corresponding to the original GMP model (i.e. Figure 1 The output signals are added together (this process) Figure 3 Not shown in the image. Figure 3(Only the generation process of the predistortion signal corresponding to the scalability is shown), to obtain the predistortion signal for the input prediction signal.

[0107] Based on the same inventive concept, embodiments of this application provide a predistortion extension model and an apparatus for implementing predistortion, which can achieve the functions corresponding to the aforementioned predistortion extension model and method for implementing predistortion. The predistortion extension model and the apparatus for implementing predistortion can be a hardware structure, a software module, or a hardware structure plus a software module. The predistortion extension model and the apparatus for implementing predistortion can be implemented by a chip system, which can consist of chips or include chips and other discrete devices. Please refer to [link to previous document]. Figure 4 As shown, the predistortion extended model and the device for implementing predistortion include a processing module 401 and a model extension module 402. Wherein:

[0108] Processing module 401 is used to determine the input prediction signal and output prediction signal corresponding to any time interval between two adjacent sampling time intervals of the power amplifier by linear interpolation.

[0109] The model extension module 402 is used to extend the GMP model by using the input predicted signal and the output predicted signal as the input and output signals of the generalized memory polynomial model GMP, to obtain an extended GMP model; wherein, the extended GMP model includes the original GMP model and the extended model, and the extended GMP model is used to generate a predistortion signal based on the input predicted signal, wherein the input predicted signal is proportional to a first input signal, and the first input signal is the input signal collected at any one of the two adjacent sampling times;

[0110] The processing module 401 is further configured to query the first lookup table (LUT) value corresponding to the first input signal through the original GMP model, and to query the second LUT value corresponding to the first input signal through the extended model;

[0111] The processing module 401 is further configured to generate the predistortion signal based on the first LUT value and the second LUT value.

[0112] Optionally, the processing module 401 is specifically used for:

[0113] Acquire the first input signal and the first output signal corresponding to the first time point, and acquire the second input signal and the second output signal corresponding to the second time point; wherein, the first time point and the second time point are the times corresponding to the two adjacent sampling times respectively;

[0114] The input prediction signal is determined based on the first input signal and the second input signal using linear interpolation, and the output prediction signal is determined based on the first output signal and the second output signal.

[0115] Optionally, the processing module 401 is specifically used for:

[0116] The first LUT value and the second LUT value are multiplied by the first input signal respectively to obtain the first product and the second product;

[0117] The predistorted signal is obtained based on the first product and the second product.

[0118] Optionally, the processing module 401 is further configured to:

[0119] The first amplitude index corresponding to the first input signal is determined using the original GMP model;

[0120] The first LUT value is retrieved based on the first amplitude index.

[0121] Optionally, the processing module 401 is specifically used for:

[0122] The second amplitude index corresponding to the first input signal is determined using the extended model;

[0123] Query the third LUT value based on the second amplitude index;

[0124] The extended model queries the fourth LUT value based on the signal sampling time and signal amplitude corresponding to the first input signal;

[0125] The second LUT value is obtained based on the third LUT value and the fourth LUT value.

[0126] All relevant content of each step involved in the aforementioned embodiments of the predistortion extension model and the method for implementing predistortion can be referenced to the functional description of the corresponding functional module of the predistortion extension model and the device for implementing predistortion in the embodiments of this application, and will not be repeated here.

[0127] The module division in this embodiment is illustrative and represents only one logical functional division. In actual implementation, other division methods may be used. Furthermore, the functional modules in each embodiment of this application can be integrated into a single processor, exist as separate physical entities, or be integrated into a single module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0128] Based on the same inventive concept, embodiments of this application provide an electronic device. Please refer to... Figure 5As shown, the electronic device includes at least one processor 501 and a memory 502 connected to the at least one processor. In this embodiment, the specific connection medium between the processor 501 and the memory 502 is not limited. Figure 5 Taking the connection between processor 501 and memory 502 via bus 500 as an example, bus 500 in... Figure 5 The connections between other components are indicated by thick lines and are for illustrative purposes only, not as limiting information. The Bus 500 can be divided into address bus, data bus, control bus, etc., for ease of representation. Figure 5 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0129] In this embodiment of the application, the memory 502 stores instructions that can be executed by at least one processor 501. By executing the instructions stored in the memory 502, at least one processor 501 can perform the steps included in the aforementioned predistortion extension model and the method for implementing predistortion.

[0130] The processor 501 serves as the control center of the electronic device. It connects to various parts of the device via various interfaces and lines, and performs overall monitoring by running or executing instructions stored in the memory 502 and accessing data stored in the memory 502, thus controlling the various functions and processing data of the electronic device. Optionally, the processor 501 may include one or more processing units. The processor 501 may integrate an application processor and a modem processor. The application processor primarily handles the operating system and applications, while the modem processor primarily handles wireless communication. It is understood that the modem processor may not be integrated into the processor 501. In some embodiments, the processor 501 and the memory 502 may be implemented on the same chip; in other embodiments, they may be implemented on separate chips.

[0131] Processor 501 can be a general-purpose processor, such as a central processing unit (CPU), digital signal processor, application-specific integrated circuit, field-programmable gate array or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, capable of implementing or executing the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the predistortion extension model and its implementation method disclosed in the embodiments of this application can be directly manifested as execution by a hardware processor, or execution by a combination of hardware and software modules within the processor.

[0132] Memory 502, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules. Memory 502 may include at least one type of storage medium, such as flash memory, hard disk, multimedia card, card-type memory, random access memory (RAM), static random access memory (SRAM), programmable read-only memory (PROM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), magnetic storage, magnetic disk, optical disk, etc. Memory 502 can be any other medium capable of carrying or storing desired program code in the form of instructions or data structures that can be accessed by a computer, but is not limited thereto. In the embodiments of this application, memory 502 can also be a circuit or any other device capable of implementing storage functions for storing program instructions and / or data.

[0133] By designing and programming the processor 501, the code corresponding to the predistortion extension model and the method for implementing predistortion described in the foregoing embodiments can be embedded into the chip, so that the chip can execute the steps of the aforementioned predistortion extension model and the method for implementing predistortion when running. How to design and program the processor 501 is a technique known to those skilled in the art, and will not be described in detail here.

[0134] Based on the same inventive concept, embodiments of this application also provide a computationally readable storage medium storing computer instructions that, when executed on a computer, cause the computer to perform the steps of the aforementioned predistortion extension model and the method for implementing predistortion.

[0135] In some possible implementations, the various aspects of the predistortion extension model and the method for implementing predistortion provided in this application can also be implemented as a program product, which includes program code. When the program product is run on an electronic device, the program code is used to cause the detection device to perform the steps in the predistortion extension model and the method for implementing predistortion according to the various exemplary embodiments of this application described above.

[0136] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0137] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0138] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0139] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0140] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A predistortion extension model and a method of implementing predistortion using the same, characterized by, The method comprises: determining, by linear interpolation, an input estimated signal and an output estimated signal corresponding to any time point in an interval between two adjacent sampling time points of the power amplifier; extending a GMP model by taking the input estimated signal and the output estimated signal as input and output signals of the GMP model, to obtain an extended GMP model; wherein the extended GMP model comprises the GMP model and an extended model, the GMP model is used to query a first LUT value corresponding to a first input signal, the extended model is used to query a second LUT value corresponding to the first input signal, the first input signal is an input signal collected at any of the two adjacent sampling time points, the first input signal is in proportional relationship with the input estimated signal, and the LUT is a lookup table; generating a predistortion signal according to the first LUT value and the second LUT value; wherein the extended model satisfies the following relationship: wherein, is the first input signal, is the delay, is the nonlinearity order, is the model coefficient.

2. The method of claim 1, wherein, the method of determining, by linear interpolation, an input estimated signal and an output estimated signal corresponding to any time point in an interval between two adjacent sampling time points of the power amplifier comprises: obtaining a first input signal and a first output signal corresponding to a first time point, and obtaining a second input signal and a second output signal corresponding to a second time point; wherein the first time point and the second time point are time points corresponding to the two adjacent sampling time points respectively; determining the input estimated signal according to the first input signal and the second input signal by linear interpolation, and determining the output estimated signal according to the first output signal and the second output signal by linear interpolation.

3. The method of claim 1, wherein, the method of generating a predistortion signal according to the first LUT value and the second LUT value comprises: multiplying the first LUT value and the second LUT value by the first input signal respectively to obtain a first product and a second product; obtaining the predistortion signal based on the first product and the second product.

4. The method of claim 1, wherein, the method of querying a first lookup table (LUT) value corresponding to the first input signal comprises: determining a first amplitude index corresponding to the first input signal; querying the first LUT value according to the first amplitude index.

5. The method of claim 1, wherein, the method of querying a second LUT value corresponding to the first input signal comprises: determining a second amplitude index corresponding to the first input signal; querying a third LUT value according to the second amplitude index; querying a fourth LUT value according to a signal sampling time point and a signal amplitude corresponding to the first input signal; obtaining the second LUT value based on the third LUT value and the fourth LUT value.

6. A predistortion extension model and an apparatus for implementing predistortion using the same, characterized by, the device comprises: a processing module configured to determine, by linear interpolation, an input estimated signal and an output estimated signal corresponding to any time point in an interval between two adjacent sampling time points of the power amplifier; The model expansion module is configured to expand the input estimated signal and the output estimated signal as input signals and output signals of a generalized memory polynomial (GMP) model, to obtain an expanded GMP model; the expanded GMP model comprises the GMP model and an expansion model; the GMP model is configured to query a first LUT value corresponding to a first input signal; the expansion model is configured to query a second LUT value corresponding to the first input signal; the first input signal is an input signal collected at any sampling time in the two adjacent sampling times; the first input signal is in a proportional relationship with the input estimated signal; the LUT is a lookup table; The processing module is further configured to generate a pre-distortion signal according to the first LUT value and the second LUT value. The expansion model satisfies the following relationship: wherein, is the first input signal, is the delay, is the nonlinearity order, is the model coefficient.

7. The apparatus of claim 6, wherein, The processing module determines the input estimated signal and the output estimated signal corresponding to any time in the interval between the two adjacent sampling times of the power amplifier by a linear interpolation method, comprising: obtaining a first input signal and a first output signal corresponding to a first time, and obtaining a second input signal and a second output signal corresponding to a second time; the first time and the second time are times corresponding to the two adjacent sampling times, respectively; determining the input estimated signal according to the first input signal and the second input signal by a linear interpolation method, and determining the output estimated signal according to the first output signal and the second output signal.

8. The apparatus of claim 6, wherein, The processing module generates the pre-distortion signal according to the first LUT value and the second LUT value, comprising: multiplying the first LUT value and the second LUT value with the first input signal, respectively, to obtain a first product and a second product; obtaining the pre-distortion signal based on the first product and the second product.

9. The apparatus of claim 6, wherein, The processing module queries the first LUT value corresponding to the first input signal, comprising: determining a first amplitude index corresponding to the first input signal; querying the first LUT value according to the first amplitude index.

10. The apparatus of claim 6, wherein, The processing module queries the second LUT value corresponding to the first input signal, comprising: determining a second amplitude index corresponding to the first input signal; querying a third LUT value according to the second amplitude index; querying a fourth LUT value according to a signal sampling time and a signal amplitude corresponding to the first input signal; obtaining the second LUT value based on the third LUT value and the fourth LUT value.

11. An electronic device, comprising: comprising: a memory configured to store program instructions; a processor configured to invoke the program instructions stored in the memory, and execute the steps included in the method according to the obtained program instructions.

12. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, the computer program comprising program instructions, the program instructions causing the computer to execute the method according to any one of claims 1-5 when executed by the computer.

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