A master-slave time synchronization method suitable for multi-master clock networks

Abstract

This invention belongs to the field of communication technology and discloses a master-slave time synchronization method suitable for multi-master clock networks. The method includes: lower-level synchronization nodes dispatching synchronization frames to adjacent higher-level synchronization nodes at the start of a synchronization period; higher-level synchronization nodes receiving the synchronization frames and performing a solidification process to obtain a dispatch factor; the master node sending synchronization frames to adjacent lower-level synchronization nodes; lower-level synchronization nodes solidifying the received synchronization frames and calculating a time correction factor; higher-level synchronization nodes using the time correction factor and the dispatch factor calculating the dispatch time of the synchronization frames, and then dispatching the synchronization frames to adjacent lower-level synchronization nodes at the dispatch time, and so on, until all synchronization nodes in the domain have received the synchronization frames; each synchronization node filtering the obtained clock synchronization factors and then using the filtered clock synchronization factors to correct its local clock, thereby improving the reliability of network time synchronization.

Description

Technical Field

[0001] This invention belongs to the field of communication technology, and in particular relates to a master-slave time synchronization method suitable for multi-master clock networks. Background Technology

[0002] The SAE AS6802 standard, introduced by the Association of the Automobile Manufacturers (AAA), defines a distributed clock synchronization protocol for Time-Triggered Ethernet (TTE). The SAE AS6802 standard specifies three different synchronization roles: Synchronization Master (SM), Synchronization Client (SC), and Compression Master (CM). End systems are typically configured as SMs and SCs, while switches are typically configured as CMs. Synchronization devices (SMs, SCs, and CMs) with the same synchronization priority within the same synchronization domain form a cluster. The SAE AS6802 standard specifies a two-step clock synchronization method. The first step involves the SM (Synchronizer) sending a protocol control frame (PCF) to the CM (Cyclist) within the cluster at the synchronization startup time, requesting synchronization. The second step involves the CM storing and compressing the PCF sent from the SM within its cluster, calculating the compression correction factor to obtain the reference clock, and then sending the compressed PCF to the SM and SC (Synchronizer). The SM and SC store the PCF frame sent by the CM, then calculate the clock correction factor of the local clock by comparing the reference clock carried in the PCF frame with the expected time of the local clock, and adjust the local clock accordingly. Simultaneously, the CM also performs local clock correction operations based on the reference clock, thereby completing the clock synchronization operation of all synchronization devices within the cluster.

[0003] The IEEE 802.1AS-2020 standard, introduced by the Institute of Electrical and Electronics Engineers (IEEE), defines a time synchronization standard for Time-Sensitive Networks (TSNs). The IEEE 802.1AS-2020 protocol specifies a master-slave time synchronization protocol. The master clock periodically sends time synchronization messages, and the slave clock, upon receiving these messages, corrects its local time to the time in the synchronization message, thus achieving synchronization consistency between the master and slave clocks. The master clock can be statically configured or elected by the individual clocks using the Best Master Clock Algorithm (BMCA). After the master clock sends a clock synchronization message, there is a certain delay in the message reaching the slave clock; this delay needs to be measured to compensate for the synchronization time.

[0004] In TTE networks, network synchronization devices require offline configuration before clock synchronization can be performed upon power-up. When the network topology changes, the synchronization devices need to be reconfigured offline. In TSN networks, there is only one master clock per domain. When the master clock fails, each clock executes an optimal master clock algorithm to select a new master clock. This results in a period without a master clock in the network, which can be quite long. Network synchronization devices will temporarily lose synchronization, potentially causing time-aware messages to fail to be transmitted on time and effectively, leading to network failures. Therefore, to achieve adaptive networking and online parameter configuration, while improving the reliability of time synchronization, this invention proposes a master-slave time synchronization method with multiple master clocks. Summary of the Invention

[0005] The technical problem solved by this invention is to provide a master-slave time synchronization method suitable for multi-master clock networks, which solves the problem of adaptive network fault-tolerant time synchronization, improves the reliability of network time synchronization, and enhances the adaptive and scalable capabilities of the time synchronization network by configuring synchronization parameters online.

[0006] The technical solution of the present invention:

[0007] A master-slave time synchronization method applicable to multi-master clock networks is proposed. In the physical topology of the time synchronization network, a domain includes multiple synchronization nodes, denoted as a set SD = {M1, M2, M3, ..., M}. p S1, S2, S3, ..., S q}, M1 represents the first primary node belonging to domain SD, M p S1 represents the last master node in domain SD; S2 represents the first slave node in domain SD. q This indicates the last slave node belonging to the domain SD;

[0008] Based on the hop count distance from the master node, the synchronization nodes within the domain are assigned network levels: Level = {l0, l1, l2, ..., l...}. c The partitioning is such that the master node is the highest-level device among all synchronization devices in the entire network, with a level of 10, denoted as} Located at any master node M p The generated tree network synchronization logical topology belongs to l k The synchronization node at level is denoted as

[0009] The method includes:

[0010] Step 1: When the synchronization period starts, the lower-level synchronization node dispatches synchronization frames to each adjacent higher-level synchronization node.

[0011] Step 2: The higher-level synchronization node receives the synchronization frame sent by the adjacent lower-level slave node, performs solidification processing on the synchronization frame, and obtains the dispatch factor.

[0012] Step 3: The master node sends a synchronization frame to the adjacent lower-level synchronization nodes;

[0013] Step 4: The lower-level synchronization node solidifies the synchronization frames sent by the higher-level synchronization master node and calculates the time correction factor.

[0014] Step 5: The higher-level synchronization node calculates the dispatch time of the synchronization frame using the time correction factor and the dispatch factor, and then dispatches the synchronization frame to the adjacent lower-level synchronization node at the dispatch time, and so on, until all synchronization nodes in the domain have received the synchronization frame.

[0015] Step 6: Each synchronization node filters the obtained clock synchronization factors and then uses the filtered clock synchronization factors to correct the local clock.

[0016] The features and further improvements of the technical solution of this invention are as follows:

[0017] (1) In step one,

[0018] Network Level = {l0, l1, l2, ..., l k-1 , l k , l k+1 , ..., l c The order of intermediate series is l0>l1>l2>...>l k-1 >l k >l k+1 >...>l c Furthermore, lower-level synchronization nodes dispatch synchronization frames to higher-level synchronization nodes at the start of the synchronization cycle. k Let represent any series after l0, 0≤k≤c, where c represents the total series excluding l0.

[0019] (2) In step two,

[0020] Located at any master node M p The resulting tree network synchronizes logical topology belonging to l k Level synchronization node For adjacent nodes located at the main node M p The generated tree network synchronization logical topology belongs to l k+1 Level synchronization node Synchronization frames sent Perform curing treatment;

[0021] Advanced Data Synchronization Node Extracting synchronization frames The transparent clock carried in the memory is then solidified to obtain the synchronization frame. curing time Then calculate the low-level synchronization nodes. Synchronization frames sent curing time With the expected time The difference between them is used to obtain the distribution factor, denoted as . and

[0022] (3) Open an observation window with length δ on both sides of any expected scheduling time to form a receiving window AW centered on the expected scheduling time; in step three,

[0023] Any master node At the distribution time t disp Distribute synchronization frames to any adjacent lower-level synchronization node. Distribution time

[0024] (4) Step four specifically includes:

[0025] Step 401: The lower-level synchronization node performs a hardening process on the synchronization frame sent by the higher-level synchronization node to obtain the hardening time of the synchronization frame.

[0026] Step 402: The lower-level synchronization node calculates the difference between the fixed time of the synchronization frame sent by the higher-level synchronization node and the expected scheduling time to obtain the clock synchronization factor.

[0027] (5) Step 401 is as follows:

[0028] Located at any master node M p The resulting tree network synchronizes logical topology belonging to l k+1 Level synchronization node For adjacent nodes located at the main node M p The generated tree network synchronization logical topology belongs to l k Level synchronization node Synchronization frames sent Perform solidification treatment on low-level synchronization nodes. Extracting synchronization frames The transparent clock information carried within the frame is related to the master clock and is solidified to obtain the synchronization frame. curing time

[0029] (6) Step 402 is as follows:

[0030] Located at any master node M pThe resulting tree network synchronizes logical topology belonging to l k+1 Level synchronization node For adjacent nodes located at the main node M p The generated tree network synchronization logical topology belongs to l k Level synchronization node Synchronization frames sent Expected scheduling time With curing time The difference between them is used to obtain the time correction factor, denoted as... and Here

[0031] (7) Step five is as follows:

[0032] The dispatch factor of the master node located at the root node of the tree network synchronization logical topology is 0. After the master node finishes receiving the window, it delays the dispatch time by one synchronization precision and dispatches the synchronization frame to the adjacent lower-level synchronization node.

[0033] High-level synchronization nodes, excluding the master node, update the dispatch factor using the time correction factor, calculate the dispatch time of the synchronization frame, and then dispatch the synchronization frame to the adjacent low-level synchronization nodes at the dispatch time. The low-level synchronization nodes that receive the synchronization frame from the high-level synchronization nodes will dispatch the synchronization frame to the adjacent low-level synchronization nodes, and so on, until all synchronization nodes in the domain have received the synchronization frame.

[0034] (8) Step six specifically includes:

[0035] Step 601: Each synchronization node uses the filtered and corrected clock synchronization factor to correct its local clock;

[0036] Step 602: All synchronization node clock correction times use the filtered and corrected clock synchronization factor to correct the local clock.

[0037] This invention provides a method to keep the local clocks of synchronization devices in a time synchronization network synchronized with the master clock. Lower-level slave nodes on a logical topology rooted at the master node periodically send synchronization frames to higher-level synchronization nodes to request synchronization. Upon receiving a synchronization frame, the master node sends a synchronization frame to the lower-level synchronization nodes. Lower-level slave nodes adjacent to the master node receive the synchronization frame, forward it to the next lower-level synchronization node, and simultaneously calculate a synchronization correction factor for their own time synchronization. This process continues, forwarding synchronization frames downstream to all slave nodes until all slave nodes on the logical topology rooted at the master node have received the synchronization frame, calculated the synchronization correction factor, and completed synchronization. This method provides fault-tolerant time synchronization services based on multiple master clocks for time synchronization networks.

[0038] The technical solution of this invention is applicable to master-slave clock synchronization in multi-master clock time synchronization networks. The advantages of the method are:

[0039] (1) The method of the present invention fully considers the network time synchronization characteristics and provides a master-slave clock synchronization method suitable for switched networks.

[0040] (2) The method of the present invention takes into account the characteristics of network time synchronization and provides a method for constructing network synchronization logical topology. It does not require offline configuration of the transmission path of time synchronization traffic. It can adaptively expand and perform time synchronization operation according to the actual physical topology. It supports plug-and-play mode and is conducive to expansion to multi-domain time synchronization network to adapt to the time synchronization needs of larger-scale network.

[0041] (3) Considering the reliability of the network time synchronization mechanism, the present invention proposes a master-slave clock synchronization method based on multiple master clocks to calibrate the local clock of the synchronization device in the network, and adopts a hot backup mechanism to improve the reliability of the time synchronization mechanism of the local clock of the network synchronization device.

[0042] (4) The time synchronization method provided by the present invention synchronizes the time from the node to the adjacent synchronization node, rather than synchronizing the time to the master clock, thereby reducing the uncertainty of delay measurement on the round-trip transmission multi-hop path between the synchronization node and the master clock node and improving the accuracy of time synchronization. Attached Figure Description

[0043] Figure 1 This is a schematic diagram of the physical topology of the present invention;

[0044] Figure 2 It is the tree-structured network synchronization logic topology generated by the master node M1;

[0045] Figure 3 It is the tree-structured network synchronization logical topology generated by the master node M2;

[0046] Figure 4 This is a diagram illustrating the synchronization from the slave node to the master node M1.

[0047] Figure 5 This is a diagram illustrating the synchronization from the slave node to the master node M2.

[0048] Figure 6 This invention proposes a master-slave time synchronization process applicable to multi-master clock networks. Detailed Implementation

[0049] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments.

[0050] In this invention, referring to SAE AS6802 or IEEE 802.1AS-2020, a time synchronization network typically has multiple time synchronization domains, and a time synchronization domain is simply referred to as a domain.

[0051] In this invention, a high-precision clock source synchronization node located at the root node of the tree network logical topology within a domain, used for time synchronization of other nodes, is referred to as the master node. The master node also receives synchronization frames from other master nodes and performs time synchronization operations.

[0052] In this invention, the master node generates a tree-like network synchronization logical topology online using the Spanning Tree Protocol or other methods. The master node periodically maintains this tree-like network logical topology and broadcasts it to other synchronization devices within the domain. When the network physical topology changes, such as when synchronization nodes are added or removed, the master node regenerates a tree-like network synchronization logical topology with itself as the root node and broadcasts it to other synchronization devices within the domain. These other synchronization devices then update their locally stored network topology information based on the latest network topology information. For example, Figure 1 The diagram shows the physical connection topology of the time synchronization network. Figure 2 The diagram shows the tree-like network synchronization logical topology with master node 1 as the root node, generated by master node 1 according to the spanning tree protocol or other methods. Figure 3 The diagram shows the tree-like network synchronization logical topology with master node 2 as the root node, generated by master node 2 according to the spanning tree protocol or other methods.

[0053] In this invention, a synchronization node within a domain that actively sends synchronization frames to neighboring nodes to request synchronization, and then receives synchronization frames from neighboring nodes and performs time synchronization operations based on the time synchronization information of the master node contained in the synchronization frame, is referred to as a slave node. Only the master node has the ability to generate a tree-like network synchronization logical topology and broadcast it to other synchronization devices within the domain. Slave nodes do not have the ability to generate a tree-like network synchronization logical topology. The master node also has the function of a "slave node," that is, the master node also actively sends synchronization frames to neighboring nodes to request synchronization and performs time synchronization operations based on the time synchronization information of other master nodes contained in the synchronization frame.

[0054] In this invention, in the tree-structured network synchronization logical topology with the master node as the root node, there is only one path from the master node to any slave node. The path direction from a master node to a synchronization slave node is called the downstream path direction. The path direction from a slave node to a master node is called the upstream path direction.

[0055] The time synchronization network levels are denoted in set form as Level = {l0, l1, l2, ..., l...} k-1 , l k , l k+1 , ..., lc In this context, Level represents the series, l0 represents the highest level, l1 represents the second highest level (the first series after l0), and l2 represents the second highest level (the second series after l0). k Let l represent the k-th series after l0, where k represents the series identifier, and k∈1,2,…,c. k-1 Indicates that it is located at l k The previous series, l k+1 Indicates that it is located at l k The subsequent series, l c Let l represent the lowest level, which is also the last level after l0. Let c represent the total number of levels excluding l0. For ease of explanation, l k It also represents any series after l0, i.e., 0≤k≤c.

[0056] In this invention, the timing accuracy of the master node should be higher than that of the other slave nodes in the network, and there are usually at least two or more master nodes.

[0057] In this invention, in the physical topology of the time synchronization network, a domain includes multiple synchronization nodes, denoted as a set SD = {M1, M2, M3, ..., M}. p S1, S2, S3, ..., S q}, M1 represents the first master node in SD, M2 represents the second master node in SD, and M3 represents the third master node in SD. p This indicates that it belongs to the last master node in SD, and the subscript p represents the identifier of the master node in SD. For ease of explanation, M p This also indicates belonging to any master node in SD; S1 indicates belonging to the first slave node in SD, S2 indicates belonging to the second slave node in SD, S3 indicates belonging to the third slave node in SD, and S... q This indicates that it belongs to the last slave node in SD, and the subscript q represents the identifier of the slave node in SD. For ease of explanation, S q It also means belonging to any slave node in SD.

[0058] In this invention, based on the distance to the master node (e.g., M) p The number of hops (Hops) is used to determine the network level of the synchronization nodes within the domain: Level = {l0, l1, l2, ..., l...} c The division of the network. In this invention, the master node is considered the highest-level device among all synchronization devices in the entire switched network, denoted as level 10. Located at any master node M p The generated tree network synchronization logical topology belongs to l kThe synchronization node SD at the level is denoted as

[0059] like Figure 2 The diagram shows the tree-like network synchronization logical topology generated by master node M1, which has the following characteristics:

[0060] Master node M1 belongs to level l0 and is the root node of the entire tree network's synchronization logical topology, denoted as...

[0061] The slave node S1 belonging to level l1 in the tree network synchronization logical topology generated by the master node M1 is denoted as... The slave node S2 belonging to level l1 is denoted as

[0062] The slave node S3, belonging to level l2, located in the tree-structured network synchronization logical topology generated by master node M1, is denoted as... The slave node S4 belonging to level L2 is denoted as

[0063] The master node M2, belonging to level l3, located in the tree network synchronization logical topology generated by master node M1, is denoted as M2.

[0064] like Figure 3 The diagram shows the tree-structured network synchronization logical topology generated by master node M2. Therefore:

[0065] Master node M2 ​​belongs to level l0 and is the root node of the entire tree network's synchronization logical topology, denoted as...

[0066] The slave node S3, belonging to level l1, located in the tree-like network synchronization logical topology generated by master node M2, is denoted as... The slave node S4 belonging to level l1 is denoted as

[0067] The slave node S1 belonging to level l2 in the tree network synchronization logical topology generated by the master node M2 ​​is denoted as... The slave node S2 belonging to level l2 is denoted as

[0068] The master node M1 belonging to level l3 in the tree network synchronization logical topology generated by master node M2 ​​is denoted as M1.

[0069] In this invention, the network level is Level = {l0, l1, l2, ..., l...} c The order of intermediate series is l0>l1>l2>...>l c Furthermore, the lower-level synchronization node dispatches synchronization frames to the higher-level synchronization node to begin time synchronization operations.

[0070] In this invention, the time synchronization period T sync The definition can be found in the SAE AS6802 standard protocol's Integration Cycle. Each time synchronization cycle T... sync The time 0 is recorded as the synchronization cycle start time. At the synchronization cycle start time, the lower-level synchronization node dispatches a synchronization frame to the adjacent higher-level node for synchronization operations.

[0071] In this invention, the distribution time t disp This refers to the moment when a higher-level synchronization node dispatches a synchronization frame to a lower-level synchronization node.

[0072] In this invention, time synchronization accuracy δ refers to the maximum difference between the local clocks of any two synchronization devices within a domain during a time synchronization period.

[0073] In this invention, the definition of Single-Level Maximum Transmission Delay (SMTD) can be referenced to the maximum transmission delay of the SAE AS6802 standard protocol. In a time synchronization network, the maximum value of the cumulative transparent clock value in a synchronization frame, after any synchronization node transmits a synchronization frame to any adjacent node and that adjacent node completes the hardening operation of the synchronization frame, is called the Single-Level Maximum Transmission Delay (SMTD).

[0074] In this invention, the expected scheduling time This refers to any master node M p The generated tree network synchronization logical topology belongs to l k+1 Any synchronization node at the level The configuration allows it to receive data from the master node M. p The generated tree network synchronization logical topology belongs to l k Any synchronization node at the level The expected time to solidify the received synchronization frame. The expected scheduling time. superscript In this context, SD represents the identifier of the lower-level synchronization device, indicated by a subscript. In this context, SD represents the identity identifier of an advanced data synchronization device. SD can be a slave node or a master node.

[0075] For example, This indicates the expected time of the local clock setting of slave node S3, which belongs to level l2 in the tree network synchronization logical topology generated by master node M1, to the time of the synchronization frame sent by slave node S1, which belongs to level l1 in the tree network synchronization logical topology generated by master node M1.

[0076] In this invention, the expected scheduling time This refers to any master node Mp The generated tree network synchronization logical topology belongs to l k Any synchronization node at the level The configuration allows it to receive data from the master node M. p The generated tree network synchronization logical topology belongs to l k+1 Any synchronization node at the level The expected time to solidify the received synchronization frame. The expected scheduling time. superscript In this context, SD represents the identity identifier of the advanced data synchronization device, indicated by the subscript. In this invention, SD represents the identity identifier of the low-level synchronization device; SD can be a slave node and / or a master node. Let...

[0077] For example, This indicates the expected time for the local clock of slave node S1 (level l1) located in the tree-structured network synchronization logical topology generated by master node M1 to be fixed when a synchronization frame sent by slave node S3 (level l2) is received.

[0078] In this invention, referring to the SAE AS6802 standard, at any expected scheduling time... (or Two observation windows, each with a length of δ, are opened on either side of the expected scheduling time. (or The receiving window AW is centered at 0, so the length of a receiving window is 2×δ, i.e., AW=2×δ.

[0079] In this invention, let

[0080] In this invention, the selected value is denoted as FTA, which is obtained using the Fault-Tolerantaverage algorithm in the SAE AS6802 standard protocol.

[0081] In this invention, referring to the SAE AS6802 standard or IEEE 802.1AS-2020, synchronization frames are used. This refers to any master node M p The generated tree network synchronization logical topology belongs to l k Any synchronization node at the level To the master node M p The generated tree network synchronization logical topology belongs to l k+1 Any synchronization node at the level The transmitted data frame contains transparent clock information. The synchronization frame. In the diagram, the SD before the subscript arrow indicates the identity of the sending device of the synchronization frame, and the SD after the subscript arrow indicates the identity of the receiving synchronization device of the synchronization frame. The SD can be a slave node and / or a master node.

[0082] For example, This indicates a synchronization frame sent by slave node S3 (level l2) on the tree network synchronization logical topology generated by master node M1 to slave node S1 (level l1) on the tree network synchronization logical topology generated by master node M1.

[0083] In this invention, located at any master node M p The generated tree network synchronization logical topology belongs to l k Any synchronization node at the level According to the SAE AS6802 standard, the master node M is located at... p The generated tree network synchronization logical topology belongs to l k+1 Any synchronization node at the level Synchronization Frame The solidification process is performed, and the solidification time of the synchronization frame is recorded as follows: The curing time The superscript SD in the diagram represents the identity of the previous level synchronization device, and the subscript SD represents the identity of the next level synchronization device. SD can be either a slave node or a master node.

[0084] For example, This indicates a synchronization frame sent by slave node S1 (level l1) to slave node S3 (level l2) in the tree-like network synchronization logical topology generated by master node M1. The curing time obtained by performing a curing process.

[0085] In this invention, the distribution factor This refers to a time synchronization period T sync In, located at any master node M p The generated tree network synchronization logical topology belongs to l k Advanced data synchronization node (Except for the master node) Calculate its own local clock and the synchronization of lower-order adjacent nodes. The difference between the local clocks, i.e. The distribution factor superscript In this context, SD represents the identity identifier of the previous synchronization device, indicated by a subscript. In this context, SD represents the identity identifier of the next-level synchronization device. SD can be a slave node or a master node.

[0086] In this invention, the dispatch factor of the master node is set to 0 for all nodes.

[0087] For example, This represents the difference between the local clock of slave node S1 (level l1) and the local clock of slave node S3 (level l2) in the tree-structured network synchronization topology generated by master node M1.

[0088] In this invention, the time correction factor This refers to a time synchronization period T sync In, located at any master node M p The generated tree network synchronization logical topology belongs to l k+1 Level synchronization node Calculate the value located at the master node M p The generated tree network synchronization logical topology belongs to l k Level synchronization node Expected scheduling time of the sent synchronization frame With curing time The difference between them, i.e. The time correction factor superscript In this context, SD represents the identity identifier of an advanced data synchronization device. SD can be a slave node or a master node.

[0089] For example, This indicates a synchronization node belonging to level l2 in the tree-like network synchronization logical topology generated by master node M1. Calculate the slave nodes belonging to level l1 in the tree-like network synchronization logical topology generated by master node M1. Expected scheduling time of the sent synchronization frame With curing time The difference between them.

[0090] In this invention, the synchronization node calculates multiple time synchronization correction factors based on the synchronization frames sent by the higher-level synchronization node, which are denoted as sets.

[0091] In this invention, the time correction time t corr This refers to the time at which all synchronization nodes in a time synchronization network domain correct their local clock operations using a filtered time synchronization factor. In this invention, let t corr = (k+1)×SMTD+(k+1)×AW.

[0092] This invention proposes a master-slave time synchronization method suitable for multi-master clock time synchronization networks. The method includes: based on a tree-structured network synchronization topology generated by the master node, lower-level synchronization nodes send synchronization frames to higher-level synchronization nodes. Higher-level nodes calculate a dispatch factor based on the synchronization frames sent by the lower-level nodes. Then, starting with the master node at the root node, adjacent higher-level nodes receive the synchronization frames sent by the master node, calculate a time correction factor and a dispatch time, and send a synchronization frame to the next-level synchronization node at the dispatch time. The next-level synchronization node repeats the above operations of the higher-level nodes and then dispatches the synchronization frame to the adjacent lower-level nodes, and so on, ensuring that any synchronization device within the domain can receive the synchronization frame. Each synchronization node filters multiple time correction factors obtained from the received synchronization frames and uses the filtered time correction factors to correct its local clock, thereby ensuring master-slave time synchronization for any synchronization device within the domain.

[0093] See Figure 6 As shown, the master-slave clock synchronization method based on a multi-master clock time synchronization network within a domain includes the following steps:

[0094] Step 1: When the synchronization period starts, the lower-level synchronization node dispatches synchronization frames to each adjacent higher-level synchronization node.

[0095] Step 2: The higher-level synchronization node receives the synchronization frame sent by the adjacent lower-level slave node, performs solidification processing on the synchronization frame, and obtains the dispatch factor.

[0096] Step 3: The master node sends a synchronization frame to the adjacent lower-level synchronization nodes;

[0097] Step 4: The lower-level synchronization node solidifies the synchronization frames sent by the higher-level synchronization master node and calculates the time correction factor.

[0098] Step 5: The higher-level synchronization node calculates the dispatch time of the synchronization frame using the time correction factor and the dispatch factor, and then dispatches the synchronization frame to the adjacent lower-level synchronization node at the dispatch time, and so on, until all synchronization nodes in the domain have received the synchronization frame.

[0099] Step 6: Each synchronization node filters the obtained clock synchronization factors and then uses the filtered clock synchronization factors to correct the local clock.

[0100] In this invention, steps one through six are used to traverse the synchronization nodes of the time synchronization network. After traversing all synchronization node devices belonging to the domain, master-slave clock synchronization between clusters is achieved.

[0101] The present invention proposes a master-slave clock synchronization method applicable to multiple master clocks, which can provide accurate time correction services for time synchronization networks.

[0102] Step 1: When the synchronization period starts, the lower-level synchronization node dispatches synchronization frames to each adjacent higher-level synchronization node.

[0103] Network Level = {l0, l1, l2, ..., l k-1 , l k , l k+1 , ..., l c The order of intermediate series is l0>l1>l2>...>l k-1 >l k >l k+1 >...>l c Furthermore, lower-level synchronization nodes dispatch synchronization frames to higher-level synchronization nodes at the start of the synchronization cycle.

[0104] Specifically, any master node M p A tree-structured network synchronization topology is generated online using the Spanning Tree Protocol or other methods and broadcast to other synchronization devices within the domain. Therefore, all synchronization devices within the domain can receive the tree-structured network synchronization topology generated by the master node. At the start of the synchronization cycle, any master node M... p The resulting tree network synchronizes logical topology belonging to l k+1 Level synchronization node The upstream path is located at the main node M p The generated tree network synchronization logical topology belongs to l k Level synchronization node Send a synchronization frame to begin time synchronization.

[0105] For example, in a time synchronization network, such as Figure 1 The system consists of six synchronization devices, including two master nodes and four slave nodes.

[0106] See Figure 1 , Figure 2 , Figure 4 As shown, at the start of the synchronization cycle, the lower-level master nodes are located in the tree-like network synchronization logical topology generated by master node M1. To the slave node of the higher number Send synchronization frame Low-level slave nodes To the slave node of the higher number Send synchronization frame Low-level slave nodes To the slave node of the higher number Send synchronization frame Low-level slave nodes To the master node of the higher number Send synchronization frame Low-level slave nodes To the master node of the higher number Send synchronization frame

[0107] Similarly, at the start of the synchronization cycle, the lower-level master nodes located in the tree-like network synchronization logical topology generated by master node M2... To the slave node of the higher number Send synchronization frame Low-level slave nodes To the slave node of the higher number Send synchronization frame Low-level slave nodes To the slave node of the higher number Send synchronization frame Low-level slave nodes To the master node of the higher number Send synchronization frame Low-level slave nodes To the master node of the higher number Send synchronization frame

[0108] Step 2: The higher-level synchronization node receives the synchronization frame sent by the adjacent lower-level slave node, performs solidification processing on the synchronization frame, and obtains the dispatch factor.

[0109] Specifically, in this invention, located at any master node M p The resulting tree network synchronizes logical topology belonging to l k Level synchronization node For adjacent nodes located at the main node M p The generated tree network synchronization logical topology belongs to l k+1 Level synchronization node Synchronization frames sent Perform solidification processing, i.e., advanced data synchronization node. Extracting synchronization frames The transparent clock carried in the frame is processed according to the hardening method in the SAE AS6802 standard to obtain the synchronization frame. curing time Then calculate the low-level synchronization nodes. Synchronization frames sent curing time With the expected time The difference between them is used to obtain the distribution factor, denoted as . and

[0110] For example, such as Figure 4 As shown, it is located on the tree network synchronization logical topology generated by the master node M1.

[0111] Sub-nodes of high-level numbers Received low-level master node Synchronization frames sent And for synchronization frames The process involves solidification to obtain a synchronization frame. The curing time is Calculate the master node of the lower-level number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the distribution factor, denoted as . and

[0112] Sub-nodes of high-level numbers Received low-level slave nodes Synchronization frames sent And for synchronization frames Curing process Get synchronization frame The curing time is Compute slave nodes of the lower-level number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the distribution factor, denoted as . and

[0113] Sub-nodes of high-level numbers Received low-level slave nodes Synchronization frames sent And for synchronization frames Curing process Get synchronization frame The curing time is Compute slave nodes of the lower-level number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the distribution factor, denoted as . and

[0114] Master node of advanced numbers Received low-level slave nodes Synchronization frames sent And for synchronization frames Curing process Get synchronization frame The curing time is and

[0115] Master node of advanced numbers Received low-level slave nodes Synchronization frames sent And for synchronization frames Curing process Get synchronization frame The curing time is and

[0116] Similarly, such as Figure 5 As shown, on the tree-structured network synchronization logical topology generated by master node M2,

[0117] Sub-nodes of high-level numbers Received low-level master node Synchronization frames sent And for synchronization frames The process involves solidification to obtain a synchronization frame. The curing time is Calculate the master node of the lower-level number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the distribution factor, denoted as . and

[0118] Sub-nodes of high-level numbers Received low-level slave nodes Synchronization frames sent And for synchronization frames Curing process Get synchronization frame The curing time is Compute slave nodes of the lower-level number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the distribution factor, denoted as . and

[0119] Sub-nodes of high-level numbers Received low-level slave nodes Synchronization frames sent And for synchronization frames Curing process Get synchronization frame The curing time is Compute slave nodes of the lower-level number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the distribution factor, denoted as . and

[0120] Master node of advanced numbers Received low-level slave nodes Synchronization frames sent And for synchronization frames Curing process Get synchronization frame The curing time is and

[0121] Master node of advanced numbers Received low-level slave nodes Synchronization frames sent And for synchronization frames Curing process Get synchronization frame The curing time is and

[0122] Step 3: The master node sends a synchronization frame to the adjacent lower-level synchronization nodes;

[0123] Specifically, in this invention, any master node At the distribution time t disp (at this time Distribute synchronization frames to any adjacent lower-level synchronization node.

[0124] Step 4: The lower-level synchronization node solidifies the synchronization frames sent by the higher-level synchronization master node and calculates the time correction factor.

[0125] In this invention, the lower-level synchronization node receives a synchronization frame from the higher-level synchronization master node, performs a hardening process on the synchronization frame to obtain the hardened time of the synchronization frame. Then, the difference between the hardened time of the synchronization frame and the expected scheduling time is calculated to obtain the time correction factor, which is the difference between the local clock time of the synchronization node and the reference time of the local clock of the master node.

[0126] Step 401: The lower-level synchronization node performs a hardening process on the synchronization frame sent by the higher-level synchronization node to obtain the hardening time of the synchronization frame.

[0127] Specifically, in this invention, located at any master node M pThe resulting tree network synchronizes logical topology belonging to l k+1 Level synchronization node For adjacent nodes located at the main node M p The generated tree network synchronization logical topology belongs to l k Level synchronization node Synchronization frames sent Solidification processing is performed, i.e., low-level synchronization nodes. Extracting synchronization frames The transparent clock information carried within is related to the master clock and is processed according to the hardening method in the SAE AS6802 standard to obtain the synchronization frame. curing time

[0128] For example, such as Figure 1 , Figure 3 As shown, in the tree-like network synchronization logical topology generated by the master node M1, the lower-order slave nodes... Compute the master node of the advanced number Synchronization frames sent This synchronization frame The process involves solidification to obtain a synchronization frame. curing time

[0129] Low-level slave nodes Compute the master node of the advanced number Synchronization frames sent This synchronization frame The process involves solidification to obtain a synchronization frame. curing time

[0130] Low-level slave nodes Computing the slave node of the high-order number Synchronization frames sent This synchronization frame The process involves solidification to obtain a synchronization frame. curing time

[0131] Low-level slave nodes Computing the slave node of the high-order number Synchronization frames sent This synchronization frame The process involves solidification to obtain a synchronization frame. curing time

[0132] The primary node of the lower level Computing the slave node of the high-order number Synchronization frames sent This synchronization frame The process involves solidification to obtain a synchronization frame. curing time

[0133] For example, such as Figure 2 , Figure 4 As shown, in the tree-like network synchronization logical topology generated by master node M2, the lower-order slave nodes... Compute the master node of the advanced number Synchronization frames sent This synchronization frame The process involves solidification to obtain a synchronization frame. curing time

[0134] Low-level slave nodes Compute the master node of the advanced number Synchronization frames sent This synchronization frame The process involves solidification to obtain a synchronization frame. curing time

[0135] Low-level slave nodes Computing the slave node of the high-order number Synchronization frames sent This synchronization frame The process involves solidification to obtain a synchronization frame. curing time

[0136] Low-level slave nodes Computing the slave node of the high-order number Synchronization frames sent This synchronization frame The process involves solidification to obtain a synchronization frame. curing time

[0137] The primary node of the lower level Computing the slave node of the high-order number Synchronization frames sent This synchronization frame The process involves solidification to obtain a synchronization frame. curing time

[0138] Step 402: The low-level synchronization node calculates the difference between the fixed time of the synchronization frame sent by the high-level synchronization node and the expected scheduling time to obtain the clock synchronization factor;

[0139] Specifically, in this invention, located at any master node Mp The resulting tree network synchronizes logical topology belonging to l k+1 Level synchronization node For adjacent nodes located at the main node M p The generated tree network synchronization logical topology belongs to l k Level synchronization node Synchronization frames sent Expected scheduling time With curing time The difference between them is used to obtain the time correction factor, denoted as... and Here

[0140] For example, such as Figure 2 , Figure 4 As shown, on the tree-structured network synchronization logical topology generated by master node M1,

[0141] From node Compute the master node of the advanced number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the time correction factor, denoted as... and Here

[0142] From node Compute the master node of the advanced number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the time correction factor, denoted as... and Here

[0143] From node Computing the slave node of the high-order number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the time correction factor, denoted as... and Here

[0144] From node Computing the slave node of the high-order number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the time correction factor, denoted as... and Here

[0145] Master node Computing the slave node of the high-order number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the time correction factor, denoted as... and Here

[0146] For example, such as Figure 5 As shown, on the tree-structured network synchronization logical topology generated by master node M2,

[0147] From node Compute the master node of the advanced number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the time correction factor, denoted as... and Here

[0148] From node Compute the master node of the advanced number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the time correction factor, denoted as... and Here

[0149] From node Computing the slave node of the high-order number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the time correction factor, denoted as... and Here

[0150] From node Computing the slave node of the high-order number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the time correction factor, denoted as... and Here

[0151] Master node Computing the slave node of the high-order number Synchronization frames sent curing time With the expected time The difference between them is used to obtain the time correction factor, denoted as... and Here

[0152] Step 5: The higher-level synchronization node calculates the dispatch time of the synchronization frame using the time correction factor and the dispatch factor, and then dispatches the synchronization frame to the adjacent lower-level synchronization node at the dispatch time, and so on, until all synchronization nodes in the domain have received the synchronization frame.

[0153] In this invention, the dispatch factor of the master node located at the root node of the tree network synchronization logical topology is 0. Therefore, at the dispatch time, i.e., after the end of the receiving window, the master node dispatches the synchronization frame to the adjacent low-level synchronization nodes after a delay of one synchronization precision. The high-level synchronization nodes (except the master node) update the dispatch factor using the time correction factor, calculate the dispatch time of the synchronization frame, and then dispatch the synchronization frame to the adjacent low-level synchronization nodes at the dispatch time. The low-level synchronization nodes that receive the synchronization frame from the high-level synchronization nodes will dispatch the synchronization frame to the adjacent low-level synchronization nodes, and so on, until all synchronization nodes in the domain have received the synchronization frame.

[0154] Specifically, in this invention, the master node M is located at... p The resulting tree-like network synchronizes any synchronization node belonging to level L1 in the logical topology. Using time correction factor and distribution factor Calculate the distribution time t disp ,Right now Then at distribution time t disp Distribute synchronization frames to adjacent synchronization nodes Similarly, located at the master node M p The resulting tree-like network synchronizes any synchronization node belonging to level L2 in the logical topology. Repeating synchronization nodes belonging to level L1 The above synchronization operation ultimately dispatches a synchronization frame to the master node M. p The resulting tree-like network synchronizes any synchronization node belonging to level l3 in the logical topology. And so on, until the node is located at the master node M. p The synchronization continues until all synchronization nodes in the resulting tree-like network synchronization logical topology have received the synchronization frame.

[0155] For example, such as Figure 2 As shown, it is located on the tree network synchronization logical topology generated by the master node M1.

[0156] Master node of advanced numbers At the distribution time t disp (at this time Distribute synchronization frames to adjacent slave nodes.

[0157] Master node of advanced numbers At the distribution time t disp (at this time Distribute synchronization frames to adjacent slave nodes.

[0158] Sub-nodes of high-level numbers Using time correction factor and distribution factor Calculate the distribution time t disp ,Right now Then at distribution time t disp Dispatch synchronization frames to adjacent slave nodes

[0159] Sub-nodes of high-level numbers Using time correction factor and distribution factor Calculate the distribution time t disp ,Right now Then at distribution time t disp Dispatch synchronization frames to adjacent slave nodes

[0160] Sub-nodes of high-level numbers Using time correction factor and distribution factor Calculate the distribution time t disp ,Right now At the distribution time t disp Dispatch synchronization frames to adjacent slave nodes

[0161] For example, such as Figure 5 As shown, on the tree-structured network synchronization logical topology generated by master node M2,

[0162] Master node of advanced numbers Calculate the distribution time t disp ,Right now Then at distribution time t disp Dispatch synchronization frames to adjacent slave nodes

[0163] Master node of advanced numbers Calculate the distribution time t disp ,Right now Then at distribution time t disp Dispatch synchronization frames to adjacent slave nodes

[0164] Sub-nodes of high-level numbers Using time correction factor and distribution factor Calculate the distribution time t disp ,Right now ), at the distribution time t disp Dispatch synchronization frames to adjacent slave nodes

[0165] Sub-nodes of high-level numbers Using time correction factor and distribution factor Calculate the distribution time t disp ,Right now At the distribution time t disp Dispatch synchronization frames to adjacent slave nodes

[0166] Sub-nodes of high-level numbers Using time correction factor and distribution factor Calculate the distribution time t disp ,Right now At the distribution time t disp Dispatch synchronization frames to adjacent slave nodes

[0167] Step 6: Each synchronization node filters the obtained clock synchronization factors, and then uses the filtered clock synchronization factors to correct the local clock.

[0168] Step 601: Each synchronization node uses the filtered and corrected clock synchronization factor to correct its local clock;

[0169] After receiving synchronization information from each master node, the synchronization node obtains a set of time correction factors and selects the pick-up values ​​according to the fault-tolerant average algorithm in the SAEAS6802 standard to obtain the filtered clock synchronization factors.

[0170] Specifically, in this invention, any slave node S q Multiple time correction factors are calculated to obtain a time correction factor set SC. Then, based on the fault-tolerant averaging algorithm in the SAE AS6802 standard, the selected time synchronization factors are obtained. Any master node M pMultiple time correction factors are calculated, and the master node is incremented by 0 to obtain the time correction factor set SC. Then, according to the fault-tolerant averaging algorithm in the SAE AS6802 standard, the filtered time synchronization factors are obtained.

[0171] For example, such as Figure 1 , Figure 3 , Figure 4 As shown,

[0172] Calculated from node S1 and Obtain the set of time correction factors Then, based on the fault-tolerant averaging algorithm in the SAE AS6802 standard, the filtered time synchronization factor is obtained as follows: and

[0173] Calculated from node S2 and Obtain the set of time correction factors Then, based on the fault-tolerant averaging algorithm in the SAE AS6802 standard, the filtered time synchronization factor is obtained as follows: and

[0174] Calculated from node S3 and Obtain the set of time correction factors Based on the fault-tolerant averaging algorithm in the SAE AS6802 standard, the filtered time synchronization factor is obtained as follows: and

[0175] Calculated from node S4 and Obtain the set of time correction factors Then, based on the fault-tolerant averaging algorithm in the SAE AS6802 standard, the filtered time synchronization factor is obtained as follows: and

[0176] The master node M1 is calculated to obtain At the same time, the master node M1 is incremented by 0 to the time correction factor set, thus obtaining the time correction factor set. Then, based on the fault-tolerant averaging algorithm in the SAE AS6802 standard, the filtered time synchronization factor is obtained as follows: and

[0177] The master node M2 ​​is calculated as follows At the same time, the master node M2 ​​is added to the time correction factor set by 0, thus obtaining the time correction factor set. Then, based on the fault-tolerant averaging algorithm in the SAE AS6802 standard, the filtered time synchronization factor is obtained as follows: and

[0178] Step 602: All synchronization node clocks are corrected using the filtered and corrected clock synchronization factor to adjust their local clocks.

[0179] Specifically, in this invention, all synchronization nodes SD within the time synchronization network domain are at time correction time t. corr The local clock operation `sync_corr` is corrected using the filtered time synchronization factor. SD .

[0180] For example, such as Figure 1 The physical topology shown

[0181] From node S1 at clock correction time t corr The local clock operation is corrected using the filtered time synchronization factor, i.e.

[0182] From node S2 at clock correction time t corr The local clock operation is corrected using the filtered time synchronization factor, i.e.

[0183] From node S3 at clock correction time t corr The local clock operation is corrected using the filtered time synchronization factor, i.e.

[0184] From node S4 at clock correction time t corr The local clock operation is corrected using the filtered time synchronization factor, i.e.

[0185] From node M1 at clock correction time t corr The local clock operation is corrected using the filtered time synchronization factor, i.e.

[0186] From node M2 ​​at clock correction time t corr The local clock operation is corrected using the filtered time synchronization factor, i.e.

[0187] This invention provides a master-slave time synchronization method applicable to multi-master clock networks. The method includes: based on a tree-structured network synchronization topology generated by the master node, lower-level synchronization nodes send synchronization frames to higher-level synchronization nodes. Higher-level nodes calculate a dispatch factor based on the synchronization frames sent by the lower-level nodes. Then, starting with the master node at the root node, adjacent higher-level nodes receive the synchronization frames sent by the master node, calculate a time correction factor and a dispatch time, and send the synchronization frame to the next-level synchronization node at the dispatch time. The next-level synchronization node repeats the above operations of the higher-level nodes and then dispatches the synchronization frame to adjacent lower-level nodes, and so on, ensuring that any synchronization device within the domain can receive the synchronization frame. Each synchronization node filters multiple time correction factors obtained from the received synchronization frames and uses the filtered time correction factors to correct its local clock, thereby ensuring master-slave time synchronization for any synchronization device within the domain.

Claims

1. A master-slave time synchronization method suitable for multi-master clock networks, characterized in that, In the physical topology of a time synchronization network, a domain comprises multiple synchronization nodes, denoted as a set. , Indicates belonging to the domain The first master node in, Indicates belonging to the domain The last master node in; Indicates belonging to the domain The first node in the middle, Indicates belonging to the domain The last node in; Network levels are assigned to synchronization nodes within the domain based on their hop count distance from the master node. The partitioning assigns the master node the highest-level synchronization device in the entire network, with the level being [number missing]. Level, denoted as Located at any master node The generated tree network synchronization logical topology belongs to The synchronization node at level is denoted as ; The method includes: Step 1: When the synchronization period starts, the lower-level synchronization node dispatches synchronization frames to each adjacent higher-level synchronization node. Step 2: The higher-level synchronization node receives the synchronization frame sent by the adjacent lower-level slave node, performs solidification processing on the synchronization frame, and obtains the dispatch factor. Step 3: The master node sends a synchronization frame to the adjacent lower-level synchronization nodes; Step 4: The lower-level synchronization node solidifies the synchronization frames sent by the higher-level synchronization master node and calculates the time correction factor. Step 5: The higher-level synchronization node calculates the dispatch time of the synchronization frame using the time correction factor and the dispatch factor, and then dispatches the synchronization frame to the adjacent lower-level synchronization node at the dispatch time, and so on, until all synchronization nodes in the domain have received the synchronization frame. Step 6: Each synchronization node filters the obtained clock synchronization factors and then uses the filtered clock synchronization factors to correct the local clock.

2. The master-slave time synchronization method for multi-master clock networks according to claim 1, characterized in that, In step one, Network Levels The order of intermediate series is as follows Furthermore, lower-level synchronization nodes dispatch synchronization frames to higher-level synchronization nodes at the start of the synchronization cycle. Indicates that it is located at For any subsequent series, , Indicates except The total series other than.

3. The master-slave time synchronization method for multi-master clock networks according to claim 1, characterized in that, In step two, Located at any master node The resulting tree network synchronization logical topology belongs to Level synchronization node For adjacent nodes located at this master node The generated tree network synchronization logical topology belongs to Level synchronization node Synchronization frames sent Perform curing treatment; Advanced Data Synchronization Node Extracting synchronization frames The transparent clock carried in the frame is then solidified to obtain the synchronization frame. curing time Then calculate the low-level synchronization nodes. Synchronization frames sent curing time With the expected time The difference between them is used to obtain the distribution factor, denoted as . ,and .

4. A master-slave time synchronization method suitable for multi-master clock networks according to claim 3, characterized in that, Open an observation window on each side of any expected scheduling time, with a length of [value missing]. This forms a receiving window centered on the expected scheduling time. In step three, Any master node At the time of distribution Distribute synchronization frames to any adjacent lower-level synchronization node. Distribution time .

5. A master-slave time synchronization method for multi-master clock networks according to claim 4, characterized in that, Step four specifically includes: Step 401: The lower-level synchronization node performs a hardening process on the synchronization frame sent by the higher-level synchronization node to obtain the hardening time of the synchronization frame. Step 402: The lower-level synchronization node calculates the difference between the fixed time of the synchronization frame sent by the higher-level synchronization node and the expected scheduling time to obtain the clock synchronization factor.

6. A master-slave time synchronization method for multi-master clock networks according to claim 5, characterized in that, Step 401 specifically involves: Located at any master node The resulting tree network synchronization logical topology belongs to Level synchronization node For adjacent nodes located at this master node The generated tree network synchronization logical topology belongs to Level synchronization node Synchronization frames sent Perform solidification treatment on low-level synchronization nodes. Extracting synchronization frames The transparent clock information carried within the frame is related to the master clock and is solidified to obtain the synchronization frame. curing time .

7. A master-slave time synchronization method for multi-master clock networks according to claim 5, characterized in that, Step 402 specifically involves: Located at any master node The resulting tree network synchronization logical topology belongs to Level synchronization node For adjacent nodes located at this master node The generated tree network synchronization logical topology belongs to Level synchronization node Synchronization frames sent Expected scheduling time With curing time The difference between them is used to obtain the time correction factor, denoted as... ,and , here , This represents the maximum transmission delay for a single stage.

8. A master-slave time synchronization method for multi-master clock networks according to claim 5, characterized in that, Step five is as follows: The dispatch factor of the master node located at the root node of the tree network synchronization logical topology is 0. After the master node finishes receiving the window, it delays the dispatch time by one synchronization precision and dispatches the synchronization frame to the adjacent lower-level synchronization node. High-level synchronization nodes, excluding the master node, update the dispatch factor using the time correction factor, calculate the dispatch time of the synchronization frame, and then dispatch the synchronization frame to the adjacent low-level synchronization nodes at the dispatch time. The low-level synchronization nodes that receive the synchronization frame from the high-level synchronization nodes will dispatch the synchronization frame to the adjacent low-level synchronization nodes, and so on, until all synchronization nodes in the domain have received the synchronization frame.

9. A master-slave time synchronization method for multi-master clock networks according to claim 8, characterized in that, Step six specifically includes: Step 601: Each synchronization node uses the filtered and corrected clock synchronization factor to correct its local clock; Step 602: All synchronization node clock correction times use the filtered and corrected clock synchronization factor to correct the local clock.

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