Organic light-emitting transistor and preparation method thereof, display panel

Abstract

An organic light-emitting transistor and a preparation method thereof, and a light-emitting panel, the organic light-emitting transistor comprising: a substrate; a gate electrode layer arranged on one side of the substrate; a gate insulating layer arranged on a side of the gate electrode layer away from the substrate; a first source electrode arranged on a side of the gate insulating layer away from the substrate; a light-emitting functional layer arranged on a side of the first source electrode away from the substrate; and a first drain electrode arranged on a side of the light-emitting functional layer away from the substrate, wherein a surface of the first source electrode away from the substrate has a first optical grating structure. The organic light-emitting transistor of the embodiment of the present disclosure sets the surface of the first source electrode as an optical grating structure, which can weaken the waveguide effect, the substrate effect and the SPP effect caused by the difference in the refractive index between the internal film layers of the device, etc., so that more photons become effective photons, thereby enabling more light to be emitted from the organic light-emitting transistor and improving the efficiency of the organic light-emitting transistor.

Description

TECHNICAL FIELD

[0001] The embodiment of the present disclosure relates to, but is not limited to, the technical field of display, in particular to an organic light-emitting transistor and a preparation method thereof, and a display panel. BACKGROUND

[0002] An organic light-emitting transistor (OLET) is a device integrating the switching function of an organic field-effect transistor (OFET) and the electroluminescence function of an organic light emitting diode (OLED). The OLET device has a simple structure, a mature preparation process, a light and thin device, and is easy to miniaturize, and has become one of the development trends of future display technology, so it is necessary to conduct in-depth research. The working principle of the OLET device is that the gate voltage controls the source-drain current of the thin film transistor (TFT) part at the same time, and also controls the area and luminous intensity of the light-emitting region. However, the transverse structure OLET prepared in the previous years has the problems of high working voltage, low efficiency, short service life and small aperture ratio due to the low carrier mobility of the organic evaporation material.

[0003] The vertical structure OLET device can improve the problems of low carrier mobility of the organic material of the transverse structure OLET and small light-emitting area of the device, and at the same time improve the efficiency of the device and reduce the working voltage of the device. In addition, when the transmittance of the gate, source and drain is high, surface light emission can be realized. The working principle is that the application of Vgs can increase or decrease the number of induced electrons or holes to further improve the balance rate of electrons and holes in the light-emitting region, thereby improving the light-emitting performance of the device.

[0004] Although the performance of the vertical structure OLET has been improved compared with the transverse structure OLET, the waveguide effect, substrate effect and surface plasmon polariton (SPP) effect caused by the difference in refractive index between the internal film layers of the device still cause a large number of photons in the device to be confined in the device and cannot be effectively emitted, so the efficiency of the device is still low. SUMMARY

[0005] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of protection of the present disclosure.

[0006] The embodiment of the present disclosure provides an organic light-emitting transistor, which comprises:

[0007] a substrate;

[0008] a gate layer disposed on a side of the substrate away from the base substrate;

[0009] a gate insulating layer disposed on a side of the gate layer away from the substrate;

[0010] a first source electrode disposed on a side of the gate insulating layer away from the substrate;

[0011] a light-emitting functional layer disposed on a side of the first source electrode away from the substrate; and

[0012] a first drain electrode disposed on a side of the light-emitting functional layer away from the substrate,

[0013] wherein a surface of the first source electrode away from the substrate has a first grating structure.

[0014] In an exemplary embodiment, the first grating structure includes a base layer and a plurality of protrusions disposed on the base layer, the plurality of protrusions are arranged in sequence along a first direction and extend along a second direction, the first direction intersects the second direction.

[0015] In an exemplary embodiment, the plurality of protrusions of the first grating structure have the same height.

[0016] In an exemplary embodiment, protrusions disposed on a peripheral region of the base layer of the first grating structure have a first height, protrusions disposed on a central region of the base layer of the first grating structure have a second height, the first height is greater than the second height.

[0017] In an exemplary embodiment, along a direction from the central region to the peripheral region, the height of the protrusions gradually increases.

[0018] In an exemplary embodiment, a surface of the first grating structure away from the substrate is a curved surface structure.

[0019] In an exemplary embodiment, a surface of the gate insulating layer away from the substrate has a second grating structure, the first source electrode has a uniform thickness, the first grating structure and the second grating structure have matching shapes and the same period.

[0020] In an exemplary embodiment, a surface of the first source electrode close to the substrate is a flat surface.

[0021] In an exemplary embodiment, the height of the plurality of protrusions is H; or,

[0022] The protrusions provided at the peripheral region of the base layer of the first grating structure have a first height, the protrusions provided at the central region of the base layer of the first grating structure have a second height, and the height of the protrusion with the minimum height is H;

[0023] H is 65 nm to 112 nm;

[0024] The interval width of the first grating structure is 245 nm to 340 nm, and the period of the first grating structure is 274 nm to 650 nm.

[0025] In an exemplary embodiment,

[0026] In the organic light-emitting transistor emitting blue light, H is 65 nm to 75 nm, the interval width of the first grating structure is 245 nm to 255 nm, and the period of the first grating structure is 274 nm to 486 nm; or

[0027] In the organic light-emitting transistor emitting green light, H is 78 nm to 92 nm, the interval width of the first grating structure is 275 nm to 285 nm, and the period of the first grating structure is 303 nm to 591 nm; or

[0028] In the organic light-emitting transistor emitting yellow light, H is 84 nm to 100 nm, the interval width of the first grating structure is 295 nm to 305 nm, and the period of the first grating structure is 415 nm to 620 nm; or

[0029] In the organic light-emitting transistor emitting red light, H is 90 nm to 112 nm, the interval width of the first grating structure is 330 nm to 340 nm, and the period of the first grating structure is in the range of 335 nm to 650 nm.

[0030] In an exemplary embodiment, the cross-sectional shape of the protrusion is triangular, semicircular, or trapezoidal in a plane perpendicular to the substrate.

[0031] In an exemplary embodiment, the surface of the first grating structure away from the substrate side is grid-shaped or hole-shaped.

[0032] In an exemplary embodiment, the material of the first source electrode is selected from any one of a metal, indium tin oxide, a carbon nanotube, a single-layer graphene, and a silver nanowire, and the metal is any one of gold, silver, copper, aluminum, magnesium, and an alloy thereof.

[0033] In an exemplary embodiment, the material of the gate insulating layer is selected from any one or more of aluminum oxide, titanium dioxide, silicon nitride, silicon oxide, silicon oxynitride, polymethyl methacrylate, polyvinyl alcohol, ethylene oxide, and polyacrylic acid.

[0034] In exemplary embodiments,

[0035] The material of the gate layer is selected from any one or more of indium tin oxide, gold, silver, aluminum, and magnesium;

[0036] The material of the first drain electrode is selected from any one or more of gold, silver, copper, aluminum, and magnesium.

[0037] In exemplary embodiments, the light-emitting functional layer comprises:

[0038] A hole transport layer disposed on the first source electrode away from the substrate side;

[0039] A light-emitting layer disposed on the hole transport layer away from the substrate side;

[0040] An electron transport layer disposed on the light-emitting layer away from the substrate side.

[0041] The present disclosure also provides a light-emitting panel comprising a plurality of organic light-emitting transistors as described above.

[0042] In exemplary embodiments, the light-emitting panel further comprises:

[0043] A switching transistor disposed between the substrate and the gate layer, the switching transistor comprising a second source electrode and a second drain electrode, the second drain electrode being electrically connected to the gate layer and the second source electrode, respectively;

[0044] A thin film encapsulation layer disposed on the first drain electrode away from the substrate side;

[0045] A BM photoresist layer and a color film layer disposed on the thin film encapsulation layer away from the substrate side;

[0046] A pixel definition layer disposed between the plurality of organic light-emitting transistors.

[0047] The present disclosure also provides a method for preparing an organic light-emitting transistor, the method comprising:

[0048] S10: forming a gate layer on one side of a substrate;

[0049] S20: forming a gate insulating layer having a second grating structure on the gate layer away from the substrate side;

[0050] S30: forming a first source electrode having a uniform thickness on the gate insulating layer having the second grating structure away from the substrate side, the surface of the first source electrode away from the substrate side having a first grating structure;

[0051] S40: forming a light-emitting functional layer on the first source electrode away from the substrate side; and

[0052] S50: forming a first drain electrode on the side of the light-emitting functional layer away from the substrate.

[0053] In an example embodiment, step S20 comprises:

[0054] S21: forming an organic polymer semiconductor film having a second grating structure by spin coating and imprinting process of the organic polymer semiconductor material, to obtain a gate insulating layer having the second grating structure on the side of the substrate away from the substrate;

[0055] The organic polymer semiconductor material is selected from any one or more of polymethyl methacrylate, polyvinyl alcohol, polyethylene oxide and polyacrylic acid.

[0056] In an example embodiment, step S20 comprises:

[0057] S21': forming a silicon-containing inorganic semiconductor film by chemical vapor deposition process of the silicon-containing inorganic semiconductor material, and forming a second grating structure by dry etching process of the silicon-containing inorganic semiconductor film, to obtain a gate insulating layer having the second grating structure on the side of the substrate away from the substrate;

[0058] The silicon-containing inorganic semiconductor material is selected from any one or more of silicon nitride, silicon oxide and silicon oxynitride.

[0059] In an example embodiment, step S21' comprises: forming a first silicon-containing inorganic semiconductor film by chemical vapor deposition process of a first silicon-containing inorganic semiconductor material, and forming a second initial grating structure by dry etching process of the first silicon-containing inorganic semiconductor film, depositing a second silicon-containing inorganic semiconductor material on the first silicon-containing inorganic semiconductor film of the second initial grating structure by chemical vapor deposition process, to obtain a gate insulating layer having the second grating structure on the side of the substrate away from the substrate;

[0060] The second initial grating structure and the second grating structure both comprise a plurality of protrusions, and in a plane perpendicular to the substrate, the cross-sectional shape of the protrusions of the second initial grating structure is triangular, and the cross-sectional shape of the protrusions of the second grating structure is a rounded trapezoid.

[0061] In an example embodiment, the first silicon-containing inorganic semiconductor material and the second silicon-containing inorganic semiconductor material are the same material or different materials.

[0062] In an example embodiment, step S20 comprises:

[0063] S21'': a metal oxide is formed into a metal oxide film by a chemical vapor deposition process or an atomic layer deposition process, and a dry etching process is used to make the metal oxide film form a second grating structure, so as to obtain a gate insulating layer with a second grating structure on the surface away from the substrate side;

[0064] The metal oxide is selected from any one or more of aluminum oxide and titanium dioxide.

[0065] In an example embodiment, step S21'' includes: a first metal oxide is formed into a first metal oxide film by a chemical vapor deposition process or an atomic layer deposition process, and a dry etching process is used to make the first metal oxide film form a second initial grating structure, a second metal oxide is deposited on the first metal oxide film of the second initial grating structure by a chemical vapor deposition process or an atomic layer deposition process, so as to obtain a gate insulating layer with a second grating structure on the surface away from the substrate side;

[0066] The second initial grating structure and the second grating structure both include a plurality of protrusions, and in a plane perpendicular to the substrate, the cross-sectional shape of the protrusions of the second initial grating structure is a triangle, and the cross-sectional shape of the protrusions of the second grating structure is a rounded trapezoid.

[0067] In an example embodiment, the first metal oxide and the second metal oxide are the same material or different materials.

[0068] In an example embodiment, step S30 includes:

[0069] An etching process is used to make the plurality of protrusions of the second grating structure of the gate insulating layer have different heights, and the protrusions arranged in the peripheral region have a third height, and the protrusions arranged in the middle region have a fourth height, the third height being greater than the fourth height.

[0070] A first source electrode with uniform thickness is formed on the side of the gate insulating layer away from the substrate, and the surface of the first source electrode away from the substrate side has a first grating structure.

[0071] The disclosure embodiments also provide a preparation method of an organic light-emitting transistor, the preparation method including:

[0072] S100: forming a gate layer on one side of a substrate;

[0073] S200: forming a gate insulating layer with a plane on the side of the gate layer away from the substrate;

[0074] S300: forming a first source electrode with a first grating structure on the side of the gate insulating layer away from the substrate;

[0075] S400: forming a light-emitting functional layer on a side of the first source electrode away from the substrate; and

[0076] S500: forming a first drain electrode on a side of the light-emitting functional layer away from the substrate.

[0077] In an example embodiment, step S300 comprises:

[0078] S301: forming a metal film by vacuum evaporation and forming a first grating structure by dry etching, to obtain a first source electrode with the first grating structure; the metal is selected from any one or more of gold, silver, copper, aluminum, and magnesium.

[0079] In an example embodiment, step S301 comprises:

[0080] forming a metal film by vacuum evaporation and forming a first initial grating structure by dry etching;

[0081] applying an etching process to make the multiple protrusions of the first initial grating structure have different heights, and the protrusions arranged in the peripheral region have a first height, and the protrusions arranged in the middle region have a second height, the first height being greater than the second height, to obtain a first source electrode with the first grating structure on a side away from the substrate.

[0082] In an example embodiment, step S300 comprises:

[0083] S301’: forming a film with a grid-like surface by spin coating any one or more of carbon nanotubes, single-layer graphene, and silver nanowires, to obtain a first source electrode with the first grating structure.

[0084] In an example embodiment, step S300 comprises:

[0085] S301”: forming a film with a hole-like surface by magnetron sputtering using a mask, to obtain a first source electrode with the first grating structure.

[0086] In an example embodiment, step S301” comprises:

[0087] forming a film with a hole-like surface by magnetron sputtering using a mask, to obtain an indium tin oxide film with a first initial grating structure;

[0088] applying an etching process to make the multiple protrusions of the first initial grating structure have different heights, and the protrusions arranged in the peripheral region have a first height, and the protrusions arranged in the middle region have a second height, the first height being greater than the second height, to obtain a first source electrode with the first grating structure on a side away from the substrate.

[0089] The organic light-emitting transistor of the embodiments of the present disclosure sets the surface of the first source electrode away from the substrate side as a grating structure, which can weaken the waveguide effect, substrate effect and SPP effect caused by the difference in refractive index between the internal film layers of the device, etc., so that more photons become effective photons, thereby enabling more light to be emitted from the organic light-emitting transistor and improving the efficiency of the organic light-emitting transistor.

[0090] Other features and advantages of the present disclosure will be set forth in the following description, and in part will become apparent from the description, or can be learned by practice of the application. Other advantages of the present disclosure will be realized and attained by those of ordinary skill in the art, including studying the following description and appended claims in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0091] The accompanying drawings are included to provide an understanding of the technical solutions of the present disclosure, and constitute a part of the specification, and are used together with the embodiments of the present disclosure to explain the technical solutions of the present disclosure, and do not constitute a limitation on the technical solutions of the present disclosure.

[0092] Figure 1 Structure schematic diagram of an organic light-emitting transistor of an exemplary embodiment of the present disclosure;

[0093] Figure 2 Structure schematic diagram of a first grating structure of an organic light-emitting transistor of an exemplary embodiment of the present disclosure;

[0094] Figure 3 Structure schematic diagram of a first grating structure of an arc surface structure of an organic light-emitting transistor of an exemplary embodiment of the present disclosure;

[0095] Figure 4 Structure schematic diagram of a grating structure of an organic light-emitting transistor of another exemplary embodiment of the present disclosure;

[0096] Figure 5 Structure schematic diagram of a full-color light-emitting panel of an exemplary embodiment of the present disclosure;

[0097] Figure 6 Cross-sectional SEM diagram of a gate insulating layer with a second grating structure formed on the surface away from the substrate side of an exemplary embodiment of the present disclosure using PMMA;

[0098] Figure 7 Cross-sectional SEM diagram of a gate insulating layer with a protrusion in the shape of an isosceles triangle formed using SiO x

[0099] Figure 8 Cross-sectional SEM diagram of a gate insulating layer with a protrusion in the shape of a circular-angled trapezoid formed using SiO x ​​

[0100] Figure 9 A cross-sectional SEM view of a gate insulating layer formed of Al2O3, whose protrusions are rounded trapezoids, for an exemplary embodiment of the present disclosure;

[0101] Figure 10 A cross-sectional SEM view of a first source electrode formed of carbon nanotubes, whose surface away from the substrate side is a mesh-shaped first grating structure, for an exemplary embodiment of the present disclosure;

[0102] Figure 11 A cross-sectional SEM view of a first source electrode formed of silver nanowires, whose surface away from the substrate side is a mesh-shaped first grating structure, for an exemplary embodiment of the present disclosure;

[0103] Figure 12 A cross-sectional SEM view of a first source electrode formed of ITO, whose surface away from the substrate side is a hole-shaped first grating structure, for an exemplary embodiment of the present disclosure.

[0104] The meanings of the reference symbols in the drawings are as follows:

[0105] 10 - substrate; 20 - gate layer; 30 - gate insulating layer; 40 - first source electrode; 50 - light-emitting functional layer; 60 - first drain electrode; 70 - thin film transistor; 71 - second source electrode; 72 - second drain electrode; 80 - thin film encapsulating layer; 90 - BM photoresist layer; 100 - color filter layer CF; 110 - pixel definition layer. DETAILED DESCRIPTION

[0106] In order to make the objects, technical solutions, and advantages of the present disclosure clearer, below the embodiments of the present disclosure will be described in detail with reference to the drawings. It should be noted that the embodiments in the present disclosure and the features in the embodiments can be combined with each other arbitrarily without conflict.

[0107] The implementation manner herein can be implemented in multiple different forms. One skilled in the art can easily understand the fact that the implementation manner and content can be transformed into various forms without departing from the purpose of the present disclosure and the scope thereof. Therefore, the present disclosure should not be interpreted as being limited in the content described in the following embodiments. The embodiments in the present disclosure and the features in the embodiments can be combined with each other arbitrarily without conflict.

[0108] In the drawings, the size of the constituent elements, the thickness of the layers, or the regions can be exaggerated for the sake of clarity in some cases. Therefore, any one of the implementation manners of the present disclosure is not necessarily limited to the size shown in the drawings, and the shape and size of the components in the drawings do not reflect the true scale. Furthermore, the drawings schematically show ideal examples, and any one of the implementation manners of the present disclosure is not limited to the shape or numerical value shown in the drawings, etc.

[0109] In the description of the present specification, it needs to be explained that the terms "one side", "one end", "the other end", "left", "right", "word structure" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the structure indicated has a specific orientation, is constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0110] The ordinal numbers "first", "second", and the like in the present specification are set in order to avoid confusion of constituent elements, and are not intended to be limiting in terms of number.

[0111] In the present specification, "film" and "layer" can be exchanged with each other. For example, "conductive layer" can be sometimes replaced with "conductive film". Similarly, "quantum dot film" can be sometimes replaced with "quantum dot layer".

[0112] The present disclosure provides an organic light-emitting transistor. Figure 1 A schematic structural diagram of an organic light-emitting transistor of an exemplary embodiment of the present disclosure is shown in FIG. 1. As shown in FIG. 1, the organic light-emitting transistor includes: Figure 1 a substrate 10;

[0113] the substrate 10;

[0114] a gate layer 20 disposed on one side of the substrate 10;

[0115] a gate insulating layer 30 disposed on a side of the gate layer 20 away from the substrate 10;

[0116] a first source electrode 40 disposed on a side of the gate insulating layer 30 away from the substrate 10;

[0117] a light-emitting functional layer 50 disposed on a side of the first source electrode 40 away from the substrate 10; and

[0118] a first drain electrode 60 disposed on a side of the light-emitting functional layer 50 away from the substrate 10.

[0119] wherein a surface of the first source electrode 40 away from the substrate 10 has a first optical grating structure.

[0120] The organic light-emitting transistor of the present disclosure sets the surface of the first source electrode away from the substrate as an optical grating structure, which can weaken the waveguide effect, the substrate effect and the SPP effect caused by the difference in refractive index between the internal film layers of the device, etc., so that more photons become effective photons, thereby enabling more light to be emitted from the organic light-emitting transistor and improving the efficiency of the organic light-emitting transistor.

[0121] In an exemplary embodiment, the first grating structure includes a base layer 01 and a plurality of protrusions 02 disposed on the base layer 01. The plurality of protrusions 02 are arranged sequentially along a first direction and extend along a second direction, wherein the first direction intersects the second direction. Figure 2 This is a schematic diagram of the first gate structure of an organic light-emitting transistor according to an exemplary embodiment of the present disclosure. Figure 2 The left and right directions in the diagram are the first directions.

[0122] In an exemplary embodiment, the heights of the plurality of protrusions in the first grating structure are all the same.

[0123] In an exemplary embodiment, a protrusion disposed in the peripheral region of the base layer has a first height, and a protrusion disposed in the central region of the base layer has a second height, wherein the first height is greater than the second height.

[0124] In the description of embodiments of this disclosure, "peripheral region" is defined as the region near the base layer edge of the grating structure in the first direction, and "central region" is defined as the region near the center between the opposite edges of the base layer of the grating structure in the first direction. In an exemplary embodiment, the height of the protrusion gradually increases along the direction from the central region to the peripheral region.

[0125] In an exemplary embodiment, the surface of the first grating structure away from the substrate is an arc-shaped structure.

[0126] Figure 3 This is a schematic diagram of the first grating structure of an organic light-emitting transistor with an arc-shaped surface, as an exemplary embodiment of this disclosure. Figure 3 As shown, the grating structure of the organic light-emitting transistor in this exemplary embodiment is an arc-shaped structure that is high on both sides and low in the middle. Figure 3 In the diagram, H1 represents the first altitude and H2 represents the second altitude.

[0127] The curved surface structure can improve line emission into surface emission or strip emission, which improves the optical efficiency of organic light-emitting transistors and increases the light-emitting area.

[0128] In an exemplary embodiment, in order to make the surface of the first source electrode away from the substrate have a first grating structure, the surface of the first source electrode close to the substrate can be made planar, in which case the gate insulating layer does not have a grating structure.

[0129] In an exemplary embodiment, in order to make the surface of the first source electrode on the side away from the substrate have a first grating structure, the surface of the gate insulating layer on the side away from the substrate can also be made to have a second grating structure, the first source electrode has a uniform thickness, and the first grating structure and the second grating structure have matching shapes and the same period.

[0130] When the surface of the gate insulating layer on the side away from the substrate has a second grating structure, since the first source electrode is formed on the surface of the gate insulating layer and matches the shape of the gate insulating layer, even if the thickness of the first source electrode is uniform, the first source electrode with a first grating structure can be obtained.

[0131] Figure 4 Structure diagram of a grating structure of an organic light-emitting transistor according to another exemplary embodiment of the present disclosure.

[0132] In Figure 2 In the organic light-emitting transistor shown in FIG. 1, the surface of the first source electrode 40 on the side close to the gate insulating layer 30 (i.e., the side close to the substrate) is planar, the surface of the first source electrode 40 on the side away from the gate insulating layer 30 (i.e., the side away from the substrate) has a first grating structure, and the gate insulating layer 30 does not have a grating structure; in Figure 4 In the organic light-emitting transistor shown in FIG. 1, the surface of the first source electrode 40 on the side away from the gate insulating layer 30 (i.e., the side away from the substrate) has a first grating structure, the surface of the gate insulating layer 30 on the side close to the first source electrode 40 (i.e., the side away from the substrate) has a second grating structure, and the first source electrode 40 has a uniform thickness, the first grating structure and the second grating structure have matching shapes and the same period.

[0133] When the heights of the multiple protrusions of the first grating structure are all the same, the height of each protrusion is defined as H; in Figure 2 In the organic light-emitting transistor shown in FIG. 1, the heights of the multiple protrusions of the first grating structure are all H.

[0134] When the protrusions of the first grating structure arranged in the peripheral region of the base layer have a first height, the protrusions arranged in the central region of the base layer have a second height, and the height of the protrusion with the smallest height in the first grating structure is defined as H;

[0135] In an exemplary embodiment, H is 65 nm to 112 nm.

[0136] In an exemplary embodiment, the interval width of the first grating structure is 245 nm to 340 nm, and the period of the first grating structure is 274 nm to 650 nm.

[0137] In an exemplary embodiment, in an organic light-emitting transistor emitting blue light, H is 65nm to 75nm, for example, H can be 65nm, 66nm, 67nm, 68nm, 69nm, 70nm, 71nm, 72nm, 73nm, 74nm, 75nm; the interval width of the first grating structure is 245nm to 255nm, for example, can be 245nm, 246nm, 247nm, 248nm, 249nm, 250nm, 251nm, 252nm, 253nm, 254nm, 255nm; the period of the first grating structure is 274nm to 486nm, for example, can be 374nm, 390nm, 410nm, 430nm, 450nm, 470nm, 486nm.

[0138] In an exemplary embodiment, in an organic light-emitting transistor emitting green light, H is 78nm to 92nm, for example, H can be 78nm, 80nm, 82nm, 84nm, 86nm, 88nm, 90nm, 92nm; the interval width of the first grating structure is 275nm to 285nm, for example, can be 275nm, 276nm, 277nm, 278nm, 279nm, 280nm, 281nm, 282nm, 283nm, 284nm, 285nm; the period of the first grating structure is 303nm to 591nm, for example, can be 303nm, 350nm, 400nm, 440nm, 500nm, 550nm, 591nm.

[0139] In an exemplary embodiment, in an organic light-emitting transistor emitting yellow light, H is 84nm to 100nm, for example, H can be 84nm, 86nm, 88nm, 90nm, 92nm, 94nm, 96nm, 98nm, 100nm; the interval width of the first grating structure is 295nm to 305nm, for example, can be 295nm, 296nm, 297nm, 298nm, 299nm, 300nm, 301nm, 302nm, 303nm, 304nm, 305nm; the period of the first grating structure is 415nm to 620nm, for example, can be 415nm, 470nm, 500nm, 550nm, 600nm, 620nm.

[0140] In an exemplary embodiment, in the organic light-emitting transistor emitting red light, H is 90 nm to 112 nm, for example, H can be 90 nm, 92 nm, 94 nm, 96 nm, 98 nm, 100 nm, 102 nm, 104 nm, 106 nm, 108 nm, 110 nm, 112 nm; the interval width of the first grating structure is 330 nm to 340 nm, for example, can be 330 nm, 331 nm, 332 nm, 333 nm, 334 nm, 335 nm, 336 nm, 337 nm, 338 nm, 339 nm, 340 nm; the period of the first grating structure is 335 nm to 650 nm, for example, can be 335 nm, 350 nm, 400 nm, 450 nm, 500 nm, 550 nm, 600 nm, 650 nm.

[0141] In an exemplary embodiment, in the plane perpendicular to the substrate, the cross-sectional shape of the protrusion of the first grating structure is a triangle (for example, a rounded triangle), a semicircle, or a trapezoid (for example, an isosceles trapezoid, a rounded trapezoid).

[0142] In an exemplary embodiment, the surface of the first grating structure away from the substrate side is a grid or a hole.

[0143] In an exemplary embodiment, the material of the first source electrode can be selected from any one or more of a metal, indium tin oxide, a carbon nanotube, a single-layer graphene, and a silver nanowire, and the metal can be selected from any one or more of gold, silver, copper, aluminum, and magnesium. When gold in the metal is selected as the material of the first source electrode, the first source electrode can have a good work function, conductivity, and light transmittance. The thickness of the first source electrode can be in the range of 10 nm to 100 nm. to .

[0144] In an exemplary embodiment, the material of the gate insulating layer can be selected from any one or more of aluminum oxide (Al2O3), titanium dioxide (TiO2), Ta2O3, silicon nitride (SiN x ), silicon oxide (SiO x , for example, SiO2), silicon oxynitride (SiON), polymethyl methacrylate (PMMA), polyvinyl alcohol (PVA), polyethylene oxide (PEO), and polyacrylic acid (PAA). The thickness of the gate insulating layer can be 40 nm to 100 nm.

[0145] In an exemplary embodiment, the material of the gate layer can be selected from any one or more of indium tin oxide, gold, silver, aluminum, and magnesium. The thickness of the gate layer can be in the range of 40 nm to 150 nm.

[0146] In an exemplary embodiment, the material of the first drain electrode can be selected from any one or more of gold, silver, copper, aluminum, and magnesium. When gold is used as the material of the first drain electrode, the first drain electrode can have a good work function, conductivity, and light transmittance. The thickness of the first drain electrode can be in the range of 5-50 nm. to

[0147] In an exemplary embodiment, the light-emitting functional layer includes:

[0148] a hole transport layer (HTL) disposed on the side of the first source electrode away from the substrate;

[0149] an emitting layer (EML) disposed on the side of the hole transport layer away from the substrate;

[0150] an electron transport layer (ETL) disposed on the side of the emitting layer away from the substrate.

[0151] In an exemplary embodiment, the light-emitting functional layer can further include an electron block layer (EBL) disposed between the hole transport layer and the emitting layer, and a hole block layer (HBL) disposed between the emitting layer and the electron transport layer.

[0152] The material of the light-emitting functional layer can be selected from high-mobility organic transport materials and high-efficiency light-emitting layer materials. The selection of the material of each film layer and the adjustment of the thickness can have a great influence on the performance of the device and the color of the light emission. Therefore, different colors of device structures are prepared, and the film thickness of each layer of organic material in the device is greatly different. For example, in an organic light-emitting transistor that emits red light, the thickness of the light-emitting functional layer can be 95 nm to 95+n*165 nm; in an organic light-emitting transistor that emits green light, the thickness of the light-emitting functional layer can be 205 nm to 205+n*135 nm; in an organic light-emitting transistor that emits blue light, the thickness of the light-emitting functional layer can be 125 nm to 125+n*115 nm; where n can be any integer, for example, n = 1, 2, 3, ….

[0153] In an exemplary embodiment, the material of the hole injection layer can be selected from any one or more of MoO3, F4-TCNQ, and HAT-CN.

[0154] In an exemplary embodiment, the material of the hole transport layer can be selected from any one or more of NPB, m-MTDATA, NPD, and TPD.​

[0155] In exemplary embodiments, the material of the electron blocking layer can be selected from any one or more of CCP, mCP and Tris-PCz.

[0156] In exemplary embodiments, the material of the electron transport layer can be selected from any one or more of BCP, Bphen and TPBI.

[0157] The chemical structural formulas of some materials are as follows:

[0158]

[0159]

[0160] The embodiments of the present disclosure further provide a light-emitting panel, which comprises a plurality of organic light-emitting transistors as described above.

[0161] In exemplary embodiments, the light-emitting panel can further comprise:

[0162] a switching transistor disposed between the substrate and the gate layer, the switching transistor comprising a second source electrode and a second drain electrode, the second drain electrode being electrically connected with the gate layer and the second source electrode respectively;

[0163] a thin film encapsulation layer disposed away from the substrate on a side of the first drain electrode;

[0164] a BM photoresist layer and a color film layer disposed away from the substrate on a side of the thin film encapsulation layer;

[0165] a pixel definition layer disposed between the plurality of organic light-emitting transistors.

[0166] The light-emitting panel can be a light-emitting panel of any product or component such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, a vehicle-mounted display, a smart watch, a smart bracelet, etc.

[0167] Figure 5A schematic diagram of a structure of a full-color light-emitting panel according to an exemplary embodiment of the present disclosure. In this exemplary embodiment, the full-color light-emitting panel comprises, in order from left to right, a blue light OLET device, a red light OLET device, and a green light OLET device, each of which comprises a substrate 10, a thin-film transistor 70 disposed on one side of the substrate 10, a gate layer 20 disposed on a side of the thin-film transistor 70 distal from the substrate 10, a gate insulating layer 30 disposed on a side of the gate layer 20 distal from the substrate 10, a first source electrode 40 disposed on a side of the gate insulating layer 30 distal from the substrate 10, a light-emitting functional layer 50 disposed on a side of the first source electrode 40 distal from the substrate 10, and a first drain electrode 60 disposed on a side of the light-emitting functional layer 50 distal from the substrate 10; the light-emitting functional layer 50 comprises a hole transport layer disposed on a side of the first source electrode 40 distal from the substrate 10, a light-emitting layer disposed on a side of the hole transport layer distal from the substrate 10, and an electron transport layer disposed on a side of the light-emitting layer distal from the substrate 10; the thin-film transistor 70 comprises a second source electrode 71 and a second drain electrode 72; the first source electrode 40 is electrically connected to the gate layer 20 and the first drain electrode 60, respectively; one end of the second source electrode 71 is electrically connected to the second drain electrode 72, and the other end of the second drain electrode 72 is electrically connected to the gate layer 20.

[0168] The organic light-emitting transistor further comprises a thin-film encapsulation (TFE) layer 80 disposed on a side of the first drain electrode 60 distal from the substrate 10, a BM photoresist layer 90 disposed on a side of the thin-film encapsulation layer 80 distal from the substrate 10, and a color filter layer CF 100.

[0169] A pixel definition layer 110 is disposed between the plurality of organic light-emitting transistors.

[0170] The thin-film encapsulation layer can be a composite film layer formed of high / low / high refractive index materials. The thin-film encapsulation layer can improve light extraction of the device and protect the device from water and oxygen, thereby prolonging the service life of the device.

[0171] The present disclosure also provides a preparation method of an organic light-emitting transistor, which comprises:

[0172] S10: forming a gate layer on one side of a substrate;

[0173] S20: forming a gate insulating layer having a second grating structure on a side of the gate layer distal from the substrate;

[0174] S30: forming a first source electrode with uniform thickness on the gate insulating layer with the second grating structure away from the substrate, and a surface of the first source electrode away from the substrate has the first grating structure;

[0175] S40: forming an active layer on the first source electrode away from the substrate; and

[0176] S50: forming a first drain electrode on the active layer away from the substrate.

[0177] In an example embodiment, step S20 comprises:

[0178] S21: forming an organic polymer semiconductor film with the second grating structure by using a spin coating and imprinting process on the organic polymer semiconductor material, so as to obtain the gate insulating layer with the second grating structure on a surface thereof away from the substrate;

[0179] The organic polymer semiconductor material is selected from any one or more of polymethyl methacrylate, polyvinyl alcohol, polyethylene oxide and polyacrylic acid.

[0180] In an example embodiment, step S20 comprises:

[0181] S21: forming a polymethyl methacrylate film with the second grating structure by using a spin coating and imprinting process on the polymethyl methacrylate, so as to obtain the gate insulating layer with the second grating structure on a surface thereof away from the substrate;

[0182] The process condition of the spin coating process comprises: a rotation speed of 800 r / min.

[0183] The process condition of the imprinting process comprises: an imprinting speed of 20 mm / s, a demolding angle of 90°, a roller weight of 5.6 kg, and an exposure amount of 4900 mj / cm 2 .

[0184] In an example embodiment, step S20 comprises:

[0185] S21': forming a silicon-containing inorganic semiconductor film by using a chemical vapor deposition (CVD) process on a silicon-containing inorganic semiconductor material, and forming the second grating structure on the silicon-containing inorganic semiconductor film by using a dry etching process, so as to obtain the gate insulating layer with the second grating structure on a surface thereof away from the substrate;

[0186] The silicon-containing inorganic semiconductor material is selected from any one or more of silicon nitride, silicon oxide and silicon oxynitride.

[0187] In an example embodiment, step S21' comprises: forming a first silicon-containing inorganic semiconductor material into a first silicon-containing inorganic semiconductor film by a chemical vapor deposition process, and forming a second initial grating structure from the first silicon-containing inorganic semiconductor film by a dry etching process, depositing a second silicon-containing inorganic semiconductor material on the first silicon-containing inorganic semiconductor film of the second initial grating structure by a chemical vapor deposition process, to obtain a gate insulating layer having a second grating structure on a surface away from the substrate side.

[0188] In an example embodiment, the second initial grating structure and the second grating structure each comprise a plurality of protrusions, and in a plane perpendicular to the substrate, the protrusions of the second initial grating structure have a triangular cross-sectional shape, and the protrusions of the second grating structure have a rounded trapezoidal cross-sectional shape.

[0189] In an example embodiment, the first silicon-containing inorganic semiconductor material and the second silicon-containing inorganic semiconductor material are the same material or different materials.

[0190] In an example embodiment, step S20 comprises:

[0191] S21'': forming a metal oxide into a metal oxide film by a chemical vapor deposition process or an atomic layer deposition (ALD) process, and forming a second grating structure from the metal oxide film by a dry etching process, to obtain a gate insulating layer having a second grating structure on a surface away from the substrate side;

[0192] In an example embodiment, the metal oxide is selected from any one or more of aluminum oxide and titanium dioxide.

[0193] In an example embodiment, step S21'' comprises: forming a first metal oxide into a first metal oxide film by a chemical vapor deposition process or an atomic layer deposition process, and forming a second initial grating structure from the first metal oxide film by a dry etching process, depositing a second metal oxide on the first metal oxide film of the second initial grating structure by a chemical vapor deposition process or an atomic layer deposition process, to obtain a gate insulating layer having a second grating structure on a surface away from the substrate side;

[0194] In an example embodiment, the second initial grating structure and the second grating structure each comprise a plurality of protrusions, and in a plane perpendicular to the substrate, the protrusions of the second initial grating structure have a triangular cross-sectional shape, and the protrusions of the second grating structure have a rounded trapezoidal cross-sectional shape.

[0195] In an example embodiment, the first metal oxide and the second metal oxide are the same material or different materials.

[0196] In the example embodiment, step S30 comprises:

[0197] The etching process is used to make the multiple protrusions of the second grating structure of the gate insulating layer have different heights, and the protrusions arranged in the peripheral region have a third height, and the protrusions arranged in the middle region have a fourth height, the third height being greater than the fourth height.

[0198] A first source electrode with uniform thickness is formed on the side of the gate insulating layer away from the substrate, and the surface of the first source electrode on the side away from the substrate has a first grating structure.

[0199] In the example embodiment,

[0200] Before step S10 or step S100, the preparation method can further comprise: forming a thin film transistor on the substrate, and forming a gate layer on the side of the thin film transistor away from the substrate.

[0201] In the example embodiment, the preparation method can further comprise:

[0202] After the hole transport layer is formed, an electron blocking layer is formed on the side of the hole transport layer away from the substrate before the light-emitting layer is formed, and then the light-emitting layer is formed on the side of the electron blocking layer away from the substrate.

[0203] After the light-emitting layer is formed, a hole blocking layer is formed on the side of the light-emitting layer away from the substrate before the electron transport layer is formed, and then the electron transport layer is formed on the side of the hole blocking layer away from the substrate.

[0204] In the example embodiment, the preparation method can further comprise: after the first drain electrode is formed, a thin film encapsulation layer is formed on the side of the first drain electrode away from the substrate, and a BM photoresist layer and a color film layer CF are formed on the side of the thin film encapsulation layer away from the substrate.

[0205] In the example embodiment, the gate layer can be deposited by a magnetron sputtering method, and then the gate layer is patterned into an electrode with a required pattern by an etching method.

[0206] In the example embodiment, the first source electrode and the first drain electrode can be prepared by a vacuum evaporation method.

[0207] In the example embodiment, the hole transport layer, the electron blocking layer, the light-emitting layer, the hole blocking layer, and the electron transport layer can all be prepared by a vacuum evaporation method.

[0208] In the example embodiment, the thin film encapsulation layer can be prepared by a CVD (Chemical Vapor Deposition) method, an IJP (Inkjet Printing) method, or the like.

[0209] The embodiments of the present disclosure further provide a preparation method of an organic light-emitting transistor, which comprises:

[0210] S100: forming a gate layer on one side of a substrate;

[0211] S200: forming a gate insulating layer with a plane on the side of the gate layer away from the substrate;

[0212] S300: forming a first source electrode with a first grating structure on the side of the gate insulating layer away from the substrate;

[0213] S400: forming an active layer on the side of the first source electrode away from the substrate; and

[0214] S500: forming a first drain electrode on the side of the active layer away from the substrate.

[0215] In an exemplary embodiment, step S300 comprises:

[0216] S301: forming a metal film by vacuum evaporation process, and forming a first grating structure by dry etching process, to obtain a first source electrode with a first grating structure; the metal is selected from any one or more of gold, silver, copper, aluminum and magnesium.

[0217] In an exemplary embodiment, step S301 comprises:

[0218] forming a metal film by vacuum evaporation process, and forming a first initial grating structure by dry etching process;

[0219] forming multiple protrusions of the first initial grating structure with different heights by etching process, and the protrusions arranged in the peripheral region have a first height, and the protrusions arranged in the middle region have a second height, the first height being greater than the second height, to obtain a first source electrode with a first grating structure on the side away from the substrate.

[0220] In an exemplary embodiment, step S300 comprises:

[0221] S301': forming a film with a grid-shaped surface by spin coating process using any one or more of carbon nanotubes, single-layer graphene and silver nanowires, to obtain a first source electrode with a first grating structure.

[0222] In an exemplary embodiment, step S300 comprises:

[0223] S301": forming a film with a hole-shaped surface by magnetron sputtering process using a mask plate, to obtain a first source electrode with a first grating structure.

[0224] In the example embodiment, step S301" comprises:

[0225] The indium tin oxide is formed into a film with a porous surface by using a mask in a magnetron sputtering process to obtain an indium tin oxide film with a first initial grating structure.

[0226] The etching process is used to make the multiple protrusions of the first initial grating structure have different heights, and the protrusions arranged in the peripheral region have a first height, and the protrusions arranged in the middle region have a second height, the first height being greater than the second height, to obtain a first source electrode with a first grating structure on the side away from the substrate.

[0227] In the example embodiment,

[0228] Before step S10 or step S100, the preparation method can further comprise: forming a thin film transistor on the substrate, and forming a gate layer on the side of the thin film transistor away from the substrate.

[0229] In the example embodiment, the preparation method can further comprise:

[0230] After the hole transport layer is formed, before the light-emitting layer is formed, an electron blocking layer is formed on the side of the hole transport layer away from the substrate, and then the light-emitting layer is formed on the side of the electron blocking layer away from the substrate.

[0231] After the light-emitting layer is formed, before the electron transport layer is formed, a hole blocking layer is formed on the side of the light-emitting layer away from the substrate, and then the electron transport layer is formed on the side of the hole blocking layer away from the substrate.

[0232] In the example embodiment, the preparation method can further comprise: after the first drain electrode is formed, a thin film encapsulation layer is formed on the side of the first drain electrode away from the substrate, and a BM photoresist layer and a color film layer CF are formed on the side of the thin film encapsulation layer away from the substrate.

[0233] In the example embodiment, the gate layer can be deposited by a magnetron sputtering method, and then an etching method is used to pattern the gate layer into an electrode with a desired pattern.

[0234] In the example embodiment, the first source electrode and the first drain electrode can be prepared by a vacuum evaporation method.

[0235] In the example embodiment, the hole transport layer, the electron blocking layer, the light-emitting layer, the hole blocking layer, and the electron transport layer can all be prepared by a vacuum evaporation method.

[0236] In the example embodiment, the thin film encapsulation layer can be prepared by a CVD method, an inkjet printing (IJP) method, or the like.

[0237] The exemplary embodiments of the present disclosure provide a preparation method of a light-emitting panel, in which a first source electrode has a first grating structure on a surface away from a substrate side, and a gate insulating layer has a second grating structure on a surface away from the substrate side, the preparation method comprising:

[0238] (1) forming a thin film transistor on a substrate;

[0239] (2) forming a gate layer on the thin film transistor by a magnetron sputtering method;

[0240] (3) forming a gate insulating layer with a grating structure on the gate layer:

[0241] forming a polymethyl methacrylate (PMMA) film with a second grating structure by spin coating and imprinting process to obtain a gate insulating layer with the second grating structure on a surface away from the substrate side; wherein the process conditions of the coating process include: a rotation speed of 800 r / min; the process conditions of the imprinting process include: an imprinting speed of 20 mm / s, a demolding angle of 90°, a roller weight of 5.6 kg, and an exposure amount of 4900 mj / cm 2 ; the thickness of the formed gate insulating layer is 80 nm; for every 1 minute increase in coating time, the film thickness increases by 30 nm, and the imprinting needs to adjust different imprinting speeds and exposure amounts according to different film thicknesses;

[0242] (4) forming a first source electrode matching the shape of the gate insulating layer on the gate insulating layer by a magnetron sputtering method or a vacuum evaporation method to obtain a first source electrode with a first grating structure on a surface away from the substrate side (the height of the protrusions of the first grating structure is 65 nm, the interval width of the first grating structure is 252 nm, and the period of the first grating structure is 370 nm);

[0243] (5) forming a hole transport layer on the first source electrode by a vacuum evaporation method;

[0244] (6) forming a light-emitting layer on the hole transport layer by a vacuum evaporation method;

[0245] (7) forming an electron transport layer on the light-emitting layer by a vacuum evaporation method;

[0246] (8) forming a first drain electrode on the electron transport layer by a vacuum evaporation method;

[0247] (9) forming a thin film encapsulation layer on the first drain electrode by CVD and inkjet printing (IJP);

[0248] (10) forming a BM photoresist layer and a color film layer CF on the thin film encapsulation layer.

[0249] Figure 6 A cross-sectional SEM of the gate insulating layer having a second grating structure on the surface away from the substrate side formed by PMMA for the present exemplary embodiment.

[0250] The present disclosure provides a method for manufacturing a light-emitting panel in which the surface away from the substrate side of the first source electrode has a first grating structure and the surface away from the substrate side of the gate insulating layer has a second grating structure, the method comprising:

[0251] (1) forming a thin film transistor on a substrate;

[0252] (2) forming a gate layer on the thin film transistor by a magnetron sputtering method;

[0253] (3) forming a gate insulating layer having a grating structure on the gate layer:

[0254] forming a SiO2 film by a chemical vapor deposition process, and depositing SiO x forming a second initial grating structure of an isosceles triangle protrusion by dry etching the film into a protrusion, and then depositing a SiO2 film (40 nm in thickness) on the surface of the isosceles triangle SiO2 film by a chemical vapor deposition process to convert the isosceles triangle protrusion into a rounded trapezoidal protrusion, thereby obtaining a gate insulating layer having a second grating structure on the surface away from the substrate side; wherein the process conditions of the chemical vapor deposition process include: a power of 1000 W, a pressure of 1200 Mpa, a plate spacing of 700 mil, and a deposition time of 10 min;

[0255] (4) forming a first source electrode matching the shape of the gate insulating layer on the gate insulating layer by a magnetron sputtering method or a vacuum evaporation method, thereby obtaining a first source electrode having a first grating structure on the surface away from the substrate side (the height of the protrusion of the first grating structure is 70 nm, the interval width of the first grating structure is 255 nm, and the period of the first grating structure is 430 nm);

[0256] (5) forming a hole transport layer on the first source electrode by a vacuum evaporation method;

[0257] (6) forming a light-emitting layer on the hole transport layer by a vacuum evaporation method;

[0258] (7) forming an electron transport layer on the light-emitting layer by a vacuum evaporation method;

[0259] (8) forming a first drain electrode on the electron transport layer by a vacuum evaporation method;

[0260] (9) forming a thin film encapsulation layer on the first drain electrode by CVD and inkjet printing (IJP);

[0261] (10) Forming a BM photoresist layer and a color film layer CF on the thin film encapsulation layer.

[0262] Figure 7 SiO2 is used for the present exemplary embodiment x The formed protrusions are the cross-sectional SEM images of the gate insulating layer with isosceles triangular shape, Figure 8 SiO2 is used for the present exemplary embodiment x The formed protrusions are the cross-sectional SEM images of the gate insulating layer with rounded trapezoidal shape.

[0263] When the thickness of the gate insulating layer with the second grating structure on the surface away from the substrate side is greater than the thickness of the first source electrode and the protrusions of the second grating structure are triangular, after the first source electrode is formed on the gate insulating layer, the sharp corners of the grating structure cannot be eliminated, which will cause the film layer of the first source electrode to be discontinuous, or the first source electrode at the sharp corner and the subsequently deposited first drain electrode short circuit, resulting in the device cannot normally light up. At this time, the triangular protrusions can be converted into rounded trapezoidal gratings to solve the problem of film layer discontinuity of the first source electrode, or short circuit between the first source electrode at the sharp corner and the subsequently deposited first drain electrode.

[0264] The present exemplary embodiment provides a preparation method of a light-emitting panel, in which the surface of the first source electrode away from the substrate side has a first grating structure, and the surface of the gate insulating layer away from the substrate side has a second grating structure, the preparation method comprising:

[0265] (1) Forming a thin film transistor on a substrate;

[0266] (2) Forming a gate layer on the thin film transistor by using a magnetron sputtering method;

[0267] (3) Forming a gate insulating layer with a grating structure on the gate layer:

[0268] Al2O3 is formed by using a chemical vapor deposition process or an atomic layer deposition process, and the Al2O3 film is dry etched into a second initial grating structure with isosceles triangular protrusions, then Al2O3 film is deposited on the surface of the isosceles triangular Al2O3 film by using a chemical vapor deposition process, so that the isosceles triangular protrusions are converted into rounded trapezoidal protrusions, to obtain a gate insulating layer with a second grating structure on the surface away from the substrate side; wherein the process conditions of the chemical vapor deposition process include: power of 1000W, pressure of 1000Mpa, plate spacing of 680mil, and deposition time of 15min;

[0269] (4) forming a first source electrode with a first grating structure on the gate insulating layer by using a magnetron sputtering method or a vacuum evaporation method, so that the surface of the first source electrode away from the substrate has the first grating structure (the protruding height of the first grating structure is 88 nm, the interval width of the first grating structure is 268 nm, and the period of the first grating structure is 396 nm);

[0270] (5) forming a hole transport layer on the first source electrode by using a vacuum evaporation method;

[0271] (6) forming a light-emitting layer on the hole transport layer by using a vacuum evaporation method;

[0272] (7) forming an electron transport layer on the light-emitting layer by using a vacuum evaporation method;

[0273] (8) forming a first drain electrode on the electron transport layer by using a vacuum evaporation method;

[0274] (9) forming a thin film encapsulation layer on the first drain electrode by using CVD and inkjet printing (IJP);

[0275] (10) forming a BM photoresist layer and a color film layer CF on the thin film encapsulation layer.

[0276] Figure 9 A cross-sectional SEM image of the gate insulating layer formed by using Al2O3 in the present exemplary embodiment is shown in FIG. 1.

[0277] The present disclosure provides a preparation method of a light-emitting panel, in which a first source electrode has a first grating structure on the surface away from a substrate, a surface of the first source electrode close to the substrate is a plane, and a gate insulating layer is a plane, the preparation method comprising:

[0278] (1) forming a thin film transistor on a substrate;

[0279] (2) forming a gate layer on the thin film transistor by using a magnetron sputtering method;

[0280] (3) forming a planar gate insulating layer on the gate layer;

[0281] (4) forming a first source electrode with a first grating structure on the gate insulating layer:

[0282] The carbon nanotubes are formed into a mesh-shaped film on the gate insulating layer by a spin coating process to obtain a first source electrode with a first grating structure on the surface away from the substrate (the height of the protrusions of the first grating structure is 93 nm, the interval width of the first grating structure is 315 nm, and the period of the first grating structure is 341 nm); wherein the process conditions of the spin coating process include: the rotation speed is 800 rmp, the baking temperature is 50°C, and the baking time is 20 min.

[0283] (5) The hole transport layer is formed on the first source electrode by a vacuum evaporation method;

[0284] (6) The light-emitting layer is formed on the hole transport layer by a vacuum evaporation method;

[0285] (7) The electron transport layer is formed on the light-emitting layer by a vacuum evaporation method;

[0286] (8) The first drain electrode is formed on the electron transport layer by a vacuum evaporation method;

[0287] (9) The thin film encapsulation layer is formed on the first drain electrode by CVD and inkjet printing (IJP);

[0288] (10) The BM photoresist layer and the color film layer CF are formed on the thin film encapsulation layer.

[0289] Figure 10 The cross-sectional SEM image of the first source electrode with the mesh-shaped first grating structure on the surface away from the substrate formed by the carbon nanotubes is used for the present exemplary embodiment.

[0290] The present disclosure provides a preparation method of a light-emitting panel, in which the surface of the first source electrode away from the substrate has a first grating structure, the surface of the first source electrode close to the substrate is a plane, and the gate insulating layer is a plane, the preparation method comprising:

[0291] (1) Forming a thin film transistor on a substrate;

[0292] (2) Forming a gate layer on the thin film transistor by a magnetron sputtering method;

[0293] (3) Forming a planar gate insulating layer on the gate layer;

[0294] (4) Forming a first source electrode with a first grating structure on the surface away from the substrate:

[0295] The silver nanowires are formed into a mesh-shaped film on the gate insulating layer by a spin coating process to obtain a first source electrode with a first grating structure on the surface away from the substrate (the height of the protrusions of the first grating structure is 96 nm, the interval width of the first grating structure is 302 nm, and the period of the first grating structure is 512 nm); wherein the process conditions of the spin coating process include: the rotation speed is 800 rmp, the baking temperature is 50℃, and the baking time is 20 min.

[0296] (5) The hole transport layer is formed on the first source electrode by a vacuum evaporation method;

[0297] (6) The light-emitting layer is formed on the hole transport layer by a vacuum evaporation method;

[0298] (7) The electron transport layer is formed on the light-emitting layer by a vacuum evaporation method;

[0299] (8) The first drain electrode is formed on the electron transport layer by a vacuum evaporation method;

[0300] (9) The thin film encapsulation layer is formed on the first drain electrode by CVD and inkjet printing (IJP);

[0301] (10) The BM photoresist layer and the color film layer CF are formed on the thin film encapsulation layer.

[0302] Figure 11 The cross-sectional SEM image of the first source electrode with the mesh-shaped first grating structure on the surface away from the substrate formed by silver nanowires is used for the present exemplary embodiment.

[0303] The present disclosure provides a preparation method of a light-emitting panel, wherein the surface of the first source electrode away from the substrate has a first grating structure, the surface of the first source electrode close to the substrate is a plane, and the gate insulating layer is a plane, the preparation method comprising:

[0304] (1) Forming a thin film transistor on a substrate;

[0305] (2) Forming a gate layer on the thin film transistor by a magnetron sputtering method;

[0306] (3) Forming a planar gate insulating layer on the gate layer;

[0307] (4) Forming a first source electrode with a first grating structure on the surface away from the substrate:

[0308] The ITO is formed into a hole-shaped film on the gate insulating layer by using a mask plate in a magnetron sputtering process, so that a first source electrode with a first grating structure on the surface away from the substrate is obtained (the height of the protrusions of the first grating structure is 72 nm, the interval width of the first grating structure is 252 nm, and the period of the first grating structure is 458 nm); wherein the process conditions of the magnetron sputtering process include: a power of 860 W and a pressure of 1350 Mpa.

[0309] (5) The hole transport layer is formed on the first source electrode by using a vacuum evaporation method;

[0310] (6) The light-emitting layer is formed on the hole transport layer by using a vacuum evaporation method;

[0311] (7) The electron transport layer is formed on the light-emitting layer by using a vacuum evaporation method;

[0312] (8) The first drain electrode is formed on the electron transport layer by using a vacuum evaporation method;

[0313] (9) The thin film encapsulation layer is formed on the first drain electrode by using CVD and inkjet printing (IJP);

[0314] (10) The BM photoresist layer and the color film layer CF are formed on the thin film encapsulation layer.

[0315] Figure 12 The cross-sectional SEM image of the first source electrode with a hole-shaped first grating structure on the surface away from the substrate formed by using ITO for the present exemplary embodiment.

[0316] Although the embodiments disclosed in the present disclosure are as above, the content described is only the embodiments adopted for facilitating the understanding of the present disclosure, and is not intended to limit the present disclosure. Any person skilled in the art can make any modification and change in the form and details without departing from the spirit and scope of the present disclosure, but the patent protection scope of the present application shall be subject to the scope defined by the appended claims.

Claims

1. An organic light-emitting transistor, characterized in that, include: substrate; A gate layer disposed on one side of the substrate; A gate insulating layer disposed on the side of the gate layer away from the substrate; A first source electrode is disposed on the side of the gate insulating layer away from the substrate; A light-emitting functional layer disposed on the side of the first source electrode away from the substrate; and A first drain electrode is disposed on the side of the light-emitting functional layer away from the substrate. The first source electrode has a first grating structure on the side away from the substrate. The first grating structure includes a base layer and a plurality of protrusions disposed on the base layer. The protrusions disposed in the peripheral region of the base layer have a first height, and the protrusions disposed in the central region of the base layer have a second height. The first height is greater than the second height.

2. The organic light-emitting transistor according to claim 1, characterized in that, The plurality of protrusions are arranged sequentially along a first direction and extend along a second direction, the first direction intersecting the second direction.

3. The organic light-emitting transistor according to claim 2, characterized in that, The height of the protrusion gradually increases along the direction from the central region to the peripheral region.

4. The organic light-emitting transistor according to claim 3, characterized in that, The surface of the first grating structure away from the substrate is an arc-shaped structure.

5. The organic light-emitting transistor according to any one of claims 1 to 4, characterized in that, The surface of the gate insulating layer away from the substrate has a second grating structure, the first source electrode has a uniform thickness, and the first grating structure and the second grating structure have matching shapes and the same period.

6. The organic light-emitting transistor according to any one of claims 1 to 4, characterized in that, The surface of the first source electrode near the substrate is planar.

7. The organic light-emitting transistor according to any one of claims 2 to 4, characterized in that, The height of the smallest protrusion is H; H is 65nm to 112nm, the spacing width of the first grating structure is 245nm to 340nm, and the period of the first grating structure is 274nm to 650nm.

8. The organic light-emitting transistor according to claim 7, characterized in that, In an organic light-emitting transistor that emits blue light, H is 65nm to 75nm, the spacing width of the first grating structure is 245nm to 255nm, and the period of the first grating structure is 274nm to 486nm; or In an organic light-emitting transistor that emits green light, H is 78nm to 92nm, the spacing width of the first grating structure is 275nm to 285nm, and the period of the first grating structure is 303nm to 591nm; or In an organic light-emitting transistor that emits yellow light, H is 84 nm to 100 nm, the spacing width of the first grating structure is 295 nm to 305 nm, and the period of the first grating structure is 415 nm to 620 nm; or In an organic light-emitting transistor that emits red light, H is 90 nm to 112 nm, the spacing width of the first grating structure is 330 nm to 340 nm, and the period of the first grating structure is 335 nm to 650 nm.

9. The organic light-emitting transistor according to any one of claims 2 to 4, characterized in that, In a plane perpendicular to the substrate, the cross-sectional shape of the protrusion is triangular, semi-circular, or trapezoidal.

10. The organic light-emitting transistor according to any one of claims 2 to 4, characterized in that, The surface of the first grating structure away from the substrate is mesh-like or perforated.

11. The organic light-emitting transistor according to any one of claims 1 to 4, characterized in that, The material of the first source electrode is selected from any one of metals, indium tin oxide, carbon nanotubes, monolayer graphene, and silver nanowires, wherein the metal is any one of gold, silver, copper, aluminum, magnesium, and their alloys.

12. The organic light-emitting transistor according to any one of claims 1 to 4, characterized in that, The material of the gate insulating layer is selected from any one or more of alumina, titanium dioxide, silicon nitride, silicon oxide, silicon oxynitride, polymethyl methacrylate, polyvinyl alcohol, ethylene oxide, and polyacrylic acid.

13. The organic light-emitting transistor according to any one of claims 1 to 4, characterized in that, The material of the gate layer is selected from any one or more of indium tin oxide, gold, silver, aluminum, and magnesium; The material of the first drain electrode is selected from any one or more of gold, silver, copper, aluminum and magnesium.

14. The organic light-emitting transistor according to any one of claims 1 to 4, characterized in that, The light-emitting functional layer includes: A hole transport layer disposed on the side of the first source electrode away from the substrate; A light-emitting layer disposed on the side of the hole transport layer away from the substrate; An electron transport layer is disposed on the side of the light-emitting layer away from the substrate.

15. A light-emitting panel, characterized in that, It includes a plurality of organic light-emitting transistors according to any one of claims 1 to 14.

16. The light-emitting panel according to claim 15, characterized in that, Also includes: A switching transistor disposed between the substrate and the gate layer, the switching transistor including a second source electrode and a second drain electrode, the second drain electrode being electrically connected to the gate layer and the second source electrode respectively; A thin-film encapsulation layer disposed on the side of the first drain electrode away from the substrate; A BM photoresist layer and a color filter layer are disposed on the side of the thin film encapsulation layer away from the substrate; A pixel definition layer is set between multiple organic light-emitting transistors.

17. A method for fabricating an organic light-emitting transistor, characterized in that, include: S10: A gate layer is formed on one side of the substrate; S20: A gate insulating layer with a second grating structure is formed on the side of the gate layer away from the substrate; S30: A first source electrode of uniform thickness is formed on the side of the gate insulating layer having the second grating structure away from the substrate, and the surface of the first source electrode on the side away from the substrate has a first grating structure; wherein, the first grating structure includes a base layer and a plurality of protrusions disposed on the base layer; the protrusions disposed in the peripheral region of the base layer have a first height, and the protrusions disposed in the middle region of the base layer have a second height, and the first height is greater than the second height; S40: A light-emitting functional layer is formed on the side of the first source electrode away from the substrate; and S50: A first drain electrode is formed on the side of the light-emitting functional layer away from the substrate.

18. The preparation method according to claim 17, characterized in that, Step S20 includes: S21: An organic polymer semiconductor film with a second grating structure is formed by spin coating and imprinting processes to obtain a gate insulating layer with a second grating structure on the side away from the substrate. The organic polymer semiconductor material is selected from any one or more of polymethyl methacrylate, polyvinyl alcohol, polyethylene oxide, and polyacrylic acid.

19. The preparation method according to claim 17, characterized in that, Step S20 includes: S21': A silicon-containing inorganic semiconductor film is formed by chemical vapor deposition of silicon-containing inorganic semiconductor material, and a second grating structure is formed by dry etching of the silicon-containing inorganic semiconductor film, resulting in a gate insulating layer with a second grating structure on the surface away from the substrate. The silicon-containing inorganic semiconductor material is selected from any one or more of silicon nitride, silicon oxide, and silicon oxynitride.

20. The preparation method according to claim 19, characterized in that, Step S21' includes: forming a first silicon-containing inorganic semiconductor film from a first silicon-containing inorganic semiconductor material using a chemical vapor deposition process, forming a second initial grating structure from the first silicon-containing inorganic semiconductor film using a dry etching process, and depositing a second silicon-containing inorganic semiconductor material on the first silicon-containing inorganic semiconductor film of the second initial grating structure using a chemical vapor deposition process, thereby obtaining a gate insulating layer with a second grating structure on the surface away from the substrate. Both the second initial grating structure and the second grating structure include multiple protrusions. In a plane perpendicular to the substrate, the cross-sectional shape of the protrusion of the second initial grating structure is triangular, and the cross-sectional shape of the protrusion of the second grating structure is a rounded trapezoid.

21. The preparation method according to claim 20, characterized in that, The first silicon-containing inorganic semiconductor material and the second silicon-containing inorganic semiconductor material may be the same material or different materials.

22. The preparation method according to claim 17, characterized in that, Step S20 includes: S21'': A metal oxide film is formed by chemical vapor deposition or atomic layer deposition, and a second grating structure is formed by dry etching, resulting in a gate insulating layer with a second grating structure on the surface away from the substrate. The metal oxide is selected from any one or more of aluminum oxide and titanium dioxide.

23. The preparation method according to claim 22, characterized in that, Step S21'' includes: forming a first metal oxide film by using a chemical vapor deposition process or an atomic layer deposition process, forming a second initial grating structure by using a dry etching process, and depositing a second metal oxide on the first metal oxide film of the second initial grating structure by using a chemical vapor deposition process or an atomic layer deposition process, thereby obtaining a gate insulating layer with a second grating structure on the surface away from the substrate. Both the second initial grating structure and the second grating structure include multiple protrusions. In a plane perpendicular to the substrate, the cross-sectional shape of the protrusion of the second initial grating structure is triangular, and the cross-sectional shape of the protrusion of the second grating structure is a rounded trapezoid.

24. The preparation method according to claim 23, characterized in that, The first metal oxide and the second metal oxide may be the same material or different materials.

25. The preparation method according to any one of claims 17 to 24, characterized in that, Step S30 includes: An etching process is used to make the multiple protrusions of the second grating structure in the gate insulating layer have different heights, and the protrusions in the peripheral region have a third height, and the protrusions in the central region have a fourth height, wherein the third height is greater than the fourth height; A first source electrode of uniform thickness is formed on the side of the gate insulating layer away from the substrate, and the surface of the first source electrode on the side away from the substrate has a first grating structure.

26. A method for fabricating an organic light-emitting transistor, characterized in that, include: S100: A gate layer is formed on one side of the substrate; S200: A planar gate insulating layer is formed on the side of the gate layer away from the substrate; S300: A first source electrode having a first grating structure is formed on the side of the gate insulating layer away from the substrate; wherein the first grating structure includes a base layer and a plurality of protrusions disposed on the base layer; the protrusions disposed in the peripheral region of the base layer have a first height, and the protrusions disposed in the central region of the base layer have a second height, wherein the first height is greater than the second height; S400: A light-emitting functional layer is formed on the side of the first source electrode away from the substrate; and S500: A first drain electrode is formed on the side of the light-emitting functional layer away from the substrate.

27. The preparation method according to claim 26, characterized in that, Step S300 includes: S301: A metal film is formed by vacuum evaporation and a first grating structure is formed by dry etching to obtain a first source electrode with the first grating structure; the metal is selected from any one or more of gold, silver, copper, aluminum and magnesium.

28. The preparation method according to claim 27, characterized in that, Step S301 includes: A metal film is formed by vacuum evaporation and a first initial grating structure is formed by dry etching. An etching process is used to make the multiple protrusions of the first initial grating structure have different heights, and the protrusions in the peripheral region have a first height, the protrusions in the central region have a second height, and the first height is greater than the second height, so that a first source electrode with a first grating structure is obtained on the surface away from the substrate.

29. The preparation method according to claim 26, characterized in that, Step S300 includes: S301': A first source electrode with a first grating structure is obtained by spin-coating any one or more materials among carbon nanotubes, monolayer graphene and silver nanowires to form a film with a mesh-like surface.

30. The preparation method according to claim 26, characterized in that, Step S300 includes: S301'': Using magnetron sputtering, an indium tin oxide film with a porous surface is formed by using a mask to obtain a first source electrode with a first grating structure.

31. The preparation method according to claim 30, characterized in that, Step S301'' includes: Indium tin oxide is formed into a porous film on the surface using a magnetron sputtering process with a mask, resulting in an indium tin oxide film with a first initial grating structure. An etching process is used to make the multiple protrusions of the first initial grating structure have different heights, and the protrusions in the peripheral region have a first height, the protrusions in the central region have a second height, and the first height is greater than the second height, so that a first source electrode with a first grating structure is obtained on the surface away from the substrate.

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