A circuit fault positioning method and device, electronic equipment and storage medium

Abstract

The application discloses a circuit fault positioning method and device, electronic equipment and storage medium, wherein the method comprises: for each phase circuit in a to-be-detected three-phase circuit, determining a voltage positive sequence component and a current positive sequence component corresponding to the current phase circuit; respectively performing morphological processing on the voltage positive sequence component and the current positive sequence component to obtain a corresponding to-be-used voltage peak value and a to-be-used current peak value; determining a circuit fault direction corresponding to the to-be-detected three-phase circuit according to the to-be-used voltage peak value and the to-be-used current peak value, so as to perform fault positioning based on the circuit fault direction. The problem that the circuit fault detection of the power distribution network is easily affected by environmental factors, resulting in inaccurate or slow circuit fault detection, is solved, and the effect of quickly and accurately detecting the circuit fault in the power distribution network and positioning the circuit fault according to the circuit fault direction is achieved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit detection, and in particular to a circuit fault positioning method and device, an electronic device and a storage medium. BACKGROUND

[0002] In a power system, a distribution network can obtain energy from a power transmission line and safely and reliably deliver the energy to users.

[0003] However, in actual applications, the distribution network is easily affected by factors such as adverse weather, vegetation growth and equipment failure, resulting in circuit failure. At present, when positioning a circuit fault, methods such as impedance method, traveling wave method, injection method and fault indicator method are usually used for fault positioning. However, the impedance method is not suitable for increasingly complex distribution networks, the traveling wave method is difficult to accurately determine the fault position, the injection method is mostly used for manual measurement and has a slow detection speed, and the fault indicator method is easily affected by the positioning location of the indicator and may have inaccurate detection.

[0004] In order to solve the above problems, the fault positioning method in the circuit needs to be improved. SUMMARY

[0005] The present application provides a circuit fault positioning method, device, electronic device and storage medium to solve the problem that the circuit fault detection of the distribution network is easily affected by environmental factors, resulting in inaccurate circuit fault detection or slow detection speed.

[0006] In a first aspect, the present application provides a circuit fault positioning method, comprising:

[0007] For each phase circuit in a three-phase circuit to be detected, determine the voltage positive sequence component and the current positive sequence component corresponding to the current phase circuit; wherein the current phase circuit is any one phase circuit in the three-phase circuit to be detected;

[0008] Respectively, the voltage positive sequence component and the current positive sequence component are morphologically processed to obtain the corresponding to-be-used voltage peak value and to-be-used current peak value;

[0009] According to the to-be-used voltage peak value and the to-be-used current peak value, determine the circuit fault direction corresponding to the three-phase circuit to be detected, and perform fault positioning based on the circuit fault direction.

[0010] In a second aspect, the present application further provides a circuit fault positioning device, comprising:

[0011] a positive sequence component determination module configured to determine, for each phase circuit in the three-phase circuit to be detected, a voltage positive sequence component and a current positive sequence component corresponding to a current phase circuit; wherein the current phase circuit is any one of the phase circuits in the three-phase circuit to be detected;

[0012] a peak value determination module configured to perform morphological processing on the voltage positive sequence component and the current positive sequence component respectively to obtain a corresponding to-be-used voltage peak value and a to-be-used current peak value;

[0013] a fault location module configured to determine, according to the to-be-used voltage peak value and the to-be-used current peak value, a circuit fault direction corresponding to the three-phase circuit to be detected, and to perform fault location based on the circuit fault direction.

[0014] In a third aspect, an electronic device is provided, and the electronic device comprises:

[0015] at least one processor; and

[0016] a memory connected to the at least one processor in communication; wherein

[0017] the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor to enable the at least one processor to execute the circuit fault location method according to any one of the embodiments of the present application.

[0018] In a fourth aspect, a computer readable storage medium is provided, and the computer readable storage medium stores computer instructions for enabling a processor to implement the circuit fault location method according to any one of the embodiments of the present application when the processor executes the computer instructions.

[0019] The technical scheme of the embodiment determines the voltage positive sequence component and the current positive sequence component corresponding to the current phase circuit for each phase circuit in the three-phase circuit to be detected, calculates the voltage of each phase circuit in the three-phase circuit to be detected based on the instantaneous symmetrical component method, and can obtain the voltage positive sequence component corresponding to the current phase circuit. Further, the voltage positive sequence component and the current positive sequence component are subjected to morphological processing respectively to obtain the corresponding to-be-used voltage peak value and to-be-used current peak value. The voltage positive sequence component and the current positive sequence component are subjected to morphological filtering processing respectively, so that the to-be-used voltage peak value and the to-be-used current peak value corresponding to the current phase circuit can be obtained more easily. According to the to-be-used voltage peak value and the to-be-used current peak value, the circuit fault direction corresponding to the three-phase circuit to be detected is determined, and fault positioning is performed based on the circuit fault direction. According to the difference between the first time when the to-be-used voltage peak value is reached and the second time when the to-be-used current peak value is reached, the to-be-determined time difference can be obtained. According to the size relationship between the to-be-determined time difference and the preset time difference, the circuit fault direction of the circuit on which the three-phase circuit to be detected is located can be determined, so that the circuit fault positioning is performed according to the circuit fault direction. The problem that the circuit fault detection of the power distribution network is easily affected by environmental factors, resulting in inaccurate or slow circuit fault detection, is solved, and the effect of quickly and accurately detecting the circuit fault in the power distribution network and performing circuit fault positioning according to the circuit fault direction is achieved.

[0020] It should be understood that the content described in this part is not intended to identify key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0022] Figure 1 is a flow chart of a circuit fault positioning method according to the first embodiment of the present application;

[0023] Figure 2 is a flow chart of a circuit fault positioning method according to the second embodiment of the present application;

[0024] Figure 3 is a general architecture schematic diagram of a power distribution network according to the second embodiment of the present application;

[0025] Figure 4 is a voltage positive sequence component and a current positive sequence component schematic diagram under a forward fault direction according to the second embodiment of the present application;

[0026] Figure 5 is a first time and a second time schematic diagram under the forward fault direction according to the second embodiment of the present application;

[0027] Figure 6 is a voltage positive sequence component and a current positive sequence component schematic diagram under a reverse fault direction according to the second embodiment of the present application;

[0028] Figure 7 is a first time and a second time schematic diagram under the reverse fault direction according to the second embodiment of the present application;

[0029] Figure 8 is a structure schematic diagram of a circuit fault locating device according to the third embodiment of the present application;

[0030] Figure 9 is a structure schematic diagram of an electronic device for implementing a circuit fault locating method according to the third embodiment of the present application. DETAILED DESCRIPTION

[0031] In order to make the personnel in the technical field better understand the present application scheme, the technical scheme in the embodiments of the present application will be described clearly and completely below in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should belong to the scope of protection of the present application.

[0032] It should be noted that the terms "first", "second", and the like in the specification and claims of the present application and the above-described drawings are used to distinguish similar objects, and do not necessarily have to describe a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein.

[0033] Before the technical scheme is described in detail, the application scenario of the technical scheme is introduced, so that the technical scheme can be understood more clearly. In the power system, the distribution network can obtain energy from the transmission line and safely and reliably transmit it to the user. If a circuit fault occurs in the distribution network, it will have a great impact on the power transmission of the power system and the safe use of electricity by users, therefore, it is very important to accurately and timely detect whether there is a circuit fault in the circuit of the distribution network.

[0034] Embodiment one

[0035] Figure 1 A flowchart of a circuit fault positioning method is provided for embodiment one of the present application. The embodiment can be applied to the case of detecting and positioning a circuit fault in a three-phase circuit in a power distribution network. The method can be executed by a circuit fault positioning device, which can be implemented in the form of hardware and / or software, and can be configured in a computing device capable of executing the circuit fault positioning method.

[0036] As shown in the method, the method comprises: Figure 1

[0037] S110, for each phase circuit in the three-phase circuit to be detected, determining a voltage positive sequence component and a current positive sequence component corresponding to the current phase circuit.

[0038] To more clearly introduce the technical solution, a brief introduction of the three-phase circuit and the positive sequence component, negative sequence component and zero sequence component related to the three-phase circuit is given. The three-phase circuit is composed of a three-phase power supply, a three-phase load and a three-phase transmission line. Generally, the three-phase circuit is symmetrical, but when a circuit fault occurs in the three-phase circuit, such as three-phase short circuit, two-phase short circuit, two-phase ground short circuit and single-phase short circuit, etc. For three-phase short circuit, it is generally referred to as three-phase symmetrical short circuit. At this time, even if the three-phase voltage is short-circuited, it is still symmetrical. Other short-circuit forms are asymmetrical short circuits. The voltage vector formed by the voltage is also asymmetrical. For asymmetrical voltage vectors, the idea of force synthesis can be used to describe the low price of symmetrical voltage vectors. On this basis, the concepts of positive sequence component, zero sequence component and negative sequence component are defined, and any asymmetrical voltage vector can be synthesized by positive sequence component, zero sequence component and negative sequence component. In the normal symmetrical case, the three-phase synthesized rotating voltage vector is equal in amplitude, the positive sequence is counterclockwise rotation, the sequence is A-phase voltage leading B-phase by 120 degrees, B-phase leading C-phase by 120 degrees, the negative sequence is clockwise rotation, the sequence is B-phase leading A-phase by 120 degrees, A-phase leading C-phase by 120 degrees, and the zero sequence means that A-phase, B-phase and C-phase are in phase. In the present technical solution, the positive sequence component in the three-phase circuit is mainly used for fault judgment to determine whether there is a fault in the circuit of the three-phase circuit, and to position the fault according to the direction of the circuit fault. It can be understood that the positive sequence component in the three-phase circuit includes the voltage positive sequence component and the current positive sequence component.

[0039] ​In the technical solution, the power distribution network can be used as an edge terminal server, and the three-phase circuit to be detected can be understood as a three-phase circuit in the power distribution network. The power distribution network includes at least one three-phase circuit to be detected, and the current phase circuit is any one of the three-phase circuits to be detected. The voltage positive sequence component is the voltage positive sequence component in the three-phase circuit to be detected, and the current positive sequence component is the current positive sequence component in the three-phase circuit to be detected.

[0040] Specifically, each phase circuit in the three-phase circuit to be detected corresponds to a corresponding voltage positive sequence component and a current positive sequence component. Any one phase circuit can be determined as the current phase circuit to perform fault detection on the line of the three-phase circuit to be detected based on the voltage positive sequence component and the current positive sequence component corresponding to the current phase circuit.

[0041] In actual application, when determining the voltage positive sequence component corresponding to the current phase circuit, the voltage values of each phase circuit in the three-phase circuit to be detected are required to be collectively calculated. Similarly, when determining the current positive sequence component corresponding to the current phase circuit, the current values of each phase circuit in the three-phase circuit to be detected are required to be collectively calculated. Optionally, determining the voltage positive sequence component and the current positive sequence component corresponding to the current phase circuit includes: performing voltage collection on each phase circuit in the three-phase circuit to be detected to obtain a first voltage, a second voltage, and a third voltage; performing current collection on each phase circuit in the three-phase circuit to be detected to obtain a first current, a second current, and a third current; obtaining the voltage positive sequence component corresponding to the current phase circuit based on the first voltage, the second voltage, and the third voltage, and obtaining the current positive sequence component corresponding to the current phase circuit based on the first current, the second current, and the third current.

[0042] Among them, the first voltage, the second voltage, and the third voltage respectively refer to the voltage in each phase circuit of the three-phase circuit to be detected. Similarly, the first current, the second current, and the third current respectively refer to the current in each phase circuit of the three-phase circuit to be detected. It should be noted that "first", "second", and "third" in the technical solution are used to distinguish the voltage or current of each phase circuit in the three-phase circuit to be detected from the name, and do not have actual meaning.

[0043] In the technical solution, in order to make fault direction judgment when a fault occurs in a line where the three-phase circuit to be detected is connected, and further determine the fault position, the voltage positive sequence component and the current positive sequence component corresponding to the current phase circuit need to be extracted. Optionally, based on the first voltage, the second voltage and the third voltage, the voltage positive sequence component corresponding to the current phase circuit is obtained, and based on the first current, the second current and the third current, the current positive sequence component corresponding to the current phase circuit is obtained, including: based on the instantaneous symmetrical component method, the first voltage, the second voltage and the third voltage are subjected to positive sequence component extraction to obtain the voltage positive sequence component corresponding to the current phase circuit; and based on the instantaneous symmetrical component method, the first current, the second current and the third current are subjected to positive sequence component extraction to obtain the current positive sequence component corresponding to the current phase circuit.

[0044] In order to more clearly introduce the technical solution, the difference between the traditional symmetrical component method and the instantaneous symmetrical component method will be briefly introduced. The traditional symmetrical component method is defined in the frequency domain and uses phasor representation, and the modulus and phase of the variable need to be calculated, so it can only be used for steady-state analysis of asymmetric faults in power systems. When fault analysis is performed based on the traditional symmetrical component method, the instantaneous values of each sequence component need to be obtained, and then a certain transformation is performed, which will cause a certain delay in the process. The instantaneous symmetrical component method is defined in the time domain, and the instantaneous values of voltage or current are subjected to symmetrical component transformation to construct corresponding non-delay rotating phasors, and then the rotating phasors are subjected to symmetrical component transformation to obtain the instantaneous values of each sequence component, so that real-time analysis of circuit faults in the line can be performed. Specifically, the traditional symmetrical component method has a 2 / 3 cycle delay when analyzing asymmetric three-phase power, and the instantaneous symmetrical component method has only a 1 / 4 cycle delay when performing symmetrical component transformation on the instantaneous values of three-phase current. Therefore, the instantaneous symmetrical component method is used to perform positive sequence component, negative sequence component and zero sequence component decomposition on asymmetric voltage and current.

[0045] It should be noted that the process of calculating the voltage positive sequence component and the current positive sequence component corresponding to the current phase circuit based on the instantaneous symmetrical component is similar, and the current positive sequence component of the current phase circuit will be taken as an example. Specifically, the instantaneous symmetrical component method can be described by the following formula:

[0046]

[0047] wherein, i a represents the first current, i b represents the second current, i c represents the third current, i a(1) represents the current phase circuit positive sequence current component, i a(2) represents the current phase circuit negative sequence current component, i a(0)The current phase circuit zero sequence current component is represented in complex form, and S represents a phase shift operator.

[0048] Further, the phase shift operator S x = e -jx° The i a , i b , i c may be represented in real form as follows:

[0049]

[0050] Wherein, i a represents a first current, i b represents a second current, i c represents a third current, i a(1) The current phase circuit positive sequence current component is represented in complex form, i a(2) The current phase circuit negative sequence current component is represented in complex form, i a(0) The current phase circuit zero sequence current component is represented in complex form, S x = e -jx° represents a phase shift operator.

[0051] Alternatively, it can also be represented in the following form:

[0052]

[0053] Wherein, i a represents a first current, i b represents a second current, i c represents a third current, i a(1) The current phase circuit positive sequence current component is represented in complex form, i a(2) The current phase circuit negative sequence current component is represented in complex form, i a(0) The current phase circuit zero sequence current component is represented in complex form, S x = e -jx° represents a phase shift operator.

[0054] Based on the above process, the current positive sequence component, the current negative sequence component and the current zero sequence component corresponding to the three-phase circuit to be detected can be determined, and similarly, based on the same steps, the voltage positive sequence component, the voltage negative sequence component and the voltage zero sequence component of the three-phase circuit to be detected can be determined. In the technical solution, the line fault detection of the three-phase circuit to be detected is mainly based on the current positive sequence component and the voltage positive sequence component.

[0055] S120, respectively, the voltage positive sequence component and the current positive sequence component are morphologically processed to obtain the corresponding to-be-used voltage peak value and to-be-used current peak value.

[0056] After obtaining the voltage positive sequence component and the current positive sequence component corresponding to the current phase circuit, a step of performing morphological processing on the voltage positive sequence component and the current positive sequence component is performed to obtain the to-be-used voltage peak value and the to-be-used current peak value corresponding to the current phase circuit.

[0057] Specifically, the technical solution introduces a mathematical morphological method widely used in western fine analysis, pattern recognition, visual verification and computer vision, and applies the method to the power system signal processing link. In a visualized manner, the graph corresponding to the voltage positive sequence component and the current positive sequence component is a waveform graph, and some burr phenomena usually exist in the waveform graph. If the corresponding peak value extraction is directly performed on the voltage positive sequence component and the current positive sequence component, the extraction of the peak value may not be accurate due to the burr and other problems in the waveform. Therefore, the morphological method is used to process the voltage positive sequence component and the current positive sequence component to smooth the burr phenomenon in the waveform graph and more accurately extract the to-be-used voltage peak value and the to-be-used current peak value. It should be noted that the waveform graph mentioned herein is only used to explain the function of morphological filtering in a popular manner. In actual application, the corresponding waveform graph can also not be displayed, for example, the data sequence can be displayed.

[0058] Optionally, the morphological processing is performed on the voltage positive sequence component and the current positive sequence component respectively to obtain the corresponding to-be-used voltage peak value and the to-be-used current peak value, including: performing morphological filtering processing on the voltage positive sequence component based on a pre-set first structure element to obtain a first voltage positive sequence component, and obtaining the to-be-used voltage peak value according to the peak value of the first voltage positive sequence component; performing morphological filtering processing on the current positive sequence component based on a pre-set second structure element to obtain a first current positive sequence component, and obtaining the to-be-used current peak value according to the peak value of the first current positive sequence component.

[0059] In the mathematical morphological thought, a "probe" called structure element is used to collect information. When the probe moves continuously, the mutual relationship between various parts of the information can be investigated. As the structure element of the probe, the structure element can directly carry knowledge (morphology, size, etc.) to detect the structure characteristics of the researched information. It has important applications in the fields of transient signal harmonic analysis, singular point detection and denoising, power quality detection, fault diagnosis and positioning, and relay protection and fault distance measurement. Among them, the first structure element and the second structure element in the technical solution can adopt the same structure element, or different structure elements can be adopted according to actual conditions.

[0060] It can be understood that mathematical morphology is a new signal processing tool starting from geometry, is a nonlinear transformation, completely from time domain, can decompose complex signals into parts useful to us and stripped from the background, reveal the main characteristics of the signal, effectively filter out noise interference, and has been widely used in image processing. And mathematical morphology algorithm has the advantages of simple calculation, parallel rapid, small time delay and easy hardware implementation.

[0061] Therefore, based on the first structural element, the voltage positive sequence component is subjected to morphological filtering processing, the first voltage positive sequence component with more uniform and smooth data can be obtained, and through peak value detection on the first voltage positive sequence component, the to-be-used voltage peak value can be obtained. Similarly, based on the second structural element, the current positive sequence component is subjected to morphological filtering processing, the first current positive sequence component with more uniform and smooth data can be obtained, and through peak value detection on the first current positive sequence component, the to-be-used current peak value can be obtained.

[0062] S130, according to the to-be-used voltage peak value and the to-be-used current peak value, determining the circuit fault direction corresponding to the to-be-detected three-phase circuit, so as to perform fault positioning based on the circuit fault direction.

[0063] Specifically, after obtaining the to-be-used voltage peak value and the to-be-used current peak value, further, according to the to-be-used voltage peak value and the to-be-used current peak value, determining the circuit fault direction corresponding to the to-be-detected three-phase circuit, comprising: determining the first time corresponding to the to-be-used voltage peak value according to the time when the to-be-used voltage reaches the voltage peak value; determining the second time corresponding to the to-be-used current peak value according to the time when the to-be-used current reaches the current peak value; determining the circuit fault direction corresponding to the to-be-detected three-phase circuit based on the to-be-determined time difference between the first time and the second time.

[0064] That is, in the technical solution, the first time of reaching the to-be-used voltage peak value and the second time of reaching the to-be-used current peak value are recorded, and the to-be-determined time difference is obtained according to the time difference between the two, so as to determine the circuit fault direction of the to-be-detected three-phase circuit according to the to-be-determined time difference.

[0065] Exemplarily, the first time is the 5th second, the second time is 6 seconds, and the to-be-determined time difference is 1 second. When determining the circuit fault direction according to the to-be-determined time difference, the size relationship between the preset time difference and the to-be-determined time difference can be determined. Specifically, based on the to-be-determined time difference between the first time and the second time, the circuit fault direction corresponding to the to-be-detected three-phase circuit is determined, comprising: determining whether the to-be-determined time difference is less than the preset time difference; if yes, determining that the circuit fault direction is a forward fault direction; if not, determining that the circuit fault direction is a reverse fault direction.

[0066] Wherein, the positive fault direction is the direction from the bus to the three-phase circuit to be detected.

[0067] Alternatively, the circuit fault direction can also be determined according to the positive and negative of the time difference to be determined. That is, the time difference to be determined can be positive or negative, and the positive and negative of the time difference to be determined indicates the circuit fault direction. Specifically, the positive value of the time difference to be determined can be determined as the positive fault direction, and the negative value of the time difference to be determined can be determined as the negative fault direction.

[0068] Optionally, the fault location based on the circuit fault direction comprises: if the number of the three-phase circuits to be detected is one, determining the first target fault position of the circuit on the line based on the circuit fault direction; if the number of the three-phase circuits to be detected is multiple, determining the second target fault position of the circuit on the line based on the circuit fault directions of the three-phase circuits to be detected; wherein, the three-phase circuits to be detected belong to the same line.

[0069] In the technical solution, at least one three-phase circuit to be detected can be included in the same line in the power distribution network. If the number of the three-phase circuits to be detected is one, the circuit fault direction in the three-phase circuit to be detected can be determined according to the time difference to be determined, and the first target fault position in the three-phase circuit to be detected can be determined according to the circuit fault direction. It should be noted that in the technical solution, the first target position refers to a broad fault position. For example, the three-phase circuit to be detected is installed at a position 1000 meters away from the power distribution network, and if the circuit fault direction is determined to be the negative fault direction according to the time difference to be determined, that is, the direction from the three-phase circuit to be detected to the bus of the power distribution network. Therefore, the first target fault position is between the power distribution network and the three-phase circuit to be detected, that is, the first target fault position includes the positions within the 1000-meter region between the power distribution network and the three-phase circuit to be detected. In other words, the first target fault position and the second target fault position in the technical solution are not specific fault positions, but fault position ranges determined according to the circuit fault direction.

[0070] If multiple three-phase circuits to be detected are included in the same line in the power distribution network, such as three-phase circuit A, three-phase circuit B and three-phase circuit C distributed in sequence in the line, each three-phase circuit to be detected corresponds to a time difference to be determined, and the corresponding circuit fault direction can be determined according to the time difference to be determined. If the circuit fault direction determined based on the time difference to be determined of the three-phase circuit A is the negative circuit fault, the circuit fault direction determined based on the time difference to be determined of the three-phase circuit B is the negative circuit fault, and the circuit fault direction determined based on the time difference to be determined of the three-phase circuit C is the positive circuit fault, it can be determined that the second target fault position is between the three-phase circuit B and the three-phase circuit C.

[0071] The technical solution of this embodiment, for each phase circuit in the three-phase circuit to be tested, determines the positive-sequence voltage component and positive-sequence current component corresponding to the current phase circuit. Based on the instantaneous symmetrical component method, the voltage of each phase circuit in the three-phase circuit to be tested is calculated to obtain the positive-sequence voltage component corresponding to the current phase circuit. Simultaneously, based on the instantaneous symmetrical component method, the current of each phase circuit in the three-phase circuit to be tested is calculated to obtain the positive-sequence current component corresponding to the current phase circuit. Further, morphological processing is performed on the positive-sequence voltage component and the positive-sequence current component to obtain the corresponding peak voltage and peak current to be used. By performing morphological filtering on the positive-sequence voltage component and the positive-sequence current component, the peak voltage and peak current to be used corresponding to the current phase circuit can be obtained more easily. Based on the peak voltage and peak current to be used, the direction of the circuit fault corresponding to the three-phase circuit to be tested is determined, and fault location is performed based on the direction of the circuit fault. The time difference to be determined can be obtained based on the difference between the first moment when the peak voltage is reached and the second moment when the peak current is reached. The direction of the circuit fault in the line where the three-phase circuit to be tested is located can be determined based on the relationship between the time difference to be determined and the preset time difference, thus enabling circuit fault location based on the direction of the circuit fault. This method solves the problem that circuit fault detection in distribution networks is easily affected by environmental factors, leading to inaccurate or slow detection speeds. It achieves the effect of rapid and accurate detection of circuit faults in distribution networks and circuit fault location based on the direction of the circuit fault.

[0072] Example 2

[0073] In a specific example, such as Figure 2 As shown, the power distribution network is used as a smart terminal to collect electrical quantities of the three-phase circuit under test. For example, voltage data is collected from each phase of the three-phase circuit to obtain the first, second, and third voltages. Further, the positive-sequence fault component (i.e., the voltage positive-sequence component) corresponding to any one phase (i.e., the current phase) is extracted using the instantaneous symmetrical component method. Similarly, current data is collected from the three-phase circuit to obtain the first, second, and third currents. Further, the positive-sequence fault component (i.e., the current positive-sequence component) corresponding to any one phase is extracted using the instantaneous symmetrical component method. The voltage positive-sequence component is processed using a mathematical morphology method to obtain the first voltage positive-sequence component. Peak detection is then performed on the first voltage positive-sequence component to obtain the peak value of the voltage to be used, and the first moment t when the peak value of the voltage to be used is determined. uSimilarly, the mathematical morphology method processes the positive sequence component of the current to obtain the first positive sequence component of the current, performs peak detection on the first positive sequence component of the current to be used, obtains the peak value of the current to be used, and determines the second time t when the peak value of the current to be used is reached. i Furthermore, the time difference to be determined can be obtained based on the difference between the first and second moments, and the direction of the circuit fault in the line containing the three-phase circuit to be tested can be determined based on the relationship between the time difference to be determined and the preset time difference. For example, the preset time difference is 0.005s. If the time difference to be determined is less than or equal to the preset time difference, the direction of the circuit fault is a forward fault direction; conversely, if the time difference to be determined is greater than the preset time difference, the direction of the circuit fault is a reverse fault direction. Further, the location of the circuit fault in the line is determined based on the determined direction of the circuit fault in the three-phase circuit to be tested.

[0074] To more clearly introduce this technical solution, we will first briefly describe its application scenario. Compared to high-voltage transmission lines, low-voltage distribution networks differ significantly in node distribution, topology, and operation. Consequently, they are equipped with a large number of detection and control devices, and the amount of data is continuously increasing with the development of the power grid. The daily electrical volume of a single branch has reached the terabyte level, posing a considerable challenge to the central master station's dispatching. Edge terminals deployed in distribution transformer areas can effectively reduce the maintenance burden on the central control point, providing a distributed information computing service with high data volume and rapid response to meet the rapid response requirements for fault diagnosis. The overall architecture of the distribution transformer area is as follows: Figure 3 As shown, the overall architecture includes the physical network structure of the distribution area, reactive power compensation devices, distribution gateways (edge ​​terminals with configuration functions for fault direction determination applications), and protective switches. The distribution gateway can be installed in the local monitoring equipment of smart substations, smart switch stations, and smart distribution areas within the distribution frame. It has functions such as data collection, processing, and remote transmission from station-side sensors and metering devices, as well as intelligent linkage functions for station equipment. Simultaneously, it can upload processed status information to the IoT platform via standard protocols, execute local command control, and locally store relevant detection data, alarm data, and file data. As the center for distribution area data monitoring and processing, the edge terminal uses a secure, independently controllable, domestically produced industrial-grade dual-core chip. The distribution gateway is deployed based on lightweight Linux container technology, supporting flexible configuration of various apps to meet the platform requirements of edge computing. It has the ability to configure and expand various fault direction determination applications based on "microservices," realizing the customized needs of independent development, deployment, and horizontal expansion of distribution gateway software application services. In short, the distribution network has basic AC analog quantity acquisition and analysis functions, and can collect various electrical quantities including three-phase voltage and three-phase current. It also has the ability to extend the configuration of sequence component data processing, thereby determining the direction of the fault.

[0075] With the development of edge terminal, the sequence component-based relay protection is better researched and developed in power system. The protection scheme using sequence component is independent of system potential, and can be well applied to complex distribution network. In addition, since the positive sequence component exists in any fault type, the positive sequence component can be selected as the basis for determining the fault direction of circuit.

[0076] Three asymmetric phasors can be uniquely decomposed into three groups of symmetric phasors (components) by linear mathematical calculation. Therefore, in linear circuits, when asymmetric short circuit occurs in the system, the three-phase asymmetric voltage and current appearing in the network are decomposed into three groups of symmetric components, i.e. positive sequence component, negative sequence component and zero sequence component, which are respectively solved according to symmetric three-phase circuit, and then the results are superimposed. This method of analyzing asymmetric three-phase circuit is called symmetric component method. The power system also uses symmetric component method to analyze positive sequence component, negative sequence component and zero sequence component. Any group of asymmetric three-phase sinusoidal voltage or current phasor can be decomposed into three-phase symmetric components. One group is positive sequence component, which is denoted by subscript "1", the phase sequence is consistent with that of the original asymmetric sinusoidal quantity, i.e. A-B-C sequence, and the phases are 120° apart. Another group is negative sequence component, which is denoted by subscript "2", the phase sequence is opposite to that of the original sinusoidal quantity, i.e. A-C-B, and the phases are also 120° apart. The other group is zero sequence component, which is denoted by subscript "0", indicating that the phases of three phases are the same. When different faults occur in the power system, the corresponding components are as follows: three-phase short circuit fault and normal operation, the system has positive sequence component; single-phase grounding fault, the system has positive sequence component, negative sequence component and zero sequence component; two-phase short circuit fault, the system has positive sequence component and negative sequence component; two-phase short circuit grounding fault, the system has positive sequence component, negative sequence component and zero sequence component. That is, no matter what state the system is in, it contains positive sequence component, so the positive sequence component is selected as the basis for subsequent detection of circuit fault.

[0077] The technical scheme decomposes the voltage and current of the three-phase circuit to be detected into positive sequence components, and detects and locates faults in the circuit.

[0078] Specifically, the process of calculating the voltage positive sequence component and the current positive sequence component corresponding to the current phase circuit based on the instantaneous symmetric component is similar to the process of determining the current positive sequence component of the current phase circuit. Specifically, the instantaneous symmetric component method can be described by the following formula:

[0079]

[0080] Where, i a represents the first current, i b represents the second current, i c represents the third current, ia(1) Let i a(2) Let i a(0) Let i

[0081] Further, let i x -jx° Let i a , i b , i c be expressed in real form as follows:

[0082]

[0083] where i a represents a first current, i b represents a second current, i c represents a third current, and i a(1) Let i a(2) Let i a(0) Let i x -jx° represents a phase shift operator.

[0084] Alternatively, it can also be expressed in the following form:

[0085]

[0086] where i a represents a first current, i b represents a second current, i c represents a third current, and i a(1) Let i a(2) Let i a(0) Let i x -jx° represents a phase shift operator.

[0087] Based on the above process, the current positive sequence component, the current negative sequence component and the current zero sequence component corresponding to the three-phase circuit to be detected can be determined. Similarly, based on the same steps, the voltage positive sequence component, the voltage negative sequence component and the voltage zero sequence component of the three-phase circuit to be detected can be determined. In the present technical solution, the fault detection of the circuit in which the three-phase circuit to be detected is connected is mainly based on the current positive sequence component and the voltage positive sequence component.

[0088] ​​​Further, after obtaining the voltage positive sequence component and the current positive sequence component, the voltage positive sequence component is processed based on the mathematical morphology method to obtain a first voltage positive sequence component, and the first voltage positive sequence component is subjected to peak value detection to obtain a to-be-used voltage peak value and determine a first time t u Similarly, the current positive sequence component is processed by the mathematical morphology method to obtain a first current positive sequence component, and the first current positive sequence component is subjected to peak value detection to obtain a to-be-used current peak value and determine a second time t i .

[0089] Specifically, the opening operation in mathematical morphology is a non-expanding operation on a signal, which can smooth the profile of a target signal and remove burrs to suppress peak noise in the signal. The opening operation of a sequence f(n) on g(n) is as follows:

[0090]

[0091] wherein, represents the opening operation, represents the erosion operation, represents the dilation operation, f(n) is a one-dimensional multi-value signal to be processed (i.e., the voltage positive sequence component or the current positive sequence component) obtained by sampling, and its definition domain is D f ={0, 1,..., N}, g(n) is a one-dimensional structure element sequence (i.e., the first structure element or the second structure element), and its definition domain is D g ={0, 1,..., P}. Wherein, P and N are integers, and N≥P.

[0092] Therefore, the peak point appearing mark point can be obtained by subtracting the result of the opening operation from the original signal, that is, the Top-Hat operator O th , as shown in the following formula:

[0093]

[0094] In the mathematical morphology operation, the shape and size of the structure element have a great influence on the signal processing result. In combination with the signal characteristics of the power system and the need to simplify the program resources, a straight line structure element (i.e., the first structure element or the second structure element) is selected, which is 0° with the horizontal direction, which can not only maintain the shape of the signal, but also greatly eliminate the noise in the burr shape. The extracted three-phase current and three-phase voltage are subjected to morphological peak detection, the Top-Hat operator of mathematical morphology is applied to detect the current and voltage of a phase to determine the corresponding peak point, that is, to obtain the to-be-used voltage peak value u(t) and the to-be-used current peak value i(t). Further, the first time t u at which the to-be-used voltage peak value is reached, and the second time ti .

[0095] Specifically, the voltage and current waveform power frequency cycle is 0.02s, according to the power transmission theory, when the absolute value of the phase difference between the voltage positive sequence component and the current positive sequence component is not more than 90°, see Figure 4 , that is, the absolute value of the to-be-determined time difference between the first moment corresponding to the to-be-used voltage peak value and the second moment corresponding to the to-be-used current peak value is less than 0.005s, it is considered that the fault direction is a forward fault direction (the bus flows to the line in the positive direction), see Figure 5 . When the absolute value of the phase difference between the voltage positive sequence component and the current positive sequence component is greater than 90°, see Figure 6 , that is, the absolute value of the positive sequence voltage, current peak time difference is greater than 0.005s, it is considered that the fault direction is a reverse fault direction (the line flows to the bus in the reverse direction), see Figure 7 . Specifically, as shown in the following formula:

[0096] |t u -t i |≤0.005

[0097] Wherein, t u represents the first moment, t i represents the second moment, and 0.005 represents the preset time difference.

[0098] Wherein, the unit of the preset time difference is second.

[0099] Further, according to the circuit fault direction, the circuit fault position of the line on which the to-be-detected three-phase circuit is located can be determined.

[0100] It should be noted that in the present technical solution, when the to-be-determined time difference and the preset time difference are equal in the determination of the circuit fault direction based on the size relationship between the to-be-determined time difference and the preset time difference, it can be attributed to a forward circuit fault or a reverse circuit fault, which can be determined according to the actual situation, and is not limited here.

[0101] The technical scheme of the embodiment is that, for each phase circuit in the three-phase circuit to be detected, the voltage positive sequence component and the current positive sequence component corresponding to the current phase circuit are determined, the voltage of each phase circuit in the three-phase circuit to be detected is calculated based on the instantaneous symmetrical component method, the voltage positive sequence component corresponding to the current phase circuit can be obtained, at the same time, the current of each phase circuit in the three-phase circuit to be detected is calculated based on the instantaneous symmetrical component method, the current positive sequence component corresponding to the current phase circuit can be obtained. Further, the voltage positive sequence component and the current positive sequence component are respectively subjected to morphological processing, the corresponding to-be-used voltage peak value and the to-be-used current peak value are obtained, the voltage positive sequence component and the current positive sequence component are respectively subjected to morphological filtering processing, so that the to-be-used voltage peak value and the to-be-used current peak value corresponding to the current phase circuit can be more easily obtained. According to the to-be-used voltage peak value and the to-be-used current peak value, the circuit fault direction corresponding to the three-phase circuit to be detected is determined, fault positioning is performed based on the circuit fault direction, according to the difference between the first time at which the to-be-used voltage peak value is reached and the second time at which the to-be-used current peak value is reached, the to-be-determined time difference can be obtained, according to the size relationship between the to-be-determined time difference and the preset time difference, the circuit fault direction of the circuit on which the three-phase circuit to be detected is located can be determined, and circuit fault positioning is performed according to the circuit fault direction. The problem that the circuit fault detection of the power distribution network is easily affected by environmental factors, resulting in inaccurate circuit fault detection or slow detection speed is solved, and the effect of quickly and accurately detecting the circuit fault in the power distribution network and performing circuit fault positioning according to the circuit fault direction is achieved.

[0102] Embodiment three

[0103] Figure 8 A structural schematic diagram of a circuit fault positioning device provided for the embodiment three of the application is shown in FIG. 2. Figure 8 As shown in the figure, the device comprises a positive sequence component determination module 210, a peak value determination module 220 and a fault positioning module 230.

[0104] The positive sequence component determination module 210 is configured to determine, for each phase circuit in the three-phase circuit to be detected, the voltage positive sequence component and the current positive sequence component corresponding to the current phase circuit; the current phase circuit is any one of the phase circuits in the three-phase circuit to be detected.

[0105] The peak value determination module 220 is configured to respectively subject the voltage positive sequence component and the current positive sequence component to morphological processing, to obtain the corresponding to-be-used voltage peak value and the to-be-used current peak value.

[0106] The fault positioning module 230 is configured to determine, according to the to-be-used voltage peak value and the to-be-used current peak value, the circuit fault direction corresponding to the three-phase circuit to be detected, and perform fault positioning based on the circuit fault direction.

[0107] The technical scheme of the embodiment is directed to each phase circuit in the to-be-detected three-phase circuit, determines the voltage positive sequence component and the current positive sequence component corresponding to the current phase circuit, calculates the voltage of each phase circuit in the to-be-detected three-phase circuit based on the instantaneous symmetrical component method, can obtain the voltage positive sequence component corresponding to the current phase circuit, at the same time, calculates the current of each phase circuit in the to-be-detected three-phase circuit based on the instantaneous symmetrical component method, can obtain the current positive sequence component corresponding to the current phase circuit. Further, the voltage positive sequence component and the current positive sequence component are respectively subjected to morphological processing to obtain the corresponding to-be-used voltage peak value and to-be-used current peak value. The voltage positive sequence component and the current positive sequence component are respectively subjected to morphological filtering processing, so that the to-be-used voltage peak value and the to-be-used current peak value corresponding to the current phase circuit can be more easily obtained. According to the to-be-used voltage peak value and the to-be-used current peak value, the circuit fault direction corresponding to the to-be-detected three-phase circuit is determined, fault positioning is performed based on the circuit fault direction, according to the difference between the first time when the to-be-used voltage peak value is reached and the second time when the to-be-used current peak value is reached, the to-be-determined time difference can be obtained, according to the size relationship between the to-be-determined time difference and the preset time difference, the circuit fault direction of the circuit on which the to-be-detected three-phase circuit is located can be determined, and the circuit fault positioning is performed according to the circuit fault direction. The problem that the circuit fault detection of the power distribution network is easily affected by environmental factors, resulting in inaccurate or slow circuit fault detection, is solved, and the effect of quickly and accurately detecting the circuit fault in the power distribution network and positioning the circuit fault according to the circuit fault direction is obtained.

[0108] Optionally, the positive sequence component determination module comprises: a voltage determination unit, configured to collect voltages of each phase circuit in the to-be-detected three-phase circuit respectively to obtain a first voltage, a second voltage and a third voltage;

[0109] a current determination unit, configured to collect currents of each phase circuit in the to-be-detected three-phase circuit respectively to obtain a first current, a second current and a third current;

[0110] a positive sequence component determination unit, configured to obtain a voltage positive sequence component corresponding to the current phase circuit based on the first voltage, the second voltage and the third voltage, and obtain a current positive sequence component corresponding to the current phase circuit based on the first current, the second current and the third current.

[0111] Optionally, the positive sequence component determination unit comprises: a voltage positive sequence component determination subunit, configured to extract positive sequence components of the first voltage, the second voltage and the third voltage based on the instantaneous symmetrical component method to obtain the voltage positive sequence component corresponding to the current phase circuit; and

[0112] The current positive sequence component determination subunit is configured to determine a positive sequence component of the first current, the second current and the third current based on an instantaneous symmetrical component method, to obtain a current positive sequence component corresponding to the current phase circuit.

[0113] Optionally, the peak value determination module comprises a voltage peak value determination unit configured to perform morphological filtering on the voltage positive sequence component based on a pre-set first structural element to obtain a first voltage positive sequence component, and obtain the to-be-used voltage peak value according to a peak value of the first voltage positive sequence component.

[0114] The current peak value determination unit is configured to perform morphological filtering on the current positive sequence component based on a pre-set second structural element to obtain a first current positive sequence component, and obtain the to-be-used current peak value according to a peak value of the first current positive sequence component.

[0115] Optionally, the fault location module comprises a first time point determination unit configured to determine a first time point corresponding to the to-be-used voltage peak value according to a time point at which the to-be-used voltage reaches the voltage peak value.

[0116] The second time point determination unit is configured to determine a second time point corresponding to the to-be-used current peak value according to a time point at which the to-be-used current reaches the current peak value.

[0117] The circuit fault direction determination unit is configured to determine a circuit fault direction corresponding to the to-be-detected three-phase circuit based on a to-be-determined time difference between the first time point and the second time point.

[0118] Optionally, the circuit fault direction determination unit comprises a time length judgment subunit configured to determine whether the to-be-determined time difference is less than a pre-set time difference.

[0119] The forward fault direction determination subunit is configured to determine that the circuit fault direction is a forward fault direction if the to-be-determined time difference is less than the pre-set time difference; wherein the forward fault direction is a direction in which the bus flows to the to-be-detected three-phase circuit.

[0120] The reverse fault direction determination subunit is configured to determine that the circuit fault direction is a reverse fault direction if the to-be-determined time difference is not less than the pre-set time difference; wherein the reverse fault direction is opposite to the forward fault direction.

[0121] Optionally, the fault location module comprises a first target fault position determination unit configured to determine a first target fault position of a line in which the to-be-detected three-phase circuit is located based on the circuit fault direction if the number of the to-be-detected three-phase circuits is one.

[0122] The second target fault position determination unit is configured to determine a second target fault position of the line in which the to-be-detected three-phase circuits are located based on the circuit fault directions of the to-be-detected three-phase circuits if the number of the to-be-detected three-phase circuits is multiple; wherein the to-be-detected three-phase circuits belong to the same line.

[0123] The circuit fault positioning device provided by the embodiments of the present application can execute the circuit fault positioning method provided by any of the embodiments of the present application, and has the corresponding function modules and beneficial effects of the execution method.

[0124] Embodiment Four

[0125] Figure 9 A structural schematic diagram of an electronic device 10 of an embodiment of the present application is shown. The electronic device is intended to represent various forms of digital computers, such as laptops, desktops, tablets, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular telephones, smart phones, wearable devices (e.g., headsets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be examples only, and are not intended to limit the implementations of the present application described and / or claimed in this document.

[0126] As shown in Figure 9 The electronic device 10 includes at least one processor 11, and a memory, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., which is communicatively connected to the at least one processor 11, wherein the memory stores a computer program executable by the at least one processor. The processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or loaded from the storage unit 18 into the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0127] A plurality of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, a loudspeaker, etc.; a storage unit 18, such as a magnetic disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network, such as the Internet, and / or various telecommunication networks.

[0128] The processor 11 can be various general and / or special purpose processing components having processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various specialized artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The processor 11 performs various methods and processes described above, such as the circuit fault localization method.

[0129] In some embodiments, the circuit fault localization method can be implemented as a computer program tangibly embodied in a computer readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed onto the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded onto the RAM 13 and executed by the processor 11, one or more steps of the circuit fault localization method described above can be performed. Alternatively, in other embodiments, the processor 11 can be configured to perform the circuit fault localization method by any other suitable means, such as by means of firmware.

[0130] Various implementations of the systems and techniques described above can be realized in digital electronic circuitry, integrated circuitry, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on a chip (SOC), a programmable logic device (PLD), a computer hardware, firmware, software, and / or combinations thereof. These various implementations can include implementation in one or more computer programs that are executable and / or interpretable on a programmable system including at least one programmable processor, which can be special or general purpose, coupled to receive data and instructions from, and to transmit data and instructions to, a storage system, at least one input device, and at least one output device.

[0131] Computer programs used to implement the circuit fault localization method of the present application can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the computer program, when executed by the processor, implements the functions / operations specified in the flow charts and / or block diagrams. The computer program can be executed entirely on a machine, partially on a machine, partially on a machine as a stand-alone software package, partially on a machine and partially on a remote machine or entirely on a remote machine or server.

[0132] In the context of the present application, a computer-readable storage medium can be a tangible medium that can contain or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. A computer-readable storage medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium can be a machine-readable signal medium. More specific examples of a machine-readable storage medium will include one or more lines of a program of instructions in a transitory signal, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0133] To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the electronic device. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0134] The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a user computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0135] The computing system can include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system, to solve the defects of large management difficulty and weak business scalability in traditional physical host and VPS service.

[0136] It should be understood that the various forms of flow shown above can be used to reorder, add or delete steps. For example, each step described in the present application can be executed in parallel, sequentially or in a different order, as long as the desired results of the technical solutions of the present application can be achieved, which is not limited herein.

[0137] The above detailed description does not constitute a limitation on the scope of protection of the present application. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A method for locating circuit faults, characterized in that, include: For each phase circuit in the three-phase circuit to be tested, determine the positive sequence voltage component and positive sequence current component corresponding to the current phase circuit; wherein, the current phase circuit is any one phase circuit in the three-phase circuit to be tested; Morphological processing is performed on the positive sequence voltage component and the positive sequence current component respectively to obtain the corresponding peak voltage and peak current to be used. Based on the peak voltage and peak current to be used, the direction of the circuit fault corresponding to the three-phase circuit to be tested is determined, so as to locate the fault based on the direction of the circuit fault. The step of determining the circuit fault direction corresponding to the three-phase circuit to be tested based on the peak value of the voltage to be used and the peak value of the current to be used includes: determining a first moment corresponding to the peak value of the voltage to be used based on the moment when the voltage to be used reaches the peak value; determining a second moment corresponding to the peak value of the current to be used based on the moment when the current to be used reaches the peak value; and determining the circuit fault direction corresponding to the three-phase circuit to be tested based on the time difference to be determined between the first moment and the second moment.

2. The method according to claim 1, characterized in that, The determination of the positive-sequence voltage component and positive-sequence current component corresponding to the current phase circuit includes: Voltages are collected from each phase of the three-phase circuit to be tested to obtain a first voltage, a second voltage, and a third voltage. Current is collected from each phase of the three-phase circuit to be tested to obtain the first current, the second current and the third current. Based on the first voltage, the second voltage, and the third voltage, a positive sequence voltage component corresponding to the current phase circuit is obtained, and based on the first current, the second current, and the third current, a positive sequence current component corresponding to the current phase circuit is obtained.

3. The method according to claim 2, characterized in that, The step of obtaining the positive sequence voltage component corresponding to the current phase circuit based on the first voltage, the second voltage, and the third voltage, and obtaining the positive sequence current component corresponding to the current phase circuit based on the first current, the second current, and the third current, includes: Based on the instantaneous symmetrical component method, the first voltage, the second voltage, and the third voltage are subjected to positive-sequence component extraction to obtain the voltage positive-sequence component corresponding to the current phase circuit; and Based on the instantaneous symmetrical component method, the first current, the second current, and the third current are subjected to positive sequence component extraction to obtain the current positive sequence component corresponding to the current phase circuit.

4. The method according to claim 1, characterized in that, The step of performing morphological processing on the positive sequence voltage component and the positive sequence current component to obtain the corresponding peak voltage and peak current to be used includes: Based on a pre-set first structural element, the positive sequence voltage component is subjected to morphological filtering to obtain a first positive sequence voltage component, and the peak voltage to be used is obtained based on the peak value of the first positive sequence voltage component. Based on the pre-set second structural element, the positive sequence component of the current is subjected to morphological filtering to obtain the first positive sequence component of the current, and the peak value of the current to be used is obtained according to the peak value of the first positive sequence component of the current.

5. The method according to claim 1, characterized in that, The step of determining the direction of the circuit fault corresponding to the three-phase circuit to be detected based on the time difference to be determined between the first time and the second time includes: Determine whether the time difference to be determined is less than a preset time difference; If so, the fault direction of the circuit is determined to be a positive fault direction; wherein, the direction of the busbar flowing to the three-phase circuit to be tested is the positive fault direction; If not, the circuit fault direction is determined to be a reverse fault direction; wherein the reverse fault direction is opposite to the forward fault direction.

6. The method according to claim 1, characterized in that, The fault location based on the direction of the circuit fault includes: If the number of the three-phase circuits to be tested is one, then the first target fault location of the line where the three-phase circuit to be tested is located is determined based on the fault direction of the circuit. If there are multiple three-phase circuits to be tested, the second target fault location of the line is determined based on the circuit fault direction of each three-phase circuit to be tested; wherein, each of the three-phase circuits to be tested belongs to the same line.

7. A circuit fault location device, characterized in that, include: The positive sequence component determination module is used to determine the positive sequence voltage component and positive sequence current component corresponding to each phase circuit in the three-phase circuit to be tested; wherein, the current phase circuit is any one phase circuit in the three-phase circuit to be tested. The peak value determination module is used to perform morphological processing on the positive sequence voltage component and the positive sequence current component respectively to obtain the corresponding peak voltage and peak current to be used. The fault location module is used to determine the direction of the circuit fault corresponding to the three-phase circuit to be tested based on the peak value of the voltage to be used and the peak value of the current to be used, so as to locate the fault based on the direction of the circuit fault. The fault location module includes: a first time determination unit, used to determine a first time corresponding to the peak value of the voltage to be used based on the time when the voltage to be used reaches the peak value; a second time determination unit, used to determine a second time corresponding to the peak value of the current to be used based on the time when the current to be used reaches the peak value; and a circuit fault direction determination unit, used to determine the circuit fault direction corresponding to the three-phase circuit to be detected based on the time difference to be determined between the first time and the second time.

8. An electronic device, characterized in that, The electronic device includes: At least one processor; and A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the circuit fault location method according to any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that are used to cause a processor to execute the circuit fault location method according to any one of claims 1-6.

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