Method and apparatus for redundancy control based on voter, electronic device, and storage medium

Abstract

The application discloses a kind of redundancy control methods based on voter, applied to computer technology field, comprising: obtaining the processing unit array in target hardware, the processing unit array includes multiple processing units, multiple groups of processing units are selected from the processing unit array, generate a set of voters, each group of the processing unit corresponds to generate a voter, the voter is used to execute the voting operation in redundancy control, in response to the message that detected voter is in fault state, obtain target voter from the set of voters to replace the detected voter, and re-execute the voting operation in the redundancy control using the target voter.The application also discloses a kind of redundancy control devices based on voter, electronic equipment and storage medium, which are based on the processing unit array of target hardware, i.e.based on limited resources, without other additional resources, while, it can solve the problem of voter failure, immediately respond when voter fails.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, and in particular to a redundancy control method and device based on a voter, an electronic device and a storage medium. BACKGROUND

[0002] With the rapid development of the electronic industry, the performance and function of integrated circuits have been greatly improved and are widely used in the fields of artificial intelligence, automotive electronics, aerospace, network communication, cloud computing, biological information, medical treatment, etc., so that the reliability of integrated circuits has become the focus of the electronic industry.

[0003] The current scheme for improving the reliability of integrated circuits generally adopts spatial redundancy technology, which uses multiple redundant branches to execute the same program, and then uses a voter to perform a voting operation on the obtained calculation results. In the prior art, the structure of the processing unit in the hardware device is usually changed to adapt to the execution of spatial redundancy and voting operation, or a sufficient number of processing units are assumed to implement spatial redundancy and voting operation. Therefore, the hardware resource requirement is relatively large, and the voter cannot be processed when it fails. SUMMARY

[0004] The main purpose of the present application is to provide a redundancy control method and device based on a voter without additional overhead and capable of processing voter failure.

[0005] To achieve the above purpose, the first aspect of the embodiment of the present application provides a redundancy control method based on a voter, comprising:

[0006] obtaining a processing unit array in a target hardware, wherein the processing unit array comprises a plurality of processing units;

[0007] selecting multiple groups of processing units from the processing unit array to generate a voter set, wherein each group of processing units corresponds to a generated voter, and the voter is used to execute a voting operation in redundancy control;

[0008] In response to a message that a detected voter is in a failure state, a target voter is obtained from the voter set to replace the detected voter, and the voting operation in the redundancy control is re-executed using the target voter.

[0009] In an embodiment of the present application, before obtaining the processing unit array in the target hardware, it comprises:

[0010] acquiring a redundancy mode adopted by the target hardware and a voter corresponding to the redundancy mode, the redundancy mode comprising N-modular redundancy or dual-modular redundancy, N>2, and N being an integer, when the redundancy mode is N-modular redundancy, the target hardware adopts an N-modular voter connecting N redundancy branches, when the redundancy mode is dual-modular redundancy, the target hardware adopts a dual-modular voter connecting two redundancy branches;

[0011] when the redundancy mode is N-modular redundancy, performing the operation of acquiring the processing unit array in the target hardware;

[0012] when the redundancy mode is dual-modular redundancy, in response to a message that the redundancy branch connected by the detected dual-modular voter is in a fault state, switching the redundancy mode adopted by the target hardware to the N-modular redundancy.

[0013] In an embodiment of the present application, the method further comprises:

[0014] dividing the processing units in the processing unit array into N groups of operation units and at least one group of idle units, the interconnection relationship between the N groups of operation units and the at least one group of idle units being equivalent, each group of the operation units being used to perform a calculation operation of a redundancy branch, and each group of the idle units being used to replace a group of operation units in which an operation unit in a fault state is located to perform the calculation operation when there is an operation unit in a fault state;

[0015] in response to a message that the redundancy branch connected by the detected voter is in a fault state, replacing a group of operation units in which an operation unit in a fault state is located with the group of idle units, and re-performing the calculation operation of the redundancy branch.

[0016] In an embodiment of the present application, the selecting a plurality of groups of processing units from the processing unit array to generate a set of voters comprises:

[0017] acquiring a voter model of a redundancy mode being N-modular redundancy;

[0018] performing static compilation on the voter model by using integer linear programming to obtain a compilation result;

[0019] selecting a group of processing units from the processing unit array according to the compilation result to be used to constitute a voter;

[0020] in the processing unit array, finding all groups of processing units having the same interconnection relationship as the group of processing units;

[0021] based on the voter and the all groups of processing units, generating the set of voters, wherein each group of the processing units is used to constitute a voter.

[0022] In one embodiment of the present application, the voter set includes to-be-ordered voters and ordered voters, the first ordered voter in the ordered voters is any one of the voters in the voter set, and after the voter set is generated, the following operations are further included:

[0023] Obtaining all to-be-ordered voters and all ordered voters in the voter set;

[0024] Calculating the similarity between each to-be-ordered voter and each ordered voter;

[0025] For each to-be-ordered voter, calculating the average of the similarity between the to-be-ordered voter and each ordered voter;

[0026] Taking the to-be-ordered voter with the smallest average as an ordered voter, arranging it next to all ordered voters, and performing the operation of obtaining all to-be-ordered voters and all ordered voters in the voter set again until all voters in the voter set are ordered.

[0027] In one embodiment of the present application, the calculation of the similarity between each to-be-ordered voter and each ordered voter includes:

[0028] When there is a same processing unit in the group of processing units corresponding to the to-be-ordered voter and the group of processing units corresponding to the ordered voter, and the position of the processing unit in the group of processing units corresponding to the to-be-ordered voter is the same as the position of the processing unit in the group of processing units corresponding to the ordered voter, the similarity value of the to-be-ordered voter and the ordered voter is increased by a first preset value;

[0029] When there is a same processing unit in the group of processing units corresponding to the to-be-ordered voter and the group of processing units corresponding to the ordered voter, and the position of the processing unit in the group of processing units corresponding to the to-be-ordered voter is different from the position of the processing unit in the group of processing units corresponding to the ordered voter, the similarity value of the to-be-ordered voter and the ordered voter is increased by a second preset value, which is less than the first preset value;

[0030] For each to-be-ordered voter, calculating the sum of the first preset value and the second preset value to obtain the similarity between the to-be-ordered voter and the ordered voter.

[0031] In one embodiment of the present application, the obtaining a target voter from the set of voters to replace the detected voter and re-executing the voting operation in the redundancy control using the target voter comprises:

[0032] obtaining a next voter in the set of voters after the detected voter;

[0033] re-executing the voting operation using a set of processing units corresponding to the next voter.

[0034] In one embodiment of the present application, the target hardware is a software defined chip or a field programmable gate array.

[0035] A second aspect of an embodiment of the present application provides a redundancy control apparatus based on a voter, comprising:

[0036] an obtaining module, configured to obtain an array of processing units in target hardware, the array of processing units comprising a plurality of processing units;

[0037] a generating module, configured to select a plurality of sets of processing units from the array of processing units, and generate a set of voters, each set of processing units corresponding to a voter;

[0038] a voter, configured to execute a voting operation in a redundancy control;

[0039] a replacing module, configured to, in response to a message that a detected voter is in a fault state, obtain a target voter from the set of voters to replace the detected voter;

[0040] the target voter, configured to re-execute the voting operation in the redundancy control.

[0041] In one embodiment of the present application, the apparatus further comprises:

[0042] a redundancy mode obtaining module, configured to obtain a redundancy mode adopted by the target hardware and a voter corresponding to the redundancy mode, the redundancy mode comprising N-modular redundancy or dual-modular redundancy, N>2, and N being an integer, when the redundancy mode is N-modular redundancy, the target hardware adopts an N-modular voter connecting N redundancy branches, and when the redundancy mode is dual-modular redundancy, the target hardware adopts a dual-modular voter connecting two redundancy branches;

[0043] the obtaining module is further configured to, in the case that the redundancy mode is N-modular redundancy, perform the operation of obtaining the array of processing units in the target hardware;

[0044] The switching module is configured to, in response to a message that the redundancy branch connected to the dual-mode voter is in a fault state being detected, switch the redundancy mode adopted by the target hardware to the N-mode redundancy, when the redundancy mode is the dual-mode redundancy.

[0045] In an embodiment of the present application, the apparatus further comprises:

[0046] The dividing module is configured to divide the processing units in the processing unit array into N groups of operation units and at least one group of idle units, and the interconnection relationship between the N groups of operation units and the at least one group of idle units is equivalent, each group of the operation units is configured to perform a computing operation of a redundancy branch, and each group of the idle units is configured to replace a group of operation units in which an operation unit in a fault state is located to perform the computing operation when there is an operation unit in a fault state.

[0047] The unit replacing module is configured to replace a group of operation units in which an operation unit in a fault state is located with the one group of idle units and re-perform the computing operation of the redundancy branch in response to a message that the redundancy branch connected to the voter is in a fault state being detected.

[0048] In an embodiment of the present application, the generating module comprises:

[0049] The obtaining sub-module is configured to obtain a voter model in which the redundancy mode is the N-mode redundancy.

[0050] The static compiling sub-module is configured to perform static compiling on the voter model by using integer linear programming to obtain a compiling result.

[0051] The selecting sub-module is configured to select a group of processing units from the processing unit array according to the compiling result to constitute a voter.

[0052] The searching sub-module is configured to search for all groups of processing units having the same interconnection relationship as the one group of processing units in the processing unit array.

[0053] The generating sub-module is configured to generate the voter set based on the voter and the all groups of processing units, wherein each group of the processing units is configured to constitute a voter.

[0054] In an embodiment of the present application, the voter set comprises to-be-ordered voters and ordered voters, a first-ordered voter in the ordered voters is any one of the voters in the voter set, and the apparatus further comprises:

[0055] The voter obtaining module is configured to obtain all the to-be-ordered voters and all the ordered voters in the voter set.

[0056] The similarity calculation module is configured to calculate similarity between each of the to-be-sequenced voters and each of the sequenced voters.

[0057] The average value calculation module is configured to calculate, for each of the to-be-sequenced voters, an average value of the similarity between the to-be-sequenced voter and each of the sequenced voters.

[0058] The sequencing module is configured to arrange the to-be-sequenced voter with the smallest average value as a sequenced voter, which is arranged next to the sequenced voters, and perform again the operation of obtaining all the to-be-sequenced voters and all the sequenced voters in the voter set until all the voters in the voter set are sequenced.

[0059] In an embodiment of the present application, the similarity calculation module comprises:

[0060] The first calculation submodule is configured to increase the similarity value of the to-be-sequenced voter and the sequenced voter by a first preset value when there is a same processing unit in the group of processing units corresponding to the to-be-sequenced voter and the group of processing units corresponding to the sequenced voter, and the position of the processing unit in the group of processing units corresponding to the to-be-sequenced voter is the same as the position of the processing unit in the group of processing units corresponding to the sequenced voter.

[0061] The first calculation submodule is configured to increase the similarity value of the to-be-sequenced voter and the sequenced voter by a second preset value when there is a same processing unit in the group of processing units corresponding to the to-be-sequenced voter and the group of processing units corresponding to the sequenced voter, and the position of the processing unit in the group of processing units corresponding to the to-be-sequenced voter is different from the position of the processing unit in the group of processing units corresponding to the sequenced voter, the second preset value being smaller than the first preset value.

[0062] The sum calculation submodule is configured to calculate, for each of the to-be-sequenced voters, a sum of the first preset value and the second preset value, to obtain the similarity between the to-be-sequenced voter and the sequenced voter.

[0063] In an embodiment of the present application, the replacement module is specifically configured to obtain a next voter in the voter set arranged after the detected voter to replace the detected voter.

[0064] The target voter is specifically configured to perform again the voting operation in the redundancy control using the group of processing units corresponding to the next voter.

[0065] In an embodiment of the present application, the target hardware is a software-defined chip or a field programmable gate array.

[0066] The third aspect of the embodiment of the present application provides an electronic device, comprising:

[0067] The memory, the processor and the computer program stored in the memory and executable on the processor, characterized in that the processor implements the voting-based redundancy control method provided in the first aspect of the embodiment of the present application when executing the program.

[0068] The fourth aspect of the embodiment of the present application provides a computer readable storage medium, which stores a computer program, and the computer program is executable on a processor to implement the voting-based redundancy control method provided in the first aspect of the embodiment of the present application.

[0069] According to the embodiment of the present application, the voting-based redundancy control method, device, electronic device and storage medium are provided, the processing unit array in the target hardware is acquired, the processing unit array includes a plurality of processing units, a plurality of groups of processing units are selected from the processing unit array, a set of voters is generated, each group of processing units corresponds to generate a voter, and the voter is used to execute the voting operation in the redundancy control. In response to the message that the detected voter is in a fault state, a target voter is acquired from the set of voters to replace the detected voter, and the voting operation in the redundancy control is re-executed. The voting-based redundancy control method is implemented based on the processing unit array of the target hardware, that is, based on limited resources, without other additional resources, and the problem of voter failure can be solved, and the reaction is made immediately when the voter fails. BRIEF DESCRIPTION OF DRAWINGS

[0070] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiment or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0071] Figure 1 The flowchart of the voting-based redundancy control method provided by an embodiment of the present application is shown in the figure;

[0072] Figure 2 The flowchart of the voting-based redundancy control method provided by an embodiment of the present application is shown in the figure;

[0073] Figure 3 The flowchart of the voting-based redundancy control method provided by an embodiment of the present application is shown in the figure;

[0074] Figure 4 The flowchart of the voting-based redundancy control method provided by an embodiment of the present application is shown in the figure; Figure 1 The flowchart of the operation S102 is shown in the figure;

[0075] Figure 5 A flowchart of a voting-based redundancy control method provided by an embodiment of the present application is shown.

[0076] Figure 6 A structural diagram of a voting-based redundancy control device provided by an embodiment of the present application is shown.

[0077] Figure 7 A hardware structural diagram of an electronic device is shown. DETAILED DESCRIPTION

[0078] In order to make the objectives, features, and advantages of the present application more obvious and easy to understand, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0079] The present application provides a voting-based redundancy control method, comprising: obtaining a processing unit array in target hardware, the processing unit array comprising a plurality of processing units; selecting a plurality of groups of processing units from the processing unit array; generating a set of voters, each group of the processing units corresponding to a generated voter, the voter being used to perform a voting operation in redundancy control; in response to a detected message that a voter is in a fault state, obtaining a target voter from the set of voters to replace the detected voter, and re-executing the voting operation in the redundancy control using the target voter. The voting-based redundancy control method is implemented on limited resources of the target hardware without other additional resources, and can solve the problem of voter failure and immediately respond when the voter fails.

[0080] Some embodiments of the present application will be described in detail below with reference to the drawings. The following embodiments and features in the embodiments can be combined with each other without conflict between the embodiments.

[0081] Please refer to Figure 1 , Figure 1 A flowchart of a voting-based redundancy control method provided by an embodiment of the present application is shown. The execution subject of the voting-based redundancy control method is a voting device, which can be implemented as software or a combination of software and hardware. The method mainly includes the following operations:

[0082] S101, obtaining a processing unit array in target hardware, the processing unit array comprising a plurality of processing units.

[0083] In the present application, the target hardware refers to a hardware device implementing the voting-based redundancy control method, which can be any hardware device requiring implementation of voting operations, such as a software-defined chip or a field programmable gate array (FPGA) and the like.

[0084] In the present application, the processing element array (PEA) refers to a collection of the smallest computing units performing computing operations in the target hardware. The PEA includes a plurality of processing elements (PEs), which are the smallest computing units performing computing operations.

[0085] S102, selecting a plurality of groups of processing elements from the processing element array to generate a set of voters, each group of processing elements corresponding to generating a voter, which is used to perform voting operations in redundancy control.

[0086] In the present application, when the target hardware runs a program, a redundancy control technique is adopted to perform voting operations on the running results of the program by using voters of a corresponding category of the redundancy control technique, so as to improve the fault tolerance capability of the hardware. The category of the voters is determined according to the spatial redundancy mode adopted by the target hardware, for example, if the redundancy mode of the target hardware adopts triple modular redundancy (TMR), the voter is a triple modular voter connecting three redundancy branches, and if the redundancy mode of the target hardware adopts double modular redundancy (DMR), the voter is a double modular voter connecting two redundancy branches. Each redundancy branch is used to independently execute the above program to obtain a running result. The voter is used to vote and select the correct running result from the plurality of running results based on the voting principle of minority yielding to majority.

[0087] In the present application, a plurality of groups of processing elements are selected from the processing element array, each group of processing elements can be used to correspondingly generate a voter, that is, each group of processing elements can implement the voting logic of the voter, and the voting operation can be performed by using the group of processing elements. In an example, the processing element array is {PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15}, and three groups of processing elements {PE1, PE3, PE4, PE5, PE6, PE7, PE9}, {PE3, PE4, PE5, PE6, PE10, PE11}, and {PE0, PE3, PE4, PE5, PE6, PE7, PE8, PE9} are selected from the processing element array to perform voting operations.

[0088] S103, in response to the message that the detected voter is in a failure state, obtaining a target voter from the voter set to replace the detected voter, and re-executing the voting operation in the redundancy control using the target voter.

[0089] In the present application, the voter can output a voting result for a running result of a program and a detected failure detection result, which can include redundancy branch failure and voter failure. When the output failure detection result indicates voter failure, a message that the voter is in a failure state is sent, and when the output failure detection result indicates redundancy branch failure connected to the voter, a message that the redundancy branch connected to the voter is in a failure state is sent.

[0090] In the present application, the target voter can be any one of the voters in the voter set except the failed voter, or a voter having a specific relationship with the failed voter, for example, having the smallest similarity with the failed voter, or having a similarity with the failed voter within a preset threshold range, and the present application does not make a specific limitation on the specific relationship.

[0091] According to the embodiment of the present application, a processing unit array in the target hardware is obtained, the processing unit array includes a plurality of processing units, a plurality of groups of processing units are selected from the processing unit array, a voter set is generated, each group of processing units corresponds to generate a voter, and the voter is used to execute a voting operation in redundancy control. In response to a message that the detected voter is in a failure state, a target voter is obtained from the voter set to replace the detected voter, and the voting operation in the redundancy control is re-executed using the target voter. The above method is based on the processing unit array of the target hardware, that is, based on limited resources, no other additional resources are needed, which greatly improves the universality of the method, and at the same time, the problem of voter failure can be solved, and an immediate response is made when the voter fails.

[0092] Please refer to Figure 2 , Figure 2 The flowchart of the redundancy control method based on the voter provided by an embodiment of the present application is shown. Based on the above Figure 1 embodiment, combined with Figure 1 Please continue to refer to Figure 2 shown, the redundancy control method based on the voter shown in the present embodiment further includes the following operations:

[0093] S201, obtaining a redundancy mode adopted by the target hardware and a voter corresponding to the redundancy mode.

[0094] In the case that the redundancy mode is N-modular redundancy, the operation S101 is performed, and the array of processing units in the target hardware is obtained.

[0095] In the case that the redundancy mode is dual-modular redundancy, the operation S202 is performed, and the redundancy mode of the target hardware is switched to the N-modular redundancy in response to the message that the dual-modular voter connected redundancy branch is in a fault state.

[0096] In the present application, the redundancy mode includes N-modular redundancy or dual-modular redundancy, N>2, and N is an integer. When the redundancy mode is N-modular redundancy, the target hardware uses an N-modular voter connected with N redundancy branches. When the redundancy mode is dual-modular redundancy, the target hardware uses a dual-modular voter connected with two redundancy branches.

[0097] In the present application, the N-modular redundancy is taken as an example of three-modular redundancy. In the three-modular redundancy, if one redundancy branch is in a fault state and causes the program running result calculation to be incorrect, and the other two redundancy branches have correct program running result calculation, a correct result can still be obtained by performing the voting operation. However, in the dual-modular redundancy, only the output values of two redundancy branches can be obtained. When the output values of the two redundancy branches do not match, a correct result cannot be output by performing the voting operation when a fault occurs.

[0098] According to the embodiment of the present application, when the target hardware uses the dual-modular redundancy mode, if the redundancy branch connected with the voter is in a fault state, the reliability of the target hardware can be ensured by dynamically compiling, that is, by switching the redundancy mode of the target hardware to the N-modular redundancy mode.

[0099] Please refer to Figure 3 , Figure 3 The flowchart of the redundancy control method based on the voter provided in an embodiment of the present application is shown. Based on the above-mentioned embodiments shown in Figure 1 or Figure 2 , and with reference to the above-mentioned embodiments shown in Figure 3 , the redundancy control method based on the voter shown in the present embodiment further includes the following operations:

[0100] S301, the processing units in the array of processing units are divided into N groups of operation units and at least one group of idle units.

[0101] S302, in response to the message that the redundancy branch connected with the voter is in a fault state, the one group of idle units is replaced with the group of operation units in which the operation unit in the fault state is located, and the calculation operation of the redundancy branch is re-executed.

[0102] In the present application, the interconnection relationship between the N groups of operation units and the at least one group of idle units is equivalent, each group of the operation units is used to perform the calculation operation of a redundant branch, and each group of the idle units is used to replace the group of operation units in which the operation unit in a fault state is located to perform the calculation operation when the operation unit in a fault state exists

[0103] In the present application, the interconnection relationship refers to the connection relationship between the operation units, and the equivalent interconnection relationship refers to that the number of each group of operation units is the same, and the connection relationship of the operation units in each group of operation units is the same.

[0104] In the present application, any group of operation units can be statically compiled, and the group of operation units after compilation can be used to perform the calculation operation of a redundant branch. More, after the group of operation units is statically compiled, the compilation result can be mapped to the operation units of the remaining groups by using a template conversion method to realize the static compilation of the operation units of the remaining groups.

[0105] In the present application, the number N of the divided groups of operation units is not less than the number of the redundant branches connected by the voters of the target hardware, for example, when the redundancy mode adopted by the target hardware is three-mode redundancy, that is, the number of the redundant branches connected by the voters is 3, that is, N≥3, the processing units in the processing unit array are divided into at least 3 groups of operation units, when the redundancy mode adopted by the target hardware is four-mode redundancy, that is, the number of the redundant branches connected by the voters is 4, that is, N≥4, the processing units in the processing unit array are divided into at least 4 groups of operation units.

[0106] In the present application, the specific division of the processing units in the processing unit array is not specifically limited, and the equivalent interconnection relationship of the N groups of operation units can be met. Taking the case that the processing unit array is composed of 4×4 processing units and N=3 as an example, each group of operation units can include 1 to 4 processing units, for example, the processing unit array can be divided into three groups of operation units each including 4 processing units, and the remaining 4 processing units form the group of idle units. For another example, the processing unit array can be divided into three groups of operation units each including 3 processing units, and the remaining 7 processing units can form two groups of idle units.

[0107] According to the embodiments of the present application, the processing units in the processing unit array are divided into N groups of operation units and at least one group of idle units, the interconnection relationship of the N groups of operation units and the at least one group of idle units is equivalent, the group of idle units is used to replace the group of operation units in which the operation unit in a fault state is located on the redundant branch when the redundant branch connected by the voters is in a fault state. This mode is realized based on the processing unit array of the target hardware, that is, realized based on limited resources, without other additional resources, which greatly improves the universality, and at the same time, the problem that the redundant branch is in a fault state can be solved in time.

[0108] Please see Figure 4 , Figure 4 for Figure 1 The flowchart of operation S102 is shown. Based on the above embodiment, continue to refer to... Figure 1 As shown, in this embodiment, operation S102, selecting multiple groups of processing units from the processing unit array to generate a set of voters, may include:

[0109] S401. Obtain the voter model with N-mode redundancy.

[0110] In this invention, it is understood that if the redundancy mode of the target hardware adopts three-mode redundancy, the voting device model is a three-mode voting device connecting three redundant branches; if the redundancy mode of the target hardware adopts five-mode redundancy, the voting device is a five-mode voting device connecting five redundant branches.

[0111] S402. Using integer linear programming, statically compile the voting machine model to obtain the compilation result.

[0112] S403. Based on the compilation result, select a set of processing units from the obtained processing unit array for use in the constructed voting machine.

[0113] In this invention, integer linear programming (ILP) is a linear programming problem where variables take integer values. It is a common abstraction method for static compilation in software-defined chips. ILP can be used to find the optimal solution to meet requirements for metrics such as startup interval and resource utilization. In one example, taking a 4×4 array of processing units {PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15} and a three-mode voting model as an example, after statically compiling the three-mode voting model, the voting model that can be mapped based on the compilation result is {PE1, PE2, PE5, PE6, PE7, PE10, PE14}.

[0114] S404. In the processing unit array, find all processing unit groups that have the same interconnection relationship as this group of processing units.

[0115] In the present application, for example, there are three groups of processing elements having the same interconnection relationship with the voters {PE1, PE2, PE5, PE6, PE7, PE10, PE14}, which are {PE0, PE4, PE8, PE9, PE11, PE12, PE15}, {PE1, PE3, PE6, PE9, PE12, PE13, PE14}, and {PE0, PE2, PE4, PE5, PE7, PE8, PE10} respectively.

[0116] S405, generating the voter set based on the voter and the group of all processing elements.

[0117] In the present application, each group of processing elements constitutes a voter. According to the above example, the voter set includes four voters, which are respectively constituted by the following four groups of processing elements: {PE1, PE2, PE5, PE6, PE7, PE10, PE14}, {PE0, PE4, PE8, PE9, PE11, PE12, PE15}, {PE1, PE3, PE6, PE9, PE12, PE13, PE14}, and {PE0, PE2, PE4, PE5, PE7, PE8, PE10}.

[0118] Please refer to Figure 5 , Figure 5 for a flowchart of the voter-based redundancy control method provided by an embodiment of the present application. Based on the above-described Figure 1 or Figure 4 embodiments, further reference is made to Figure 5 , which shows that the voter set includes unsorted voters and sorted voters, and the first sorted voter in the sorted voters is any one of the voters in the voter set. The voter-based redundancy control method shown in the present embodiment further includes the following operations:

[0119] S501, obtaining all unsorted voters and all sorted voters in the voter set.

[0120] S502, calculating the similarity between each unsorted voter and each sorted voter.

[0121] In the present application, any existing similarity calculation method can be used to calculate the similarity between each unsorted voter and each sorted voter, and the present application does not limit this. The first sorted voter can be the voter obtained through operation S403 in the above Figure 4 , or any voter in the voter set, and the present application does not limit this.

[0122] In one embodiment of the present application, the similarity between each of the to-be-ordered voter and each of the ordered voters is calculated by: when there is a same processing element in the set of processing elements corresponding to the to-be-ordered voter and the set of processing elements corresponding to the ordered voter, and the position of the processing element in the set of processing elements corresponding to the to-be-ordered voter is the same as the position of the processing element in the set of processing elements corresponding to the ordered voter, the similarity value of the to-be-ordered voter and the ordered voter is increased by a first preset value; when there is a same processing element in the set of processing elements corresponding to the to-be-ordered voter and the set of processing elements corresponding to the ordered voter, and the position of the processing element in the set of processing elements corresponding to the to-be-ordered voter is different from the position of the processing element in the set of processing elements corresponding to the ordered voter, the similarity value of the to-be-ordered voter and the ordered voter is increased by a second preset value, which is less than the first preset value; and the sum of the first preset value and the second preset value is calculated as the similarity between the to-be-ordered voter and the ordered voter.

[0123] For example, the set of processing elements corresponding to the to-be-ordered voter A is {PE1, PE2, PE3}, and the set of processing elements corresponding to the ordered voter B is {PE1, PE3, PE5}. In the first position, the processing elements corresponding to the to-be-ordered voter A and the ordered voter B are both PE1, so the similarity value of the to-be-ordered voter A and the ordered voter B is increased by the first preset value. In the third position, the processing element corresponding to the to-be-ordered voter A is PE3, and the processing element corresponding to the ordered voter B in the second position is also PE3, so the similarity value of the to-be-ordered voter A and the ordered voter B is increased by the second preset value. The sum of the first preset value and the second preset value is the similarity between the to-be-ordered voter A and the ordered voter B.

[0124] S503, for each to-be-ordered voter, the average value of the similarity between the to-be-ordered voter and each of the ordered voters is calculated.

[0125] For example, the set of processing elements corresponding to the to-be-ordered voter A is {PE1, PE2, PE3}, and the set of processing elements corresponding to the ordered voter B is {PE1, PE3, PE5}. In the first position, the processing elements corresponding to the to-be-ordered voter A and the ordered voter B are both PE1, so the similarity value of the to-be-ordered voter A and the ordered voter B is increased by the first preset value. In the third position, the processing element corresponding to the to-be-ordered voter A is PE3, and the processing element corresponding to the ordered voter B in the second position is also PE3, so the similarity value of the to-be-ordered voter A and the ordered voter B is increased by the second preset value. The sum of the first preset value and the second preset value is the similarity between the to-be-ordered voter A and the ordered voter B.

[0126] S504, taking the average value minimum to-be-sorted voter as a sorted voter, arranging the to-be-sorted voter after all the sorted voters, and executing operation S501 again until all the voters in the voter set are sorted.

[0127] According to the above example, the size of (Ca+Cb) / 2 and (Da+Db) / 2 is compared, if (Ca+Cb) / 2 is less than (Da+Db) / 2, the to-be-sorted voter C is arranged after the sorted voter A and the sorted voter B, if (Ca+Cb) / 2 is greater than (Da+Db) / 2, the to-be-sorted voter D is arranged after the sorted voter A and the sorted voter B.

[0128] In an embodiment of the present application, after the voters in the voter set are sorted in the above manner, the target voter in operation S103 is the next voter arranged after the failed voter, then operation S103, obtaining the target voter from the voter set to replace the detected voter, and re-executing the voting operation in the redundancy control using the target voter includes: obtaining the next voter arranged after the detected voter in the voter set to replace the detected voter, and re-executing the voting operation in the redundancy control using a set of processing units corresponding to the next voter.

[0129] According to the present embodiment, when the target voter is the next voter arranged after the failed voter, the similarity between the next voter and the failed voter can be guaranteed to be the smallest, avoiding the phenomenon of voter failure again using a voter with a large similarity to the failed voter.

[0130] Please refer to Figure 6 , Figure 6 is a structure diagram of a redundancy control device based on a voter provided by an embodiment of the present application, which can be applied to software-defined chips, FPGAs and other hardware devices, and mainly includes an obtaining module 610, a generating module 620, a voter 630, a replacement module 640 and a target voter 650.

[0131] The obtaining module 610 is used to obtain an array of processing units in a target hardware, and the array of processing units includes a plurality of processing units.

[0132] The generating module 620 is used to select a plurality of groups of processing units from the array of processing units, and generate a voter set, and each group of processing units corresponds to a generated voter.

[0133] The voter 630 is used to execute a voting operation in a redundancy control.

[0134] The replacement module 640 is configured to obtain a target voter from the set of voters to replace the voter in response to the message that the detected voter is in a failure state;

[0135] The target voter 650 is further configured to re-execute a voting operation in the redundancy control.

[0136] In an embodiment of the present application, the apparatus further comprises:

[0137] The redundancy mode obtaining module is configured to obtain a redundancy mode adopted by the target hardware and a voter corresponding to the redundancy mode, the redundancy mode comprising N-modular redundancy or dual-modular redundancy, N>2 and N being an integer, when the redundancy mode is N-modular redundancy, the target hardware adopts an N-modular voter connected with N redundancy branches, and when the redundancy mode is dual-modular redundancy, the target hardware adopts a dual-modular voter connected with two redundancy branches;

[0138] The obtaining module 610 is further configured to execute the operation of obtaining the array of processing units in the target hardware when the redundancy mode is N-modular redundancy.

[0139] The switching module is configured to switch the redundancy mode adopted by the target hardware to the N-modular redundancy in response to the message that the detected redundancy branch connected with the dual-modular voter is in a failure state when the redundancy mode is dual-modular redundancy.

[0140] In an embodiment of the present application, the apparatus further comprises:

[0141] The dividing module is configured to divide the processing units in the array of processing units into N groups of operation units and at least one group of idle units, an interconnection relationship between the N groups of operation units and the at least one group of idle units being equivalent, each group of the operation units being configured to execute a computing operation of a redundancy branch, and each group of the idle units being configured to execute the computing operation of a group of operation units in which an operation unit in a failure state is located when there is an operation unit in a failure state.

[0142] The unit replacement module is configured to replace a group of operation units in which an operation unit in a failure state is located with the group of idle units in response to the message that the detected redundancy branch connected with the voter is in a failure state and re-execute the computing operation of the redundancy branch.

[0143] In an embodiment of the present application, the generation module comprises:

[0144] The obtaining sub-module is configured to obtain a voter model of redundancy mode being N-modular redundancy.

[0145] The static compiling sub-module is configured to perform static compiling on the voter model by using integer linear programming to obtain a compiling result.

[0146] The selection sub-module is configured to select, according to the compilation result, a group of voters composed of processing units in the processing unit array;

[0147] The searching sub-module is configured to search, in the processing unit array, all groups of processing units having the same interconnection relationship with the group of processing units;

[0148] The generating sub-module is configured to generate, based on the voters and the all groups of processing units, a set of voters, wherein each group of the processing units is used to constitute a voter.

[0149] In an embodiment of the present application, the set of voters includes to-be-ordered voters and ordered voters, the first ordered voter in the ordered voters is any one of the voters in the set of voters, and the apparatus further comprises:

[0150] The voter obtaining module is configured to obtain all the to-be-ordered voters and all the ordered voters in the set of voters;

[0151] The similarity calculating module is configured to calculate the similarity between each to-be-ordered voter and each ordered voter;

[0152] The average value calculating module is configured to calculate, for each to-be-ordered voter, the average value of the similarity between the to-be-ordered voter and each ordered voter;

[0153] The ordering module is configured to arrange the to-be-ordered voter with the minimum average value as an ordered voter next to the ordered voter, and execute the voter obtaining module again until all the voters in the set of voters are ordered.

[0154] In an embodiment of the present application, the similarity calculating module comprises:

[0155] The first calculating sub-module is configured to increase the similarity value of the to-be-ordered voter and the ordered voter by a first preset value when the same processing unit exists in the group of processing units corresponding to the to-be-ordered voter and the group of processing units corresponding to the ordered voter, and the position of the processing unit in the group of processing units corresponding to the to-be-ordered voter is the same as the position of the processing unit in the group of processing units corresponding to the ordered voter;

[0156] The first calculating sub-module is configured to increase the similarity value of the to-be-ordered voter and the ordered voter by a second preset value when the same processing unit exists in the group of processing units corresponding to the to-be-ordered voter and the group of processing units corresponding to the ordered voter, and the position of the processing unit in the group of processing units corresponding to the to-be-ordered voter is different from the position of the processing unit in the group of processing units corresponding to the ordered voter, the second preset value being smaller than the first preset value.

[0157] and a calculating sub-module, configured to calculate a sum of the first preset value and the second preset value to obtain a similarity between the to-be-ordered voter and the ordered voter.

[0158] In an embodiment of the present application, the replacing module 640 is specifically configured to obtain a next voter in the set of voters that is ordered after the detected voter to replace the detected voter.

[0159] The target voter 650 is specifically configured to re-execute the voting operation in the redundancy control using a set of processing units corresponding to the next voter.

[0160] In an embodiment of the present application, the target hardware is a software-defined chip or a field programmable gate array.

[0161] Any one or more of the modules, sub-modules, units, sub-units according to the embodiments of the present application, or at least part of functions of any one or more of the modules, sub-modules, units, sub-units, can be implemented in one module. Any one or more of the modules, sub-modules, units, sub-units according to the embodiments of the present application can be split into multiple modules for implementation. Any one or more of the modules, sub-modules, units, sub-units according to the embodiments of the present application can be implemented at least in part as a hardware circuit, such as a field programmable gate array (FPGA), a programmable logic array (PLA), a system on chip, a system on board, a system on package, an application specific integrated circuit (ASIC), or any other reasonable way of hardware or firmware through integration or packaging of circuits, or in any one of software, hardware and firmware or in an appropriate combination of any of the above. Alternatively, any one or more of the modules, sub-modules, units, sub-units according to the embodiments of the present application can be implemented at least in part as a computer program module that can perform corresponding functions when the computer program module is run.

[0162] For example, any multiple of the acquisition module 610, generation module 620, voting device 630, replacement module 640, and target voting device 650 can be combined into one module / unit / subunit, or any one of these modules / units / subunits can be split into multiple modules / units / subunits. Alternatively, at least part of the functionality of one or more of these modules / units / subunits can be combined with at least part of the functionality of other modules / units / subunits and implemented in one module / unit / subunit. According to embodiments of the present invention, at least one of the acquisition module 610, generation module 620, voting device 630, replacement module 640, and target voting device 650 can be at least partially implemented as hardware circuitry, such as a field-programmable gate array (FPGA), a programmable logic array (PLA), a system-on-a-chip, a system-on-a-substrate, a system-on-package, an application-specific integrated circuit (ASIC), or any other reasonable means of integrating or packaging the circuitry, or implemented in software, hardware, or firmware, or in any suitable combination of any of these three implementation methods. Alternatively, at least one of the acquisition module 610, generation module 620, voting device 630, replacement module 640, and target voting device 650 may be implemented at least partially as a computer program module that can perform corresponding functions when the computer program module is run.

[0163] Figure 7 A block diagram of an electronic device suitable for implementing the methods described above, according to an embodiment of the present invention, is shown schematically. Figure 7 The electronic device shown is merely an example and should not be construed as limiting the functionality and scope of use of the embodiments of the present invention.

[0164] like Figure 7 As shown, an electronic device 700 according to an embodiment of the present invention includes a processor 701, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 702 or a program loaded from a storage portion 708 into a random access memory (RAM) 703. The processor 701 may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor and / or an associated chipset and / or a special-purpose microprocessor (e.g., an application-specific integrated circuit (ASIC)), etc. The processor 701 may also include onboard memory for caching purposes. The processor 701 may include a single processing unit or multiple processing units for performing different actions of the method flow according to an embodiment of the present invention.

[0165] In the RAM 703, various programs and data required for the operation of the system 700 are stored. The processor 701, the ROM 702, and the RAM 703 are connected to each other via the bus 704. The processor 701 performs various operations according to the method flow of the embodiments of the present application by executing the programs stored in the ROM 702 and / or the RAM 703. It should be noted that the programs can also be stored in one or more memories other than the ROM 702 and the RAM 703. The processor 701 can also perform various operations according to the method flow of the embodiments of the present application by executing the programs stored in the one or more memories.

[0166] According to the embodiments of the present application, the system 700 can further include an input / output (I / O) interface 705, which is also connected to the bus 704. The system 700 can further include one or more of the following components connected to the I / O interface 705: an input portion 706 including, for example, a keyboard and a mouse; an output portion 707 including, for example, a cathode ray tube (CRT), a liquid crystal display (LCD), and a speaker; a storage portion 708 including, for example, a hard disk; and a communication portion 709 including, for example, a LAN card, a modem, and the like. The communication portion 709 performs communication processing via a network such as the Internet. A drive 710 is also connected to the I / O interface 705 as necessary. A removable recording medium 711 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, and the like is attached to the drive 710 as necessary, so that a computer program read therefrom is installed in the storage portion 708 as necessary.

[0167] According to the embodiments of the present application, the method flow according to the embodiments of the present application can be implemented as a computer software program. For example, the embodiments of the present application include a computer program product comprising a computer program carried on a computer-readable storage medium, the computer program containing program codes for executing the method shown in the flowchart. In such embodiments, the computer program can be downloaded and installed from a network via the communication portion 709, and / or installed from the removable recording medium 711. When the computer program is executed by the processor 701, the above-described functions defined in the system of the embodiments of the present application are performed. According to the embodiments of the present application, the system, the device, the apparatus, the module, the unit, and the like described above can be implemented by computer program modules.

[0168] The present application also provides a computer-readable storage medium, which can be included in the device / apparatus / system described in the above embodiments; or can exist separately without being assembled into the device / apparatus / system. The above computer-readable storage medium carries one or more programs, which, when executed, implement the method according to the embodiments of the present application.

[0169] According to embodiments of the present application, the computer readable storage medium can be a non-transitory computer readable storage medium. For example, it can include, but is not limited to, portable computer disks, hard disks, random access memories (RAM), read only memories (ROM), erasable programmable read only memories (EPROM or flash memory), portable compact disc read only memories (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing. In this context, a computer readable storage medium can be any tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device.

[0170] For example, according to embodiments of the present application, the computer readable storage medium can include one or more memories of the ROM 702 and / or the RAM 703 described above and / or other than the ROM 702 and the RAM 703.

[0171] The flow diagrams and the block diagrams in the drawings are illustrations of possible architectures, functions, and operations for systems, methods, and computer program products according to various embodiments of the present application. In this regard, each block in the flow diagrams or block diagrams can represent a module, a segment, or a portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently or the blocks can sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and / or flow diagrams, and combinations thereof, can be implemented by special purpose hardware-based systems that perform the specified functions or operations, or combinations of special purpose hardware and computer instructions.

[0172] Those skilled in the art will appreciate that the features recited in the various embodiments and / or claims of the present application can be combined and / or integrated in a variety of ways, even if such combinations or integrations are not expressly contemplated in the present application. In particular, the features recited in the various embodiments and / or claims of the present application can be combined and / or integrated in a variety of ways without departing from the spirit and scope of the present application. All such combinations and / or integrations are within the scope of the present application.

[0173] The embodiments of the application have been described. However, these embodiments are merely for illustration and are not intended to limit the scope of the application. Although each embodiment is described above separately, this does not mean that the measures in each embodiment cannot be used advantageously in combination. The scope of the application is defined by the appended claims and their equivalents. Various alternatives and modifications can be made to the embodiments of the application without departing from the scope of the application, and it is intended that all such alternatives and modifications be included within the scope of the application.

Claims

1. A method of voter-based redundant control, the method comprising: The method comprises: obtaining a processing unit array in a target hardware, the processing unit array comprising a plurality of processing units; selecting a plurality of groups of processing units from the processing unit array to generate a set of voters, each group of the processing units corresponding to generating one voter, the voter being used to perform a voting operation in a redundancy control; in response to a message that a detected voter is in a fault state, obtaining a target voter from the set of voters to replace the detected voter, and re-performing the voting operation in the redundancy control using the target voter; the set of voters comprising unsorted voters and sorted voters, a first sorted voter in the sorted voters being any one of the voters in the set of voters, after the set of voters is generated, further comprising: obtaining all unsorted voters and all sorted voters in the set of voters; calculating a similarity between each of the unsorted voters and each of the sorted voters; for each of the unsorted voters, calculating an average of the similarities between the unsorted voter and each of the sorted voters; ranking the unsorted voter with the smallest average as a sorted voter next to all the sorted voters, and performing again the operation of obtaining all unsorted voters and all sorted voters in the set of voters until all the voters in the set of voters are sorted.

2. The redundancy control method according to claim 1, characterized by, Before the operation of obtaining the processing unit array in the target hardware, the method further comprises: obtaining a redundancy mode adopted by the target hardware and a voter corresponding to the redundancy mode, the redundancy mode comprising N-modular redundancy or dual-modular redundancy, N>2, and N being an integer, when the redundancy mode is N-modular redundancy, the target hardware adopts an N-modular voter connecting N redundancy branches, when the redundancy mode is dual-modular redundancy, the target hardware adopts a dual-modular voter connecting two redundancy branches; in the case that the redundancy mode is N-modular redundancy, performing the operation of obtaining the processing unit array in the target hardware; in the case that the redundancy mode is dual-modular redundancy, in response to a message that a detected redundancy branch connected by the dual-modular voter is in a fault state, switching the redundancy mode adopted by the target hardware to the N-modular redundancy.

3. The redundancy control method according to claim 1 or 2, characterized by, The method further comprises: dividing the processing units in the processing unit array into N groups of operation units and at least one group of idle units, an interconnection relationship between the N groups of operation units and the at least one group of idle units being equivalent, each of the N groups of operation units being used to perform a calculation operation of one redundancy branch, each of the at least one group of idle units being used to replace a group of operation units in which an operation unit in a fault state is located to perform the calculation operation when there is an operation unit in a fault state; in response to a message that a detected redundancy branch connected by a voter is in a fault state, replacing a group of operation units in which the operation unit in a fault state is located with the one group of idle units, and re-performing the calculation operation of the redundancy branch.

4. The redundancy control method of claim 1, wherein The operation of selecting a plurality of groups of processing units from the processing unit array to generate a set of voters comprises: Obtaining a voter model with a redundancy mode of N-modular redundancy; Compiling the voter model statically by using integer linear programming to obtain a compilation result; Selecting a group of processing units from the array of processing units according to the compilation result to form a voter; Finding all groups of processing units having the same interconnection relationship as the group of processing units in the array of processing units; Generating a voter set based on the voter and the all groups of processing units, wherein each group of the processing units is used to form a voter.

5. The redundancy control method of claim 1, wherein, The calculation of the similarity between each of the to-be-ordered voters and each of the ordered voters includes: When there is a same processing unit in the group of processing units corresponding to the to-be-ordered voter and the group of processing units corresponding to the ordered voter, and the position of the processing unit in the group of processing units corresponding to the to-be-ordered voter is the same as the position of the processing unit in the group of processing units corresponding to the ordered voter, the similarity value of the to-be-ordered voter and the ordered voter is increased by a first preset value; When there is a same processing unit in the group of processing units corresponding to the to-be-ordered voter and the group of processing units corresponding to the ordered voter, and the position of the processing unit in the group of processing units corresponding to the to-be-ordered voter is different from the position of the processing unit in the group of processing units corresponding to the ordered voter, the similarity value of the to-be-ordered voter and the ordered voter is increased by a second preset value, which is less than the first preset value; For each to-be-ordered voter, the sum of the first preset value and the second preset value is calculated to obtain the similarity between the to-be-ordered voter and the ordered voter.

6. The redundancy control method according to claim 5, wherein The obtaining of the target voter from the voter set to replace the detected voter and the re-execution of the voting operation in the redundancy control using the target voter includes: Obtaining the next voter in the voter set after the detected voter to replace the detected voter; Re-executing the voting operation in the redundancy control using the group of processing units corresponding to the next voter.

7. The redundancy control method of claim 1, wherein The target hardware is a software-defined chip or a field programmable gate array.

8. A voter-based redundant control apparatus, characterized by comprising: It includes: An obtaining module is configured to obtain an array of processing units in target hardware, the array of processing units including a plurality of processing units; A generating module is configured to select a plurality of groups of processing units from the array of processing units to generate a voter set, each group of the processing units corresponding to generate a voter; A voter is configured to perform a voting operation in a redundancy control; A replacing module is configured to obtain a target voter from the voter set to replace a detected voter in response to a message that the detected voter is in a fault state; The target voter is configured to re-execute the voting operation in the redundancy control; The voter set includes to-be-ordered voters and ordered voters, and the first ordered voter in the ordered voters is any one of the voters in the voter set, and after the generation of the voter set, it further includes: acquiring all unsorted voters and all sorted voters in the voter set; calculating similarity between each unsorted voter and each sorted voter; calculating an average of the similarity between the unsorted voter and each sorted voter for each unsorted voter; ranking the unsorted voter with the smallest average as a sorted voter next to all sorted voters, and performing the operation of acquiring all unsorted voters and all sorted voters in the voter set again until all voters in the voter set are sorted.

9. The redundant control device of claim 8, wherein, The redundancy control device further comprises: a redundancy mode acquisition module, configured to acquire a redundancy mode adopted by the target hardware and a voter corresponding to the redundancy mode, the redundancy mode comprising N-mode redundancy or dual-mode redundancy, N>2, and N being an integer, when the redundancy mode is N-mode redundancy, the target hardware adopts an N-mode voter connecting N redundancy branches, and when the redundancy mode is dual-mode redundancy, the target hardware adopts a dual-mode voter connecting two redundancy branches; the acquisition module is further configured to perform the operation of acquiring the processing unit array in the target hardware when the redundancy mode is N-mode redundancy; a switching module, configured to, when the redundancy mode is dual-mode redundancy, switch the redundancy mode adopted by the target hardware to the N-mode redundancy in response to a message that the detected redundancy branch connected by the dual-mode voter is in a fault state.

10. The redundant control device according to claim 8 or 9, characterized in that The redundancy control device further comprises: a division module, configured to divide the processing units in the processing unit array into N groups of operation units and at least one group of idle units, an interconnection relationship between the N groups of operation units and the at least one group of idle units being equivalent, each group of the operation units being configured to perform a calculation operation of a redundancy branch, and each group of the idle units being configured to replace a group of operation units in which an operation unit in a fault state is located to perform the calculation operation when there is an operation unit in a fault state; a unit replacement module, configured to replace a group of operation units in which an operation unit in a fault state is located with the group of idle units and re-perform the calculation operation of the redundancy branch in response to a message that the detected redundancy branch connected by the voter is in a fault state.

11. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, The processor executes the computer program to implement each step in the redundancy control method based on the voter according to any one of claims 1 to 7.

12. A computer readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement each step in the redundancy control method based on the voter according to any one of claims 1 to 7.

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