A split-type board motherboard testing method, device and system

Abstract

The present invention discloses a split-type board motherboard testing method, device and system, the method comprising: testing multiple motherboards of a previous group by a first test card group; when the tests of multiple motherboards of the previous group are completed, performing FW refresh on the management board in the first test card group, and testing multiple motherboards of the current group by a second test card group while the first test card group performs FW refresh; when the tests of multiple motherboards of the current group are completed, performing FW refresh on the management board in the second test card group, and testing multiple motherboards of the next group by the first test card group whose FW refresh has been completed while the second test card group performs FW refresh; through the above steps, the first test card group and the second test card group are used in turn until all the motherboards to be tested are tested. The technical solution provided by the present invention can significantly improve the efficiency of split-type board motherboard testing.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a method, device and system for testing a split-type board and mainboard. Background Art

[0002] On a motherboard production line, each motherboard needs to be tested to ensure that it functions properly. For split-type motherboards, where the management board is separated from the motherboard, a batch of specialized test management boards is required. When testing a motherboard, the test management board is inserted into the motherboard and then tested. After the test is complete, the test management board is removed from the current motherboard and then inserted into the next motherboard to test the next motherboard. Because after the board is powered on, the motherboard's PCH (Platform Controller Hub) rewrites the register values ​​in the management board's Flash FW (Flash Firmware). If the removed test management board is directly used to test the next batch of motherboards, it will likely cause the system to fail to boot or crash, which can easily lead to unnecessary problems. To address this issue, a test management board is adapted for each motherboard. After each test, the test management board's BIOS FW needs to be refreshed. The refreshed test management board is then used to test the next batch of motherboards, ensuring that each subsequent motherboard can be tested and powered on. When the motherboard test load is very large, the process of refreshing the FW on the test management board greatly affects the test efficiency. Therefore, a method for improving the test efficiency of the split-type board motherboard is needed. Summary of the Invention

[0003] In view of this, embodiments of the present invention provide a method, device, and system for testing a split-type board mainboard, thereby improving the testing efficiency of the split-type board mainboard.

[0004] According to a first aspect, the present invention provides a split-type board motherboard testing method, the method comprising: testing a plurality of mainboards of a previous group by means of a first test card group, the first test card group including a plurality of management boards; when the testing of the plurality of mainboards of the previous group is completed, performing a FW refresh on the management boards in the first test card group, and testing the plurality of mainboards of the current group by means of a second test card group while the FW refresh is performed on the first test card group, the second test card group including a plurality of management boards; when the testing of the plurality of mainboards of the current group is completed, performing a FW refresh on the management boards in the second test card group, and testing the plurality of mainboards of the next group by means of the first test card group after the FW refresh is performed on the second test card group while the FW refresh is performed on the second test card group; based on the step of testing the plurality of mainboards of the previous group by means of the first test card group to the step of testing the plurality of mainboards of the next group by means of the first test card group after the FW refresh is performed on the second test card group, the first test card group and the second test card group are used to take turns to complete the testing of all the mainboards to be tested.

[0005] Optionally, the number of management boards in the first test card group, the number of management boards in the second test card group, and the number of mainboards participating in the test in each group are all the same.

[0006] Optionally, the step of refreshing the FW of the management board in the first test card group and / or the second test card group includes: pressing each pin of the ejector device against each pin of the Flash in the management board, the ejector device being communicatively connected with the FW burner; detecting the contact status between the ejector device and each pin of the Flash; if the contact status indicates that the ejector device is in successful contact with each pin of the Flash, controlling the FW burner to erase the original FW in the Flash through the ejector device, and write a new FW to the Flash.

[0007] Optionally, the detecting the contact status between the ejector device and each pin of the Flash includes: detecting whether a preset in-position ejector in the ejector device is successfully in contact with a corresponding preset sub-pin in the Flash pin, the length of the preset in-position ejector pin being the shortest among all the ejectors in the ejector device; if the preset in-position ejector pin is successfully in contact with the preset sub-pin, then determining that the contact status between the ejector device and each pin of the Flash is successful contact.

[0008] According to a second aspect, an embodiment of the present invention provides a split-type board motherboard testing device, the device comprising: a first test module, used to test multiple mainboards of the previous group through a first test card group, and / or, while the second test card group performs FW refresh, test multiple mainboards of the next group through the first test card group that has completed FW refresh; the first test card group includes multiple management boards; a first refresh module, used to perform FW refresh on the management boards in the first test card group when the test of multiple mainboards of the previous group is completed; a second test module, used to test multiple mainboards of the current group through the second test card group while the first test card group performs FW refresh; the second test card group includes multiple management boards; a second refresh module, used to perform FW refresh on the management boards in the second test card group when the test of multiple mainboards of the current group is completed; wherein, based on the first test module, the first refresh module, the second test module and the second refresh module, the first test card group and the second test card group are used to take turns to complete the test of all mainboards to be tested.

[0009] According to a third aspect, an embodiment of the present invention provides a split-type board and motherboard testing system, comprising a memory, a processor, a testing device, and a firmware refresh device. The memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the computer instructions to control the testing device and / or the firmware refresh device to perform the method according to the first aspect or any optional embodiment of the first aspect. The testing device is used to test the motherboard through a management board, and the firmware refresh device is used to refresh the firmware of the management board.

[0010] Optionally, the FW refresh device includes a FW burner and a ejector device, the FW burner is communicatively connected to the ejector device, the ejector device contacts each pin of the Flash in the management board through the ejector pin, and the FW burner refreshes the FW of the Flash in the management board through the ejector device.

[0011] Optionally, a preset ejector pin in the ejector pin device for contacting a preset sub-pin of the Flash is shorter than other ejector pins.

[0012] Optionally, the ejector device includes a groove capable of accommodating the Flash, and each ejector pin of the ejector device is located on the side of the groove. When the Flash needs to be refreshed with FW, the ejector device cover is connected above the Flash through the groove so that each ejector pin on the side of the groove contacts each pin of the Flash.

[0013] According to a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable the computer to execute the method described in the first aspect or any optional embodiment of the first aspect.

[0014] The technical solution provided by this application has the following advantages:

[0015] The technical solution provided by the present application is to divide the management board used for testing into two groups in advance, namely the first test card group and the second test card group. First, each management board of the first test card group is respectively inserted into the multiple mainboards of the first group for testing. When the first group of mainboard tests are completed, the first test card group is pulled out. Afterwards, the second group of mainboards is tested using the second test card group, and the management board in the first test card group is refreshed with FW at the same time. When the second group of mainboard tests are completed, the first test card group is also refreshed and completed. While continuing to refresh FW on the second test card group, the first test card group is used to test the next group of mainboards. Testing and FW refreshing are alternately performed by the first test card group and the second test card group until all mainboard tests are completed. FW refreshing can be performed on the management board while the mainboard is tested, significantly saving the time wasted in the FW refreshing process of the test management board and improving the efficiency of the split-type mainboard test. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The features and advantages of the present invention will be more clearly understood by referring to the accompanying drawings, which are schematic and should not be construed as limiting the present invention in any way. In the accompanying drawings:

[0017] Figure 1 A schematic diagram showing the steps of a method for testing a split-type board motherboard in one embodiment of the present invention is shown;

[0018] Figure 2 A schematic flow chart of a method for testing a split-type board and mainboard in one embodiment of the present invention is shown;

[0019] Figure 3 It shows a schematic structural diagram of a FW refresh device and a management board in one embodiment of the present invention;

[0020] Figure 4 A schematic structural diagram of a split-type board and mainboard testing device according to one embodiment of the present invention is shown;

[0021] Figure 5 A schematic structural diagram of a split-type board and motherboard testing system according to one embodiment of the present invention is shown;

[0022] Figure 6 A schematic structural diagram of an ejector device in one embodiment of the present invention is shown. DETAILED DESCRIPTION

[0023] To make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of the present invention.

[0024] See also Figure 1 and Figure 2 In one embodiment, a method for testing a split-type card motherboard includes the following steps:

[0025] Step S101: testing a plurality of mainboards in a previous group by using a first test card group, wherein the first test card group includes a plurality of management boards.

[0026] Step S102: When the test of multiple mainboards in the previous group is completed, the management board in the first test card group is refreshed with FW, and while the first test card group is refreshing the FW, the multiple mainboards in the current group are tested through the second test card group, and the second test card group includes multiple management boards.

[0027] Step S103: When the tests on multiple mainboards in the current group are completed, the management board in the second test card group is refreshed, and while the second test card group is refreshing, the next group of mainboards is tested by the first test card group that has completed the FW refresh.

[0028] Step S104: Based on steps S101 to S103, use the first test card set and the second test card set in turn to complete the testing of all the motherboards to be tested.

[0029] Specifically, the split board is a board in which the management board and the main board are installed separately, wherein the management board usually refers to the baseboard management controller (BMC), which uses sensors to monitor the status of a computer, network server or other hardware drive devices. The main board is a common main board of computer equipment, which usually includes a graphics card, a sound card, etc. The main board is a prior art and will not be described here. The split board installed in the computer, that is, the management board is plugged into the main board, and the main board and the management board are installed as a whole. The test process of the embodiment of the present invention needs to test the main board part of the split board. In order to improve the efficiency of the split board main board test, the embodiment of the present invention pre-divides the management board for testing into two groups, namely the first test card group and the second test card group, and each card group includes multiple management boards for testing.

[0030] The motherboards to be tested are also divided into multiple groups. When the test begins, the first test card group is first used to test the multiple motherboards in the first group. For example, there are 100 motherboards to be tested in the first group, and the number of management boards in the first test card group is greater than or equal to 100. 100 management boards are selected from the first test card group and inserted into each of the motherboards to be tested in the first group to be tested for testing. After the first group of motherboards is tested, the management boards in the first test card group are pulled out from the motherboards, and the firmware of each management board in the first test card group is refreshed. At the same time as the first test card group is refreshing the firmware, the second test card group is used to test the multiple motherboards in the second group to be tested. When the second test card group completes testing the second group of motherboards to be tested, the firmware refresh of the first test card group is also completed. Thus, the first test card group is continued to test the third group of motherboards to be tested, and the firmware of the management boards in the second test card group is refreshed at the same time. After the third group of motherboards is tested, the second test card group is continued to test the next group of motherboards, and the firmware of the first test card group is refreshed at the same time. Finally, all the motherboards to be tested are tested by alternating testing and FW refreshing of the first and second test card groups. The method provided by the embodiment of the present invention can refresh the FW of the previous group of management boards while testing one group of motherboards, and there is no need to wait for the next group of motherboards to be tested. Compared with the process of waiting for the FW refresh of the test management board to be completed after the test of one group of motherboards is completed before the next group of motherboards is tested, the time wasted in the FW refresh process of the test management board is significantly saved, and the efficiency of split-board motherboard testing is improved.

[0031] Specifically, in one embodiment, the number of management boards deployed in the first test card group, the number of management boards deployed in the second test card group, and the number of mainboards in each group participating in the test are all the same, so that the utilization rate of the management boards used for testing can be maximized, thereby maximizing the efficiency of the split-board mainboard test.

[0032] Specifically, in one embodiment, Figure 3 As shown, the embodiment of the present invention performs a FW refresh on the management board in the first test card group and / or the second test card group, specifically including the following steps:

[0033] Step 1: Place the pins of the ejector device against the pins of the Flash in the management board. The ejector device is connected to the FW burner.

[0034] Step 2: Check the contact status between the ejector device and each pin of the Flash.

[0035] Step 3: If the contact status indicates that the ejector device is in successful contact with each pin of the Flash, the FW burner is controlled to erase the original FW in the Flash through the ejector device and write the new FW to the Flash.

[0036] Specifically, for motherboard testing with a split-board card, the current FW refresh method used in actual application scenarios is usually to first remove the Flash that stores the FW in the BIOS from the management board, then install the removed Flash on a burner. The burner is connected to the server that stores the FW, and the burning program in the server burns the Flash FW through the burner. After the burning is complete, the Flsha is reinstalled to the corresponding Flash installation location on the management board, and then the motherboard is powered on for testing. On the one hand, this FW refresh method requires the Flash to be repeatedly removed and installed from the management board multiple times. The removal and installation work wastes FW refresh time and reduces FW refresh efficiency. On the other hand, the risk of Flash damage increases during the Flash removal and installation process.

[0037] Based on this, an embodiment of the present invention provides a FW refresh device including a pin device, which also includes a FW burner, wherein the pin device and the FW burner can be communicatively connected. The pin device extends a plurality of pins, and the number of pins is the same as the number of pins of the Flash actually used on the management board. When a FW test is required, the pins of the pin device are pressed against the pins of the Flash in the management board to achieve the purpose of establishing a communication connection between the FW burner and the Flash through the pin device, and the Flash does not need to be removed from the management board. Afterwards, the contact status of the pin device and the pins of the Flash is detected. If it is detected that the pin device and the pins of the Flash are successfully in contact, the step of FW refresh is executed: the control server runs the burning program, so that the FW burner erases the original FW in the Flash through the pin device, and writes the new FW to the Flash, completing the FW update process. By performing the steps of FW refreshing through the FW refreshing device provided by the embodiment of the present invention, a method for FW refreshing without disassembling the BIOS Flash is proposed, which reduces the risk of Flash damage caused by disassembling the BIOS Flash and improves the efficiency of split board testing.

[0038] Specifically, in one embodiment, the above step 2 specifically includes the following steps:

[0039] Step 4: Detect whether the preset ejector pin in the ejector pin device is successfully contacted with the corresponding preset sub-pin in the Flash pin. The length of the preset ejector pin is the shortest among all the ejectors in the ejector pin device.

[0040] Step 5: If the preset ejector pin is in place and the preset sub-pin is in contact successfully, the contact state between the ejector device and each pin of the Flash is determined to be successful contact.

[0041] Specifically, if the contact force between the ejector pin and the Flash pins is too weak, poor contact may occur. If the contact force between the ejector pin and the Flash pins is too strong, the Flash pins may be damaged. To avoid the above problems, the ejector pin device of the embodiment of the present invention has a preset ejector pin that is shorter than the other ejector pins (for example, a preset ejector pin that is 1mm shorter than the other ejector pins has a better effect. This is only an example and is not limited to this. The specific length of the preset ejector pin shorter than the other ejector pins can be flexibly adjusted within a range of 1mm±1mm). The other ejector pins have the same length. When detecting the contact status between the ejector device and each pin of the Flash, it is only necessary to detect whether the preset ejector pin has successfully contacted the corresponding preset sub-pin in the Flash pin. If the preset ejector pin has successfully contacted, it indicates that the other slightly longer ejectors have successfully contacted the Flash pin, ensuring that the contact force between the ejector device and each pin of the Flash is moderate, thereby avoiding the situation where the ejector device has poor contact with the Flash, reducing debugging time, and further improving the efficiency of split-type board motherboard testing.

[0042] By the above steps, the technical solution provided by the present application is that the management board used for testing is divided into two groups in advance, namely the first test card group and the second test card group, first each management board of the first test card group is respectively inserted into the multiple mainboards of the first group for testing, when the first group of mainboard tests are completed, the first test card group is pulled out. Afterwards, the second group of mainboards is tested using the second test card group, and the management board in the first test card group is refreshed with FW simultaneously, when the second group of mainboard tests are completed, the first test card group is also refreshed and completed, and the first test card group is utilized to test the next group of mainboards while continuing to refresh FW in the second test card group. Alternately testing and refreshing FW are performed by the first test card group and the second test card group, until all mainboard tests are completed, the management board can be refreshed with FW while the mainboard is tested, significantly saving the time wasted in the FW refreshing process of the test management board, and improving the efficiency of the split-type mainboard test.

[0043] like Figure 4 As shown, this embodiment also provides a split-type board and motherboard testing device, the device comprising:

[0044] The first test module 101 is configured to test the motherboards of the previous group using the first test card group, and / or, while the second test card group is performing a firmware refresh, test the motherboards of the next group using the first test card group, which has undergone a firmware refresh. The first test card group includes multiple management boards. For details, refer to the description of steps S101 and S103 in the above method embodiment and will not be repeated here.

[0045] The first refresh module 102 is used to refresh the FW of the management board in the first test card group when the test of multiple mainboards in the previous group is completed. For details, please refer to the relevant description of step S102 in the above method embodiment, which will not be repeated here.

[0046] The second test module 103 is configured to simultaneously test multiple motherboards in the current group using a second test card group while the first test card group is performing a firmware refresh. The second test card group includes multiple management cards. For details, see the description of step S102 in the above method embodiment and will not be repeated here.

[0047] The second refresh module 104 is used to refresh the FW of the management board in the second test card group when the tests of multiple mainboards in the current group are completed. For details, please refer to the relevant description of step S103 in the above method embodiment, which will not be repeated here.

[0048] Wherein, based on the first test module 101, the first refresh module 102, the second test module 103 and the second refresh module 104, the first test card group and the second test card group are used in turn until all the motherboards to be tested are tested.

[0049] The split-type board motherboard testing device provided in an embodiment of the present invention is used to execute the split-type board motherboard testing method provided in the above embodiment. Its implementation method and principle are the same. For details, please refer to the relevant description of the above method embodiment and will not be repeated here.

[0050] Through the collaborative cooperation of the above-mentioned various components, the technical solution provided by the present application is to divide the management board used for testing into two groups in advance, namely the first test card group and the second test card group. First, each management board of the first test card group is respectively inserted into the multiple mainboards of the first group for testing. When the first group of mainboard tests are completed, the first test card group is pulled out. Afterwards, the second group of mainboards is tested using the second test card group, and the management board in the first test card group is refreshed with FW at the same time. When the second group of mainboard tests are completed, the first test card group is also refreshed and completed. While continuing to refresh FW on the second test card group, the first test card group is used to test the next group of mainboards. Alternately testing and refreshing FW by the first test card group and the second test card group until all mainboard tests are completed can refresh FW on the management board while the mainboard is tested, significantly saving the time wasted in the FW refreshing process of the test management board and improving the efficiency of the split-type mainboard test.

[0051] Figure 5 The present invention shows a split-type motherboard test system, which includes a processor 901, a memory 902, a test device 903 and a FW refresh device 904, which can be connected via a bus or other means. Figure 5The bus connection is taken as an example.

[0052] The processor 901 may be a central processing unit (CPU). The processor 901 may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or a combination of the above chips.

[0053] Memory 902, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer executable programs, and modules, such as the program instructions / modules corresponding to the methods in the above-described method embodiments. Processor 901 executes the non-transitory software programs, instructions, and modules stored in memory 902 to perform various processor functions and data processing, thereby implementing the methods in the above-described method embodiments.

[0054] The memory 902 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and application programs required for at least one function; the data storage area may store data created by the processor 901, etc. In addition, the memory 902 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory 902 may optionally include a memory remotely located relative to the processor 901, and these remote memories may be connected to the processor 901 via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0055] One or more modules are stored in the memory 902 and, when executed by the processor 901 , perform the method in the above method embodiment.

[0056] The test device 903 is used to test the mainboard through the management board, and the FW refresh device 904 is used to refresh the FW of the management board. Both the test device 903 and the FW refresh device 904 can be implemented using existing technologies, and will not be described in detail in this embodiment.

[0057] Specifically, if Figure 3As shown, in one embodiment, the FW refresh device 904 specifically includes a FW burner 905 and a pin device 906. The FW burner 905 is communicatively connected with the pin device 906. The pin device 906 contacts each pin of the Flash in the management board through the pins. The FW burner 905 refreshes the FW of the Flash in the management board through the pin device 906.

[0058] Specifically, for motherboard testing with a split-board card, the current FW refresh method used in actual application scenarios is usually to first remove the Flash that stores the FW in the BIOS from the management board, then install the removed Flash on a burner. The burner is connected to the server that stores the FW, and the burning program in the server burns the Flash FW through the burner. After the burning is complete, the Flsha is reinstalled to the corresponding Flash installation location on the management board, and then the motherboard is powered on for testing. On the one hand, this FW refresh method requires the Flash to be repeatedly removed and installed from the management board multiple times. The removal and installation work wastes FW refresh time and reduces FW refresh efficiency. On the other hand, the risk of Flash damage increases during the Flash removal and installation process.

[0059] Based on this, the FW refresh device 904 provided in the embodiment of the present invention also includes a pin device 906, wherein the pin device 906 is communicatively connected to the FW burner 905. Among them, the pin device 906 extends a plurality of pins, and the number of pins is the same as the number of pins of the Flash actually used on the management board. When it is necessary to perform an FW test, the pins of the pin device 906 can be pressed against the pins of the Flash in the management board to achieve the purpose of establishing a communication connection between the burner and the Flash through the pin device 906, and the Flash does not need to be removed from the management board. After the contact state detection of the pins is completed, the control server runs the burning program, so that the FW burner 905 erases the original FW in the Flash through the pin device 906, and writes the new FW to the Flash, completing the FW update process. Through the pin device 906 provided in the embodiment of the present invention, a method for refreshing FW without disassembling the BIOS Flash is realized, which reduces the risk of Flash damage caused by disassembling the BIOS Flash and improves the efficiency of split board testing.

[0060] Specifically, in one embodiment, the ejector pin device 906 includes a preset ejector pin for contacting a preset sub-pin of the Flash memory, and the preset ejector pin is shorter than other ejector pins.

[0061] Specifically, in actual applications, if the contact force between ejector device 906 and the Flash pins is too weak, poor contact may occur between ejector device 906 and the Flash pins. If the contact force between ejector device 906 and the Flash pins is too strong, the Flash pins may be damaged. To avoid the above problems, the embodiment of the present invention is designed to include a preset ejector pin in ejector device 906. This ejector pin is shorter than the other ejector pins (for example, a preset ejector pin that is 1mm shorter than the other ejector pins has a better effect. This is only an example and is not limited to this. The specific length of the preset ejector pin that is shorter than the other ejector pins can be flexibly adjusted within a range of 1mm±1mm). The other ejector pins have the same length. When detecting the contact status between the ejector device 906 and each pin of the Flash, it is only necessary to detect whether the preset ejector pin is successfully in contact with the corresponding preset sub-pin in the Flash pin. If the preset ejector pin has been successfully in contact, it indicates that the other slightly longer ejector pins have been successfully released from the Flash pin, ensuring that the contact force between the ejector device 906 and each pin of the Flash is moderate, thereby avoiding the situation where the ejector device 906 has poor contact with the Flash, reducing debugging time, and further improving the efficiency of split-type board motherboard testing.

[0062] Specifically, in one embodiment, Figure 6 As shown, the ejector device 906 includes a groove capable of accommodating the Flash, and each ejector pin of the ejector device 906 is located on the side of the groove. Figure 6 The ejector device 906 in the embodiment takes a cube as an example. In this embodiment, the specific shape of the ejector device 906 is not specifically limited, as long as it includes a groove that can accommodate Flash. In this embodiment, the Flash in the management board is taken as an example of MX25L51245GMI-08G of MXIC Company (this example is only used, not limited to this). The Flash contains a total of 16 pins, and the corresponding ejector device 906 includes 16 ejectors, 8 of which are distributed on both sides of the groove. When the Flash needs to be refreshed by FW, the ejector device 906 is covered on the top of the Flash through the groove, and the ejector device 906 is pressed down to make the 16 ejectors on the two sides of the inner side of the ejector device groove contact with each pin of the Flash. Through this covering method, when the ejector device 906 contacts the ejector pin of the Flash, the groove can play a role in fixing the ejector device 906, thereby avoiding the problem of the ejector device 906 running off when the FW is refreshed and causing the FW refresh to be interrupted.

[0063] The specific details of the above-mentioned split-type board motherboard testing system can be understood by referring to the corresponding descriptions and effects in the above-mentioned method embodiments, and will not be repeated here.

[0064] Those skilled in the art will appreciate that all or part of the processes in the above-described embodiments can be implemented by instructing related hardware through a computer program. The implemented program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the above-described embodiments. The storage medium can be a magnetic disk, an optical disk, a read-only memory (ROM), a random access memory (RAM), a flash memory, a hard disk drive (HDD), or a solid-state drive (SSD). The storage medium can also include a combination of the above-mentioned types of memory.

[0065] Although the embodiments of the present invention have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention. Such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A split-type board motherboard testing method, characterized in that: The method comprises: Testing the plurality of mainboards of the previous group using a first test card group, wherein the first test card group includes a plurality of management boards; When the test of multiple mainboards of the previous group is completed, the management board in the first test card group is refreshed with firmware, and while the first test card group is refreshing the firmware, multiple mainboards of the current group are tested by the second test card group, where the second test card group includes multiple management boards; When the tests on multiple mainboards of the current group are completed, the management board in the second test card group is refreshed with FW, and while the second test card group is refreshing FW, the multiple mainboards of the next group are tested by the first test card group whose FW has been refreshed; Based on the step of testing the previous group of multiple motherboards through the first test card group to the step of testing the next group of multiple motherboards through the first test card group that has completed FW refresh while the second test card group performs FW refresh, the first test card group and the second test card group are used to take turns to complete the testing of all the motherboards to be tested.

2. The method according to claim 1, characterized in that The number of management boards in the first test card group, the number of management boards in the second test card group, and the number of mainboards participating in the test in each group are all the same.

3. The method according to claim 1, characterized in that The step of refreshing the FW of the management board in the first test card group and / or the second test card group includes: The ejector pins of the ejector device are pressed against the pins of the Flash in the management board, and the ejector device is in communication with the FW burner; Detect the contact status between the ejector device and each pin of the Flash; If the contact state indicates that the ejector device is in successful contact with each pin of the Flash, the FW burner is controlled to erase the original FW in the Flash through the ejector device and write a new FW into the Flash.

4. The method according to claim 3, characterized in that The method of detecting the contact status between the ejector device and each pin of the Flash includes: Detecting whether a preset ejector pin in the ejector pin device is in successful contact with a corresponding preset sub-pin in the Flash pin, wherein the length of the preset ejector pin is the shortest among all the ejectors in the ejector pin device; If the preset in-position ejector pin successfully contacts the preset sub-pin, the contact state between the ejector pin device and each pin of the Flash is determined to be successful contact.

5. A split-type board and motherboard testing device, characterized in that: The device comprises: A first test module is configured to test a plurality of mainboards in a previous group using a first test card group, and to test a plurality of mainboards in a next group using the first test card group after the FW refresh is completed while the second test card group is performing the FW refresh; the first test card group includes a plurality of management cards; A first refresh module is used to refresh the FW of the management board in the first test card group when the test of multiple mainboards in the previous group is completed; A second test module is configured to test multiple mainboards in the current group through a second test card group while the first test card group is performing FW refresh; the second test card group includes multiple management boards; A second refresh module is used to refresh the FW of the management board in the second test card group when the tests of multiple mainboards in the current group are completed; Wherein, based on the first test module, the first refresh module, the second test module and the second refresh module, the first test card group and the second test card group are used in turn until all the motherboards to be tested are tested.

6. A split-type board and motherboard testing system, characterized in that: The present invention comprises a memory, a processor, a test device and a FW refresh device, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor controls the test device and / or the FW refresh device to perform the method according to any one of claims 1 to 4 by executing the computer instructions, wherein the test device is used to test the mainboard through a management board, and the FW refresh device is used to refresh the FW of the management board.

7. The system according to claim 6, characterized in that The FW refresh device includes a FW burner and a ejector device. The FW burner is communicatively connected to the ejector device. The ejector device contacts each pin of the Flash in the management board through the ejector pin. The FW burner refreshes the FW of the Flash in the management board through the ejector device.

8. The system according to claim 7, characterized in that The preset in-position ejector pin in the ejector pin device for contacting the preset sub-pin of the Flash is shorter than the other ejector pins.

9. The system according to claim 7, wherein: The ejector device includes a groove capable of accommodating the Flash, and each ejector pin of the ejector device is located on the side of the groove. When the Flash needs to be refreshed, the ejector device cover is connected to the top of the Flash through the groove so that the ejectors on the side of the groove contact the pins of the Flash.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable the computer to execute the method according to any one of claims 1 to 4.

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