Method for determining an exposure position

Abstract

The embodiment of the present disclosure relates to the semiconductor field, and provides a kind of exposure position determination method, comprising: according to the size of chip, the size of exposure unit is acquired, exposure unit includes at least one sub-exposure unit, and the size of sub-exposure unit is same with the size of chip;According to the size of exposure unit, the initial arrangement position of exposure unit on wafer is acquired, and initial arrangement position includes multiple exposure units arranged in array along first direction and second direction;With multiple exposure units arranged along first direction as a row, multiple rows of exposure units are moved along first direction respectively, and the moving distance of each row of exposure units is acquired;According to the moving distance of each row of exposure units, the target arrangement position of exposure unit on wafer is acquired, and the number of effective exposure units in target arrangement position is less than the number of effective exposure units in initial arrangement position.The exposure position determination method provided by the embodiment of the present disclosure is at least beneficial to improve the manufacturing efficiency of semiconductor structure.

Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure relate to the field of semiconductor, and particularly, to a method for determining exposure position. BACKGROUND

[0002] In the field of semiconductor manufacturing technology, a wafer generally refers to a silicon wafer used for manufacturing integrated circuits. In the process of manufacturing integrated circuits on the wafer, the wafer is divided into a plurality of exposure units (shots) for the convenience of process manufacturing. The exposure unit is usually taken as a basic unit in production, and is periodically and repeatedly arranged on the wafer. Each exposure unit contains one or more than one chip (die). After the integrated circuits on the wafer are completely manufactured, the wafer is cut into a plurality of chips, and each chip contains an independent integrated circuit capable of achieving a predetermined function.

[0003] In the process of manufacturing integrated circuits on the wafer, the exposure units are exposed one by one, and each exposure requires time and cost. In the existing manufacturing process, the relationship between manufacturing cost and benefit is not considered when the number of exposure units is determined, and the benefit cannot be maximized.

[0004] Therefore, it is necessary to provide a new method for determining exposure position to improve the manufacturing benefit of semiconductor structure. SUMMARY

[0005] Embodiments of the present disclosure provide a method for determining exposure position, which is at least beneficial to improve the manufacturing benefit of semiconductor structure.

[0006] According to some embodiments of the present disclosure, the present disclosure provides a method for determining exposure position, which includes: obtaining the size of an exposure unit according to the size of a chip, the exposure unit including at least one sub-exposure unit, the size of the sub-exposure unit being the same as the size of the chip; obtaining an initial arrangement position of the exposure unit on a wafer according to the size of the exposure unit, the initial arrangement position including a plurality of exposure units arranged in an array along a first direction and a second direction; taking the plurality of exposure units arranged along the first direction as a row, moving the plurality of rows of exposure units along the first direction respectively, and obtaining a moving distance of each row of exposure units; obtaining a target arrangement position of the exposure unit on the wafer according to the moving distance of each row of exposure units, the number of effective exposure units in the target arrangement position being less than the number of effective exposure units in the initial arrangement position, wherein the effective exposure unit is determined as a ratio of an effective sub-exposure unit in the exposure unit to a total number of sub-exposure units in the exposure unit being greater than or equal to a preset value, and the effective sub-exposure unit is determined as a sub-exposure unit whose orthogonal projection perpendicular to the surface of the wafer is located inside the wafer.

[0007] In some embodiments, while moving the multiple rows of exposure units along the first direction respectively, the number of effective exposure units of each row of exposure units during the movement is also obtained, and the movement distance of each row of exposure units is obtained according to the number of effective exposure units of each row of exposure units during the movement.

[0008] In some embodiments, the initial arrangement position of the exposure unit on the wafer is obtained according to the size of the exposure unit, including: arranging the sub-exposure units in an array along the first direction and the second direction; obtaining the number of effective sub-exposure units on the wafer according to the size of the wafer; determining the initial arrangement position of the sub-exposure unit on the wafer according to the number of effective sub-exposure units on the wafer; and obtaining the initial arrangement position of the exposure unit according to the initial arrangement position of the sub-exposure unit and the size of the exposure unit.

[0009] In some embodiments, the initial arrangement position of the exposure unit is obtained according to the initial arrangement position of the sub-exposure unit and the size of the exposure unit, including: taking a plurality of exposure units arranged along the second direction as a column, moving the column of exposure units along the first direction and the second direction based on the initial arrangement position of the sub-exposure unit, and obtaining the number of effective exposure units of the column of exposure units on the wafer; and determining the initial arrangement position of the exposure unit according to the number of effective exposure units of the column of exposure units on the wafer.

[0010] In some embodiments, moving the multiple rows of exposure units along the first direction respectively includes: moving a row of exposure units by a unit length of the sub-exposure unit along the first direction, and the movement distance is a multiple of the unit length.

[0011] In some embodiments, the initial arrangement position of the exposure unit on the wafer is obtained according to the size of the exposure unit, including: arranging the exposure units in an array along the first direction and the second direction; obtaining the number of effective exposure units on the wafer according to the size of the wafer; determining the initial arrangement position of the exposure unit according to the number of effective exposure units of the exposure unit on the wafer; and after obtaining the target arrangement position of the exposure unit on the wafer, further including: determining the arrangement position of the sub-exposure unit on the wafer according to the target arrangement position.

[0012] In some embodiments, the number of effective exposure units on the wafer is obtained according to the size of the wafer, including: taking a plurality of exposure units arranged along the second direction as a column, moving the wafer along the first direction and the second direction, and obtaining the number of effective exposure units of the column of exposure units on the wafer; and determining the initial arrangement position of the exposure unit according to the number of effective exposure units of the exposure unit on the wafer, including: determining the initial arrangement position of the exposure unit according to the number of effective exposure units of the column of exposure units on the wafer.

[0013] In some embodiments, moving the multiple rows of exposure units along the first direction respectively comprises: moving a row of exposure units by 1 / 2 of the length of the exposure units along the first direction as a unit length, and the moving distance is a multiple of the unit length.

[0014] In some embodiments, the exposure units are provided with a mark area on the edge extending along the first direction, the mark area is located at 1 / 2 of the length of the exposure units along the first direction, and the mark area comprises a positioning mark in the shape of "T" or "⊥".

[0015] In some embodiments, in each exposure unit, the number of arrangements of the sub-exposure units along the first direction is a positive integer less than or equal to 10, and the number of arrangements of the sub-exposure units along the second direction is a positive integer less than or equal to 10.

[0016] In some embodiments, the length of the exposure units along the first direction ranges from 0 to 26 mm, and the length of the exposure units along the second direction ranges from 0 to 33 mm.

[0017] In some embodiments, before obtaining the initial arrangement position of the exposure units on the wafer according to the size of the exposure units, the method further comprises: establishing a coordinate system with the center point of the wafer as the origin, the X-axis parallel to the first direction, and the Y-axis parallel to the second direction; obtaining the target arrangement position of the exposure units on the wafer according to the moving distance of each row of exposure units, comprising: obtaining the moving distance of each row of exposure units in the first quadrant and the second quadrant of the coordinate system; obtaining the moving distance of each row of exposure units in the third quadrant and the fourth quadrant of the coordinate system with the X-axis as the axis of symmetry; and obtaining the target arrangement position of the exposure units on the wafer based on the moving distance.

[0018] In some embodiments, obtaining the initial arrangement position of the exposure units on the wafer according to the size of the exposure units comprises: taking a plurality of exposure units arranged along the second direction as a column, overlapping one side of the column of exposure units along the second direction with the Y-axis, and moving the column of exposure units along the second direction while obtaining the number of effective exposure units of the column of exposure units; and determining the initial arrangement position of the exposure units on the wafer based on the number of effective exposure units of the column of exposure units.

[0019] In some embodiments, obtaining the initial arrangement position of the exposure units on the wafer according to the size of the exposure units comprises: taking a plurality of exposure units arranged along the second direction as a column, overlapping the axis of symmetry of the column of exposure units extending along the second direction with the Y-axis, and moving the column of exposure units along the second direction while obtaining the number of effective exposure units of the column of exposure units; and determining the initial arrangement position of the exposure units on the wafer based on the number of effective exposure units of the column of exposure units.

[0020] In some embodiments, the moving the multiple rows of exposure units respectively along the first direction and obtaining the moving distance of each row of exposure units comprises: taking N rows of exposure units as a moving group, N being a positive integer and being less than the total number of rows of exposure units arranged in the first direction, and moving the moving group along the first direction to obtain the moving distance of each row of exposure units.

[0021] The technical solution provided by the embodiments of the present disclosure has at least the following advantages: the size of the exposure unit is obtained according to the size of the chip, the size of the sub-exposure unit in the exposure unit corresponds to the size of the chip, and the arrangement position of the chip can be determined through the arrangement position of the sub-exposure unit; then the initial arrangement position of the exposure unit arranged in the first direction and the second direction on the wafer is obtained according to the size of the exposure unit, and then each row of exposure units is moved along the first direction respectively, so that the effective exposure number of the row of exposure units is increased and the total number of exposure units is reduced; finally, the target arrangement position of the exposure unit is obtained according to the moving distance of each row of exposure units, so that the number of chips that can be set on the wafer is the most and the number of exposure units is the least, thereby reducing the number of exposures required in the semiconductor structure manufacturing process, reducing the exposure cost, and improving the manufacturing benefit of the semiconductor structure. BRIEF DESCRIPTION OF DRAWINGS

[0022] One or more embodiments are illustrated by way of example in the drawings that are for illustrative purposes only, and not for the purposes of limitation of the embodiments, unless otherwise explicitly stated herein, the drawings in the accompanying drawings do not constitute a proportional limitation; in order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the drawings needed to be used in the embodiments will be briefly introduced below, and obviously, the drawings in the following description can also be obtained by those skilled in the art without creating labor, and other drawings can also be obtained according to these drawings.

[0023] Figure 1 A schematic diagram of the arrangement of exposure units on a wafer is provided for an embodiment of the present disclosure;

[0024] Figure 2 A step flowchart of a determination method of an exposure position is provided for another embodiment of the present disclosure;

[0025] Figure 3 A partial schematic diagram of an exposure unit is provided for another embodiment of the present disclosure;

[0026] Figure 4 A schematic diagram of the arrangement of exposure units on a wafer is provided for another embodiment of the present disclosure;

[0027] Figures 5 to 8The structure diagram corresponding to each step of a method for determining an initial arrangement position of an exposure unit according to another embodiment of the present disclosure is provided in the following.

[0028] Figures 9 to 13 The structure diagram corresponding to each step of another method for determining an initial arrangement position of an exposure unit according to another embodiment of the present disclosure is provided in the following.

[0029] Figures 14 to 18 The structure diagram corresponding to each step of a method for determining a target arrangement position of an exposure unit according to another embodiment of the present disclosure is provided in the following.

[0030] Figure 19 The structure diagram of a positioning mark in an exposure unit according to another embodiment of the present disclosure is provided in the following. DETAILED DESCRIPTION

[0031] As known from the background, in the process of manufacturing integrated circuits on a wafer, the exposure unit is exposed one by one, and each exposure requires time and cost. In the existing manufacturing process, when the number of exposure units is determined, the relationship between manufacturing cost and benefit is not considered, and the benefit cannot be maximized.

[0032] In the field of semiconductor manufacturing technology, a wafer is divided into a plurality of exposure units, and the exposure unit is usually taken as a basic unit in production. The exposure units are periodically and repeatedly arranged on the wafer, and each basic exposure unit contains one or more chips, which are also periodically and repeatedly arranged on the wafer. After the integrated circuits on the wafer are completely manufactured, the wafer is cut into a plurality of chips, and each chip contains an independent integrated circuit that can achieve a predetermined function.

[0033] In the process of determining the position of the exposure unit, the range of the exposure unit covers the entire wafer area, so there may be empty exposure units (i.e., the orthographic projection of the exposure unit on the wafer surface is located outside the wafer) on the wafer. For example, refer to Figure 1 , Figure 1 The structure diagram of the arrangement of exposure units on a wafer according to an embodiment of the present disclosure is provided in the following. For example, when the orthographic projection of a sub-exposure unit 12 (represented by a thin black box in the figure) in an exposure unit 11 (represented by a thick black box in the figure) on a wafer 10 is located inside the wafer 10, the sub-exposure unit 12 is filled with white. When the orthographic projection of the sub-exposure unit 12 on the wafer 10 is located outside the wafer 10 or intersects with the wafer 10, the sub-exposure unit 12 is filled with a shadow. When the orthographic projection of the sub-exposure unit 12 on the wafer 10 is located inside the wafer 10, the sub-exposure unit 12 is determined to be a valid sub-exposure unit. When the orthographic projection of the sub-exposure unit 12 on the wafer 10 is located outside the wafer 10 or intersects with the wafer 10, the sub-exposure unit 12 is determined to be an invalid sub-exposure unit.

[0034] Reference is made to Figure 1 , generally, when the exposure units 11 are arranged in an array on the surface of the wafer 10, there will be exposure units 11 in the same row on the wafer 10, and only a small part of the exposure units 11 at the head and tail are orthographically projected inside the wafer 10, that is, there will be a case where the number of the sub-exposure units 12 in the exposure units 11 that are orthographically projected inside the wafer 10 is small. When the number of the sub-exposure units 12 in the exposure units 11 that are orthographically projected inside the wafer 10 is greater than or equal to a predetermined value, the exposure unit 11 is determined to be a valid exposure unit; when the number of the sub-exposure units 12 in the exposure units 11 that are orthographically projected inside the wafer 10 is less than the predetermined value, the exposure unit 11 is determined to be an invalid exposure unit.

[0035] It can be understood that the predetermined value is an integer greater than or equal to 1 and less than or equal to the total number of the sub-exposure units 12 included in the exposure unit 11. For example, referring to the exposure unit 11 shown in I of Figure 1 , the orthographic projections of all the sub-exposure units 12 in the exposure unit 11 on the wafer 10 are inside the wafer 10, and the exposure unit 11 is a full exposure unit, thus belonging to a valid exposure unit; referring to the exposure unit 11 shown in III of Figure 1 , the orthographic projections of all the sub-exposure units 12 in the exposure unit 11 on the wafer 10 are outside the wafer 10, and the exposure unit 11 is an empty exposure unit, thus belonging to an invalid exposure unit. Referring to the exposure unit 11 shown in II of Figure 1 , the exposure unit 11 includes 9 sub-exposure units 12, and the predetermined value can be 1, 2, 3, 4, 5, 6, 7, 8, or 9, etc. When the predetermined value is set to 1, 2, or 3, Figure 1 , the exposure unit 11 shown in II of Figure 1 is determined to be a valid exposure unit; when the predetermined value is set to 4, 5, 6, 7, 8, or 9, Figure 1 , the exposure unit 11 shown in II of Figure 1 is determined to be an invalid exposure unit.

[0036] In the arrangement of the exposure units 11, the invalid exposure units will cause the exposure efficiency of the exposure unit 11 to decrease, and further cause the number of the exposure times required for the exposure of the entire wafer 10 to increase, thus reducing the efficiency of the manufacturing of the semiconductor structure. When the arrangement position of the exposure units and the position of the wafer change relatively, the number of the chips on the wafer will change accordingly. In order to maximize the production efficiency, the number of the chips on the wafer needs to be maximized, and the number of the exposure units needs to be minimized in the production process.

[0037] According to some embodiments of the present disclosure, an embodiment of the present disclosure provides a method for determining an exposure position, which is at least beneficial to improve the manufacturing efficiency of the semiconductor structure.

[0038] The embodiments of the present disclosure will be described in detail below with reference to the drawings. However, those skilled in the art can understand that, in the embodiments of the present disclosure, many technical details are presented in order to enable the reader to better understand the present disclosure. However, the technical solutions claimed by the present disclosure can be implemented even without these technical details and according to various changes and modifications of the following embodiments.

[0039] Figure 2 A step flow chart of a method for determining an exposure position according to another embodiment of the present disclosure is provided, Figure 3 A partial schematic view of an exposure unit according to another embodiment of the present disclosure is provided, Figure 4 A schematic view of an arrangement of exposure units on a wafer according to another embodiment of the present disclosure is provided, Figure 5 to 8 A schematic view corresponding to each step of a method for determining an initial arrangement position of an exposure unit according to another embodiment of the present disclosure is provided, Figures 9 to 13 A schematic view corresponding to each step of another method for determining an initial arrangement position of an exposure unit according to another embodiment of the present disclosure is provided, Figures 14 to 18 A schematic view corresponding to each step of a method for determining a target arrangement position of an exposure unit according to another embodiment of the present disclosure is provided, Figure 19 A schematic view of a positioning mark in an exposure unit according to another embodiment of the present disclosure is provided. The method for determining an exposure position according to the present embodiment will be described in detail below with reference to the drawings, and specifically as follows:

[0040] Reference is made to Figures 2 to 19 , a method for determining an exposure position, comprising:

[0041] In step S1, the size of the exposure unit is obtained according to the size of the chip. The exposure unit includes at least one sub-exposure unit, and the size of the sub-exposure unit is the same as the size of the chip.

[0042] For the exposure unit 101, reference is made to Figure 3In some embodiments, the length of the exposure unit 101 (indicated by a thick black box) along the first direction H ranges from 0 to 26 mm, for example, the length of the exposure unit 101 along the first direction H can be 1.5 mm, 5.5 mm, 10 mm, 15 mm, 20 mm, 25 mm, 25.5 mm, or 26 mm, etc.; the length of the exposure unit 101 along the second direction V ranges from 0 to 33 mm, for example, the length of the exposure unit 101 along the second direction V can be 1.5 mm, 5.5 mm, 10 mm, 15 mm, 20 mm, 25.8 mm, 30 mm, 30.5 mm, or 33 mm, etc. It can be understood that the size of the exposure unit 101 as the range of the area exposed by the exposure machine at one time, the size of the exposure unit 101 needs to be smaller than the maximum size range that the exposure machine can expose at one time, so that all the chips in the exposure unit can be uniformly exposed, therefore the size of the exposure unit 101 is selected within an appropriate range.

[0043] It should be noted that in the above description, the number of sub-exposure units 111 along the first direction H in the exposure unit 101 is 3, and the number of sub-exposure units 111 along the second direction V is 3, which is used as an example for description, and does not constitute a limitation on the number of sub-exposure units 111 arranged along the first direction H and the second direction V in the exposure unit 101. Figure 3

[0044] In some embodiments, in each exposure unit 101, the number of sub-exposure units arranged along the first direction H is a positive integer less than or equal to 10, for example, 1, 2, 5, 7, 8, or 10, etc.; the number of sub-exposure units 111 arranged along the second direction V is a positive integer less than or equal to 10, for example, 1, 2, 5, 7, 8, or 10, etc.

[0045] It can be understood that the size of the sub-exposure unit 111 in the exposure unit 101 is the same as the size of the chip, then the arrangement position of the sub-exposure unit 111 in the exposure unit 101 corresponds to the arrangement position of the chip, and the number of sub-exposure units 111 in the exposure unit 101 corresponds to the number of chips. During the exposure process of the exposure unit 101, a suitable number of chips can help all the chips in the exposure unit 101 to be in the same exposure condition, thereby improving the accuracy of exposure. For different products, the chips have different functions, and different functions of the chips have different sizes. According to the size of the chip and the size of the exposure unit 101, it can be determined how many chips in one exposure unit 101 of a certain product can be exposed at the same time.

[0046] ​It should be noted that in the present embodiment, the first direction H and the second direction V are perpendicular as an example for illustration; in other embodiments, the first direction H and the second direction V can not be perpendicular.

[0047] In step S2, an initial arrangement position of the exposure unit on the wafer is obtained according to the size of the exposure unit, and the initial arrangement position includes a plurality of exposure units arranged in an array along the first direction and the second direction.

[0048] Specifically, in some embodiments, the arrangement position of the sub-exposure unit 111 on the wafer 100 can be determined first, i.e., the arrangement position of the chip on the wafer 100 is determined, and then the target arrangement position of the exposure unit 101 is determined according to the position of the sub-exposure unit 111; in other embodiments, the target arrangement position of the exposure unit 101 on the wafer 100 can be determined first, and then the arrangement position of the sub-exposure unit 111 is determined according to the target arrangement position to determine the arrangement position of the chip on the wafer 100. The following will be described respectively for the two determination methods of the exposure unit.

[0049] It should be noted that in the following embodiments, the exposure unit 101 is taken as an example for illustration. Figure 4 The sub-exposure units 111 in the exposure unit 101 include effective sub-exposure units 211 (for example, filled with white in the figure) and ineffective sub-exposure units 311 (for example, filled with shadow in the figure), wherein the effective sub-exposure units 211 are determined as the sub-exposure units 111 whose orthographic projection perpendicular to the surface of the wafer 100 is located inside the wafer 100; the ineffective sub-exposure units 311 are determined as the sub-exposure units 111 whose orthographic projection perpendicular to the surface of the wafer 100 is located outside the wafer 100 or intersects with the wafer. When the ratio of the number of the effective sub-exposure units 211 in the exposure unit 101 to the total number of the sub-exposure units 111 in the exposure unit 101 is greater than or equal to a preset value, the exposure unit 101 is determined as an effective exposure unit; when the ratio of the number of the effective sub-exposure units 211 in the exposure unit 101 to the total number of the sub-exposure units 111 in the exposure unit 101 is less than the preset value, the exposure unit 101 is determined as an ineffective exposure unit. In some embodiments, the preset value can be set according to the actual number of the sub-exposure units 111 in the exposure unit 101, for example, continuing to refer to Figure 4 For example, taking the exposure unit 101 with 9 sub-exposure units 111 as an example, the preset value can be 1 / 9, 1 / 3, 4 / 9, 5 / 9 or 2 / 3. Since the number of the sub-exposure units 111 in the exposure unit 101 needs to be set according to the actual situation, the corresponding preset value can be set according to the total number of the sub-exposure units 111 in the exposure unit 101, and the present embodiment does not limit the total number of the sub-exposure units 111 in the exposure unit 101, nor does it make a specific limitation on the preset value.

[0050] In one example, the initial arrangement position of the exposure unit 101 on the wafer 100 is obtained according to the size of the exposure unit 101, including: referring to Figure 5 , the sub-exposure units 111 are arranged in an array along the first direction H and the second direction V; referring to Figure 6 , the number of effective sub-exposure units 211 on the wafer 100 is obtained according to the size of the wafer 100; the sub-initial arrangement position of the sub-exposure units 111 on the wafer 100 is determined according to the number of effective sub-exposure units 211 on the wafer 100; referring to Figure 7 , the initial arrangement position of the exposure unit 101 is obtained according to the sub-initial arrangement position and the size of the exposure unit 101.

[0051] That is, the relative position of the wafer 100 and the sub-exposure units 111 is fixed by moving the position of the wafer 100 to maximize the number of sub-exposure units 111 located inside the wafer 100, since the size of the sub-exposure units 111 is the same as that of the chip, the number of chips arranged on the wafer 100 is maximized. Further, the initial arrangement position and the target arrangement position of the exposure unit 101 are determined based on the sub-initial arrangement position, so that the number of chips on the wafer 100 is maximized and the number of exposure units 101 is minimized.

[0052] In some embodiments, the sub-initial arrangement position of the sub-exposure units 111 on the wafer 100 is determined according to the number of effective sub-exposure units on the wafer 100, which can be achieved by moving the wafer 100 and obtaining the number of effective sub-exposure units on the wafer 100, when the number of effective sub-exposure units reaches the maximum value in the variation interval, the relative position of the wafer 100 and the sub-exposure units 111 is fixed.

[0053] Further, in some embodiments, the initial arrangement position of the exposure unit 101 is obtained according to the sub-initial arrangement position and the size of the exposure unit 101, including: referring to Figure 8 , a plurality of exposure units 101 arranged along the second direction V as a column, moving the column of exposure units 101 along the first direction H and the second direction V based on the sub-initial arrangement position, while obtaining the number of effective exposure units of the column of exposure units 101 on the wafer 100; the initial arrangement position of the exposure unit 101 is determined according to the number of effective exposure units of the column of exposure units 101 on the wafer 100; further, a plurality of exposure units 101 arranged along the first direction H as a row, moving a plurality of rows of exposure units 101 along the first direction H respectively, and obtaining the moving distance of each row of exposure units 101; the target arrangement position of the exposure unit 101 on the wafer 100 is obtained according to the moving distance of each row of exposure units 101.

[0054] That is, the plurality of sub-exposure units 111 arranged along the second direction V are divided into a plurality of exposure units 101, when the number of effective exposure units of a column of exposure units 101 on the wafer 100 reaches the maximum value of the variation range, the position of the exposure units 101 arranged along the second direction V on the wafer 100 can be fixed, and the column of exposure units 101 is further arranged along the first direction H and moved as a whole along the first direction H, when the number of effective exposure units reaches the maximum value of the variation range, to obtain the initial arrangement position of the exposure units 101 as shown in FIG. 1C. Among them, the movement of the exposure units 101 along the first direction H and the second direction V is based on the sub-initial arrangement position, that is, the movement of the exposure units 101 along the first direction H is in units of the length of the sub-exposure units 111 along the first direction H, and the movement along the second direction V is in units of the length of the sub-exposure units 111 along the second direction V, so the movement of the exposure units 101 has no effect on the arrangement position of the sub-exposure units 111 on the wafer 100. Figure 7

[0055] In another example, obtaining the initial arrangement position of the exposure units 101 on the wafer 100 according to the size of the exposure units 101 includes: referring to FIG. 1A, arranging the exposure units 101 along the first direction H and the second direction V; referring to FIG. 1B, obtaining the number of effective exposure units on the wafer 100 according to the size of the wafer 100; determining the initial arrangement position of the exposure units 101 according to the number of effective exposure units of the exposure units 101 on the wafer 100; and further moving a plurality of exposure units 101 arranged along the first direction H as a row, and obtaining the movement distance of each row of exposure units 101; obtaining the target arrangement position of the exposure units 101 on the wafer 100 according to the movement distance of each row of exposure units 101; after obtaining the target arrangement position of the exposure units 101 on the wafer 100, further comprising: referring to FIG. 1C, determining the arrangement position of the sub-exposure units 111 on the wafer 100 according to the target arrangement position. Figure 9 Figure 10 Figure 7

[0056] That is, the initial arrangement position and the target arrangement position of the exposure units 101 are first determined to make the total number of exposure units 101 arranged on the wafer 100 reach the minimum value of the variation range and the number of effective exposure units reach the maximum value of the variation range, and then the arrangement position of the sub-exposure units 111 on the wafer 100 is determined according to the target arrangement position of the exposure units 101. Since the size of the sub-exposure units 111 is the same as that of the chip, the arrangement position of the sub-exposure units 111 corresponds to the arrangement position of the chip on the wafer 100.

[0057] ​​​​Further, in some embodiments, the number of effective exposure units on the wafer 100 is obtained according to the size of the wafer 100, including: referring to Figure 11 a plurality of exposure units 101 arranged along the second direction V as a column, moving the wafer 100 along the first direction H and the second direction V, and simultaneously obtaining the number of effective exposure units of the column of exposure units 101 on the wafer 100 (in the figure, the effective exposure units are filled with white color as an example, and the invalid exposure units are filled with shading as an example); and determining the initial arrangement position of the exposure unit 101 according to the number of effective exposure units of the column of exposure units 101 on the wafer 100, including: determining the initial arrangement position of the exposure unit 101 according to the number of effective exposure units of the column of exposure units 101 on the wafer 100.

[0058] The wafer 100 is moved and the number of effective exposure units of the column of exposure units 101 on the wafer 100 is obtained. When the number of effective exposure units of the column of exposure units 101 on the wafer 100 reaches the maximum value in the change range, the relative position of the exposure unit 101 along the second direction V to the wafer 100 can be fixed. Further, the column of exposure units 101 is arranged along the first direction H and is moved as a whole along the first direction H. When the number of effective exposure units reaches the maximum value in the change range, the initial arrangement position of the exposure unit 101 can be obtained.

[0059] In some embodiments, before obtaining the initial arrangement position of the exposure unit 101 on the wafer 100 according to the size of the exposure unit 101, the coordinate system is established with the center point of the wafer 100 as the origin, the X axis is parallel to the first direction H, and the Y axis is parallel to the second direction V.

[0060] In one example, obtaining the initial arrangement position of the exposure unit 101 on the wafer 100 according to the size of the exposure unit 101 includes: referring to Figure 12 a plurality of exposure units 101 arranged along the second direction V as a column, moving the column of exposure units 101 along the second direction V with one side of the column of exposure units 101 overlapping the Y axis, and moving the column of exposure units 101 along the second direction V, while obtaining the number of effective exposure units of the column of exposure units 101; and determining the initial arrangement position of the exposure unit 101 on the wafer 100 based on the number of effective exposure units of the column of exposure units 101.

[0061] In one example, obtaining the initial arrangement position of the exposure unit 101 on the wafer 100 according to the size of the exposure unit 101 includes: referring to Figure 13, the plurality of exposure units 101 arranged along the second direction V as a column, overlapping the symmetry axis of the column of exposure units 101 extending along the second direction V with the Y-axis, and moving the column of exposure units 101 along the second direction V while obtaining the number of effective exposure units of the column of exposure units 101; and determining the initial arrangement position of the exposure units 101 on the wafer 100 based on the number of effective exposure units of the column of exposure units 101.

[0062] Based on the above method of determining the initial arrangement position of the exposure units 101 on the wafer 100 based on the number of effective exposure units of the exposure units 101, when one side of the column of exposure units 101 along the second direction V overlaps the Y-axis, the number of exposure units 101 arranged along the X-axis on the wafer 100 is even; when the symmetry axis of the column of exposure units 101 extending along the second direction V overlaps the Y-axis, the number of exposure units 101 arranged along the X-axis on the wafer 100 is odd. It can be understood that the wafer 100 is usually circular, but the length of the exposure units 101 along the first direction H and the length along the second direction V can not be equal, so the exposure units 101 can be arranged symmetrically along the Y-axis, or the symmetry axis of the exposure units 101 along the second direction V coincides with the Y-axis, and then the corresponding method of determining the initial arrangement position of the exposure units 101 can be selected according to the different sizes of the exposure units 101.

[0063] In step S3, a plurality of exposure units arranged along the first direction as a row, moving a plurality of rows of exposure units along the first direction respectively, and obtaining the movement distance of each row of exposure units.

[0064] Before obtaining the initial arrangement position of the exposure units 101 on the wafer 100 according to the size of the exposure units 101, after establishing a coordinate system with the center point of the wafer 100 as the origin, the target arrangement position of the exposure units on the wafer 100 is obtained according to the movement distance of each row of exposure units 101, including: Figure 14 obtaining the movement distance of each row of exposure units 101 in the first quadrant and the second quadrant in the coordinate system; and Figure 15 taking the X-axis as the symmetry axis, obtaining the movement distance of each row of exposure units 101 in the third quadrant and the fourth quadrant in the coordinate system; and obtaining the target arrangement position of the exposure units 101 on the wafer 100 based on the movement distance.

[0065] By establishing a coordinate system with the center point of the wafer 100 as the origin, the wafer 100 can be divided into a first quadrant, a second quadrant, a third quadrant and a fourth quadrant, and then the movement distance of the exposure units 101 can be obtained only for the first quadrant and the second quadrant, and the movement distance of the exposure units 101 in the third quadrant and the fourth quadrant can be obtained through symmetry, without repeated operations, improving the efficiency of determining the position of the exposure units 101.

[0066] In some embodiments, while moving each row of exposure units 101 along the first direction H, the number of effective exposure units of each row of exposure units 101 during the moving process is also obtained, and the moving distance of each row of exposure units 101 is obtained according to the number of effective exposure units of each row of exposure units 101 during the moving process. It can be understood that, while moving each row of exposure units 101 along the first direction H, the number of effective exposure units of the row of exposure units 101 is obtained at the same time, so that the number of effective exposure units of the row of exposure units 101 reaches the maximum in the change range, thereby determining the relative position of the row of exposure units 101 and the wafer 100 along the first direction H.

[0067] In some embodiments, referring to Figure 7 and Figure 16 , when the initial arrangement position of the sub-exposure units 111 on the wafer 100 is determined first, and then the initial arrangement position of the exposure units 101 is determined according to the initial arrangement position of the sub-exposure units 111, each row of exposure units 101 is moved along the first direction H, so that the number of effective exposure units of each row of exposure units 101 reaches the maximum in the change range during the moving process along the first direction H, thereby further reducing the total number of exposure units 101. Referring to Figure 7 , the total number of exposure units 101 on the wafer 100 before moving is 16; referring to Figure 16 , the total number of exposure units 101 on the wafer 100 after moving is 14, and the total number of exposure units 101 required by the wafer 100 after moving is reduced. Taking the preset value of 3 / 9 as an example, referring to Figure 7 , the number of effective exposure units 101 on the wafer 100 before moving is 12; referring to Figure 16 , the number of effective exposure units 101 on the wafer 100 after moving is 14, and the number of effective exposure units on the wafer 100 after moving is increased.

[0068] In some embodiments, when the initial arrangement position of the sub-exposure units 111 on the wafer 100 is determined first, and then the arrangement position of the exposure units 101 is determined according to the initial arrangement position of the sub-exposure units 111, in the process of moving each row of exposure units 101 along the first direction H respectively, the length of the sub-exposure units 111 along the first direction H can be taken as the unit length, and the moving distance is a multiple of the unit length. That is, after the exposure units 101 are moved along the first direction H, the exposure units 101 can be arranged staggered along the second direction V, so that the number of effective exposure units on the wafer 100 is the largest and the total number of exposure units 101 is the smallest. Further, the arrangement position of the sub-exposure units 111 is determined according to the target arrangement position of the exposure units 101, that is, corresponding to the arrangement position of the chips on the wafer.

[0069] Further, referring to Figure 18 , when the number of the sub-exposure units 111 of the exposure units 101 along the first direction H is odd, after the two rows of exposure units 101 are moved along the first direction H respectively, one row of exposure units 101 can be arranged staggered along the second direction V with the adjacent row of exposure units 101, at this time, one edge of the sub-exposure units 111 along the second direction V in the exposure units 101 can intersect with one edge of the sub-exposure units 111 along the first direction H in the other row. In some embodiments, referring to Figure 19 , the exposure units 101 are provided with a mark area 102 on the edge extending along the first direction H, the mark area 102 is located at 1 / 2 of the length of the exposure units 101 along the first direction H, and the mark area 102 includes a “T” type or “⊥” type positioning mark. For example, referring to Figure 19 (a), when the bottom edge of one exposure unit 101 coincides with the top edge of two exposure units 101 in the next row, a “⊥” type positioning mark can be arranged at 1 / 2 of the bottom edge of the exposure unit 101. Figure 19In (b) of FIG. 1, when the top edge of an exposure unit 101 coincides with the bottom edge of the two exposure units 101 of the previous row, a positioning mark in the shape of "T" can be arranged at the position of 1 / 2 of the length of the top edge and the bottom edge of the exposure unit 101. It can be understood that when the exposure unit 101 moves one row of exposure units 101 as a unit length of 1 / 2 of the length of the exposure unit 101 in the first direction H, in order to accurately position the movement of the wafer during exposure, a mark area 102 can be arranged on the edge of the exposure unit 101 extending in the first direction H, wherein the positioning mark in the shape of "T" or "⊥" has a right angle, which can facilitate the positioning of the wafer 101 in the first direction H and the second direction V during exposure.

[0070] In some embodiments, the plurality of rows of exposure units are respectively moved in the first direction, and the movement distance of each row of exposure units is obtained, including: taking N rows of exposure units as a moving group, N being a positive integer and being less than the total number of rows of exposure units arranged in the first direction, and moving the moving group in the first direction to obtain the movement distance of each row of exposure units. For example, referring back to Figure 7 , the second row of exposure units 101 and the third row of exposure units 101 in Figure 7 are taken as a moving group to simultaneously move the two rows of exposure units 101 and simultaneously obtain the movement distance of the two rows of exposure units; or, referring back to Figure 10 , the second row of exposure units 101 and the third row of exposure units 101 in Figure 10 are taken as a moving group to simultaneously move the two rows of exposure units 101 and simultaneously obtain the movement distance of the two rows of exposure units. In this way, the plurality of rows of exposure units 101 are simultaneously moved as a moving group, which can improve the efficiency of determining the target arrangement position of the exposure units 101 when the size of the exposure units 101 is small and the number of exposure units 101 is large.

[0071] In step S4, the target arrangement position of the exposure units on the wafer is obtained according to the movement distance of each row of exposure units, and the number of effective exposure units in the target arrangement position is less than the number of effective exposure units in the initial arrangement position. By respectively moving each row of exposure units in the first direction, the number of exposure units in the first direction can be further reduced on the basis of the initial arrangement position, and the number of effective exposure units can be increased. For example, referring back to Figure 7 and Figure 16 , Figure 7 is the initial arrangement position, Figure 16 is the target arrangement position, and after moving Figure 16 , the total number of exposure units required by the wafer in Figure 7 is reduced by 2, and Figure 16 , the number of effective exposure units in Figure 7 is increased by 2; or, referring back toFigure 10 and Figure 17 , Figure 10 is an initial arrangement position, Figure 17 is a target arrangement position after moving Figure 17 The total number of exposure units required in the wafer in the first embodiment is compared with Figure 10 The total number of exposure units required in the wafer in the second embodiment is unchanged, but Figure 17 The number of effective exposure units in the second embodiment is increased by 2 compared with Figure 10 The number of effective exposure units in the second embodiment is increased by 2 compared with This enables the target arrangement position to expose all the chips on the wafer using the least number of exposure units, and enables the maximum number of chips to be arranged on the wafer.

[0072] Research shows that the larger or smaller the preset value is set, the easier it is to determine the target arrangement position. Among them, the larger the preset value is set, the smaller the preset value can increase the total number of effective sub-exposure units 211, that is, increase the total number of chips.

[0073] The exposure position determination method provided by the embodiments of the present disclosure acquires the size of the exposure unit according to the size of the chip, wherein the size of the sub-exposure unit in the exposure unit corresponds to the size of the chip, and the arrangement position of the chip can be determined through the arrangement position of the sub-exposure unit; then the initial arrangement position of the exposure unit arrayed in the first direction and the second direction on the wafer is acquired according to the size of the exposure unit, and then each row of exposure units is moved in the first direction, so that the number of effective exposure units of the row of exposure units is increased and the total number of exposure units is reduced; finally, the target arrangement position of the exposure unit is obtained according to the moving distance of each row of exposure units, so that the maximum number of chips can be arranged on the wafer and the minimum number of exposure units can be arranged, thereby reducing the number of exposures required in the semiconductor structure manufacturing process, reducing the exposure cost, and improving the manufacturing benefit of the semiconductor structure.

[0074] Those skilled in the art can understand that the above-mentioned embodiments are specific embodiments for implementing the present disclosure, and in actual application, various changes can be made in form and detail without departing from the spirit and scope of the present disclosure.

Claims

1. A method for determining the exposure position, characterized in that, include: The size of the exposure unit is obtained based on the size of the chip, and the exposure unit includes at least one sub-exposure unit, the size of which is the same as the size of the chip. The initial arrangement position of the exposure unit on the wafer is obtained according to the size of the exposure unit, and the initial arrangement position includes a plurality of exposure units arranged in an array along a first direction and a second direction; The multiple exposure units arranged along the first direction are taken as a row, and the multiple rows of exposure units are moved along the first direction respectively, and the moving distance of each row of exposure units is obtained. Based on the moving distance of each row of exposure units, the target arrangement position of the exposure units on the wafer is obtained. The number of effective exposure units in the target arrangement position is less than the number of effective exposure units in the initial arrangement position. The effective exposure unit is determined to be the ratio of the number of effective sub-exposure units in the exposure unit to the total number of sub-exposure units in the exposure unit is greater than or equal to a preset value. The effective sub-exposure unit is determined to be the sub-exposure unit whose orthographic projection perpendicular to the wafer surface is located inside the wafer.

2. The method for determining the exposure position according to claim 1, characterized in that, While moving the multiple rows of exposure units along the first direction, the number of effective exposure units in each row during the movement is also obtained, and the movement distance of each row of exposure units is obtained based on the number of effective exposure units in each row during the movement.

3. The method for determining the exposure position according to claim 1, characterized in that, Obtaining the initial arrangement position of the exposure units on the wafer based on the size of the exposure units includes: The sub-exposure units are arranged in an array along the first direction and the second direction; The number of effective sub-exposure units on the wafer is obtained based on the wafer size; The initial sub-arrangement position of the sub-exposure units on the wafer is determined based on the number of effective sub-exposure units on the wafer; The initial arrangement position of the exposure unit is obtained based on the initial arrangement position of the sub-unit and the size of the exposure unit.

4. The method for determining the exposure position according to claim 3, characterized in that, The initial arrangement position of the exposure unit is obtained based on the initial sub-arrangement position and the size of the exposure unit, including: Using a plurality of exposure units arranged along the second direction as a column, the column of exposure units is moved along the first direction and the second direction based on the sub-initial arrangement position, while obtaining the effective number of exposure units of the column of exposure units on the wafer; The initial arrangement position of the exposure units is determined based on the number of effective exposure units on the wafer in a column of the exposure units.

5. The method for determining the exposure position according to claim 3 or 4, characterized in that, Moving the multiple rows of exposure units along the first direction includes: moving one row of exposure units with the length of the sub-exposure unit along the first direction as a unit length, wherein the moving distance is a multiple of the unit length.

6. The method for determining the exposure position according to claim 1, characterized in that, Obtaining the initial arrangement position of the exposure units on the wafer based on the size of the exposure units includes: The exposure units are arranged in an array along the first direction and the second direction; The number of effective exposure units on the wafer is obtained based on the wafer size; The initial arrangement position of the exposure units is determined based on the number of effective exposure units on the wafer. After obtaining the target arrangement position of the exposure unit on the wafer, the method further includes: determining the arrangement position of the sub-exposure unit on the wafer based on the target arrangement position.

7. The method for determining the exposure position according to claim 6, characterized in that, Based on the wafer size, the number of effective exposure units on the wafer is obtained, including: Using a plurality of exposure units arranged along the second direction as a column, the wafer is moved along the first direction and the second direction, while simultaneously obtaining the number of effective exposure units on the wafer for a column of exposure units; Determining the initial arrangement position of the exposure units based on the number of effective exposure units on the wafer includes: determining the initial arrangement position of the exposure units based on the number of effective exposure units in a column of the exposure units on the wafer.

8. The method for determining the exposure position according to claim 6 or 7, characterized in that, Moving the multiple rows of exposure units along the first direction includes: moving one row of exposure units with a unit length of 1 / 2 of the length of the exposure unit along the first direction, wherein the moving distance is a multiple of the unit length.

9. The method for determining the exposure position according to claim 8, characterized in that, The exposure unit has a marking area on its edge extending along the first direction. The marking area is located at 1 / 2 of the length of the exposure unit in the first direction, and the marking area includes a "T"-shaped or "⊥"-shaped positioning mark.

10. The method for determining the exposure position according to claim 1, characterized in that, In each of the exposure units, the number of chips arranged along the first direction is a positive integer less than or equal to 10, and the number of chips arranged along the second direction is a positive integer less than or equal to 10.

11. The method for determining the exposure position according to claim 1, characterized in that, The length of the exposure unit along the first direction ranges from 0 to 26 mm, and the length of the exposure unit along the second direction ranges from 0 to 33 mm.

12. The method for determining the exposure position according to claim 1, characterized in that, Before obtaining the initial arrangement position of the exposure unit on the wafer based on the size of the exposure unit, the method further includes: establishing a coordinate system with the center point of the wafer as the origin, the X-axis being parallel to the first direction and the Y-axis being parallel to the second direction; Based on the moving distance of each row of exposure units, the target arrangement position of the exposure units on the wafer is obtained, including: Obtain the moving distance of each row of the exposure units in the first and second quadrants of the coordinate system; Using the X-axis as the axis of symmetry, the moving distance of each row of the exposure units in the third and fourth quadrants of the coordinate system is obtained; Based on the moving distance, the target arrangement position of the exposure unit on the wafer is obtained.

13. The method for determining the exposure position according to claim 12, characterized in that, Obtaining the initial arrangement position of the exposure units on the wafer based on the size of the exposure units includes: Taking the multiple exposure units arranged along the second direction as a column, one side of the column of exposure units is overlapped with the Y-axis along the second direction, and the column of exposure units is moved along the second direction, while obtaining the number of effective exposure units of the column of exposure units. Based on the number of effective exposure units in the column of exposure units, the initial arrangement position of the exposure units on the wafer is determined.

14. The method for determining the exposure position according to claim 12, characterized in that, Obtaining the initial arrangement position of the exposure units on the wafer based on the size of the exposure units includes: Taking the multiple exposure units arranged along the second direction as a column, the axis of symmetry of the column of exposure units extending along the second direction is overlapped with the Y-axis, and the column of exposure units is moved along the second direction, while obtaining the number of effective exposure units of the column of exposure units. Based on the number of effective exposure units in the column of exposure units, the initial arrangement position of the exposure units on the wafer is determined.

15. The method for determining the exposure position according to claim 1, characterized in that, Moving multiple rows of exposure units along the first direction and obtaining the moving distance of each row of exposure units includes: taking N rows of exposure units as a moving group, where N is a positive integer and less than the total number of rows of exposure units arranged in the first direction, and moving the moving group along the first direction to obtain the moving distance of each row of exposure units.

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