A driving circuit of a power switch tube and an electronic device

Abstract

The present disclosure relates to a driving circuit of a power switch tube and an electronic device. The driving circuit comprises: a mirror current source configured to generate and output a charging current to a second terminal of a capacitor circuit according to a preset reference current, so as to increase a voltage drop of the capacitor circuit when the voltage drop is less than or equal to a first preset target value; and an overvoltage regulation circuit configured to output a discharge current to a first terminal of the capacitor circuit, so as to decrease the voltage drop of the capacitor circuit when the voltage drop is greater than or equal to the first preset target value. The driving circuit of the power switch tube provided by the present disclosure can further improve the reliability of the power switch tube.

Description

Technical Field

[0001] This disclosure relates to the field of power semiconductor devices, and more particularly to a driving circuit and electronic device for a power switch. Background Technology

[0002] See Figure 1 As shown, existing power switch driver devices typically include a driver circuit 1, a capacitor Cn, and a current-limiting resistor Rg. During normal operation, to maintain the voltage drop across capacitor Cn at a preset voltage drop, the driver circuit 1 outputs a charging current Icp to charge capacitor Cn, compensating for voltage loss due to charge leakage. When the voltage drop across capacitor Cn is greater than or equal to the preset voltage drop, a discharge current is output to release excess positive charge from capacitor Cn, thereby stabilizing the voltage drop across capacitor Cn at the preset voltage drop. When capacitor Cn is in a stable state, i.e., when the voltage drop across capacitor Cn no longer changes, the magnitude of the charging current output by the driver circuit 1 is equal to the magnitude of the discharge current.

[0003] In the actual operation of existing power switch driver devices, the charging current output by the driver circuit will vary significantly. Specifically, when the output terminal of the driver circuit (or the OUT terminal of the driver chip if the driver circuit is a driver chip) outputs a high level, the charging current output by the driver circuit will increase; conversely, when the output terminal of the driver circuit outputs a low level, the charging current output by the driver circuit will decrease. As mentioned earlier, in... Figure 1 When the capacitor Cn is in a stable state, the discharge current output by the drive circuit will fluctuate significantly with the change of the charging current Icp. However, when there are large fluctuations in the discharge current, the drive circuit's ability to regulate the voltage drop across capacitor Cn will decrease, resulting in large changes in the voltage across capacitor Cn and negatively impacting the reliability of the power switch.

[0004] In view of this, the present disclosure provides a driving circuit for a power switch transistor to solve the problem that the power switch transistor driving device in the prior art has a negative impact on the reliability of the power switch transistor. Summary of the Invention

[0005] This disclosure provides a driving circuit for a power switching transistor. The driving circuit is connected to a first terminal of a capacitor circuit, a second terminal of the capacitor circuit, and a first terminal of a current-limiting resistor. The first electrode of the power switching transistor is grounded, and its second electrode is connected to the second terminal of the current-limiting resistor. The driving circuit includes: a current mirror source, the first terminal of which is connected to the second terminal of the capacitor circuit, and the second terminal of which is used to receive a preset reference current. When the voltage drop of the capacitor circuit is less than or equal to a first preset target value, the source generates and outputs a charging current to the second terminal of the capacitor circuit based on the preset reference current to increase the voltage drop. An overvoltage regulation circuit, the first terminal of which is connected to the first terminal of the capacitor circuit, and the second terminal of which is connected to the first terminal of the current mirror source and the second terminal of the capacitor circuit, is used to output a discharge current to the first terminal of the capacitor circuit to reduce the voltage drop when the voltage drop of the capacitor circuit is greater than or equal to the first preset target value.

[0006] In one possible implementation, the driving circuit includes: a pre-charging circuit connected to a first terminal of the capacitor circuit, used to charge the capacitor circuit when the driving circuit is powered on, until the voltage drop of the capacitor circuit is equal to a second preset target value; wherein the second preset target value is less than or equal to the first preset target value; and a first switching circuit, the first terminal of which is connected to a second terminal of the capacitor circuit and the second terminal of which is grounded, used to turn on when the pre-charging circuit charges the capacitor circuit.

[0007] In one possible implementation, when the voltage drop of the capacitor circuit remains constant, the magnitude of the discharge current output by the overvoltage regulation circuit is equal to the magnitude of the charging current output by the mirror current source.

[0008] In one possible implementation, the mirror current source includes: a first field-effect transistor whose drain is used to receive the preset reference current and is connected to its gate, and whose source is connected to a negative charge pump; a second field-effect transistor whose drain is connected to the second terminal of the capacitor circuit, whose gate is connected to the gate of the first field-effect transistor, and whose source is connected to the negative charge pump; and a negative charge pump connected to the source of the first field-effect transistor and the source of the second field-effect transistor.

[0009] In one possible implementation, the mirrored current source includes: a third field-effect transistor whose drain is used to receive the preset reference current and connected to its gate, and whose source is connected to a negative charge pump; a fourth field-effect transistor whose drain is connected to the second terminal of the capacitor circuit, whose gate is grounded, and whose source is connected to the drain of a fifth field-effect transistor; a fifth field-effect transistor whose drain is connected to the source of the fourth field-effect transistor, whose gate is connected to the gate of the third field-effect transistor, and whose source is connected to the negative charge pump; and a negative charge pump connected to the sources of the third and fifth field-effect transistors.

[0010] In one possible implementation, the mirrored current source includes a current mirror.

[0011] In one possible implementation, the power switch includes a field-effect transistor, the first electrode of the power switch is the source of the field-effect transistor, and the second electrode of the power switch is the gate of the field-effect transistor.

[0012] According to another aspect of this disclosure, an electronic device is provided, the electronic device comprising: a driving circuit for the power switching transistor described above.

[0013] In one possible implementation, the electronic device further includes: a capacitor circuit, the first and second ends of which are both connected to the driving circuit; a current-limiting resistor, the first end of which is connected to the driving circuit and the second end of the capacitor circuit, and the second end of which is connected to the second electrode of the power switch; and a power switch, the first electrode of which is grounded, and the second electrode of which is connected to the second end of the current-limiting resistor.

[0014] In one possible implementation, the driving circuit is configured to receive a pulse signal; the pulse signal includes a disconnect signal for controlling the power switch to turn off and a turn-on signal for controlling the power switch to turn on; the driving circuit is configured to connect the preset reference voltage source to the first terminal of the capacitor circuit when the received pulse signal is a turn-on signal; and connect the first terminal of the capacitor circuit to the ground wire when the received pulse signal is a disconnect signal.

[0015] The power switch driving circuit disclosed herein can charge the capacitor circuit by outputting a charging current through a mirror current source, thereby fixing the magnitude of the charging current and the discharge current at a specified current level, reducing the fluctuation of the charging current and the discharge current, thereby reducing the fluctuation of the voltage regulated by the overvoltage regulation circuit, keeping the voltage drop of the capacitor circuit at a fixed value, and thus improving the reliability of the power switch.

[0016] Other features and aspects of this disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0017] The accompanying drawings, which are included in and form part of this specification, illustrate exemplary embodiments, features, and aspects of this disclosure together with the specification and serve to explain the principles of this disclosure.

[0018] Figure 1 This is a schematic diagram of the structure of a power switch drive device in the prior art.

[0019] Figure 2 A schematic diagram of the drive circuit for the power switch provided in an embodiment of this disclosure.

[0020] Figure 3 A schematic diagram of the drive circuit for the power switch provided in an embodiment of this disclosure.

[0021] Figure 4 A schematic diagram of the drive circuit for the power switch provided in an embodiment of this disclosure. Detailed Implementation

[0022] Various exemplary embodiments, features, and aspects of this disclosure will now be described in detail with reference to the accompanying drawings. The same reference numerals in the drawings denote elements that have the same or similar functions. Although various aspects of the embodiments are shown in the drawings, they are not necessarily drawn to scale unless specifically indicated otherwise.

[0023] The term “exemplary” as used herein means “serving as an example, embodiment, or illustration.” Any embodiment illustrated herein as “exemplary” is not necessarily to be construed as superior to or better than other embodiments.

[0024] Furthermore, to better illustrate this disclosure, numerous specific details are set forth in the following detailed description. Those skilled in the art will understand that this disclosure can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art have not been described in detail in order to highlight the main points of this disclosure.

[0025] See Figure 1As shown, existing power switch driving devices typically include a driving circuit 1, a capacitor Cn, and a current-limiting resistor Rg. Here, Q is a field-effect transistor, equivalent to the power switch mentioned above. The driving circuit 1 typically includes a charge pump 11, a negative voltage regulator 12, and a pre-charge circuit 13. When the driving circuit 1 is powered on, the pre-charge circuit 13 inside the driving circuit 1 rapidly charges the capacitor Cn, making the voltage drop of the capacitor Cn equal to a preset pre-charge value (e.g., 2V). After this, the driving circuit 1 enters normal operation, and the pre-charge circuit 13 is turned off. When the drive circuit 1 is in normal operation, in order to maintain the voltage drop of capacitor Cn at a preset voltage drop (e.g., 3V), the charge pump 11 in the drive circuit 1 needs to output a charging current Icp to charge capacitor Cn, compensating for the voltage loss caused by charge leakage on capacitor Cn. When the voltage drop of capacitor Cn is greater than or equal to the preset voltage drop, the negative voltage regulator 12 in the drive circuit 1 outputs a discharge current to release excess positive charge from capacitor Cn, stabilizing the voltage drop of capacitor Cn at the preset voltage drop. When capacitor Cn is in a stable state, that is, when the voltage drop of capacitor Cn no longer changes, the magnitude of the charging current Icp output by the charge pump 11 is equal to the magnitude of the discharge current output by the negative voltage regulator 12. In existing power switch drive devices, the charging current Icp output by the charge pump 11 will vary significantly. That is, when the output terminal of the drive circuit 1 outputs a high level, the charging current Icp output by the charge pump 11 will increase, and when the output terminal of the drive circuit 1 outputs a low level, the charging current Icp output by the charge pump 11 will decrease. As mentioned earlier, when capacitor Cn is in a stable state, the discharge current output by the negative voltage regulator 12 will fluctuate significantly with the change in the charging current output by the charge pump 11. However, when the discharge current fluctuates significantly, the voltage regulated by the negative voltage regulator 12 will also fluctuate, resulting in a large change in the voltage across capacitor Cn. This leads to a large change in the gate voltage of the power switch, which in turn negatively impacts the reliability of the power switch.

[0026] In view of this, see Figure 2 As shown, this disclosure provides a driving circuit for a power switch transistor, which can charge a capacitor circuit by outputting a charging current through a mirror current source, thereby fixing the magnitude of the charging current and the discharge current at a specified current level, reducing the fluctuation of the charging current and the discharge current, thereby reducing the fluctuation of the voltage regulated by the overvoltage regulation circuit, keeping the voltage drop of the capacitor circuit at a fixed value, and thus improving the reliability of the power switch transistor.

[0027] See Figures 2 to 3As shown, this disclosure provides a driving circuit for a power switching transistor. The driving circuit 1 is connected to the first terminal of the capacitor circuit 2, the second terminal of the capacitor circuit 2, and the first terminal of the current-limiting resistor Rg. The first electrode of the power switching transistor is grounded, and its second electrode is connected to the second terminal of the current-limiting resistor Rg.

[0028] For example, the drive circuit 1 includes a mirror current source 14 and an overvoltage regulation circuit 15.

[0029] For example, the first terminal of the mirror current source 14 is connected to the second terminal of the capacitor circuit 2, and the second terminal is used to receive a preset reference current. The first terminal of the overvoltage regulation circuit 15 is connected to the first terminal of the capacitor circuit 2, and the second terminal is connected to the first terminal of the mirror current source 14 and the second terminal of the capacitor circuit 2.

[0030] For example, capacitor circuit 2 may include the capacitor Cn mentioned above.

[0031] For example, the mirror current source 14 is used to generate and output a charging current to the second terminal of the capacitor circuit according to a preset reference current when the voltage drop of the capacitor circuit 2 is less than or equal to a first preset target value (equivalent to the preset voltage drop mentioned above), thereby increasing the voltage drop. For example, taking the first preset target value as 3V as an example, when the voltage drop of the capacitor circuit is equal to 2.5V, the mirror current source 14 outputs a charging current to the second terminal of the capacitor circuit 2. The direction of this charging current is from the second terminal of the capacitor circuit 2 to the first terminal of the mirror current source 14, that is, the direction of movement of negative charge in the charging current is from the first terminal of the mirror current source 14 to the second terminal of the capacitor circuit 2. It can be seen that this charging current can increase the negative charge at the second terminal of the capacitor circuit 2, thereby increasing the voltage difference across the capacitor circuit 2, that is, increasing the voltage drop of the capacitor circuit 2, thereby achieving the purpose of increasing the voltage drop of the capacitor circuit 2 to the first preset target value of 3V. The preset reference current can be obtained by connecting the second terminal of the mirror current source 14 to the preset reference current source 16. The direction of the preset reference current is from the preset reference current source 16 to the second end of the mirror current source 14. This disclosure does not limit the specific implementation of the preset reference current source 16.

[0032] For example, the overvoltage regulation circuit 15 is used to output a discharge current to the first terminal of the capacitor circuit 2 when the voltage drop of the capacitor circuit 2 is greater than or equal to a first preset target value, thereby reducing the voltage drop. For example, taking the first preset target value as 3V, the overvoltage regulation circuit 15 can determine the voltage drop of the capacitor circuit 2 by acquiring the voltages at the first and second terminals of the capacitor circuit 2, thus achieving the purpose of monitoring the magnitude of the voltage drop of the capacitor circuit 2. When the overvoltage regulation circuit 15 detects that the voltage drop of the capacitor circuit 2 is greater than or equal to 3V, the overvoltage regulation circuit 15 outputs a discharge current to the first terminal of the capacitor circuit 2. The direction of this discharge current is from the first terminal of the capacitor circuit 2 to the first terminal of the overvoltage regulation circuit 15, that is, the direction of movement of negative charge in the discharge current is from the first terminal of the overvoltage regulation circuit 15 to the first terminal of the capacitor circuit 2. It can be seen that this discharge current can reduce the positive charge at the first terminal of the capacitor circuit 2, reduce the voltage difference across the capacitor circuit 2, that is, reduce the voltage drop of the capacitor circuit 2. When the voltage drop of capacitor circuit 2 is equal to the first preset target value, the voltage drop of capacitor circuit 2 can be fixed at the first preset target value of 3V by making the magnitude of the discharge current output by overvoltage regulation circuit 15 equal to the magnitude of the charging current output by mirror current source 14. The specific structure of overvoltage regulation circuit 15 is not limited in this application.

[0033] For example, see Figure 3 As shown, the power switch 3 may include the field-effect transistor Q mentioned above. The first electrode of the power switch 3 may be the source of the field-effect transistor Q, and the second electrode of the power switch 3 may be the gate of the field-effect transistor Q. This disclosure does not limit the specific implementation of the power switch 3, which may include a field-effect transistor or a bipolar transistor.

[0034] In one possible implementation, when the voltage drop of capacitor circuit 2 remains constant, the magnitude of the discharge current output by overvoltage regulation circuit 15 is equal to the magnitude of the charging current output by mirror current source 14. For example, when the voltage drop of capacitor circuit 2 is less than a first preset target value, mirror current source 14 can output a charging current I1 (current magnitude, for example, 1A) to charge capacitor circuit 2. When mirror current source 14 charges the voltage drop of capacitor circuit 2 to the first preset target value, overvoltage regulation circuit 15 outputs a discharge current I2 (current magnitude, for example, 1A). Since the magnitude of discharge current I2 is equal to the magnitude of charging current I1, the amount of charge released by discharge current I2 in capacitor circuit 2 is equal to the amount of charge replenished by charging current I1 in capacitor circuit 2. In other words, discharge current I2 is used to offset the amount of charging by charging current I1 in capacitor circuit 2, thereby stabilizing the voltage drop of capacitor circuit 2 at the first preset target value. The implementation of overvoltage regulation circuit 15 can be found in related technologies.

[0035] In one possible implementation, see further. Figure 3 As shown, in order to reduce the circuit complexity and cost of the current mirror 14, the current mirror 14 may include: a first field-effect transistor M0, a second field-effect transistor M1, and a negative charge pump 141.

[0036] For example, the drain of the first field-effect transistor M0 is used to receive a preset reference current and is connected to its gate, while its source is connected to the negative charge pump 141. The drain of the second field-effect transistor M1 is connected to the second terminal of the capacitor circuit 2, its gate is connected to the gate of the first field-effect transistor M0, and its source is connected to the negative charge pump 141. The negative charge pump 141 is connected to the source of both the first and second field-effect transistors M0 and M1. The drain of the first field-effect transistor can be connected to a preset reference current source to obtain a preset reference current. The specific operation of the first and second field-effect transistors M0 and M1 can be found in the operation of a mirror current source circuit in related technologies. The negative charge pump 141 can output a voltage of -3.5V to the sources of both the first and second field-effect transistors M0 and M1. The specific value of the voltage output by the negative charge pump 141 can be determined according to actual conditions, and this disclosure does not limit it.

[0037] For example, the magnitude of the charging current output by the mirror current source 14 is equal to K1*Iref. Wherein, K1 is the ratio of the width-to-length ratio of the second field-effect transistor M1 to the width-to-length ratio of the first field-effect transistor M0, and Iref is the magnitude of the preset reference current.

[0038] In one possible implementation, when the received pulse signal is a turn-on signal for controlling the power switch 3 to turn on, the drive circuit 1 connects the preset reference voltage source 4 and the first terminal of the capacitor circuit 2, making the voltage at the second terminal of the capacitor circuit 2 equal to the difference between the preset reference voltage source 4 and the voltage drop of the capacitor circuit 2. Therefore, to ensure the normal operation of the mirror current source 14, see [reference]. Figure 4 As shown, the mirror current source 14 may include: a third field-effect transistor M3, a fourth field-effect transistor M4, and a fifth field-effect transistor M5.

[0039] For example, the drain of the third field-effect transistor M3 is used to receive a preset reference current and is connected to its gate, while its source is connected to the negative charge pump 141. The drain of the fourth field-effect transistor M4 is connected to the second terminal of the capacitor circuit 2, its gate is grounded, and its source is connected to the drain of the fifth field-effect transistor M5. The drain of the fifth field-effect transistor M5 is connected to the source of the fourth field-effect transistor M4, its gate is connected to the gate of the third field-effect transistor M3, and its source is connected to the negative charge pump 141. The negative charge pump 141 is connected to the source of both the third field-effect transistor M3 and the source of the fifth field-effect transistor M5. The drain of the third field-effect transistor M3 can be connected to a preset reference current source 16 to obtain a preset reference current. The specific operating processes of the aforementioned third field-effect transistor M3, fourth field-effect transistor M4, and fifth field-effect transistor M5 can be found in the operating process of the mirror current source circuit in related technologies. The negative voltage charge pump 141 can be used to output a voltage of -3.5V to the source of the third field-effect transistor M3 and the source of the fifth field-effect transistor M5. The specific value of the voltage output by the negative voltage charge pump 141 can be determined according to the actual situation, and this disclosure does not limit it.

[0040] For example, the charging current output by the mirror current source 14 is equal to K2 * Iref. Here, K2 is the ratio of the width-to-length ratio of the fifth field-effect transistor M5 to the width-to-length ratio of the third field-effect transistor M3, and Iref is the magnitude of the preset reference current. The aforementioned fourth field-effect transistor M4 is a high-voltage resistant field-effect transistor.

[0041] The power switching transistor driving circuit disclosed herein has an internal mirror current source that can connect the source of the fifth field-effect transistor to the second terminal of the capacitor circuit through a high-voltage fourth field-effect transistor, and connect the gate of the fourth field-effect transistor to GND (i.e., ground), thereby limiting the voltage of the source of the fourth field-effect transistor to GND, and thus limiting the voltage of the drain of the fifth field-effect transistor to a potential not exceeding GND, thereby achieving the purpose of protecting the mirror current source so that it can work normally.

[0042] In one possible implementation, the mirror current source 14 includes a current mirror.

[0043] For example, to improve the accuracy of the output current of the mirror current source and the output impedance of the mirror current source, the mirror current source 14 may further include a Wilson current mirror. This disclosure does not limit the specific implementation of the mirror current source 14, as long as it can ensure that the fluctuation range of the charging current output by the drive circuit 1 is within the expected range.

[0044] In one possible implementation, see [reference] Figure 3 As shown, the driving circuit 1 includes a pre-charging circuit 13 and a first switching circuit 17.

[0045] For example, the pre-charge circuit 13 is connected to the first terminal of the capacitor circuit 2. The first terminal of the first switch circuit 17 is connected to the second terminal of the capacitor circuit, and the second terminal is grounded.

[0046] For example, the pre-charge circuit 13 is used to charge the capacitor circuit 2 when the drive circuit 1 is powered on, until the voltage drop of the capacitor circuit 2 is equal to a second preset target value (equivalent to the preset pre-charge value mentioned above). The second preset target value is less than or equal to the first preset target value. The first switching circuit 17 is used to turn on when the pre-charge circuit is charging the capacitor circuit. For example, when the drive circuit 1 is powered on, the pre-charge circuit 13 outputs a preset charging current to the first terminal of the capacitor circuit 2. At this time, to ensure that the voltage at the second terminal of the capacitor circuit 2 does not turn on the power switch 3 during the charging process by the pre-charge circuit 13, the first switching circuit 17 is turned on, grounding the second terminal of the capacitor circuit 2, thereby ensuring that the voltage at the second electrode of the power switch 3 cannot reach the voltage required for it to turn on, thus preventing the power switch 3 from being turned on. When the voltage drop of capacitor circuit 2 is equal to the second preset target value (e.g., 2V), the pre-charging circuit 13 stops outputting the preset charging current to the first terminal of capacitor circuit 2. At the same time, the first switching circuit 17 is in the open state, which disconnects the connection between the second terminal of capacitor circuit 2 and the ground wire.

[0047] For example, the magnitude of the preset charging current can be determined according to the actual situation, and this disclosure does not limit it.

[0048] For example, Figure 3 The location of the first switching circuit 17 shown is merely illustrative and is not intended to limit this disclosure. This disclosure does not limit the specific implementation of the first switching circuit 17.

[0049] According to another aspect of this disclosure, an electronic device is also provided, characterized in that the electronic device includes: a driving circuit for the power switching transistor described above.

[0050] In one possible implementation, the electronic device further includes a capacitor circuit, a current-limiting resistor, and a power switch.

[0051] For example, both the first and second ends of the capacitor circuit are connected to the driving circuit.

[0052] For example, the first end of the current-limiting resistor is connected to the second end of the driving circuit and the capacitor circuit, and its second end is connected to the second electrode of the power switch.

[0053] For example, the first electrode of the power switch is grounded, and its second electrode is connected to the second terminal of the current-limiting resistor. The third electrode of the power switch may be connected to the load circuit 5 or to other circuits; this disclosure is not limited in this regard.

[0054] In one possible implementation, see [reference] Figure 3 As shown, the drive circuit 1 is also used to receive pulse signals. These pulse signals include a disconnect signal for controlling the power switch 3 to turn off and a turn-on signal for controlling the power switch 3 to turn on.

[0055] For example, the driving circuit 1 is used to connect the preset reference voltage source 4 and the first terminal of the capacitor circuit 2 when the received pulse signal is an on signal (equivalent to the driving circuit outputting a high level as mentioned above), and to connect the first terminal of the capacitor circuit 2 and the ground line when the received pulse signal is an off signal (equivalent to the driving circuit outputting a low level as mentioned above). For example: see Figure 3 As shown, taking a preset reference voltage source 4 with a voltage of 20V and a voltage drop of 3V in capacitor circuit 2 as an example, when the driving circuit 1 receives a pulse signal indicating conduction, the driving circuit 1 causes the second switching circuit 18 to connect the preset reference voltage source 4 to the first terminal of capacitor circuit 2, and causes the third switching circuit 19 to disconnect the ground wire from the first terminal of capacitor circuit 2. At this time, the voltage at the first terminal of capacitor circuit 2 is 20V. Since the voltage drop of capacitor circuit 2 is 3V, the voltage at the second terminal of capacitor circuit 2 (i.e., the first terminal of current-limiting resistor Rg) is 17V, thereby making the voltage at the second electrode of power switch 3 equal to or higher than the voltage at which it can conduct, thus turning on power switch 3. Conversely, when the driving circuit 1 receives a pulse signal indicating deactivation, the driving circuit 1 causes the third switching circuit 19 to connect the ground wire to the first terminal of capacitor circuit 2, and causes the second switching circuit 18 to disconnect the preset reference voltage source 4 from the first terminal of capacitor circuit 2, making the voltage at the first terminal of capacitor circuit 2 equal to 0V. Since the voltage drop of capacitor circuit 2 is equal to 3V, the voltage at the second terminal of capacitor circuit 2 (that is, the first terminal of current limiting resistor Rg) is equal to -3V, which makes the voltage at the second electrode of power switch 3 negative. In other words, the voltage at the second electrode of power switch 3 is equal to or lower than the voltage at which it can be turned off, thereby turning off power switch 3.

[0056] For example, the specific value of the voltage of the aforementioned preset reference voltage source 4 can be determined according to the actual situation, and this disclosure does not limit it here.

[0057] For example, Figure 3The connection relationships between the preset reference voltage source 4, the preset reference current source 16, and the internal circuits, modules, and electronic components of the drive circuit 1 shown are merely illustrative and are not intended to limit this disclosure. This disclosure does not limit the implementation of the second switching circuit 18 and the third switching circuit 19.

[0058] The various embodiments of this disclosure have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or technical improvements to the embodiments in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A driving circuit for a power switching transistor, characterized in that, The driving circuit is connected to the first terminal of the capacitor circuit, and the second terminal of the capacitor circuit is connected to the first terminal of the current limiting resistor; the first electrode of the power switch is grounded, and its second electrode is connected to the second terminal of the current limiting resistor. The driving circuit includes: A mirror current source has its first end connected to the second end of the capacitor circuit. Its second end is used to receive a preset reference current. When the voltage drop of the capacitor circuit is less than or equal to a first preset target value, it generates and outputs a charging current to the second end of the capacitor circuit according to the preset reference current to increase the voltage drop. An overvoltage regulation circuit, with its first terminal connected to the first terminal of the capacitor circuit and its second terminal connected to the first terminal of the mirror current source and the second terminal of the capacitor circuit, is used to output a discharge current to the first terminal of the capacitor circuit when the voltage drop of the capacitor circuit is greater than or equal to a first preset target value, so as to reduce the voltage drop. The driving circuit includes: A pre-charging circuit, connected to the first terminal of the capacitor circuit, is used to charge the capacitor circuit when the driving circuit is powered on, until the voltage drop of the capacitor circuit is equal to a second preset target value; wherein the second preset target value is less than or equal to the first preset target value; A first switching circuit, wherein a first terminal is connected to a second terminal of the capacitor circuit and the second terminal is grounded, is used to turn on when the pre-charging circuit charges the capacitor circuit; The mirror current source includes: The first field-effect transistor has a drain that receives the preset reference current and is connected to its gate, and a source that is connected to a negative charge pump. The drain of the second field-effect transistor is connected to the second terminal of the capacitor circuit, the gate is connected to the gate of the first field-effect transistor, and the source is connected to the negative voltage charge pump. A negative charge pump is connected to the source of the first field-effect transistor and the source of the second field-effect transistor. Alternatively, the mirror current source includes: The third field-effect transistor has its drain used to receive the preset reference current and connected to its gate, and its source connected to a negative voltage charge pump. The fourth field-effect transistor has its drain connected to the second terminal of the capacitor circuit, its gate grounded, and its source connected to the drain of the fifth field-effect transistor. The fifth field-effect transistor has its drain connected to the source of the fourth field-effect transistor, its gate connected to the gate of the third field-effect transistor, and its source connected to the negative charge pump. A negative charge pump is connected to the source of the third field-effect transistor and the source of the fifth field-effect transistor.

2. The driving circuit for the power switch transistor according to claim 1, characterized in that, When the voltage drop of the capacitor circuit remains constant, the magnitude of the discharge current output by the overvoltage regulation circuit is equal to the magnitude of the charging current output by the mirror current source.

3. The driving circuit for the power switch transistor according to claim 1, characterized in that, The mirror current source includes: a current mirror.

4. The driving circuit for the power switch transistor according to claim 1, characterized in that, The power switch includes a field-effect transistor, the first electrode of the power switch is the source of the field-effect transistor, and the second electrode of the power switch is the gate of the field-effect transistor.

5. An electronic device, characterized in that, The electronic device includes: a driving circuit for the power switching transistor as described in any one of claims 1 to 4.

6. The electronic device according to claim 5, characterized in that, The electronic device also includes: A capacitor circuit, the first and second ends of which are both connected to the driving circuit; A current-limiting resistor, the first end of which is connected to the second end of the driving circuit and the capacitor circuit, and the second end of which is connected to the second electrode of the power switch transistor; The power switching transistor has its first electrode grounded and its second electrode connected to the second end of the current-limiting resistor.

7. The electronic device according to claim 6, characterized in that, The driving circuit is used to receive pulse signals; the pulse signals include a disconnect signal for controlling the power switch to turn off and a turn-on signal for controlling the power switch to turn on. The driving circuit is used to connect the preset reference voltage source to the first terminal of the capacitor circuit when the received pulse signal is a conduction signal; and to connect the first terminal of the capacitor circuit to the ground line when the received pulse signal is a disconnection signal.

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