Photovoltaic device and power generation system based on dual working mode ASIC chip control safety

Abstract

The application discloses a photovoltaic device and power generation system based on dual working mode ASIC chip control safety. The power optimizer in the photovoltaic system has two working modes of MPPT maximum power tracking and safety. In the MPPT maximum power tracking working mode of the ASIC chip, the output voltage and current of a photovoltaic module are collected, then the output power of the photovoltaic module is calculated through an analog multiplier, and a maximum power tracking unit adjusts the duty cycle to realize tracking of the maximum power of the photovoltaic module. Meanwhile, the ASIC chip mode control circuit realizes that when an emergency fault such as a short circuit between photovoltaic strings in the power generation system or a short circuit of each photovoltaic string connected to a bus of a photovoltaic inverter occurs, all the power optimizers in the power generation system in front of the short circuit fault are switched to the safety working mode, all the photovoltaic power generation units connected to the power optimizers stop outputting voltage and power, and system safety is realized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of photovoltaic device protection, and particularly relates to a photovoltaic device and power generation system based on double working mode ASIC chip control safety. BACKGROUND

[0002] Due to the wide distribution range of photovoltaic systems, especially distributed photovoltaic systems, since the photovoltaic system is direct current power supply, generally 1000V system voltage, even up to 1500V high voltage. Further, due to the shedding of the contact point, the aging of the device, the rupture of the insulation, the salt damage, the poor grounding, etc., the generation probability of the direct current arc fault (series arc, parallel arc) is improved, which makes the photovoltaic fire accident caused by the direct current arc fault not only harm the photovoltaic system equipment, but also threaten the safety of residential buildings, commercial and industrial facilities, public facilities, etc.

[0003] Many string type photovoltaic inverter manufacturers on the current market have launched photovoltaic inverter products with built-in AFCI (AFCI: Arc-Fault Circuit-Interrupter) function. The photovoltaic inverter with built-in AFCI arc detection can identify the direct current arc fault by detecting arc noise, and can disconnect the direct current circuit to eliminate the arc. AFCI is an arc fault interrupter, which is a protective device that can disconnect the power supply circuit before the arc fault develops into a fire or the circuit appears a short circuit by identifying the arc fault characteristic signal in the circuit. However, it is worth noting that the AFCI of the photovoltaic inverter can generally detect and extinguish the series arc, and the parallel arc (short circuit fault) cannot be detected and eliminated by the current AFCI function. Although the component level rapid shutdown technology can disconnect the connection between each component in the photovoltaic system, thereby eliminating the direct current high voltage and series and parallel arc faults (short circuit faults) existing in the photovoltaic system array, since the current AFCI function of the photovoltaic inverter cannot detect the parallel arc (short circuit fault), the current component level rapid shutdown technology cannot quickly eliminate the parallel arc, and the destructive power of the parallel arc is 10 times that of the series arc, and the safety hazard is greater. SUMMARY

[0004] To solve the above technical problems, the present application provides a power generation device and power generation system based on double working mode ASIC chip control safety. The maximum power tracking of the photovoltaic component is realized by the mode control unit of the ASIC chip, the power generation amount of the photovoltaic component is improved, and the risk of circuit short circuit fault (parallel arc) of the photovoltaic system is solved at low cost.

[0005] To achieve this purpose, the present application adopts the following technical solutions:

[0006] In one aspect, a photovoltaic device based on dual working mode ASIC chip control safety is provided, which is composed of a plurality of photovoltaic module strings connected in series or parallel to the bus of a photovoltaic inverter, a plurality of photovoltaic modules connected in series or parallel to form the photovoltaic module string, each of the photovoltaic modules comprising a power optimizer and a photovoltaic power generation unit connected to the power optimizer, the power optimizer comprising an ASIC chip, a maximum power tracking circuit, a mode control circuit, a reference working voltage generating circuit and a driving control circuit arranged in the ASIC chip;

[0007] The chip is provided with a mode control terminal, and the ASIC chip judges whether the input voltage of the mode control terminal is lower than a preset mode control voltage threshold value, if yes, the ASIC chip controls the power optimizer to switch to a safe working mode or maintains the safe working mode, and if no, the power optimizer is kept running in an MPPT maximum power tracking working mode.

[0008] The mode control terminal is a MODE pin of the ASIC chip.

[0009] As a preferred, when a short circuit fault occurs between the photovoltaic module strings of the photovoltaic device or each of the photovoltaic module strings is connected to the bus of the photovoltaic inverter and a short circuit occurs, the power optimizer in the power generation system executes an automatic protection process, and the specific method is as follows:

[0010] The ASIC chip in the power optimizer detects whether the input voltage of the Mode pin is lower than a preset mode control voltage threshold value,

[0011] If yes, the ASIC chip controls the power optimizer to switch to a safe working mode or maintains the safe working mode, and if no, the power optimizer is kept running in an MPPT maximum power tracking working mode.

[0012] If no, the power optimizer is kept running in an MPPT maximum power tracking working mode.

[0013] When the ASIC chip detects that the input voltage of the Mode pin is lower than a preset mode control voltage threshold value, the first switch in the power optimizer is driven to be turned off and the second switch is driven to be turned on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby realizing switching of the running state of the power optimizer to the safe working mode.

[0014] As preferred, the mode control circuit is connected to the mode control circuit outside the ASIC chip through the MODE pin of the ASIC chip, the mode control circuit is composed of a first resistor, a second resistor, a ground capacitor and a low-voltage protection diode, wherein the first end of the first resistor is connected to the MODE pin of the ASIC chip, the second end of the first resistor is connected to the first end of the second resistor, the first end of the ground capacitor and the anode of the low-voltage protection diode; the second end of the ground capacitor is connected to the ground pin of the ASIC chip; the cathode of the low-voltage protection diode is connected to the Vo pin of the ASIC chip, the Vo pin provides the power optimizer output voltage information to the ASIC chip; the second end of the second resistor is connected to the VDD pin of the ASIC chip, the VDD pin provides the internal reference operating voltage of the ASIC chip.

[0015] As preferred, when the output voltage value of the power optimizer is higher than the internal reference operating voltage value of the ASIC chip, the low-voltage protection diode of the mode control circuit is in the cut-off state, and the voltage of the MODE pin of the ASIC chip is provided by the VDD pin of the ASIC chip, and the value is the internal reference operating voltage value of the ASIC chip.

[0016] When the output voltage value of the power optimizer is lower than the internal reference operating voltage value of the ASIC chip, the low-voltage protection diode of the mode control circuit is in the on state, and the output voltage value of the power optimizer is introduced into the MODE pin of the ASIC chip by the mode control circuit, and the value is the sum of the output voltage value of the power optimizer and the voltage drop of the low-voltage protection diode.

[0017] As preferred, when the input voltage value of the MODE pin of the ASIC chip is higher than the preset mode control voltage threshold value, the ASIC chip runs in the MPPT maximum power tracking operating mode, and when the input voltage value of the MODE pin of the ASIC chip is lower than the preset mode control voltage threshold value, the ASIC chip runs in the safe mode, and the preset mode control voltage threshold value is less than the internal reference operating voltage value of the ASIC chip.

[0018] As preferred, when the circuit of the photovoltaic device has a short circuit fault,

[0019] The power optimizer automatically enters the safe operating mode:

[0020] When the ASIC chip detects that the input voltage value of the Mode pin is lower than the preset mode control voltage threshold, the ASIC chip drives the first switch in the power optimizer to be off and the second switch to be on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby realizing switching of the running state of the power optimizer to the safe working mode.

[0021] Preferably, the method for controlling the power optimizer to enter the non-working mode is that:

[0022] When the power optimizer is switched into the safe working mode for a set duration, the ASIC chip controls the power optimizer to enter the non-working mode, and the non-working mode drives the first switch in the power optimizer to be off and the second switch to be off.

[0023] Preferably, when a short-circuit fault occurs between photovoltaic strings of a photovoltaic device or the short-circuit fault between the photovoltaic strings is removed, the power optimizer executes an MPPT maximum power tracking mode recovery process, and the specific method is that:

[0024] After the short-circuit fault is removed, the ASIC chip in the power optimizer detects whether the input voltage of the Mode pin is higher than or equal to the preset mode control voltage threshold,

[0025] If yes, the ASIC chip controls the power optimizer to recover from the non-working mode to the MPPT maximum power tracking mode;

[0026] If no, the power optimizer keeps running in the non-working mode.

[0027] Preferably, a power optimizer is provided, and a photovoltaic power generation unit connected to the power optimizer forms an independent photovoltaic assembly. The power optimizer comprises an ASIC chip, and the ASIC chip comprises a voltage and current detection unit, a multiplier and a maximum power tracking unit. The first input end I1, the second input end I2, the third input end I3 and the fourth input end I4 of the voltage and current detection unit are connected to the Switch-H pin, the Switch-L pin, the Vo pin and the AGND pin of the ASIC chip respectively. The sampling current signal output end Iout and the sampling voltage signal output end Vout of the voltage and current detection unit are connected to the first input end and the second input end of the multiplier respectively. The power output end Pout of the multiplier is connected to the power signal input end of the maximum power tracking processing unit.

[0028] The voltage and current detection unit is configured to collect the output voltage and the output current of the photovoltaic power generation unit.

[0029] The multiplier is configured to multiply the output voltage and the output current collected by the voltage and current detection unit to obtain the output power of the photovoltaic power generation unit.

[0030] The maximum power tracking unit is configured to track the maximum power point of the photovoltaic power generation unit based on the output power output by the multiplier.

[0031] In another aspect, the application provides a safe power generation system controlled by a dual-mode ASIC chip, which is composed of a plurality of photovoltaic module strings connected in series or in parallel to a bus of a photovoltaic inverter, and a plurality of photovoltaic modules connected in series or in parallel to form the photovoltaic module string. Each photovoltaic module comprises a power optimizer and a photovoltaic power generation unit connected to the power optimizer. The power optimizer comprises an ASIC chip, which comprises a voltage and current detection unit, a multiplier and a maximum power tracking unit. The voltage and current detection unit is configured to collect the output voltage and the output current of the photovoltaic power generation unit. The multiplier is configured to multiply the output voltage and the output current collected by the voltage and current detection unit to obtain the output power of the photovoltaic power generation unit. The maximum power tracking unit is configured to track the maximum power point of the photovoltaic power generation unit based on the output power output by the multiplier.

[0032] Preferably, the power optimizer further comprises a first switch, a second switch, an input capacitor Cin, an output capacitor Cout and an energy storage inductor L. The first switch and the second switch are MOS tubes. The gate of the first switch is connected to the HD-driver pin of the ASIC chip. The gate of the second switch is connected to the LD-driver pin of the ASIC chip. One end of the energy storage inductor L is connected to the source of the first switch, and the other end is connected to one end of the output capacitor Cout. The other end of the output capacitor Cout is connected to the source of the second switch. The input capacitor Cin is connected between the positive output end and the negative output end of the photovoltaic power generation unit.

[0033] When a short circuit occurs between the photovoltaic module strings of the power generation system or between each photovoltaic module string and the bus of the photovoltaic inverter, the power optimizer in the power generation system executes an automatic protection process, which comprises the following steps:

[0034] The ASIC chip in the power optimizer determines whether the input voltage of the Mode pin is lower than a preset mode control voltage threshold value due to the short circuit,

[0035] If yes, the ASIC chip controls the power optimizer to switch to a safe working mode.

[0036] If not, the power optimizer keeps running in the MPPT maximum power tracking mode;

[0037] The method for the power optimizer to enter the safe mode is:

[0038] When the ASIC chip detects that the input voltage of the Mode pin is lower than the preset mode control voltage threshold, the ASIC chip drives the first switch in the power optimizer to be off and the second switch to be on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby switching the running state of the power optimizer to the safe mode.

[0039] Preferably, the ASIC chip internally comprises a maximum power tracking circuit, a reference voltage generation circuit, a mode control circuit, a driving control circuit and a chip internal power supply circuit,

[0040] The maximum power tracking circuit comprises a voltage and current detection unit, a multiplier and a maximum power tracking processing unit, the voltage and current detection unit is used to collect the output voltage and output current of the connected photovoltaic power generation unit;

[0041] The multiplier is used to multiply the output voltage and output current collected by the voltage and current detection unit to obtain the output power of the photovoltaic power generation unit;

[0042] The input end of the maximum power tracking processing unit is connected to the output end of the multiplier, which is used to track the maximum power point of the photovoltaic power generation unit;

[0043] The reference voltage generation circuit is used to provide a reference voltage for determining a duty cycle signal to the maximum power tracking processing unit and a reference voltage for mode control to the mode control circuit by using the power supply of the chip internal power supply circuit, when the power optimizer runs in the MPPT maximum power tracking mode, the ASIC chip controls the on-off of the first switch and the second switch according to the duty cycle signal, so as to realize the maximum power tracking of the connected photovoltaic power generation unit;

[0044] The signal output end of the mode control circuit is connected to the Mode pin of the ASIC chip, when the input voltage of the Mode pin of the ASIC chip is lower than the preset mode control voltage threshold, the ASIC chip controls the power optimizer to run in the safe mode, when the input voltage of the Mode pin of the ASIC chip reaches the reference voltage, the ASIC chip restores the power optimizer to run in the MPPT maximum power tracking mode;

[0045] The drive control circuit comprises a logic control unit, a first drive unit and a second drive unit, a first input end of the logic control unit is connected with the signal output end of the mode control circuit, a second input end is connected with the signal output end of the maximum power tracking unit, a first output end and a second output end are connected with the signal input ends of the first drive unit and the second drive unit respectively, and the signal output ends of the first drive unit and the second drive unit are connected with the HD-driver pin and the LD-driver pin of the ASIC chip respectively, and the drive control circuit is used for controlling the on-off of the first switch and the second switch according to a preset control logic.

[0046] The power optimizer provided by the application adopts the sampling circuit (voltage and current detection unit) of the ASIC chip to collect the output voltage and output current of the photovoltaic module, and then calculates the output power of the photovoltaic module through an analog multiplier, and the maximum power tracking unit adjusts the duty cycle to realize the MPPT maximum power tracking of the photovoltaic module, thereby avoiding the problems of the prior art, such as the complex internal device structure of the power optimizer, the high production and use cost of the power optimizer, and the like, caused by the need for analog-digital conversion and the like in the maximum power point tracking using the MCU and other digital chips. BRIEF DESCRIPTION OF DRAWINGS

[0047] In order to more clearly illustrate the technical solutions of the embodiments of the application, the following will briefly introduce the drawings needed to be used in the embodiments of the application. Obviously, the drawings described below are only some of the embodiments of the application, and other drawings can also be obtained according to these drawings without creative labor for those skilled in the art.

[0048] Figure 1 is a structural schematic diagram of a power generation system based on a dual-working-mode ASIC chip control safety provided by an embodiment of the application;

[0049] Figure 2 is a structural schematic diagram of a power generation system based on a dual-working-mode ASIC chip control safety when a photovoltaic module string occurs a short circuit and executes an active protection process;

[0050] Figure 3 is a structural schematic diagram of a power generation system based on a dual-working-mode ASIC chip control safety when a short circuit environment is created and an passive protection process is executed;

[0051] Figure 4 is a structural schematic diagram of an internal circuit of an ASIC chip;

[0052] Figure 5 is a structural schematic diagram of a power optimizer working in an MPPT maximum power tracking mode;

[0053] Figure 6 is a structural schematic diagram of the power optimization device working in a safe working mode;

[0054] Figure 7 is a structural schematic diagram of the power optimization device working in a non-working mode. DETAILED DESCRIPTION

[0055] The technical solutions of the present application will be further described below in combination with the drawings and through specific embodiments.

[0056] Wherein, the drawings are only used for exemplary illustration, and the representation is only a schematic diagram, not a physical diagram, and cannot be understood as a limitation on the present patent; in order to better illustrate the embodiments of the present application, some components of the drawings will be omitted, enlarged or reduced, and do not represent the size of the actual product; for those skilled in the art, it is understandable that some well-known structures and their descriptions in the drawings can be omitted.

[0057] The same or similar reference numerals in the drawings of the embodiments of the present application correspond to the same or similar components; in the description of the present application, it should be understood that if the terms such as "upper", "lower", "left", "right", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings, they are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, therefore the terms describing the positional relationship in the drawings are only used for exemplary illustration, and cannot be understood as a limitation on the present patent, for those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances.

[0058] In the description of the present application, unless otherwise explicitly specified and limited, if the term "connection" and the like appear to indicate the connection relationship between components, the term should be broadly understood, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the communication inside two components or the interaction relationship between two components. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0059] An embodiment of the present application provides a photovoltaic device based on a double-working-mode ASIC chip control safety, like Figure 1 and Figure 2As shown, the photovoltaic device is composed of several photovoltaic module strings connected in series or parallel to the bus of a photovoltaic inverter, and several photovoltaic components are connected in series or parallel to form the photovoltaic module string, each of the photovoltaic components comprises a power optimizer and a photovoltaic power generation unit connected to the power optimizer, the power optimizer internally comprises an ASIC chip 10, a maximum power tracking circuit, a mode control circuit, a reference operating voltage generating circuit and a drive control circuit arranged in the ASIC chip 10;

[0060] The ASIC chip 10 is provided with a mode control terminal, and the ASIC chip 10 judges whether the input voltage of the mode control terminal is lower than a preset mode control voltage threshold value, if yes, the ASIC chip controls the power optimizer to switch to a safe working mode or maintains the safe working mode; if no, the power optimizer is kept running in an MPPT maximum power tracking working mode.

[0061] The mode control terminal is a MODE pin of the ASIC chip 10.

[0062] When a short circuit fault occurs between the photovoltaic module strings of the photovoltaic device or a short circuit occurs between the photovoltaic module strings connected to the bus of the photovoltaic inverter, the power optimizer in the power generation system executes an automatic protection process, and the specific method is as follows:

[0063] The ASIC chip 10 in the power optimizer detects whether the input voltage of the Mode pin is lower than a preset mode control voltage threshold value,

[0064] If yes, the ASIC chip 10 controls the power optimizer to switch to a safe working mode or maintains the safe working mode;

[0065] If no, the power optimizer is kept running in an MPPT maximum power tracking working mode.

[0066] When the ASIC chip 10 detects that the input voltage of the Mode pin is lower than the preset mode control voltage threshold value, the ASIC chip drives the first switch 20 in the power optimizer to be off and the second switch 30 to be on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby realizing switching of the running state of the power optimizer to the safe working mode.

[0067] The mode control circuit is connected to the mode control circuit outside the ASIC chip 10 through the MODE pin of the ASIC chip 10, and is composed of a first resistor, a second resistor, a ground capacitor, and a low-voltage protection diode. The first end of the first resistor is connected to the MODE pin of the ASIC chip 10, the second end of the first resistor is connected to the first end of the second resistor, the first end of the ground capacitor, and the anode of the low-voltage protection diode; the second end of the ground capacitor is connected to the ground pin of the ASIC chip 10; the cathode of the low-voltage protection diode is connected to the Vo pin of the ASIC chip 10, and the Vo pin provides the power optimizer output voltage information to the ASIC chip 10; and the second end of the second resistor is connected to the VDD pin of the ASIC chip 10, and the VDD pin provides the internal reference operating voltage of the ASIC chip 10.

[0068] When the output voltage value of the power optimizer is higher than the internal reference operating voltage value of the ASIC chip 10, the low-voltage protection diode of the mode control circuit will be in the cut-off state, and the voltage of the MODE pin of the ASIC chip 10 is provided by the VDD pin of the ASIC chip 10, which is the internal reference operating voltage value of the ASIC chip 10;

[0069] When the output voltage value of the power optimizer is lower than the internal reference operating voltage value of the ASIC chip 10, the low-voltage protection diode of the mode control circuit will be in the on state, and the output voltage value of the power optimizer is introduced into the MODE pin of the ASIC chip 10 by the mode control circuit, which is the sum of the output voltage value of the power optimizer and the voltage drop of the low-voltage protection diode.

[0070] When the input voltage value of the MODE pin of the ASIC chip 10 is higher than the preset mode control voltage threshold, the ASIC chip 10 operates in the MPPT maximum power tracking mode; when the input voltage value of the MODE pin of the ASIC chip 10 is lower than the preset mode control voltage threshold, the ASIC chip 10 operates in the safety mode, and the preset mode control voltage threshold is less than the internal reference operating voltage value of the ASIC chip 10.

[0071] When a short circuit fault occurs in the circuit of the photovoltaic device,

[0072] The power optimizer automatically enters the safety operating mode:

[0073] When the ASIC chip 10 detects that the input voltage value of its Mode pin is lower than the reference voltage and reaches the preset preset mode control voltage threshold, it drives the first switch 20 in the power optimizer to open and drives the second switch 30 to open, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby switching the operating state of the power optimizer to the safe working mode.

[0074] The method by which the power optimizer is controlled to enter the non-operating mode is as follows:

[0075] When the power optimizer is switched into the safe operating mode for a set duration, the ASIC chip 10 controls the power optimizer to enter the non-operating mode. The non-operating mode drives the first switch 20 in the power optimizer to open and drives the second switch 30 to open.

[0076] When a short circuit fault occurs between photovoltaic strings in a photovoltaic system or a short circuit fault occurs on the busbar connecting each photovoltaic string to the photovoltaic inverter, and the fault is cleared, the power optimizer executes the MPPT (Maximum Power Point Tracking) working mode recovery process. The specific method is as follows:

[0077] After the short-circuit fault is cleared, the ASIC chip 10 in the power optimizer detects whether the input voltage of its Mode pin is higher than or equal to the preset mode control voltage threshold.

[0078] If so, the ASIC chip controls the power optimizer to return from the non-operating mode to the MPPT maximum power point tracking operating mode;

[0079] If not, the power optimizer remains in the non-operating mode.

[0080] Another embodiment of the present invention provides a power generation system based on a dual-mode ASIC chip for secure control, such as... Figure 1 As shown, the power generation system consists of several photovoltaic strings 300 connected in series or parallel to the busbar of the photovoltaic inverter 4. Several photovoltaic modules are connected in series or parallel to form the photovoltaic strings 300. Each photovoltaic module includes a power optimizer 1 and a photovoltaic power generation unit 5 connected to the power optimizer. The internal structure of the power optimizer is as follows: Figures 5-7 As shown, it includes an ASIC chip 10, and the ASIC chip 10 contains, as shown in the figure, an ASIC chip 10 contains, an ASIC chip 10 containing ... Figure 4As shown, the ASIC chip 10 comprises a voltage and current detection unit, a multiplier and a maximum power tracking unit. The voltage and current detection unit is configured to collect the output voltage and output current of the photovoltaic power generation unit. The multiplier is configured to multiply the output voltage and output current collected by the voltage and current detection unit to obtain the output power of the photovoltaic power generation unit. The maximum power tracking unit is configured to track the maximum power point of the photovoltaic power generation unit based on the output power output by the multiplier.

[0081] To track the maximum power point of the photovoltaic power generation unit, as shown in Figure 4 In addition to the voltage and current detection unit, the multiplier and the maximum power tracking unit, the ASIC chip 10 further comprises a reference voltage generation circuit, a mode control circuit, a drive control circuit, a communication interface circuit and a chip internal power supply circuit.

[0082] The reference voltage generation circuit is configured to provide a reference voltage for determining the duty cycle signal to the maximum power tracking unit and a reference voltage for mode control to the mode control circuit by using the power supply of the chip internal power supply circuit. When the power optimizer operates in the MPPT maximum power tracking mode, the ASIC chip 10 controls the on-off of the first switch 20 and the second switch 30 according to the duty cycle signal to realize the maximum power tracking of the connected photovoltaic power generation unit.

[0083] The signal output end of the mode control circuit is connected to the Mode pin of the ASIC chip. When the input voltage of the Mode pin of the ASIC chip 10 is lower than the preset mode control voltage threshold, the ASIC chip 10 controls the power optimizer to operate in the safe working mode. When the input voltage of the Mode pin of the ASIC chip 10 reaches the preset mode control voltage threshold, the ASIC chip 10 restores the power optimizer to operate in the MPPT maximum power tracking mode.

[0084] The drive control circuit comprises a logic control unit, a first drive unit and a second drive unit. The first input end of the logic control unit is connected to the signal output end of the mode control circuit, the second input end is connected to the signal output end of the maximum power tracking unit, the first output end and the second output end are respectively connected to the signal input ends of the first drive unit and the second drive unit, and the signal output ends of the first drive unit and the second drive unit are respectively connected to the HD-driver pin and the LD-driver pin of the ASIC chip 10. The drive control circuit is configured to control the on-off of the first switch 20 and the second switch 30 according to the preset control logic.

[0085] The communication interface circuit is configured to provide a communication interface for connecting the external device to the ASIC chip 10.

[0086] In conclusion, the sampling circuit (voltage and current detection unit) of the ASIC chip is used to collect the output voltage and output current of the photovoltaic module, and then the output power of the photovoltaic module is calculated through an analog multiplier, and the maximum power tracking unit adjusts the duty cycle to realize the MPPT maximum power tracking of the photovoltaic module, thereby avoiding the problems of complex internal device structure of the power optimizer, high production and use cost of the power optimizer due to the need for analog-to-digital conversion in the prior art.

[0087] According to the principle of MPPT maximum power tracking of the photovoltaic module by using the ASIC chip provided above, the application further provides a power generation system based on a dual working mode ASIC chip control safety, which comprises an MPPT maximum power tracking process of the photovoltaic power generation unit connected to the power optimizer, and the process specifically comprises the following steps:

[0088] S1, the voltage and current detection unit in the ASIC chip 10 in the power optimizer collects the output voltage and output current of the photovoltaic power generation unit;

[0089] S2, the multiplier in the ASIC chip multiplies the output voltage and output current collected by the voltage and current detection unit to obtain the output power of the photovoltaic power generation unit;

[0090] S3, the maximum power tracking unit in the ASIC chip is used to track the maximum power point of the photovoltaic power generation unit based on the output power output by the multiplier.

[0091] When the parallel arc short circuit phenomenon occurs between the photovoltaic module strings, in order to actively realize the rapid shutdown of the photovoltaic module level, preferably, the power optimizer provided by the embodiment further comprises Figures 5-7 the peripheral circuit of the ASIC chip 10 shown in the figure, the peripheral circuit comprises a first switch 20, a second switch 30, an input capacitor Cin, an output capacitor Cout and an energy storage inductor L, the first switch 20 and the second switch 30 are MOS tubes, the gate of the first switch 20 is connected to the HD-driver pin of the ASIC chip; the gate of the second switch 30 is connected to the LD-driver pin of the ASIC chip; one end of the energy storage inductor L is connected to the source of the first switch 20, the other end is connected to one end of the output capacitor Cout, the other end of the output capacitor Cout is connected to the source of the second switch 30; the input capacitor Cin is connected between the positive output end and the negative output end of the photovoltaic power generation unit;

[0092] When the short circuit occurs between the photovoltaic module strings of the power generation system or the short circuit occurs between the bus bars of the photovoltaic inverter to which the photovoltaic module strings are connected, the power optimizer in the power generation system executes the active protection process, and the specific method is:

[0093] The ASIC chip 10 in the power optimizer judges whether the input voltage of its Mode pin is lower than the preset mode control voltage threshold due to short circuit,

[0094] If yes, the ASIC chip 10 controls the power optimizer to switch to the safe working mode as shown in Figure 6

[0095] If no, the power optimizer keeps running in the MPPT maximum power tracking working mode as shown in Figure 5

[0096] The method for the power optimizer to enter the safe working mode under control is as follows:

[0097] When the ASIC chip 10 detects that the input voltage of its Mode pin is lower than the preset mode control voltage threshold, it drives the first switch 20 in the power optimizer to be off and the second switch 30 to be on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby realizing the switching of the running state of the power optimizer to the safe working mode.

[0098] The following is an example of the principle of the ASIC chip actively controlling the power optimizer to switch to the safe working mode when the short circuit phenomenon such as parallel arc occurs between photovoltaic strings:

[0099] Suppose that the outgoing line of the photovoltaic string 300 shown in Figure 2 is short-circuited due to parallel arc, and the parallel arc voltage at the short-circuit fault point is about 0V-40V, at this time, the output voltage of the power optimizer at the previous stage of the short-circuit fault point is reduced to close to 0-1.05V, at this time, the diode VD in the peripheral circuit of the power optimizer as shown in Figures 5-6 is turned on, the voltage of the Mode pin of the ASIC chip 10 is pulled down to 0.5-1.55V, which is lower than the preset 2.5V safety voltage threshold of the Mode pin, and the ASIC chip 10 switches the power optimizer to the safe working mode based on this condition, the switching method is: controlling the internal drive control circuit to drive the first switch 20 of the power optimizer to be off and the second switch 30 to be on, so that the photovoltaic power generation unit connected to the power optimizer stops outputting photovoltaic power (i.e. switched to the safe working mode), which can effectively avoid the risk of arc fire caused by the short-circuit fault of the photovoltaic string. The above-mentioned switching to the safe working mode does not require additional triggering action, and does not require expensive arc signal detection devices to detect the parallel arc fault of the power generation system, but the ASIC chip can discover the short-circuit fault in time based on the fluctuation characteristics of the output voltage and output current of the photovoltaic module, and can quickly shut down the corresponding photovoltaic string after discovering the short-circuit fault, thereby ensuring the safety of the operation of the power generation system.

[0100] ​​In order to ensure that other photovoltaic strings without short-circuit fault can continue to generate electricity normally, preferably, the strings of the photovoltaic strings connected to the bus of the photovoltaic inverter are isolated from each other by the anti-reverse diode 400 shown in Figure 1

[0101] According to the principle of actively performing component-level quick shutdown of the power optimizer in the power generation system provided above, the application correspondingly provides a power generation system based on a dual-working-mode ASIC chip. When a short circuit occurs between the photovoltaic strings of the power generation system or a short circuit occurs between the photovoltaic strings connected to the bus of the photovoltaic inverter, the power optimizer in the power generation system performs an active protection process. The specific method is as follows:

[0102] The ASIC chip 10 in the power optimizer judges whether the input voltage of the Mode pin due to the short circuit is lower than the preset mode control voltage threshold,

[0103] If yes, the ASIC chip 10 controls the power optimizer to switch to the safe working mode;

[0104] If no, the power optimizer keeps running in the MPPT maximum power tracking working mode;

[0105] The method for controlling the power optimizer to enter the safe working mode is as follows:

[0106] When the ASIC chip 10 detects that the input voltage of the Mode pin is lower than the preset mode control voltage threshold, the ASIC chip 10 drives the first switch 20 in the power optimizer to be off and drives the second switch 30 to be on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby realizing switching of the running state of the power optimizer to the safe working mode.

[0107] When a building installed with the power generation system catches fire and needs to be quickly shut down, in order to passively realize quick shutdown of the photovoltaic component, preferably, the power generation system further comprises a third switch s3 and an auxiliary power supply 3 as shown in Figures 1-3

[0108] ​​The third switch s3, which is normally closed and takes power from the AC terminal of the photovoltaic inverter through the auxiliary power supply, is closed due to the loss of power supply of the auxiliary power supply, and each photovoltaic string in the power generation system is short-circuited. When the input voltage of the Mode pin of the ASIC chip in each power optimizer is lower than the reference voltage and reaches the preset mode control voltage threshold, the ASIC chip controls the corresponding power optimizer to switch from the MPPT maximum power tracking working mode to the safe working mode shown in Figure 6 or the non-working mode shown in Figure 7 .

[0109] When the grid-connected switch or the household switch is closed after troubleshooting, the third switch s3, which is normally closed and takes power from the AC terminal of the photovoltaic inverter through the auxiliary power supply, is opened due to the recovery of the power supply of the auxiliary power supply, the short-circuit environment is removed, and the ASIC chip 10 controls the corresponding power optimizer to restore to the MPPT maximum power tracking working mode shown in Figure 5 when it is determined that the input voltage of the Mode pin thereof is restored to the reference voltage.

[0110] The method of the ASIC chip 10 for controlling the power optimizer to which it belongs to switch to the safe working mode has been described in the active safety protection process above, and will not be repeated here. After the ASIC chip 10 controls the power optimizer to run in the safe working mode for 30 seconds, the ASIC chip 10 controls the power optimizer to enter the non-working mode shown in Figure 7 , at which time the drive control circuit controls the first switch 20 and the third switch 30 to be turned off together, and the photovoltaic string stops sending photovoltaic power.

[0111] The principle of the ASIC chip 10 for passively controlling the power optimizer to switch to the safe working mode after the power generation system is manually and urgently turned off is described below:

[0112] Suppose that the output voltage of the photovoltaic string needs to be reduced to a safe voltage due to an emergency such as a building fire, first, create a short-circuit environment required for the ASIC chip to execute the passive protection process (the creation method has been described in detail above, and will not be repeated here). Under the short-circuit environment, the output voltage of the power optimizer is close to 0V, at which time the ASIC chip 10 controls the power optimizer to switch to the safe working mode shown in Figures 5-6The diode VD in the peripheral circuit of the power optimizer shown in the middle is turned on, the voltage of the Mode pin of the ASIC chip is reduced to close to 0V, which is lower than the preset safety voltage threshold of the Mode pin (i.e. the preset mode control voltage threshold), and the ASIC chip switches the power optimizer to the safe working mode based on this condition, and the switching method is to control the internal drive control circuit to drive the first switch 20 of the power optimizer to be turned off and the second switch 30 to be turned on, so that the photovoltaic power generation unit connected to the power optimizer stops outputting photovoltaic power (i.e. switches to the safe working mode). The above passive safety protection process can realize rapid shutdown at the component level when an emergency failure such as a building fire occurs, and reduce the output voltage of all photovoltaic strings to 0V, thereby avoiding the high requirement for continuous and reliable heartbeat signal acquisition in the conventional use of watchdog for rapid shutdown, and eliminating the need for continuous transmission of heartbeat communication signals through power line communication (PLC) circuit (in the existing scheme, the U.S. Patent No. US8933321B2 applied by Tigo Energy Company discloses a system and method for disconnecting solar panels based on watchdog technology, which includes a watchdog unit of a local controller coupled between a solar module and a power bus, and the power bus is configured to connect a plurality of solar modules to an inverter. The watchdog unit has: a local controller configured to monitor communications from a central controller remote from the solar module and determine whether the communications have been interrupted for a period of time exceeding a predetermined number of allowed skips; and at least one switch configured to disconnect the solar module from the power bus in response to the determination by the local controller that the communications from the central controller have been interrupted for a period of time exceeding the predetermined number of allowed skips; wherein the watchdog unit is configured to connect the solar module to the power bus when the communications are not interrupted. However, this scheme is based on watchdog technology, which requires high reliability of communication, and usually uses power line communication (PLC) with high reliability as the communication method. However, power line communication also has the problem of transmission attenuation, which limits the number of photovoltaic strings and the length of the string that each set of rapid shutdown device acts on, and requires the configuration of a local receiving unit for remote PLC transmission.

[0113] Based on the principle of passive execution of component-level rapid shutdown of the power optimizer in the power generation system provided above, the application correspondingly provides a safe power generation system based on a dual-working-mode ASIC chip control, which creates a short-circuit environment required by the passive protection process of the power optimizer in the power generation system when an emergency failure occurs in the power generation system, so that the power optimizer executes the passive protection process, specifically including the steps of:

[0114] L1, the photovoltaic inverter artificially cuts off the grid-connected switch of the grid-connected side of the photovoltaic inverter or the indoor switch of the connection between the house and the power grid, the normally closed third switch s3 connected between the positive input end and the negative input end of the DC side of the photovoltaic inverter and taking power from the AC end of the photovoltaic inverter through the auxiliary power supply is closed due to the loss of power of the auxiliary power supply, and the third switch s3 is connected between the positive input end and the negative input end of the DC side of the photovoltaic inverter, and after the third switch s3 is closed, each photovoltaic string connected to the DC bus of the photovoltaic inverter is short-circuited;

[0115] L2, the ASIC chip 10 in the power optimizer judges whether the input voltage of the Mode pin is lower than the preset mode control voltage threshold due to the short circuit,

[0116] if yes, the ASIC chip controls the power optimizer to switch to the safe working mode or the non-working mode;

[0117] if no, the power optimizer keeps running in the MPPT maximum power tracking working mode.

[0118] When the created short-circuit environment is removed, the power optimizer performs the MPPT maximum power tracking working mode recovery process, and the specific method is as follows:

[0119] After the short-circuit environment is removed, the ASIC chip in the power optimizer judges whether the input voltage of the Mode pin is lower than the preset mode control voltage threshold,

[0120] if yes, the ASIC chip controls the power optimizer to switch to the safe working mode or the non-working mode;

[0121] if no, the power optimizer keeps running in the safe working mode or the non-working mode;

[0122] The method for recovering the power optimizer into the MPPT maximum power tracking working mode is as follows:

[0123] when the ASIC chip detects that the input voltage of the Mode pin is lower than the preset mode control voltage threshold, the ASIC chip drives Figure 5 the first switch 20 in the power optimizer shown in FIG. 1 to be closed and the second switch 30 to be opened, so as to control the photovoltaic power generation unit connected to the power optimizer to recover the output photovoltaic power, thereby realizing the recovery of the running state of the power optimizer to the MPPT maximum power tracking working mode.

[0124] The method for removing the created short-circuit environment is as follows:

[0125] After the grid-connected switch of the closed AC inverter grid-connected point or the household switch of the house and the grid, the normally closed third switch s3 which takes power from the AC end of the photovoltaic inverter through the auxiliary power supply is disconnected due to the recovery of the auxiliary power supply, the third switch s3 is connected between the positive input end and the negative input end of the DC side of the photovoltaic inverter, after the third switch s3 is disconnected, the short circuit environment is released.

[0126] Need to declare that the above specific embodiments only for the preferred embodiments of the present application and the applied technical principles. Those skilled in the art should understand that the present application can also be modified, equivalent replacement, change, etc. However, as long as these changes do not deviate from the spirit of the present application, they should be within the scope of protection of the present application. In addition, some terms used in the specification and claims of the present application are not limited, but only for the convenience of description.

Claims

1. A photovoltaic device for security based on dual mode ASIC chip control, comprising a power optimizer, said power optimizer is connected to a photovoltaic module which is composed of photovoltaic power generation units, characterized in that, The photovoltaic device is composed of a plurality of photovoltaic module strings connected in series or parallel on a bus of a photovoltaic inverter, a plurality of photovoltaic components are connected in series or parallel to form the photovoltaic module string, each of the photovoltaic components comprises a power optimizer and a photovoltaic power generation unit connected to the power optimizer, the power optimizer internally comprises an ASIC chip (10), a maximum power tracking circuit, a mode control circuit, a reference operating voltage generating circuit and a drive control circuit arranged in the ASIC chip (10); The ASIC chip (10) is provided with a mode control terminal, the ASIC chip (10) judges whether the input voltage of the mode control terminal is lower than a preset mode control voltage threshold, if yes, the ASIC chip (10) controls the power optimizer to switch to a safe working mode or maintains the safe working mode; if no, the power optimizer keeps running in an MPPT maximum power tracking working mode; The mode control terminal is a MODE pin of the ASIC chip (10); The mode control circuit is connected to a mode control circuit (40) outside the ASIC chip (10) through the MODE pin of the ASIC chip (10); The power optimizer comprises an ASIC chip (10), the ASIC chip (10) comprises a voltage and current detection unit, a multiplier and a maximum power tracking unit, a first input end I1, a second input end I2, a third input end I3 and a fourth input end I4 of the voltage and current detection unit are connected to Switch-H, Switch-L, Vo and AGND pins of the ASIC chip (10) respectively, a sampling current signal output end Iout and a sampling voltage signal output end Vout of the voltage and current detection unit are connected to a first input end and a second input end of the multiplier respectively; a power output end Pout of the multiplier is connected to a power signal input end of the maximum power tracking processing unit; The voltage and current detection unit is used for collecting output voltage and output current of the photovoltaic power generation unit; The multiplier is used for multiplying the output voltage and the output current collected by the voltage and current detection unit to obtain output power of the photovoltaic power generation unit; The maximum power tracking unit is used for tracking a maximum power point of the photovoltaic power generation unit based on the output power output by the multiplier; The power generation system provided with the power optimizer comprises a third switch (s3) and an auxiliary power supply (3), the third switch (s3) is connected between a positive input end and a negative input end of a direct current end of a photovoltaic inverter (4), an electric input end of the auxiliary power supply (3) is connected to an alternating current end of the photovoltaic inverter, an electric output end of the auxiliary power supply (3) is connected to the third switch (s3) to supply power for the third switch (s3), when an emergency fault occurs in the power generation system, a short circuit environment required for the power optimizer to execute a passive protection process is created, so that the power optimizer executes the passive protection process, and the specific method is as follows: When the grid-connected switch or the household switch is closed after troubleshooting, the normally closed third switch (s3) that takes power from the AC end of the photovoltaic inverter through the auxiliary power supply (3) is opened due to the restoration of auxiliary power supply power supply, and the short-circuit environment is removed, and the ASIC chip (10) controls the corresponding power optimizer to restore to the MPPT maximum power tracking mode when it determines that the input voltage of its Mode pin recovers to the reference voltage. The power generation system is composed of a plurality of photovoltaic strings connected in series or parallel to the bus of a photovoltaic inverter, a plurality of photovoltaic components are connected in series or parallel to form the photovoltaic string, each photovoltaic component includes a power optimizer and a photovoltaic power generation unit connected to the power optimizer, the power optimizer includes an ASIC chip (10) inside, the ASIC chip (10) includes a voltage and current detection unit, a multiplier and a maximum power tracking processing unit, the voltage and current detection unit is used to collect the output voltage and output current of the photovoltaic power generation unit, the multiplier is used to multiply the output voltage and output current collected by the voltage and current detection unit to obtain the output power of the photovoltaic power generation unit, and the maximum power tracking processing unit is used to track the maximum power point of the photovoltaic power generation unit based on the output power output by the multiplier; 2. A dual mode ASIC based chip controlled safe power generation system, characterized in that, The power optimizer further includes a first switch (20), a second switch (30), an input capacitor Cin, an output capacitor Cout and an energy storage inductor L, the first switch (20) and the second switch (30) are MOS tubes, the gate of the first switch (20) is connected to the HD-driver pin of the ASIC chip; the gate of the second switch (30) is connected to the LD-driver pin of the ASIC chip (10); one end of the energy storage inductor L is connected to the source of the first switch (20), the other end is connected to one end of the output capacitor Cout, the other end of the output capacitor Cout is connected to the source of the second switch (30); the input capacitor Cin is connected between the positive output end and the negative output end of the photovoltaic power generation unit; When a short circuit occurs between the photovoltaic strings of the power generation system or a short circuit occurs between the photovoltaic strings connected to the bus of the photovoltaic inverter, the power optimizer in the power generation system executes an automatic protection process, and the specific method is: ​ The ASIC chip (10) in the power optimizer judges whether the input voltage of its Mode pin is lower than the preset mode control voltage threshold due to short circuit, If yes, the ASIC chip (10) controls the power optimizer to switch to the safe working mode; If no, the power optimizer keeps running in the MPPT maximum power tracking working mode; The method for controlling the power optimizer to enter the safe working mode is: When the ASIC chip (10) detects that the input voltage of its Mode pin is lower than the preset mode control voltage threshold, it drives the first switch (20) in the power optimizer to be off and the second switch (30) to be on, so as to control the photovoltaic power generation unit connected to the power optimizer to stop outputting photovoltaic power, thereby realizing switching the running state of the power optimizer to the safe working mode; The power generation system comprises a third switch (s3) and an auxiliary power supply (3), the third switch (s3) is connected between the positive input end and the negative input end of the direct current end of the photovoltaic inverter (4), the electrical input end of the auxiliary power supply (3) is connected to the alternating current end of the photovoltaic inverter, and the electrical output end of the auxiliary power supply (3) is connected to the third switch (s3) to supply power to the third switch (s3), when an emergency fault occurs in the power generation system, a short circuit environment required for the power optimizer in the power generation system to execute a passive protection process is created, so that the power optimizer executes the passive protection process, and the specific method is: The grid connection switch of the alternating current inverter or the household switch of the residence and the power grid is manually cut off, the normally closed third switch (s3) taking power from the alternating current end of the photovoltaic inverter through the auxiliary power supply (3) is closed due to the loss of power supply of the auxiliary power supply, each photovoltaic string in the power generation system is short-circuited, and when the input voltage of the Mode pin of the ASIC chip (10) in each power optimizer is lower than the reference voltage and reaches the preset mode control voltage threshold, the ASIC chip (10) controls the corresponding power optimizer to switch from the MPPT maximum power tracking working mode to the safe working mode or the non-working mode; When the grid connection switch or the household switch is closed after the fault is eliminated, the normally closed third switch (s3) taking power from the alternating current end of the photovoltaic inverter through the auxiliary power supply (3) is opened due to the recovery of the power supply of the auxiliary power supply, the short circuit environment is removed, and when the ASIC chip (10) judges that the input voltage of its Mode pin returns to the reference voltage, it controls the corresponding power optimizer to return to the MPPT maximum power tracking working mode.

3. The dual operating mode ASIC chip based control safety based power generation system as claimed in claim 2, wherein, The ASIC chip (10) internally comprises a maximum power tracking circuit, a reference voltage generation circuit, a mode control circuit, a drive control circuit and a chip internal power supply circuit, The maximum power tracking circuit comprises a voltage and current detection unit, a multiplier and a maximum power tracking processing unit, the voltage and current detection unit is used to collect the output voltage and output current of the connected photovoltaic power generation unit; The multiplier is used to multiply the output voltage and output current collected by the voltage and current detection unit to obtain the output power of the photovoltaic power generation unit; An input end of the maximum power tracking processing unit is connected to an output end of the multiplier, for tracking a maximum power point of the photovoltaic power generation unit; The reference voltage generating circuit is used for providing a reference voltage for determining a duty cycle signal to the maximum power tracking processing unit and providing a reference voltage for mode control to the mode control circuit by using power supply of the chip internal power supply circuit, when the power optimizer operates in the MPPT maximum power tracking mode, the ASIC chip (10) controls on-off of the first switch (20) and the second switch (30) according to the duty cycle signal, so as to realize maximum power tracking of the connected photovoltaic power generation unit; A signal output end of the mode control circuit is connected to the Mode pin of the ASIC chip (10), when input voltage of the Mode pin of the ASIC chip (10) is lower than the preset mode control voltage threshold, the ASIC chip (10) controls the power optimizer to operate in the safe working mode, when the input voltage of the Mode pin of the ASIC chip (10) reaches the reference voltage, the ASIC chip (10) restores the power optimizer to operate in the MPPT maximum power tracking mode; The drive control circuit includes a logic control unit, a first drive unit and a second drive unit, a first input end of the logic control unit is connected to a signal output end of the mode control circuit, a second input end is connected to a signal output end of the maximum power tracking unit, a first output end and a second output end are respectively connected to signal input ends of the first drive unit and the second drive unit, signal output ends of the first drive unit and the second drive unit are respectively connected to the HD-driver pin and the LD-driver pin of the ASIC chip (10), the drive control circuit is used for controlling on-off of the first switch (20) and the second switch (30) according to the preset control logic.

Images