Electrostatic discharge protection structure

Abstract

The application discloses an electrostatic discharge protection structure, which comprises a P-type substrate, a P-type structure, an N-type buried layer, an element active region, a P-type protection ring and an N-type structure. The P-type structure is formed in the P-type substrate and serves as an electrical contact of the P-type substrate. The N-type buried layer is formed in the P-type substrate. The element active region is formed on the N-type buried layer. The P-type protection ring is formed on the N-type buried layer and surrounds the element active region. The N-type structure is formed on the N-type buried layer and is located between the P-type protection ring and the P-type structure. The electrostatic discharge tolerance of the electrostatic discharge protection structure can be greatly improved by the embodiment of the application.

Description

Technical Field

[0001] This invention relates to an electrostatic discharge protection structure, and more particularly to an electrostatic discharge protection structure having a P-type protective ring. Background Technology

[0002] Electrostatic discharge (ESD) damage has become one of the most significant reliability issues for integrated circuit (IC) products. Especially as dimensions continue to shrink to deep submicron levels, the gate oxide layer of metal-oxide-semiconductors (MOSFETs) becomes increasingly thin, making ICs more susceptible to ESD damage. In general industry standards, the input / output (I / O) pins of IC products must pass human body mode ESD tests exceeding 2000 volts and mechanical mode ESD tests exceeding 200 volts. Therefore, ESD protection components must be placed near all I / O pads in IC products to protect the internal core circuitry from ESD current. Summary of the Invention

[0003] An embodiment of the present invention provides an electrostatic discharge protection structure, including a P-type substrate, a P-type structure, an N-type buried layer, an active region of a device, a P-type guard ring, and an N-type structure. The P-type structure is formed within the P-type substrate, serving as an electrical contact for the P-type substrate. The N-type buried layer is formed within the P-type substrate. The active region of the device is formed on the N-type buried layer. The P-type guard ring is formed on the N-type buried layer and surrounds the active region of the device. The N-type structure is formed on the N-type buried layer and is located between the P-type guard ring and the P-type structure.

[0004] In this embodiment of the invention, since the P-type guard ring surrounds the active region of the component, an additional body diode can be added. When an electrostatic discharge (ESD) event occurs, the body diodes collectively release the ESD current. Therefore, the ESD protection structure's tolerance to machine model (MM) discharge is significantly improved. Attached Figure Description

[0005] Figure 1 This is a top view schematic diagram of the electrostatic discharge protection structure of the present invention.

[0006] Figure 2 for Figure 1 A cross-sectional view of the electrostatic discharge protection structure along the dashed line AA'.

[0007] Figure 3 This is a schematic diagram of the active region of the element in this invention.

[0008] Figure 4 for Figure 1 Another cross-sectional view of the electrostatic discharge protection structure along the dashed line AA'.

[0009] Reference numerals

[0010] 100: electrostatic discharge protection structure

[0011] 110, 210: P-type substrate

[0012] 120: P-type structure

[0013] 130: N-type structure

[0014] 140: P-type guard ring

[0015] 150: element active region

[0016] 160, 220: N-type buried layer

[0017] 231-236, 251-254, 311, 312: P-type well

[0018] 241-244, 261, 262, 321, 322: N-type well

[0019] 271-276, 341: P-type doped region

[0020] 281, 282, 331, 332: N-type doped region

[0021] D1-D4: body diode

[0022] 291-300: field oxide layer

[0023] VL, VH: power supply trace DETAILED DESCRIPTION

[0024] To make the objects, features and advantages of the present application more clear, the following embodiments are specifically given, and the accompanying drawings are used for detailed description. The present application provides different embodiments to explain the technical features of different embodiments of the present application. The configuration of each element in the embodiments is for explanation, and is not used to limit the present application. In addition, part of the reference numerals in the embodiments is repeated, which is to simplify the description, and is not intended to indicate the relevance between different embodiments.

[0025] Figure 1 Fig. 1 is a top view of an electrostatic discharge protection structure according to an embodiment of the present application. As shown in Fig. 1, the electrostatic discharge protection structure 100 includes a P-type substrate 110, a P-type structure 120, an N-type structure 130, a P-type guard ring 140, and an element active region 150. In some embodiments, the electrostatic discharge protection structure 100 is applied to a high side, such as an input / output pin. Figure 1

[0026] ​A P-type structure 120 is formed within a P-type substrate 110, serving as an electrical contact for the P-type substrate 110. The shape of the P-type structure 120 is not limited. In one possible embodiment, the P-type structure 120 is a ring structure. In this example, the P-type structure 120 surrounds the N-type structure 130.

[0027] The N-type structure 130 is located between the P-type structure 120 and the P-type protective ring 140. The shape of the N-type structure 130 is not limited. In one possible embodiment, the N-type structure 130 is a ring structure. In this example, the N-type structure 130 surrounds the P-type protective ring 140. In some embodiments, the N-type structure 130 is covered by a field oxide layer (not shown). In this example, the field oxide layer separates the P-type structure 120 from the P-type protective ring 140 and is exposed between the P-type structure 120 and the P-type protective ring 140.

[0028] A P-type guard ring 140 surrounds the active region 150 of the device. In some embodiments, the electrostatic discharge protection structure 100 further includes an N-type buried layer 160. The N-type buried layer 160 is formed in the P-type substrate 110. In this example, the N-type structure 130, the P-type guard ring 140, and the active region 150 are all formed on the N-type buried layer 160. In one possible embodiment, the N-type structure 130, the P-type guard ring 140, and the active region 150 are in direct contact with the N-type buried layer 160. In other embodiments, the P-type structure 120 does not overlap the N-type buried layer 160. For example, the area of ​​the P-type structure 120 mapped onto the P-type substrate 110 does not overlap the area of ​​the N-type buried layer 160 mapped onto the P-type substrate 110.

[0029] Figure 2 for Figure 1 The electrostatic discharge protection structure is shown in a cross-sectional view along the dashed line AA'. (See diagram below.) Figure 2 As shown, the electrostatic discharge protection structure 100 includes a P-type substrate 210 (i.e., Figure 1 The substrate 110) and an N-type buried layer 220 (i.e. Figure 1 The N-type buried layer 160 is formed in the P-type substrate 210. In some embodiments, the electrostatic discharge protection structure 100 further includes P-type wells 231, 232, 235, 236, N-type wells 241, 244 and active element region 150.

[0030] The P-type well 231 and the P-type well 236 are formed in the P-type substrate 210 and are separated from the N-type buried layer 220. In the embodiment, the P-type well 231 and the P-type well 236 are mapped to regions of the P-type substrate 210 that do not overlap the regions of the P-type substrate 210 mapped to the N-type buried layer 220. In one possible embodiment, the P-type well 231 and the P-type well 236 are high voltage P-type wells (HVPWs). In another possible embodiment, the P-type well 231 and the P-type well 236 form a ring structure. In this case, the ring structure formed by the P-type well 231 and the P-type well 236 surrounds the N-type well 241 and the N-type well 244.

[0031] In the embodiment, the P-type well 231 includes a P-type doped region 271. The P-type doped region 271 is formed in the P-type well 231 as an electrical contact to the P-type substrate 210. In some embodiments, the P-type well 231 further includes a P-type well 251. The P-type well 251 is formed in the P-type well 231. The P-type doped region 271 is formed in the P-type well 251. In this case, the P-type doped region 271 has a higher doping concentration than the P-type well 251, and the P-type well 251 has a higher doping concentration than the P-type well 231.

[0032] In addition, the P-type well 236 includes a P-type doped region 276. The P-type doped region 276 is formed in the P-type well 236 as an electrical contact to the P-type substrate 210. In some embodiments, the P-type well 236 further includes a P-type well 254. The P-type well 254 is formed in the P-type well 236. The P-type doped region 276 is formed in the P-type well 254. In this case, the P-type doped region 276 has a higher doping concentration than the P-type well 254, and the P-type well 254 has a higher doping concentration than the P-type well 236. In some embodiments, the P-type doped region 271 and the P-type doped region 276 form a ring structure as a P-type structure 120. In addition, the P-type well 251 and the P-type well 254 also form a ring structure. Figure 1

[0033] ​The N-type well 241 and the N-type well 244 are formed on and overlap the N-type buried layer 220. In other words, the N-type well 241 and the N-type well 244 map to the region of the P-type substrate 210 where the N-type buried layer 220 maps to. In one possible embodiment, the N-type well 241 and the N-type well 244 contact the N-type buried layer 220. In other embodiments, the N-type well 241 and the N-type well 244 are high voltage N-type wells (HVNWs). In some embodiments, the N-type well 241 and the N-type well 244 form a ring structure around the P-type well 232 and the P-type well 235 to prevent the P-type well 232 and the P-type well 235 from contacting the P-type substrate 210. In this embodiment, the ring structure formed by the N-type well 241 and the N-type well 244 acts as a N-type guard ring 130. Figure 1

[0034] The P-type well 232 and the P-type well 235 are formed on and contact the N-type buried layer 220. In this embodiment, the P-type well 232 and the P-type well 235 map to the region of the P-type substrate 210 where the N-type buried layer 220 maps to. In one possible embodiment, the P-type well 232 and the P-type well 235 are high voltage P-type wells. In some embodiments, the P-type well 232 and the P-type well 235 form a ring structure to enclose the active device region 150.

[0035] In this embodiment, the P-type well 232 includes a P-type doped region 272. The P-type doped region 272 is formed in the P-type well 232. In some embodiments, the P-type well 232 further includes a P-type well 252. The P-type well 252 is formed in the P-type well 232. The P-type doped region 272 is formed in the P-type well 252. In this case, the P-type doped region 272 has a higher doping concentration than the P-type well 252, and the P-type well 252 has a higher doping concentration than the P-type well 232.

[0036] In addition, the P-type well 235 includes a P-type doped region 275. The P-type doped region 275 is formed in the P-type well 235. In some embodiments, the P-type well 235 further includes a P-type well 253. The P-type well 253 is formed in the P-type well 235. The P-type doped region 275 is formed in the P-type well 253. In this case, the P-type doped region 275 has a higher doping concentration than the P-type well 253, and the P-type well 253 has a higher doping concentration than the P-type well 235. In other embodiments, the P-type doped region 272 and the P-type doped region 275 form a ring structure. In this case, the ring structure formed by the P-type doped region 272 and the P-type doped region 275 is the P-type guard ring 140. Figure 1

[0037] ​​In some embodiments, the electrostatic discharge protection structure 100 further includes a field oxide layer 292 and a field oxide layer 299. The field oxide layer 292 is formed on the surface of the P-type substrate 210. In this example, the field oxide layer 292 separates the P-type doped region 271 and the P-type doped region 272, and exposes between the P-type doped region 271 and the P-type doped region 272. In this embodiment, the field oxide layer 292 completely covers the N-type well 241. In other embodiments, the field oxide layer 292 covers part of the P-type well 231, the P-type well 251, the P-type well 232, and the P-type well 252. In addition, the field oxide layer 299 is formed on the surface of the P-type substrate 210. In this example, the field oxide layer 299 separates the P-type doped region 275 and the P-type doped region 276, and exposes between the P-type doped region 275 and the P-type doped region 276. In this embodiment, the field oxide layer 299 completely covers the N-type well 244. In other embodiments, the field oxide layer 299 covers part of the P-type well 235, the P-type well 253, the P-type well 236, and the P-type well 254. In some embodiments, the field oxide layer 292 and the field oxide layer 299 form a ring structure.

[0038] In other embodiments, the electrostatic discharge protection structure 100 further includes a field oxide layer 291, a field oxide layer 293, a field oxide layer 298, and a field oxide layer 300. The field oxide layer 291 is disposed between the P-type substrate 210 and the P-type doped region 271. In some embodiments, the field oxide layer 291 overlaps part of the P-type well 231 and the P-type well 251. The field oxide layer 293 is disposed between the P-type doped region 272 and the active region 150. In some embodiments, the field oxide layer 293 overlaps part of the P-type well 232, the P-type well 252, and part of the active region 150.

[0039] The field oxide layer 298 is disposed between the active region 150 and the P-type doped region 275. In some embodiments, the field oxide layer 298 overlaps part of the active region 150 and part of the P-type well 235 and the P-type well 253. The field oxide layer 300 is disposed between the P-type doped region 276 and the P-type substrate 210. In some embodiments, the field oxide layer 300 overlaps part of the P-type well 236 and the P-type well 254. In other embodiments, the field oxide layer 292 and the field oxide layer 299 have a width in the direction X that is greater than the field oxide layer 291, the field oxide layer 293, the field oxide layer 298, and the field oxide layer 300. In this example, the field oxide layer 291, the field oxide layer 292, the field oxide layer 293, the field oxide layer 298, the field oxide layer 299, the field oxide layer 300 have a similar depth in the direction Y.

[0040] The active element region 150 is formed on the N-type buried layer 220 and between the field oxide layers 293 and 298. The present application does not limit the architecture of the active element region 150. In one embodiment, the active element region 150 includes at least the N-type well 242, the N-type well 243, the P-type well 233, and the P-type well 234.

[0041] The N-type well 242 and the N-type well 243 are formed on the N-type buried layer 220 and contact the N-type buried layer 220. In one embodiment, the N-type well 242 and the N-type well 243 are both deep high-voltage N-type wells. In another embodiment, the N-type well 242 and the N-type well 243 form a ring structure and, together with the N-type buried layer 220, enclose the core element in the active element region 150.

[0042] In this embodiment, the N-type well 242 includes an N-type doped region 281. The N-type doped region 281 is formed in the N-type well 242. In some embodiments, the N-type well 242 further includes an N-type well 261. The N-type well 261 is formed in the N-type well 242. The N-type doped region 281 is formed in the N-type well 261. In this embodiment, the doping concentration of the N-type doped region 281 is higher than that of the N-type well 261, and the doping concentration of the N-type well 261 is higher than that of the N-type well 242.

[0043] In addition, the N-type well 243 includes an N-type doped region 282. The N-type doped region 282 is formed in the N-type well 243. In some embodiments, the N-type well 243 further includes an N-type well 262. The N-type well 262 is formed in the N-type well 243. The N-type doped region 282 is formed in the N-type well 262. In this embodiment, the doping concentration of the N-type doped region 282 is higher than that of the N-type well 262, and the doping concentration of the N-type well 262 is higher than that of the N-type well 243. In some embodiments, the N-type doped region 281 and the N-type doped region 282 form a ring structure, and the N-type well 261 and the N-type well 262 also form a ring structure.

[0044] The P-type well 233 and the P-type well 234 are formed on the N-type buried layer 220 and contact the N-type buried layer 220. In one embodiment, the P-type well 233 and the P-type well 234 are both high-voltage P-type wells. In another embodiment, the P-type well 233 and the P-type well 234 form a ring structure. In this embodiment, the P-type well 233 includes a P-type doped region 273. The P-type doped region 273 is formed in the P-type well 233. In this embodiment, the doping concentration of the P-type doped region 273 is higher than that of the P-type well 233. In addition, the P-type well 234 includes a P-type doped region 274. The P-type doped region 274 is formed in the P-type well 234. In this embodiment, the doping concentration of the P-type doped region 274 is higher than that of the P-type well 234. In some embodiments, the P-type doped region 273 and the P-type doped region 274 form a ring structure.

[0045] In other embodiments, the ESD protection structure 100 further includes a power supply line VL and a power supply line VH. The power supply line VL is electrically connected to the P-type doped region 272, the P-type doped region 273, the P-type doped region 274, and the P-type doped region 275 as a first power supply terminal. The power supply line VH is electrically connected to the N-type doped region 281 and the N-type doped region 282 as a second power supply terminal. In a normal mode (no ESD event), the power supply line VH receives a first operating voltage and the power supply line VL receives a second operating voltage, where the first operating voltage is higher than the second operating voltage. In other embodiments, the ESD protection structure 100 further includes a substrate terminal Psub. The substrate terminal Psub is electrically connected to the P-type doped region 271 and the P-type doped region 276. The power supply line VL, the power supply line VH, and the substrate terminal Psub are electrically isolated from each other. In this case, since the ESD protection structure 100 has two power supply terminals and a substrate terminal Psub, the ESD protection structure 100 is a three-terminal (3T) device.

[0046] When an ESD event occurs at the power supply line VL and the power supply line VH receives a ground voltage, the ESD protection structure 100 enters a protection mode. In the protection mode, the substrate terminal Psub is floating. At this time, since the potentials of the P-type doped region 272 and the P-type doped region 273 are greater than the potential of the N-type doped region 281, the body diode Dl between the P-type well 232 and the N-type well 242 and the body diode D2 between the P-type well 233 and the N-type well 242 are turned on. Therefore, a first ESD current flows from the power supply line VL, through the P-type doped region 272, the P-type well 232, the N-type well 242, and the N-type doped region 281, to the power supply line VH, and a second ESD current flows from the power supply line VL, through the P-type doped region 273, the P-type well 233, the N-type well 242, and the N-type doped region 281, to the power supply line VH.

[0047] Similarly, in protection mode, since the potentials of P-type doped regions 274 and 275 are greater than the potential of N-type doped region 282, the body diode D3 between P-type well 234 and N-type well 243, and the body diode D4 between P-type well 235 and N-type well 243, are turned on. Therefore, a third electrostatic discharge current starts from power line VL, passes through P-type doped region 274, P-type well 234, N-type well 243, and N-type doped region 282, and flows into power line VH. A fourth electrostatic discharge current starts from power line VL, passes through P-type doped region 275, P-type well 235, N-type well 243, and N-type doped region 282, and flows into power line VH. Since body diodes D1, D2, D3, and D4 jointly release the electrostatic discharge current, the electrostatic discharge tolerance of the electrostatic discharge protection structure 100 can be increased.

[0048] In some embodiments, the active region 150 further includes field oxide layers 294, 295, 296, and 297. Field oxide layer 294 separates N-type doped region 281 and P-type doped region 273, and is exposed between them. In one possible embodiment, field oxide layer 294 overlaps N-type well 242, N-type well 261, and P-type well 233. P-type doped region 273 is located between field oxide layers 294 and 295. In one possible embodiment, field oxide layer 295 overlaps P-type well 233. P-type doped region 274 is located between field oxide layers 296 and 297. In one possible embodiment, field oxide layer 296 overlaps P-type well 234. The field oxide layer 297 is used to separate the N-type doped region 282 and the P-type doped region 274, and is exposed between the N-type doped region 282 and the P-type doped region 274. In one possible embodiment, the field oxide layer 297 overlaps the N-type well 243, the N-type well 262 and the P-type well 234.

[0049] Figure 3 This is a schematic diagram of the active region 150 of the present invention. Figure 3 As shown, the active region 150 of the component includes N-type wells 242, 321, and 243, as well as P-type wells 233 and 234. N-type wells 242 and 243 are formed on and in contact with the N-type buried layer 220. Since the characteristics of N-type wells 242 and 243 have been disclosed above, they will not be described again.

[0050] P-well 233 and P-well 234 are formed over and contact N-buried layer 220. In this embodiment, P-well 233 includes a P-doped region 273, an N-doped region 331, and a P-well 311. Since the properties of P-doped region 273 have been disclosed above, they will not be repeated. P-well 311 is formed in P-well 233. P-well 311 has a higher doping concentration than P-well 233. N-doped region 331 is formed in P-well 311. In this embodiment, N-doped region 331 has a similar doping concentration as N-doped region 281.

[0051] In addition, P-well 234 includes a P-doped region 274, an N-doped region 332, and a P-well 312. Since the properties of P-doped region 274 have been disclosed above, they will not be repeated. P-well 312 is formed in P-well 234. P-well 312 has a higher doping concentration than P-well 234. N-doped region 332 is formed in P-well 312. In this embodiment, N-doped region 332 has a similar doping concentration as N-doped region 331.

[0052] N-well 321 is formed over and contacts N-buried layer 220. In one possible embodiment, N-well 321 is a deep high voltage N-well. In this embodiment, N-well 321 includes an N-well 322 and a P-doped region 341. N-well 322 is formed in N-well 321. N-well 322 has a higher doping concentration than N-well 321. P-doped region 341 is formed in N-well 322. P-doped region 341 has a similar doping concentration as P-doped region 273.

[0053] In other embodiments, active region 150 further includes field oxide 293, field oxide 294, field oxide 295, field oxide 351, field oxide 352, field oxide 296, field oxide 297, and field oxide 298. Since the properties of field oxide 293, field oxide 294, field oxide 297, and field oxide 298 have been disclosed above, they will not be repeated. Field oxide 295 is located between P-doped region 273 and N-doped region 331. In some embodiments, field oxide 295 overlaps part of P-well 233 and P-well 311.

[0054] The field oxide layer 351 is located between the N-type doped region 331 and the P-type doped region 341. In this embodiment, the field oxide layer 351 overlaps the P-type well 233, the P-type well 311, and partially overlaps the N-type well 321 and the N-type well 322. The field oxide layer 352 is located between the P-type doped region 341 and the N-type doped region 332. In this embodiment, the field oxide layer 352 overlaps the N-type well 321, the N-type well 322, and partially overlaps the P-type well 234 and the P-type well 312. The field oxide layer 296 is located between the N-type doped region 332 and the P-type doped region 274. In one possible embodiment, the field oxide layer 296 overlaps the P-type well 234 and the P-type well 312.

[0055] In this embodiment, the active region 150 has a Silicon Controlled Rectifier (SCR) structure. In this embodiment, the active region 150 is electrically connected to the power supply trace VH and VL. When an electrostatic discharge event occurs in one of the power supply traces VH and VL, and the other of the power supply traces VH and VL is coupled to ground, the Silicon Controlled Rectifier releases an electrostatic discharge current to ground. For example, the N-type doped region 281, the P-type doped region 341, and the N-type doped region 282 are electrically connected to the power supply trace VH. In addition, the P-type doped region 273, the N-type doped region 331, the N-type doped region 332, and the P-type doped region 274 are electrically connected to the power supply trace VL. When an electrostatic discharge event occurs in the power supply trace VH, and the power supply trace VL is coupled to ground, a first electrostatic discharge current enters the P-type doped region 341, passes through the N-type well 322, the N-type well 321, the P-type well 233, the P-type well 311, the N-type doped region 331, and is released to ground through the power supply trace VL. In addition, a second electrostatic discharge current enters the P-type doped region 341, passes through the N-type well 322, the N-type well 321, the P-type well 234, the P-type well 312, the N-type doped region 332, and is released to ground through the power supply trace VL.

[0056] Because the P-type guard ring formed by the P-type doped region 272 and the P-type doped region 275 surrounds the active region 150, the body diode, such as the diode D1 and the diode D4, can be additionally added. Figure 2 When the power supply trace VL receives a positive electrostatic discharge voltage, and the power supply trace VH receives a ground voltage, the diode D1, the diode D2, the diode D3, and the diode D4 collectively release the electrostatic discharge current. Therefore, the electrostatic discharge protection structure 100 has a significantly improved tolerance in the machine model (MM).

[0057] Figure 4 The electrostatic discharge protection structure along the other cross-sectional view of the portion of the dashed line AA' is shown in FIG. 3B. As shown in FIG. 3B, the active region 150 has a Silicon Controlled Rectifier (SCR) structure. In this embodiment, the active region 150 is electrically connected to the power supply trace VH and VL. When an electrostatic discharge event occurs in one of the power supply traces VH and VL, and the other of the power supply traces VH and VL is coupled to ground, the Silicon Controlled Rectifier releases an electrostatic discharge current to ground. For example, the N-type doped region 281, the P-type doped region 341, and the N-type doped region 282 are electrically connected to the power supply trace VH. In addition, the P-type doped region 273, the N-type doped region 331, the N-type doped region 332, and the P-type doped region 274 are electrically connected to the power supply trace VL. When an electrostatic discharge event occurs in the power supply trace VH, and the power supply trace VL is coupled to ground, a first electrostatic discharge current enters the P-type doped region 341, passes through the N-type well 322, the N-type well 321, the P-type well 233, the P-type well 311, the N-type doped region 331, and is released to ground through the power supply trace VL. In addition, a second electrostatic discharge current enters the P-type doped region 341, passes through the N-type well 322, the N-type well 321, the P-type well 234, the P-type well 312, the N-type doped region 332, and is released to ground through the power supply trace VL. Figure 1 The electrostatic discharge protection structure along the other cross-sectional view of the portion of the dashed line AA' is shown in FIG. 3B. As shown in FIG. 3B, the active region 150 has a Silicon Controlled Rectifier (SCR) structure. In this embodiment, the active region 150 is electrically connected to the power supply trace VH and VL. When an electrostatic discharge event occurs in one of the power supply traces VH and VL, and the other of the power supply traces VH and VL is coupled to ground, the Silicon Controlled Rectifier releases an electrostatic discharge current to ground. For example, the N-type doped region 281, the P-type doped region 341, and the N-type doped region 282 are electrically connected to the power supply trace VH. In addition, the P-type doped region 273, the N-type doped region 331, the N-type doped region 332, and the P-type doped region 274 are electrically connected to the power supply trace VL. When an electrostatic discharge event occurs in the power supply trace VH, and the power supply trace VL is coupled to ground, a first electrostatic discharge current enters the P-type doped region 341, passes through the N-type well 322, the N-type well 321, the P-type well 233, the P-type well 311, the N-type doped region 331, and is released to ground through the power supply trace VL. In addition, a second electrostatic discharge current enters the P-type doped region 341, passes through the N-type well 322, the N-type well 321, the P-type well 234, the P-type well 312, the N-type doped region 332, and is released to ground through the power supply trace VL. Figure 4As shown, the electrostatic discharge protection structure 400 includes a P-type substrate 410 and an N-type buried layer 420. The N-type buried layer 420 is formed in the P-type substrate 410. Since the characteristics of the P-type substrate 410 and the N-type buried layer 420 are the same as those of the P-type substrate 210 and the N-type buried layer 220 of the electrostatic discharge protection structure 200, they are not described again. Figure 2

[0058] In some embodiments, the electrostatic discharge protection structure 400 further includes a P-type well 431, a P-type well 432, a P-type well 433, a P-type well 434, an N-type well 441, an N-type well 445, and an active device region 450. The P-type well 431 and the P-type well 434 are formed in the P-type substrate 410 and are separated from the N-type buried layer 420. The N-type well 441 and the N-type well 445 are formed on the N-type buried layer 420 and overlap the N-type buried layer 420. Since the characteristics of the P-type well 431, the P-type well 434, and the N-type well 441, the N-type well 445 are the same as those of the P-type well 231, the P-type well 236, and the N-type well 241, the N-type well 244 of the electrostatic discharge protection structure 200, they are not described again. Figure 2

[0059] In some embodiments, the electrostatic discharge protection structure 400 further includes a P-type doped region 471, a P-type doped region 472, a P-type doped region 478, and a P-type doped region 479. The P-type doped region 471 is formed in the P-type well 431. The P-type doped region 472 is formed in the P-type well 432. The P-type doped region 478 is formed in the P-type well 433. The P-type doped region 479 is formed in the P-type well 434. Since the characteristics of the P-type doped region 471, the P-type doped region 472, the P-type doped region 478, and the P-type doped region 479 are similar to those of the P-type doped region 271, the P-type doped region 272, the P-type doped region 275, and the P-type doped region 276 of the electrostatic discharge protection structure 200, they are not described again. Figure 2

[0060] In the present embodiment, the active device region 450 is formed on the N-type buried layer 420 and is located between the P-type well 432 and the P-type well 433. The active device region 450 includes at least N-type wells 442-444. In a possible embodiment, the N-type well 442 and the N-type well 444 contact the N-type buried layer 420 and enclose the N-type well 443. In this embodiment, the N-type well 442 and the N-type well 444 form a ring structure. In some embodiments, the N-type well 442 and the N-type well 444 are deep high voltage N-type wells (DHVNWs), and the N-type well 443 is a high voltage N-type well (HVNW).

[0061] ​​​In other embodiments, the active region 450 further includes an N-type doped region 473 and an N-type doped region 477. The N-type doped region 473 is formed in the N-type well 442. The N-type doped region 477 is formed in the N-type well 444. In this case, the N-type doped region 473 and the N-type doped region 477 have a higher doping concentration than the N-type well 442 and the N-type well 444.

[0062] In some embodiments, the active region 450 further includes a P-type doped region 474, a P-type doped region 475, a P-type doped region 476, and an N-type well 446. The P-type doped region 474 and the P-type doped region 476 are formed in the N-type well 443. The P-type doped region 474 and the P-type doped region 476 can form a ring structure to enclose the P-type doped region 475. The P-type doped region 475 is formed in the N-type well 446. The N-type well 446 is located in the N-type well 443.

[0063] In other embodiments, the ESD protection structure 400 further includes a field oxide layer 481, a field oxide layer 482, a field oxide layer 483, a field oxide layer 484, a field oxide layer 485, a field oxide layer 486, a field oxide layer 487, a field oxide layer 488, a field oxide layer 489, and a field oxide layer 490. The P-type doped region 471 is located between the field oxide layer 481 and the field oxide layer 482. The P-type doped region 472 is located between the field oxide layer 482 and the field oxide layer 483. The P-type doped region 478 is located between the field oxide layer 488 and the field oxide layer 489. The P-type doped region 479 is located between the field oxide layer 489 and the field oxide layer 490. Since the field oxide layers 481, 482, 483, 488, 489, and 490 have the same characteristics as the field oxide layers 291, 292, 293, and the field oxide layers 298, 299, 300, respectively, they are not described again. Figure 1 Since the field oxide layers 481, 482, 483, 488, 489, and 490 have the same characteristics as the field oxide layers 291, 292, 293, and the field oxide layers 298, 299, 300, respectively, they are not described again.

[0064] The N-type doped region 473 is located between the field oxide layer 483 and the field oxide layer 484. The P-type doped region 474 is located between the field oxide layer 484 and the field oxide layer 485. The P-type doped region 475 is located between the field oxide layer 485 and the field oxide layer 486. The P-type doped region 476 is located between the field oxide layer 486 and the field oxide layer 487. The N-type doped region 477 is located between the field oxide layer 487 and the field oxide layer 488. In some embodiments, the field oxide layer 483 and the field oxide layer 488 form a ring structure to enclose the N-type doped region 473 and the N-type doped region 477. In one possible embodiment, the field oxide layer 484 and the field oxide layer 487 form a ring structure to enclose the P-type doped region 474 and the P-type doped region 476. In addition, the field oxide layer 485 and the field oxide layer 486 form a ring structure to enclose the P-type doped region 475.

[0065] In other embodiments, the electrostatic discharge protection structure 400 further includes a power supply line VL and a power supply line VH. The power supply line VL is electrically connected to the P-type doped region 472, the P-type doped region 474, the P-type doped region 476, and the P-type doped region 478. The power supply line VH is electrically connected to the N-type doped region 473, the P-type doped region 475, and the N-type doped region 477. In some embodiments, the electrostatic discharge protection structure 400 further includes a substrate terminal Psub. The substrate terminal Psub is electrically connected to the P-type doped region 471 and the P-type doped region 479.

[0066] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. Further, unless otherwise noted, terms such as those defined in commonly diactionaries are to be interpreted as by their colloquial rather than idealized, ordinary, or formal sense unless expressly stated to the contrary. Although the terms "first," "second," etc. can be used herein to describe various elements or

[0067] While the application has been described by way of example with reference to preferred embodiments, it is to be understood that persons skilled in the art can make modifications of some preference and other embodiments which come within the scope of the application. For example, the systems, apparatuses, or methods described in the embodiments of the application can be implemented in hardware, software, or a combination of hardware and software. Therefore, the scope of the application is defined not by the detailed description, but by the appended claims, thereof.

Claims

1. An electrostatic discharge protection structure, characterized in that, include: A P-type substrate; A first P-type structure is formed in the P-type substrate and serves as an electrical contact of the P-type substrate; An N-type buried layer is formed in the P-type substrate; An active region of an element is formed on the N-type buried layer and includes: A second N-type well is formed on the N-type buried layer; A first N-type doped region is formed in the second N-type well; A third N-type well is formed on the N-type buried layer; A second N-type doped region is formed within the third N-type well; A fifth P-type well is formed on the N-type buried layer; A fifth P-type doped region is formed in the fifth P-type well; A seventh P-type well is formed on the N-type buried layer; A sixth P-type doped region is formed in the seventh P-type well; A P-type protective ring is formed on the N-type buried layer and surrounds the active region of the element, and includes: A first P-type well is formed on the N-type buried layer and in contact with the N-type buried layer; A first P-type doped region is formed in the first P-type well; A second P-type well is formed on the N-type buried layer and in contact with the N-type buried layer; A second P-type doped region is formed in the second P-type well; and A first N-type structure is formed on the N-type buried layer and located between the P-type protective ring and the first P-type structure, and surrounds the P-type protective ring. in: The first P-type doped region and the second P-type doped region constitute the P-type guard ring. The fifth P-type well and the seventh P-type well constitute a first ring structure. The second N-type well and the third N-type well constitute a second ring structure. The second annular structure surrounds the first annular structure, and the P-type protective ring surrounds the second annular structure.

2. The electrostatic discharge protection structure as described in claim 1, characterized in that, The first P-type structure surrounds the first N-type structure.

3. The electrostatic discharge protection structure as described in claim 1, characterized in that, The active area of ​​the component, the P-type protective ring, and the first N-type structure contact the N-type buried layer.

4. The electrostatic discharge protection structure as described in claim 1, characterized in that, The region of the first P-type structure mapped onto the P-type substrate does not overlap with the region of the N-type buried layer mapped onto the P-type substrate.

5. The electrostatic discharge protection structure as described in claim 1, characterized in that, Including: A first N-type well is formed on the N-type buried layer and in contact with the N-type buried layer; as well as A second N-type trap is formed on the N-type buried layer and in contact with the N-type buried layer; The first N-type well and the second N-type well constitute the first N-type structure.

6. The electrostatic discharge protection structure as described in claim 5, characterized in that, Including: A third P-type well is formed in the P-type substrate; A third P-type doped region is formed in the third P-type well; A fourth P-type well is formed in the P-type substrate; and A fourth P-type doped region is formed in the fourth P-type well; The third P-type doped region and the fourth P-type doped region constitute the first P-type structure.

7. The electrostatic discharge protection structure as described in claim 6, characterized in that, Including: A first field oxide layer is located between the third P-type doped region and the first P-type doped region; and A second field oxide layer is located between the second P-type doped region and the fourth P-type doped region.

8. The electrostatic discharge protection structure as described in claim 7, characterized in that, The first field oxide layer completely covers the first N-type well, and the second field oxide layer completely covers the second N-type well.

9. The electrostatic discharge protection structure as described in claim 6, characterized in that, The region of the third P-type well mapped onto the P-type substrate does not overlap with the region of the N-type buried layer mapped onto the P-type substrate.

10. The electrostatic discharge protection structure as described in claim 6, characterized in that, The active region of the component includes: A sixth P-type well is formed within the fifth P-type well; A third N-type doped region is formed in the sixth P-type well; An eighth P-type well is formed within the seventh P-type well; A fourth N-type doped region is formed in the eighth P-type well; A fourth N-type trap is formed on the N-type buried layer; and A seventh P-type doped region is formed in the fourth N-type well.

11. The electrostatic discharge protection structure as described in claim 10, characterized in that, Including: A first power supply trace electrically connects the first P-type doped region, the fifth P-type doped region, the third N-type doped region, the fourth N-type doped region, the sixth P-type doped region, and the second P-type doped region; and A second power supply trace is provided, which is electrically connected to the first N-type doped region, the seventh P-type doped region, and the second N-type doped region.

12. The electrostatic discharge protection structure as described in claim 11, characterized in that, The third P-type doped region and the fourth P-type doped region are not electrically connected to the first power supply trace and the second power supply trace.

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