Angled grating coupler with tilted side edges

Abstract

This disclosure relates to an angled grating coupler having angled side edges. A structure for the grating coupler and a method for manufacturing the structure for the grating coupler are also provided. The structure includes a grating coupler having a central portion and edge portions. The central portion and edge portions define sidewalls, and the central portion and edge portions have a first longitudinal axis, with the edge portions arranged at intervals along the first longitudinal axis. Each edge portion protrudes from the sidewall at an angle relative to the first longitudinal axis. A waveguide core is optically coupled to the grating coupler. The first longitudinal axis is aligned in a first direction, and the waveguide core has a second longitudinal axis aligned in a second direction different from the first direction.

Description

Technical Field

[0001] This disclosure relates to photonic chips, and more specifically to structures for grating couplers and methods for manufacturing structures for grating couplers. Background Technology

[0002] Photonic chips are used in many applications and systems, including but not limited to data communication and computing systems. Photonic chips integrate optical components (such as waveguides, photodetectors, modulators, and optical power dividers) and electronic components (such as field-effect transistors) into a unified platform. By integrating both types of components on the same chip, factors such as layout area, cost, and operational overhead can be reduced.

[0003] Grating couplers are commonly used in photonic chips to provide antennas in LiDAR (LiDAR) systems and for phased arrays. A grating coupler can direct or receive pulsed light from or from a chip at a given emission angle. Traditional grating couplers are inefficient or lack compactness and are not robust to manufacturing variations.

[0004] There is a need for improved structures for grating couplers and methods for manufacturing structures for grating couplers. Summary of the Invention

[0005] In one embodiment, a structure includes a grating coupler having a central portion and a plurality of edge portions. The central portion and the plurality of edge portions define sidewalls, and the central portion and the plurality of edge portions have a first longitudinal axis, with the plurality of edge portions arranged at intervals along the first longitudinal axis. Each of the plurality of edge portions projects from the sidewall at an angle relative to the first longitudinal axis. The structure also includes a waveguide core optically coupled to the grating coupler. The first longitudinal axis is aligned in a first direction, and the waveguide core has a second longitudinal axis aligned in a second direction different from the first direction.

[0006] In one embodiment, a method includes forming a grating coupler comprising a central portion and a plurality of edge portions. The central portion and the plurality of edge portions define sidewalls, and the central portion and the plurality of edge portions have a first longitudinal axis, the plurality of edge portions being arranged at intervals along the first longitudinal axis. Each of the plurality of edge portions projects from the sidewalls at an angle relative to the first longitudinal axis. The method further includes forming a waveguide core optically coupled to the grating coupler. The waveguide core has a second longitudinal axis aligned with the first longitudinal axis in a first direction, and the second longitudinal axis aligned in a second direction different from the first direction. Attached Figure Description

[0007] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate various embodiments of the invention and, together with the general description of the invention given above and the detailed description of the embodiments given below, serve to explain the embodiments of the invention. In the drawings, the same reference numerals denote the same features in various views.

[0008] Figure 1-4 This is a cross-sectional view of the structure of the continuous manufacturing stage of the processing method according to an embodiment of the present invention.

[0009] Figure 5-9 This is a cross-sectional view of the structure according to an alternative embodiment of the present invention. Detailed Implementation

[0010] refer to Figure 1 According to an embodiment of the invention, structure 10 includes a semiconductor layer 12 formed on a portion of waveguide core 20. Semiconductor layer 12 may define a raised mesa-like structure etched with a plurality of surfaces 14, 16, 18 arranged at a given angle relative to each other. Surface 14 may represent the topmost surface of semiconductor layer 12, and surface 16 may be connected to surface 18 via surface 14. Waveguide core 20 may be formed by patterning a device layer on a silicon-on-insulator (SOI) substrate, the SOI substrate further including a processing substrate 21 and a buried insulating layer 19 arranged to separate the device layer from the processing substrate 21.

[0011] Semiconductor layer 12 may be composed of a semiconductor material (e.g., silicon, germanium, or silicon-germanium) formed from a surface region of waveguide core 20 by a selective epitaxial growth process, the surface region being exposed within a patterned window in dielectric hard mask 11. In this regard, surfaces 16, 18 may be facets with a tilted orientation due to a growth rate dependent on crystal orientation during the selective epitaxial growth process. The composition of semiconductor layer 12 may be uniform throughout its volume.

[0012] Semiconductor layer 12 comprises a single-crystal semiconductor material characterized by multiple crystal orientations resulting from a growth rate dependent on crystal orientation. Surface 14 has a surface normal 13, which may be collinear with the surface normal of a portion of the waveguide core 20 on which the semiconductor layer 12 is formed. Surface normal 15 of faceted surface 16 is inclined at an angle θ1 relative to surface normal 13 of surface 14. Surface normal 17 of faceted surface 18 is inclined at an angle θ2 relative to surface normal 13 of surface 14. In an embodiment, angles θ1 and θ2 may be equal. In an embodiment, the surface normal 15 of surface 16 and the surface normal 17 of surface 18 may be within the lattice structure of semiconductor layer 12. <111> Oriented in a certain direction, the surface normal 13 of surface 14 can be in the lattice structure of semiconductor layer 12. <100> Orientation in direction. Semiconductor layer 12 can be embodied as a three-dimensional mesa or mound, wherein surface 14 is a spaced top surface above waveguide core 20, and surfaces 16 and 18 are connected by another faceted surface that shares a common periphery around surface 14.

[0013] refer to Figure 2 The same reference numerals indicate Figure 1 The same features are present in the semiconductor layer 12, and in subsequent manufacturing stages, alternating semiconductor layers 22 and 24 comprising different semiconductor materials are formed on semiconductor layer 12 via an epitaxial growth process. Semiconductor layers 22 and 24 are arranged in a layer stack defining an epitaxial superlattice structure. Semiconductor layers 22 and 24 are thinner than semiconductor layer 12, which provides a support structure with a predetermined crystal orientation and / or tilt angle for forming the thinner semiconductor layers 22 and 24. The different crystal orientations and / or tilt angles of semiconductor layer 12 are reproduced in semiconductor layers 22 and 24. The number of pairs of semiconductor layers 22 and 24 may differ from the number depicted in the representative embodiment.

[0014] The compositions of semiconductor layers 22 and 24 are tailored to allow selective etching of semiconductor layer 22 relative to semiconductor layer 24. As used herein, the term "selective" in relation to a material removal process (e.g., etching) means that, through the selection of a suitable etchant, the material removal rate (i.e., etch rate) of the target material is greater than the removal rate of at least one other material exposed to the material removal process. In embodiments, semiconductor layers 22 and 24 may be composed of silicon containing different concentrations of dopants (e.g., boron). In embodiments, semiconductor layer 22 may contain a higher concentration of dopants than semiconductor layer 24. In embodiments, semiconductor layer 22 may be heavily doped with a dopant such as boron, and semiconductor layer 24 may be undoped. In embodiments, semiconductor layer 22 may be composed of silicon-germanium, and semiconductor layer 24 may be composed of silicon. In embodiments, semiconductor layer 22 may be composed of silicon-germanium with a germanium content of 25% to 35% (35%), and semiconductor layer 24 may be germanium-free. Differences in dopant concentration or germanium content allow for selective etching of semiconductor layer 22 relative to semiconductor layer 24.

[0015] The thicknesses of semiconductor layer 22 and semiconductor layer 24 are adjustable and, since they are formed independently, can be selected independently. In one embodiment, the thicknesses of all semiconductor layers 22 and all semiconductor layers 24 may be nominally equal. In another embodiment, the thicknesses of all semiconductor layers 22 and all semiconductor layers 24 may be nominally equal, and the thickness of semiconductor layer 22 may be nominally equal to the thickness of semiconductor layer 24.

[0016] All these semiconductor layers 22, 24 can utilize surfaces 14, 16, 18 of semiconductor layer 12. Figure 1 The facets and tilt angles of the semiconductor layers 22 and 24. In this regard, each semiconductor layer 22 includes a portion on surface 14 of semiconductor layer 12, a portion on surface 14 of semiconductor layer 12, and a portion on surface 18 of semiconductor layer 12, and each semiconductor layer 24 includes a portion on surface 14 of semiconductor layer 12, a portion on surface 14 of semiconductor layer 12, and a portion on surface 18 of semiconductor layer 12. The portions on surfaces 16 and 18 of semiconductor layers 22 and 24 may be angled relative to the portions on surface 14 of semiconductor layers 22 and 24, the tilt angle being determined by the angling of surfaces 14, 16, and 18. Semiconductor layers 22 and 24 contain single-crystal semiconductor material characterized by multiple crystal orientations.

[0017] A portion of surface 14 of semiconductor layers 22, 24 has a surface normal 26. A portion of surface 16 of semiconductor layers 22, 24 has a surface normal 27, which is inclined at an angle θ3 relative to the surface normal 26 of the portion of surface 14 of semiconductor layers 22, 24. A portion of surface 18 of semiconductor layers 22, 22 has a surface normal 28, which is inclined at an angle θ4 relative to the surface normal 26 of the portion of surface 14 of semiconductor layers 22, 24. In an embodiment, the tilt angle θ3 may be equal to the tilt angle θ4. In an embodiment, the tilt angle θ3 may be equal to the tilt angle θ1. Figure 1 The inclination angle θ4 can be equal to the inclination angle θ2. Figure 1 ).

[0018] refer to Figure 3 The same reference numerals indicate Figure 2 The same features are present in the semiconductor layers 22 and 24, and a capping layer 30 can be formed over these semiconductor layers in a subsequent manufacturing stage. The capping layer 30 can be composed of a dielectric material (e.g., silicon nitride) or various inert materials.

[0019] refer to Figure 4 The same reference numerals indicate Figure 3 The same features are used in the patterning of the capping layer 30 and semiconductor layers 22, 24 in subsequent manufacturing stages to define the width W of the angled grating coupler of structure 10. In a representative embodiment, portions on surface 14 and surface 18 of semiconductor layers 22, 24, as well as portions of semiconductor layer 12 including surfaces 14 and 18, can be completely removed by patterning. After patterning, semiconductor layers 22, 24 include sidewalls 23 and sidewalls 25 opposite to sidewalls 23.

[0020] refer to Figure 5 The same reference numerals indicate Figure 4 The semiconductor layer 22 exhibits the same characteristics as the semiconductor layer 24, and in subsequent manufacturing stages, it is laterally recessed relative to the semiconductor layer 24 via an etching process that selectively etches the semiconductor material constituting the semiconductor layer 22 relative to the semiconductor material constituting the semiconductor layer 24. This lateral recess in the semiconductor layer 22 creates indentations in the sidewalls 23 and 25 because the semiconductor layer 24 is not laterally recessed due to the etch selectivity of the etching process. The etching process can be a wet etching process, such as a potassium hydroxide etching process. In an alternative embodiment, the etching process can be a reactive ion etching process.

[0021] Structure 10 includes angled gratings in an angled grating coupler, these angled gratings being generated by lateral recesses in semiconductor layer 22. A side edge 32 of semiconductor layer 24 protrudes laterally outward at sidewall 23 relative to the shortened semiconductor layer 22. The side edge 32 defines the grating feature of one of the angled gratings included in the angled grating coupler. Structure 10 also includes a side edge 34 of semiconductor layer 24, which protrudes laterally outward at sidewall 25 relative to the shortened semiconductor layer 22. The side edge 34 defines the grating feature of another of the angled gratings included in the angled grating coupler.

[0022] Semiconductor layers 22 and 24 contribute to the formation of a central portion 33, which is laterally located between side edge portions 32 and 34. The central portion 33 defines a continuous central core region (i.e., a ridge) of the grating coupler, in which semiconductor layers 22 and 24 alternate vertically. The contours of sidewalls 23 and 25 follow the contours of the side surfaces of side edge portions 34 and the central portion 33.

[0023] The side edge portion 32 of semiconductor layer 24 protrudes outward from the center portion 33 at the sidewall 23, and the side edge portion 34 of semiconductor layer 24 protrudes outward from the center portion 33 at the sidewall 25. The shortened semiconductor layer 22 provides a bridge connecting adjacent semiconductor layers 24 in the center portion 33. The lateral recess defines the length L of the side edge portions 32, 34 of semiconductor layer 24. The side edge portions 32, 34 have a width w that can be nominally equal to the thickness of semiconductor layer 24.

[0024] The central portion 33 of the angled grating coupler extends aligned along the longitudinal axis 40. The waveguide core 20 coupled to the angled grating coupler extends aligned along the longitudinal axis 42. The longitudinal axis 42 of the waveguide core 20 can be oriented in a given direction in a coordinate system, while the longitudinal axis 40 of the angled grating coupler can be oriented in different given directions in a coordinate system. In an embodiment, the longitudinal axis 42 of the waveguide core 20 can be oriented in a horizontal direction, while the longitudinal axis 40 of the angled grating coupler can be oriented in a vertical direction. In an embodiment, the longitudinal axis 42 can be transverse to the longitudinal axis 40.

[0025] The side edges 32 of semiconductor layer 24 are inclined at an angle θ3 relative to the vertical axis 40, and the side edges 34 of semiconductor layer 24 are also inclined at an angle θ3 relative to the vertical axis 40. The side edges 32 and 34 of semiconductor layer 24 are spaced apart along the vertical axis 40. In this respect, the side edges 32 and 34 of semiconductor layer 24 have a vertical spacing s. The spacing s can be nominally equal to the thickness of semiconductor layer 22. In an embodiment, the spacing s between side edges 32 can be uniform, the spacing s between side edges 34 can be uniform, and the spacing s between side edges 32 can be equal to the spacing s between side edges 34.

[0026] For example, structure 10 can be used as an antenna. The side edges 32, 34 of the vertically spaced semiconductor layers 24 provide angled grating couplers for the antenna. In this respect, the angled grating coupler of structure 10 can transmit light optically coupled from waveguide core 20 as an optical signal into free space. Alternatively, the angled grating coupler of structure 10 can receive light as an optical signal arriving from a remote light source and optically couple the received light to waveguide core 20.

[0027] As an antenna, structure 10 exhibits improved coupling efficiency through the angle setting of the side edges 32, 34 of semiconductor layer 24, which can be adjusted to optimize constructive interference. Compared to conventional antennas, structure 10 can transmit optical signals with an extended field of view and an extended angular range for LiDAR applications.

[0028] refer to Figure 6 According to an alternative embodiment, the capping layer 30 and semiconductor layers 22, 24 can be patterned to change the width of structure 10. For example, a portion of the surface 18 of semiconductor layers 22, 24 can be completely removed by patterning, and a portion of the surface 14 of semiconductor layers 22, 24 can be partially removed by patterning. Semiconductor layer 22 is laterally recessed relative to semiconductor layer 24 to provide side edges 32, 34. A portion of semiconductor layers 22, 24 on the surface 16 of semiconductor layer 12 and the side edge 32 of semiconductor layer 24 are inclined at an angle θ1 relative to the surface normal 26. Figure 3 The portions of semiconductor layers 22 and 24 on the surface 14 of semiconductor layer 12, and the side edge 34 of semiconductor layer 24, have a surface normal 26 aligned with the longitudinal axis 40, and are therefore aligned at a different tilt angle than the side edge 32. Thus, structure 10 includes an angled grating provided by the side edge 32 and a non-angled grating provided by the side edge 34. The combination of the angled and non-angled gratings can effectively increase the omnidirectionality of the antenna, which allows for greater coupling to a variety of on-axis and off-axis optical signals.

[0029] refer to Figure 7 According to an alternative embodiment, the thickness of the semiconductor layer 24 can be varied during epitaxial growth so that, after patterning and lateral recessing, the side edges 32, 34 of the semiconductor layer 24 have a width w that varies with the vertical position along the longitudinal axis 40. In this embodiment, the width w of the side edges 32, 34 of the semiconductor layer 24 can increase with increasing distance from the waveguide core 20.

[0030] The thickness t of the semiconductor layer 22 can also be varied during epitaxial growth so that, after patterning and lateral recessing, the side edges 32, 34 of the semiconductor layer 24 have a spacing s that varies with the vertical position along the longitudinal axis 40. In an embodiment, the aperiodic spacing s between the side edges 32, 34 of the semiconductor layer 24 can increase with increasing distance from the waveguide core 20.

[0031] Variations in the width and / or spacing of angled gratings can effectively improve the antenna's sensitivity to optical signals with a wider range of incident wavelengths.

[0032] refer to Figure 8 According to an alternative embodiment, portions of the semiconductor layers 22, 24 epitaxially grown on surface 16 may have an angle θ3 that varies with the vertical position. Figure 2 In a representative embodiment, the tilt angle θ3 can decrease as the distance from the waveguide core 20 along the longitudinal axis 40 increases. The change in tilt angle θ3 is achieved by altering the epitaxial growth conditions and / or the structure of the waveguide core 20. For example, to change the tilt angle θ3, the surface normal 27 of a portion of the surface 16 of the semiconductor layers 22, 24 can be altered from the lattice structure by changing the epitaxial growth conditions. <111> Orientation in the direction of the crystal lattice structure <311> A change in orientation in direction.

[0033] The side edges 32, 34 of the semiconductor layer 24 providing the angled grating exhibit angular variations. The angular variation of the angled grating can effectively increase the omnidirectionality of the antenna, which allows for greater coupling to a variety of on-axis and off-axis optical signals.

[0034] refer to Figure 9According to an alternative embodiment, structure 10 can be modified to add reflector 36 and waveguide core 38 as optical components. In an alternative embodiment, structure 10 can be modified to add only reflector 36 as an optical component. In an alternative embodiment, structure 10 can be modified to add only waveguide core 38 as an optical component. Reflector 36 can be made of metal and can be formed in a patterned shallow trench in the central portion 33. Waveguide core 38 can be made of a dielectric material (e.g., silicon nitride) and can also be formed in a patterned shallow trench in the central portion 33. Reflector 36 can increase optical coupling by reflecting incident light not captured by the angled grating in the direction returning to the angled grating, thereby improving antenna sensitivity. Waveguide core 38 can improve the coupling of the antenna to the waveguide core 20.

[0035] The methods described above are used to manufacture integrated circuit chips. The resulting integrated circuit chips can be distributed by manufacturers in the form of raw wafers (e.g., as a single wafer with multiple unpackaged chips), as bare dies, or in packages. The chips can be integrated with other chips, discrete circuit elements, and / or other signal processing devices as part of intermediate or final products. The final product can be any product that includes integrated circuit chips, such as a computer product with a central processing unit or a smartphone.

[0036] References to terms modified by approximate language such as “approximately,” “about,” or “basically” in this document are not limited to the specified precise values. Approximate language may correspond to the precision of the instrument used to measure the value, and, unless dependent on the precision of the instrument, may indicate a range of + / -10% of the value.

[0037] The use of terms such as “vertical” and “horizontal” in this document establishes a frame of reference by way of example rather than limitation. As used herein, the term “horizontal” is defined as a plane parallel to the conventional plane of the semiconductor substrate, regardless of its actual three-dimensional spatial orientation. The terms “vertical” and “normal” refer to directions perpendicular to the horizontal direction just defined. The term “lateral” refers to a direction within the horizontal plane.

[0038] A feature that is “connected” or “coupled” to or with another feature can be directly connected or coupled to or coupled to other features, or one or more intermediate features may exist. If no intermediate features exist, a feature can be “directly connected” or “directly coupled” to or directly coupled to another feature. If at least one intermediate feature exists, a feature can be “indirectly connected” or “indirectly coupled” to or indirectly coupled to another feature. A feature that is “on” or “in contact” with another feature can be directly on or in direct contact with other features, or one or more intermediate features may exist. If no intermediate features exist, a feature can be “directly” on or in direct contact with another feature. If at least one intermediate feature exists, a feature can be “indirectly” on or indirectly in contact with another feature. If a feature extends over and covers a portion of another feature in a manner that is in direct or indirect contact, the different features can “overlap.”

[0039] The description of various embodiments of the present invention is given for illustrative purposes and is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is for the purpose of best explaining the principles of the embodiments, their practical application, or technical improvements relative to technologies found in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A semiconductor structure, comprising: A grating coupler includes a first plurality of semiconductor layers, a second plurality of semiconductor layers, a central portion, and a first plurality of edge portions, the central portion and the first plurality of edge portions defining a first sidewall, the central portion and the first plurality of edge portions having a first longitudinal axis, the first plurality of edge portions being arranged along the first longitudinal axis at a first interval, the first longitudinal axis being aligned in a first direction, each of the first plurality of edge portions projecting from the first sidewall at a first angle relative to the first longitudinal axis, the first plurality of semiconductor layers and the second plurality of semiconductor layers alternating in a layer stack along the first longitudinal axis, and the second plurality of semiconductor layers being recessed at the first sidewall relative to the first plurality of semiconductor layers, such that the first plurality of semiconductor layers define the first plurality of edge portions; as well as A waveguide core optically coupled to the grating coupler, the waveguide core having a second longitudinal axis aligned in a second direction different from the first direction.

2. The structure according to claim 1, wherein, The grating coupler includes a second plurality of edge portions, the central portion and the second plurality of edge portions defining a second sidewall opposite to the first sidewall, the second plurality of edge portions being arranged along the first longitudinal axis at a second spacing relationship, and each of the second plurality of edge portions protruding from the second sidewall at a second angle relative to the first longitudinal axis.

3. The structure according to claim 2, wherein, The first angle is equal to the second angle.

4. The structure according to claim 1, wherein, The grating coupler includes a second plurality of edge portions connected through the central portion, and the first plurality of edge portions protrude from a second side of the central portion transverse to the first longitudinal axis.

5. The structure according to claim 1, wherein, The first angle varies with the position along the first vertical axis.

6. The structure according to claim 1, wherein, The first plurality of edge portions have a spacing in the first direction that varies with their position along the first longitudinal axis.

7. The structure according to claim 1, wherein, The first plurality of edge portions have equal first angles.

8. The structure according to claim 1, wherein, The first plurality of semiconductor layers include silicon, and the second plurality of semiconductor layers include silicon germanium.

9. The structure according to claim 1, wherein, The first plurality of semiconductor layers include silicon with a first concentration of dopant, and the second plurality of semiconductor layers include silicon with a second concentration of the dopant, wherein the second concentration of the dopant is greater than the first concentration of the dopant.

10. The structure according to claim 1, further comprising: An optical component adjacent to the center portion of the grating coupler, the optical component being aligned with the first longitudinal axis.

11. The structure according to claim 1, further comprising: A faceted semiconductor layer is located in the first direction between the waveguide core and the center portion of the grating coupler.

12. The structure according to claim 11, wherein, The faceted semiconductor layer includes a surface tilted at the first angle, and the grating coupler is located on the surface of the faceted semiconductor layer.

13. The structure according to claim 1, wherein, The first direction is the vertical direction, and the second direction is the horizontal direction.

14. The structure according to claim 1, wherein, The first direction is oriented laterally to the second direction.

15. A method for forming a semiconductor structure, comprising: A grating coupler is formed comprising a central portion and a first plurality of edge portions, wherein the central portion and the first plurality of edge portions define a first sidewall, the central portion and the first plurality of edge portions have a first longitudinal axis, the first plurality of edge portions are arranged along the first longitudinal axis at a first interval, and each of the first plurality of edge portions protrudes from the first sidewall at a first angle relative to the first longitudinal axis; and A waveguide core is formed that is optically coupled to the grating coupler, wherein the waveguide core has a second longitudinal axis, the first longitudinal axis is aligned in a first direction, and the second longitudinal axis is aligned in a second direction different from the first direction. The grating coupler comprising the central portion and the first plurality of edge portions includes: An epitaxial growth layer stack, the layer stack comprising a first plurality of semiconductor layers and a second plurality of semiconductor layers alternating with the first plurality of semiconductor layers along a first longitudinal axis and in a first direction; and The second plurality of semiconductor layers are recessed relative to the first plurality of semiconductor layers at the first sidewall, such that the first plurality of semiconductor layers define the first plurality of edge portions.

16. The method according to claim 15, wherein, The grating coupler includes a second plurality of edge portions, the central portion and the second plurality of edge portions defining a second sidewall opposite to the first sidewall, the second plurality of edge portions being arranged along the first longitudinal axis at a second spacing relationship, and each of the second plurality of edge portions protruding from the second sidewall at a second angle relative to the first longitudinal axis.

17. The method according to claim 15, wherein, The first angle varies with the position along the first vertical axis.

18. The method according to claim 15, wherein, The first plurality of edge portions have a spacing in the first direction that varies with their position along the first longitudinal axis.

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