Silicon wafer and method of manufacturing the same

Abstract

Provided is a silicon wafer suitable for IGBT use, which is a silicon wafer that is high in resistance and small in resistance fluctuation, and in which the generation of slip can be suppressed. A silicon wafer in which, in an oxygen concentration distribution in the thickness direction of the silicon wafer, the oxygen concentration is higher than the oxygen concentration of the silicon wafer (ASTM F121, 1979) by 1.5 x 10 17 atoms / cm 3 The above high-oxygen-concentration region exists only in the back surface layer portion, and the average oxygen concentration in the region from the top surface of the back surface of the silicon wafer to a region 10 μm in the thickness direction is 4.0 x 10 17 atoms / cm 3 The above and 15.0 x 10 17 atoms / cm 3 or more.

Description

TECHNICAL FIELD

[0001] The present application relates to a silicon wafer and a method for manufacturing the same. BACKGROUND

[0002] In recent years, as a switching device for power use, a thyristor and a bipolar transistor, a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), and the like have been actively developed. Among them, the IGBT is a device that has both the high speed of the MOSFET and the low saturation voltage characteristic of the bipolar transistor, and is attracting attention in uses such as a power source for a power motor of a hybrid vehicle, an electric automobile, which requires large capacity, high withstand voltage, and high speed switching.

[0003] The IGBT is a gate voltage driven type switching device (also referred to as a "vertical IGBT") having a gate electrode and an emitter electrode formed on the front surface side of a silicon wafer, and a collector electrode formed on the back surface side, and a switching current flows through the entire silicon wafer between the emitter electrode on the front surface side and the collector electrode on the back surface side. Thus, if there is a crystal defect in the inside of the silicon wafer, the device characteristics deteriorate, and therefore it is important that there is no crystal defect from the front surface of the wafer to the back surface in the silicon wafer.

[0004] In addition, in terms of the resistivity of the silicon wafer, it is also important that the entire wafer is high in resistance and has no variation. In this regard, in the case where the oxygen concentration of the silicon wafer is high, oxygen atoms become oxygen donors, and thus the resistivity of the silicon wafer fluctuates. Therefore, it is also important that the oxygen concentration of the silicon wafer is low.

[0005] Therefore, as described in Patent Document 1, a method is proposed in which a silicon ingot having a low interstitial oxygen concentration formed by a Czochralski method is irradiated with a neutron ray to dope phosphorus, and then a wafer is cut out, and oxidation atmosphere annealing is performed, thereby obtaining a silicon wafer having a uniform resistivity.

[0006] In addition, in Patent Document 2, a method is proposed in which, in a method for manufacturing a single crystal silicon ingot, an n-type high-resistance single crystal silicon ingot having a uniform resistivity in the pulling length direction is manufactured by controlling the amount of n-type dopant evaporated from a silicon melt at the time of pulling the single crystal silicon ingot.

[0007] However, it is known that slip is easily generated in the case where a low-oxygen silicon wafer is used in order to reduce resistance fluctuation. If slip is generated on the back surface of the silicon wafer, it has a large influence on the device yield due to current leakage and a positional deviation in a photolithography process. Note that it is considered that the lower the oxygen concentration of the silicon wafer, the smaller the critical dicing stress of the silicon wafer, and the more easily slip is generated.

[0008] Prior Art Documents

[0009] Patent Documents

[0010] Patent Document 1: Japanese Patent Application Publication No. 2012-134517,

[0011] Patent Document 2: International Publication No. 2018 / 159108. SUMMARY

[0012] PROBLEMS TO BE SOLVED BY THE INVENTION

[0013] Thus, although attempts have been made to manufacture a silicon wafer having a high resistance and a small resistance fluctuation suitable for IGBT use by various methods, in the prior art using a silicon wafer having a low oxygen concentration, it has been difficult to suppress resistance fluctuation at a high resistance while preventing slip generation so far.

[0014] Therefore, an object of the present application is to provide a silicon wafer which is a silicon wafer suitable for IGBT use, has a high resistance and a small resistance fluctuation, and can suppress slip generation, and a manufacturing method thereof.

[0015] MEANS FOR SOLVING THE PROBLEMS

[0016] In order to solve the above problems, the present inventors have conducted intensive studies. First, the higher the oxygen concentration of the silicon wafer, the higher the critical dicing stress, and the more difficult it is to generate slip. However, since slip is generated from a contact damage generated on the surface of the wafer as a starting point, the present inventors predicted that, rather than the oxygen concentration of the entire wafer, only the oxygen concentration of the surface layer portion of the wafer affects slip generation. Also, since the back surface side of the silicon wafer supported during the manufacture of an IGBT device is a problem of slip generation, the present inventors conceived of forming a high-oxygen concentration region only in the surface layer portion of the back surface. Therefore, the present inventors conceived that, by heat-treating a silicon wafer having a low oxygen concentration in an oxygen atmosphere to temporarily increase the oxygen concentration of the surface layer portions of the front surface and the back surface of the silicon wafer, and then removing only the high-oxygen concentration region on the front surface side, a silicon wafer in which a high-oxygen concentration region remains on the back surface side is obtained.

[0017] If such a silicon wafer, the entire wafer has a high resistance, and resistance fluctuation can be suppressed, and slip generation in a device manufacturing process can also be suppressed. That is, the gist of the present application is configured as follows.

[0018] <1> A silicon wafer, wherein, in an oxygen concentration distribution in a thickness direction of the silicon wafer, an oxygen concentration of a high oxygen concentration region is higher than an oxygen concentration (ASTM F121, 1979) of the silicon wafer by 1.5 x 1018 atoms / cm2. 17 atoms / cm2 3 The above high oxygen concentration region exists only in a back surface layer portion, and an average oxygen concentration of a region from a top surface of the back surface of the silicon wafer to 10 μm in the thickness direction is 4.0 x 1018 atoms / cm2. 17 atoms / cm2 3 The above and 15.0 x 1018 atoms / cm2. 17 atoms / cm2 3 or more.

[0019] <2> The silicon wafer according to <1>, wherein an average oxygen concentration of a region from a top surface of a front surface of the silicon wafer to 10 μm in the thickness direction is 4.0 x 1018 atoms / cm2. 17 atoms / cm2 3 or more.

[0020] <3> The silicon wafer according to <1> or <2>, wherein a thickness of the high oxygen concentration region is 10 μm or more and 30 μm or less.

[0021] <4> The silicon wafer according to any one of <1> to <3>, wherein an oxygen concentration of the silicon wafer is 4.0 x 1018 atoms / cm2. 17 atoms / cm2 3 or more.

[0022] <5> The silicon wafer according to any one of <1> to <4>, wherein a resistivity of the silicon wafer is 30 Ω-cm or more and 10,000 Ω-cm or less.

[0023] <6> The silicon wafer according to any one of <1> to <5>, wherein the silicon wafer does not contain dislocation clusters and COP.

[0024] <7> A manufacturing method of a silicon wafer, the manufacturing method comprising: a high oxygen concentration layer forming step of forming a high oxygen concentration layer in each of a surface layer portion of a front surface side and a surface layer portion of a back surface side of a pre-polish silicon wafer by heat treating the pre-polish silicon wafer in an oxygen-containing gas atmosphere, and a high oxygen concentration layer removing step of removing the high oxygen concentration layer of the front surface side of the pre-polish silicon wafer after the high oxygen concentration layer forming step; wherein, in an oxygen concentration distribution in a thickness direction of the pre-polish silicon wafer, the high oxygen concentration layer formed in the high oxygen concentration layer forming step has an oxygen concentration higher than an oxygen concentration (ASTM F121, 1979) of the pre-polish silicon wafer by 1.5 x 1018 atoms / cm2. 17 atoms / cm2 3The average oxygen concentration of the region from the surface of the back surface of the silicon wafer after the high-oxygen-concentration layer removal step to a region 10 μm in thickness direction was 4.0 x 10 17 atoms / cm 3 or more and 15.0 x 10 17 atoms / cm 3 or less.

[0025] <8> The method for manufacturing a silicon wafer according to <7>, wherein the high-oxygen-concentration layer formed in the high-oxygen-concentration layer formation step is formed in each region of 20 μm or less in thickness direction from the surface of the front surface and the back surface of the pre-polishing silicon wafer.

[0026] <9> The method for manufacturing a silicon wafer according to any one of <7> to <8>, wherein the oxygen concentration of the pre-polishing silicon wafer is 4.0 x 10 17 atoms / cm 3 or more.

[0027] <10> The method for manufacturing a silicon wafer according to any one of <7> to <9>, wherein the high-oxygen-concentration layer removal step includes a double-side polishing step of simultaneously polishing the front surface and the back surface of the pre-polishing silicon wafer using a double-side polishing device.

[0028] <11> The method for manufacturing a silicon wafer according to <10>, wherein in the double-side polishing step, double-side polishing is performed under a condition that the polishing speed on the front surface side is faster than the polishing speed on the back surface side.

[0029] <12> The method for manufacturing a silicon wafer according to <10> or <11>, wherein before the double-side polishing step, an oxide film is formed only on the back surface side.

[0030] Effects of the Invention

[0031] According to the present application, it is possible to provide a silicon wafer suitable for IGBT use, which is high in resistance and small in resistance fluctuation, and in which generation of slip is suppressed, and a method for manufacturing the same. BRIEF DESCRIPTION OF DRAWINGS

[0032] [ Figure 1 ] shows a schematic view of the oxygen concentration distribution in the thickness direction of a silicon wafer after heat treatment, in which the oxygen concentration is 0.1 x 10 17 atoms / cm 3 or less.

[0033] [ Figure 2 ] shows a schematic view of the oxygen concentration distribution in the thickness direction of a silicon wafer after heat treatment, in which the oxygen concentration is 4.0 x 10 17 atoms / cm 3 or more.

[0034] [ Figure 3 ] shows a schematic view of the oxygen concentration distribution in the thickness direction of a silicon wafer after heat treatment, in which the oxygen concentration is 10.0 x 1018 atoms / cm2. 17 3

[0035] [ Figure 4 ] shows an example of an observation chart of the slip length of the surface of a silicon wafer observed by X-ray topography.

[0036] [ Figure 5 ] shows a graph of the relationship between the average oxygen concentration in the thickness direction and the length of the slip length of the silicon wafer involved in the pre-confirmation experiment.

[0037] [ Figure 6 ] shows a schematic cross-sectional view of a manufacturing method of a silicon wafer according to an embodiment of the present application.

[0038] [ Figure 7 ] shows a schematic cross-sectional view of a silicon wafer after heat treatment and a schematic view of the oxygen concentration distribution in the thickness direction.

[0039] [ Figure 8 ] shows a schematic cross-sectional view of a silicon wafer after SMP treatment and a schematic view of the oxygen concentration distribution in the thickness direction. DETAILED DESCRIPTION

[0040] Before the embodiments are explained, in order to confirm the relationship between the oxygen concentration distribution in the thickness direction of a silicon wafer and the generation of slips, the following preliminary experiment was performed.

[0041] (Preliminary Experiment)

[0042] In order to confirm the relationship between the oxygen concentration distribution in a silicon wafer and the generation of slips, a silicon wafer having a diameter of 200 mm and an initial oxygen concentration (ASTM F121, 1979) of 0.1 x 1018 atoms / cm2, 4.0 x 1018 atoms / cm2, and 10.0 x 1018 atoms / cm2was prepared. 17 3 17 3 17 3 ​​​​​​​three kinds of silicon wafers (for convenience, called "low-oxygen wafer", "medium-oxygen wafer", and "high-oxygen wafer" in this preliminary experiment). Here, the "oxygen concentration of the silicon wafer" is a value measured by Fourier Transform Infrared Spectroscopy (FTIR) according to ASTM F121-1979. In order to vary the oxygen concentration of the surface layer portion of these silicon wafers, heat treatment (for convenience, called "pre-annealing" in this preliminary experiment in order to distinguish from heat treatment in the device process in the case of actually manufacturing an IGBT) was performed using an RTA furnace and a horizontal furnace. The pre-annealing conditions of the RTA furnace were a heat treatment procedure of raising the temperature to 1250 degrees in 10 seconds, performing heat treatment at this temperature for 30 seconds, and lowering the temperature to room temperature in 10 seconds. The pre-annealing conditions of the horizontal furnace were a heat treatment procedure of placing the silicon wafer in a furnace maintained at 1150 degrees, performing heat treatment for 30 minutes at this temperature, and taking out the silicon wafer at this temperature. Figures 1-3 is a graph schematically showing the results obtained by measuring the oxygen concentration distribution in the thickness direction of the surface layer portion of each of the low-oxygen wafer, the medium-oxygen wafer, and the high-oxygen wafer after heat treatment using Secondary Ion Mass Spectrometry (SIMS).

[0043] In order to simulate the general heat treatment in the case of manufacturing an IGBT device after these pre-annealing processes, heat treatment at 1100 degrees was performed using a vertical furnace, and the slip length from the damage due to contact with the wafer boat supporting the silicon wafer was investigated. The maximum oxygen concentration of the silicon wafer subjected to each heat treatment, the average oxygen concentration in the region up to 5 μm and 10 μm of the surface layer portion of the wafer, and the slip length observed in the silicon wafer are shown in Table 1. Here, the "maximum oxygen concentration" refers to the maximum value in the oxygen concentration distribution in the thickness direction of the silicon wafer measured by SIMS. In addition, the "average oxygen concentration in the region up to 5 μm and 10 μm of the surface layer portion of the wafer" is the average value in the oxygen concentration distribution in the thickness direction of the silicon wafer measured by SIMS, and specifically, is a value obtained by dividing the integral value of the oxygen concentration distribution up to 5 μm or 10 μm in the depth direction by the width thereof, i.e., 5 μm or 10 μm. Note that the slip length was measured from the X-ray topography image. One example of the slip length is shown in Figure 4 . Figure 5The relationship between the average oxygen concentration from the surface of the silicon wafer (meaning "outermost surface" of the surface, hereinafter, the main surface of the device formation region of the wafer will be referred to as "top surface" and the surface on the opposite side will be referred to as "rear surface") to the region at a depth of 5 μm, 10 μm, the maximum oxygen concentration in the silicon wafer, and the slip length determined is shown in FIG. 1. The determination coefficient R 2 The determination coefficient R is highest at the average value at a depth of 10 μm 2 = 0.9477.

[0044] [Table 1]

[0045]

[0046] According to these experimental results, regardless of the magnitude of the initial oxygen concentration of the silicon wafer, as long as the oxygen concentration of the surface layer of the silicon wafer is increased by heat treatment, the slip resistance of the silicon wafer can be improved. In particular, in the thickness direction, if the average oxygen concentration of the region from the surface to 10 μm is high, the slip resistance can be sufficiently improved. Therefore, on the rear surface side of the silicon wafer, if the average oxygen concentration of the region from the surface to 10 μm in the thickness direction is increased, the generation of slip due to damage can be suppressed. Furthermore, if the oxygen concentration of the surface layer of the front and rear surfaces of a silicon wafer with a low oxygen concentration is temporarily increased by heat treatment in an oxygen atmosphere, and then only the high oxygen concentration region on the front surface side is removed while leaving the high oxygen concentration region on the rear surface side, the entire wafer is high in resistance and the resistance fluctuation can be suppressed, and the generation of slip on the rear surface side of the wafer, which is a concern in the IGBT device manufacturing process, can also be suppressed.

[0047] (Method for manufacturing silicon wafer)

[0048] According to the above preliminary experimental results, the embodiments of the method for manufacturing the silicon wafer according to the present embodiment will be described in detail below with reference to the accompanying drawings. Note that the same components are given the same reference numerals in principle, and repeated description will be omitted. In addition, in the drawings used in the description below, the same components as those in FIG. 1 are given the same reference numerals, and repeated description will be omitted. Figures 6-8In the drawings, the thickness of each component is exaggerated for simplicity. The manufacturing method of a silicon wafer according to the present application is characterized by comprising: a high-oxygen-concentration layer forming step of forming a high-oxygen-concentration layer on each of a surface layer portion of a front surface side and a surface layer portion of a back surface side of a pre-polish silicon wafer 110 by heat-treating the pre-polish silicon wafer 110 in an oxygen-containing gas atmosphere, and a high-oxygen-concentration layer removing step of removing the high-oxygen-concentration layer on the front surface side of the pre-polish silicon wafer 110 after the high-oxygen-concentration layer forming step; wherein the high-oxygen-concentration layer formed in the high-oxygen-concentration layer forming step has an oxygen concentration that is 1.5 x 10 17 atoms / cm 3 The average oxygen concentration of the region from the surface of the back surface of the silicon wafer after the high-oxygen-concentration layer removing step to a region 10 μm in the thickness direction is 4.0 x 10 17 atoms / cm 3 The average oxygen concentration of the region from the surface of the back surface of the silicon wafer after the high-oxygen-concentration layer removing step to a region 10 μm in the thickness direction is 4.0 x 10 17 atoms / cm 3 The following. Hereinafter, the details of each component and each step of the present application will be described according to each embodiment.

[0049] In the manufacturing method of a silicon wafer according to the present embodiment, heat treatment is performed on the silicon wafer, and a high-oxygen-concentration region is finally formed only on the back surface of the silicon wafer. In one embodiment shown as an example in Figure 6

[0050] <Pre-polish silicon wafer>

[0051] ​As the pre-polishing silicon wafer 110 used in the production of the silicon wafer according to the present application, a single crystal silicon wafer cut from a single crystal silicon ingot can be used. The single crystal silicon wafer can be a wafer cut from a single crystal silicon ingot grown by the Czochralski method (CZ method) or the floating zone melting method (FZ method) using a wire saw or the like. Here, in the case where the silicon wafer is used for a vertical device, if a defect exists in either of the areas in the longitudinal direction of the device formation area, a leakage current can be generated through the defect, thus affecting the device characteristics. Therefore, from the viewpoint of obtaining better device characteristics, the pre-polishing silicon wafer 110 is preferably a silicon wafer free from dislocation clusters and crystal originated particles (COPs).

[0052] Here, the "COP-free silicon wafer" in the present specification means a silicon wafer in which no COP is detected by the observation evaluation described below. That is, first, for a silicon wafer processed by cutting from a single crystal silicon ingot grown by the CZ method, SC-1 cleaning (i.e., cleaning using a mixed solution prepared by mixing ammonia water, hydrogen peroxide and ultrapure water at a ratio of 1:1:15) is performed, the surface of the cleaned silicon wafer is observed and evaluated using a surface defect inspection device, Surfscan SP-2 manufactured by KLA-Tencor Corporation, to determine light point defects (LPDs) inferred to be surface pits. At this time, the observation mode is set to the Oblique mode, and the inference of the surface pits is made based on the detection size ratio of the Wide Narrow channels. For the LPDs thus determined, whether or not it is a COP is evaluated using an atomic force microscope (AFM). Through this observation evaluation, a silicon wafer in which no COP is observed is noted as a "COP-free silicon wafer".

[0053] On the other hand, dislocation clusters are defects (dislocation loops) formed as condensates of excess interstitial silicon, which are large in size (about 10 μm), and can be confirmed visually at a simple level by performing etching treatment such as Secco etching or Cu decoration to make them visible.

[0054] <High-oxygen-concentration layer forming step>

[0055] The high oxygen concentration layer formation process involves heat-treating the silicon wafer 110 before polishing in an oxygen atmosphere to form a high oxygen concentration layer on the surface portions of both the front and back sides of the silicon wafer 110. This heat treatment process can be performed using general heating equipment, such as rapid heating and cooling heat treatment equipment like RTA (Rapid Thermal Annealing) and RTO (Rapid Thermal Oxidation), or intermittent heat treatment equipment (vertical heat treatment equipment, horizontal heat treatment equipment). Here, the oxygen flow rate supplied to the furnace of the heat treatment equipment is preferably set to 20 L / min or more, and more preferably 40 L / min or more. Other inert gases may also be contained in the furnace. The heat treatment temperature is preferably 1000°C or more and 1350°C or less, and more preferably 1100°C or more and 1300°C or less. The heat treatment time can be set appropriately according to the furnace used. For example, in an RTA furnace, a heat treatment of 10 seconds to 30 seconds is preferred, and in a batch heat treatment apparatus, a heat treatment of 10 minutes to 3 hours is preferred. In addition, the high oxygen concentration layer formed on each side in the high oxygen concentration layer formation process is preferably formed in each region from the outermost surface of the front and back sides of the silicon wafer to 20 μm in the thickness direction.

[0056] In the process of forming a high oxygen concentration layer, such as Figure 7 As shown, oxygen diffuses inwards from the surface portions of the front and back sides of the silicon wafer 110 before polishing, thereby forming a high oxygen concentration layer 112 on the front side and a high oxygen concentration layer 113 on the back side of each surface portion. The higher the heat treatment temperature and the longer the heat treatment time, the higher the oxygen concentration on the surface portion of the silicon wafer 110 before polishing, and the more oxygen diffuses towards the outermost surface of the silicon wafer 110. By heat-treating the silicon wafer before polishing, a high oxygen concentration layer is formed, and in the oxygen concentration distribution along the thickness direction of the silicon wafer 110 before polishing, the high oxygen concentration layer has an oxygen concentration 1.5 × 10⁻⁶ higher than the oxygen concentration of the silicon wafer 110 before polishing (ASTM F121, 1979). 17 atoms / cm 3 The above areas. In Figure 7 The diagram shows a silicon wafer with a front-side high-oxygen concentration layer 112 and a back-side high-oxygen concentration layer 113, and a schematic conceptual diagram of the oxygen concentration distribution in the thickness direction of the silicon wafer with each high-oxygen concentration layer. Figure 7 As shown, in the oxygen concentration distribution diffusing inward in the silicon wafer, peaks exist on the surface layers of both the front and back sides. The oxygen concentration (ASTM F121, 1979) of the silicon wafer 110 before polishing is preferably 4.0 × 10⁻⁶. 17 atoms / cm 3 The following describes the process where the silicon wafer 110 before polishing, prior to heat treatment, has a high oxygen concentration, and...Figure 3 In the same manner as in the example, the oxygen diffusion in the heat treatment is small.

[0057] <High oxygen concentration layer removing step>

[0058] In the lapping and polishing of the surface of a silicon wafer, generally, after double-side polishing (DSP) is performed on the front surface and the back surface of the silicon wafer, single-side polishing (SMP) is further performed on the surface of the front surface side of the silicon wafer. By performing double-side polishing, processing strain remaining on the front surface and the back surface of the silicon wafer is removed, and a prescribed flatness is ensured, and furthermore, by performing single-side polishing on only the front surface side, the surface of the front surface side of the silicon wafer is made to have a prescribed surface roughness. However, if double-side polishing is performed so that the polishing removal amounts of the front surface and the back surface are the same, a high oxygen concentration layer remains on the front surface side of the silicon wafer used as a device active layer, and the oxygen concentration specification is not satisfied, and the silicon wafer cannot be used as a product. Therefore, in the present embodiment, in the high oxygen concentration layer removing step, in order to remove only the front surface side high oxygen concentration layer 112 among the front surface side high oxygen concentration layer 112 and the back surface side high oxygen concentration layer 113 formed in the high oxygen concentration layer forming step, in the double-side polishing step, it is preferable to set a condition in which the polishing speed of the front surface side of the silicon wafer is faster than the polishing speed of the back surface side of the silicon wafer. To this end, for example, the use conditions of the upper polishing chuck and the lower polishing chuck can be changed. Specifically, with respect to the type of the polishing pad, a fixed abrasive pad in which an abrasive is embedded in the polishing pad can be used only on the upper side, or a combination of a urethane pad and a nonwoven fabric / suede leather can be appropriately used on the upper and lower sides. Furthermore, by making the pressure or the number of revolutions of the upper and lower polishing chucks different, the same purpose can be achieved. In addition, even if the polishing speeds are the same, a protective film such as an oxide film can be formed on only the back surface side before the double-side polishing step, so as to substantially reduce the polishing removal amount of the back surface side of the silicon wafer. By performing the processing under these conditions, the front surface side high oxygen concentration layer 112 of the silicon wafer can be completely removed, and a high oxygen concentration region 114 can remain on the back surface side. Note that the removal of the front surface side high oxygen concentration layer 112 in the high oxygen concentration layer removing step can also be performed using any method other than polishing, such as etching.

[0059] In this way, while the high oxygen concentration layer of the front surface is removed, a high oxygen concentration region remains on the back surface side, and thus a silicon wafer suitable for IGBT use, which has a high resistance and a small resistance fluctuation and in which the occurrence of slip can be suppressed, can be manufactured.

[0060] Next, the silicon wafer that can be obtained by the embodiment of the manufacturing method described above will be described in detail.

[0061] (Silicon wafer)

[0062] The silicon wafer according to the present application is a silicon wafer in which the oxygen concentration is higher than the oxygen concentration (ASTM F121, 1979) of the silicon wafer by 1.5 x 1017 atoms / cm 3 The high oxygen concentration region mentioned above exists only on the back surface layer. The average oxygen concentration in the region from the outermost surface of the back side of the silicon wafer to 10 μm in the thickness direction is 4.0 × 10⁻⁶. 17 atoms / cm 3 Above and 15.0×10 17 atoms / cm 3 The following describes the silicon wafer. The details of each component will be explained below. Here, since the high oxygen concentration region on the back surface accounts for a small proportion relative to the silicon wafer as a whole, the oxygen concentration of the silicon wafer as a whole can be considered substantially the same as the initial oxygen concentration of the silicon wafer before heat treatment, etc.

[0063] <Oxygen concentration in silicon wafers>

[0064] Regarding the oxygen concentration of the silicon wafer, it is preferable that only the back surface layer of the silicon wafer has an oxygen concentration 1.5 × 10⁻⁶ higher than the silicon wafer's oxygen concentration (ASTM F121, 1979). 17 atoms / cm 3 The above-mentioned high oxygen concentration regions have a thickness of 10 μm or more and 30 μm or less. No such high oxygen concentration regions are formed on the surface layer of the front side. It should be noted that, here, the surface layer of the silicon wafer refers to a region less than 50 μm thick from the outermost surface of both the front and back sides of the silicon wafer. As described above, since the oxygen concentration of the silicon wafer hardly changes before and after the high oxygen concentration layer formation and polishing processes during silicon wafer manufacturing, the oxygen concentration of the silicon wafer can be used as the value measured as the initial oxygen concentration of the silicon wafer. Here, the initial oxygen concentration refers to the oxygen concentration measured using FT-IR. Furthermore, when measuring the oxygen concentration along the wafer thickness direction using SIMS, the average value is expressed.

[0065] Here, regarding the oxygen concentration on the back surface, the average oxygen concentration in the region from the outermost surface of the back surface of the silicon wafer to 10 μm in the thickness direction is 4.0 × 10⁻⁶. 17 atoms / cm 3 Above and 15.0×10 17 atoms / cm 3 As will be described below, by having a high oxygen concentration layer on the back surface of the silicon wafer, slippage can be suppressed.

[0066] Furthermore, the average oxygen concentration in the region from the outermost surface of the front side to 10 μm in the thickness direction is preferably 4.0 × 10⁻⁶. 17 atoms / cm 3 The following is a summary of the advantages and disadvantages of silicon wafers. Because of the low oxygen concentration on the front side of the silicon wafer, the resistance fluctuation is small, making it suitable for manufacturing IGBTs.

[0067] <Resistivity of silicon wafer>

[0068] The resistivity of the silicon wafer is preferably 30 Ω-cm or more and 10,000 Ω-cm or less. Here, the measurement of the resistivity is a value measured by a four-probe method. Specifically, it can be measured by using the four-probe method to measure the center portion of the front surface of the silicon wafer.

[0069] The advantages of the wafer according to the above-described embodiment are described in more detail. As described above, if the oxygen concentration is high, it causes a fluctuation in the resistance, and therefore, if a high wafer oxygen concentration is adopted only to suppress the generation of slip, it is not suitable for IGBT use. First, consider a case where the oxygen concentration is 0.1 x 10 17 atoms / cm 3 or more and 4.0 x 10 17 atoms / cm 3 The following low-oxygen-concentration silicon wafer used in the conventional IGBT use (hereinafter, referred to as "conventional low-oxygen-concentration wafer" for convenience). In addition, consider a case where the oxygen concentration is 9.0 x 10 17 atoms / cm 3 or more and 15.0 x 10 17 atoms / cm 3 The following high-oxygen-concentration silicon wafer (hereinafter, referred to as "conventional high-oxygen-concentration wafer" for convenience). In addition, consider a case where the conventional low-oxygen-concentration wafer is subjected to heat treatment, and thus the oxygen concentration of the surface layer portion of the silicon wafer is high on both surfaces (hereinafter, referred to as "conventional annealed wafer" for convenience). With respect to the conventional annealed wafer, refer again to Figure 7 the conceptual diagram of the oxygen concentration distribution.

[0070] With respect to these conventional low-oxygen-concentration wafer, conventional high-oxygen-concentration wafer, and conventional annealed wafer, the slip resistance and the resistance fluctuation in the case where a heat treatment of 1150°C, which is a general heat treatment for manufacturing an IGBT, and a two-step heat treatment of 450°C are performed were investigated.

[0071] In the case of the conventional annealed wafer, since the oxygen concentration of the surface layer portion of the silicon wafer is high, the slip length can be improved compared to the conventional low-oxygen-concentration wafer. However, since a high-oxygen-concentration region is formed on the front surface side, a resistance fluctuation occurs. The conventional high-oxygen-concentration wafer, like the conventional annealed wafer, has a better slip length than the conventional low-oxygen-concentration wafer, but the resistance fluctuation is still unavoidable. The conventional low-oxygen-concentration wafer, even if the resistance fluctuation can be avoided, cannot avoid the generation of slip. In contrast, in the case of the wafer according to the above-described embodiment, since a high-oxygen-concentration region exists on the back surface side, the generation of slip is suppressed, and there is no resistance fluctuation except for the surface layer portion of the back surface of the wafer, and therefore, it is suitable for IGBT device use.

[0072] (high oxygen concentration layer removal test)

[0073] - efficiency of double-sided polishing process -

[0074] In the high oxygen concentration layer formation process, of the high oxygen concentration layers formed on both sides, in order to leave a high oxygen concentration region on the back side while removing the high oxygen concentration layer on the front side entirely, the polishing removal amount of the single-sided polishing after the double-sided polishing process needs to be larger than usual. Therefore, if the polishing removal amount on the front side is made larger than that on the back side in the double-sided polishing process, removal of the high oxygen concentration layer can be efficiently performed by the double-sided polishing process. In the double-sided polishing process, the same polishing pad is usually used for the front side and the back side, but by using different polishing pads for the front side and the back side, it is confirmed whether or not the high oxygen concentration layer on the front side can be removed only by the double-sided polishing process.

[0075] The polishing rate of a polishing pad used for polishing a wafer differs depending on the number of times of use (i.e., the use time). Therefore, an experiment was performed in which the ratio of the polishing rates of the front side and the back side and the flatness thereof were measured when different polishing pads were used for the front side and the back side. The use time of the polishing pad was the use time of Level 1 to Level 4 as defined in Table 2.

[0076] [Table 2]

[0077] Time (minutes) Level 1 0~10000 Level 2 10001~30000 Level 3 30001~50001 Level 4 50001~

[0078] The evaluation results of the polishing ratio in which the polishing removal amounts of the front side and the back side after double-sided polishing were compared (if it is 1.00 or more, it means that the polishing removal amount on the front side is larger than that on the back side) and the index of flatness, i.e., GBIR (Global backside ideal range), are shown in Table 3. In the table, the right side of the row shows the level of the polishing pad used on the front side, and the left side of the column shows the level of the polishing pad used on the back side.

[0079] [Table 3]

[0080]

[0081] It was confirmed that in the case where the polishing ratio was 1.25 or more, only the high oxygen concentration layer on the front side could be removed in the state after double-sided polishing. If the ratio was less, the result that the region in which the oxygen concentration was high on the front side could not be removed or the high oxygen concentration layer on the back side was also removed was obtained. The evaluation results of the conditions in which only the high oxygen concentration layer on the front side could be removed are shown in bold and underlined.

[0082] Note that the GBIR is a value indicating the difference between the maximum thickness and the minimum thickness within the wafer. In a silicon wafer, since uniformity of thickness is also required, a specific thickness deviation indicating flatness is evaluated. The GBIR is preferably 0.1 or less, and a value satisfying this condition is shown in bold and underlined.

[0083] According to this result, in the case where the usage time on the front side is level 2, it is preferable to use a polishing pad close to a new product having a slow polishing rate on the back side, or a polishing pad having a long usage time and a slow polishing rate. It is also confirmed that in the case where the front side is level 3, by using a polishing pad close to a new product on the back side, a silicon wafer from which only the high oxygen concentration layer on the front side is removed, which is suitable for IGBT use, can be produced. Note that this result is only an example in the case of using a specific polishing pad, and it is of course understood that if the level of usage time is appropriately combined according to the type of the polishing pad actually used, or different types of polishing pads are combined on the front side and the back side, etc., a good flatness can be obtained while making the polishing removal amount asymmetric on the front side and the back side.

[0084] Industrial Applicability

[0085] According to the present application, a silicon wafer suitable for IGBT use, in which resistance fluctuation is small and generation of slip is suppressed, and a method for producing the same can be provided.

[0086] Explanation of Symbols

[0087] 110 silicon wafer before polishing,

[0088] 110a front surface,

[0089] 112 high oxygen concentration layer on the front side,

[0090] 113 high oxygen concentration layer on the back side,

[0091] 114 high oxygen concentration region on the back side.

Claims

1. A silicon wafer, wherein, In the oxygen concentration distribution in the thickness direction of the silicon wafer, the oxygen concentration is higher than the oxygen concentration of the silicon wafer by 1.5 x 10 17 atoms / cm 3 The above high oxygen concentration region exists only in the back surface layer portion, and the oxygen concentration is determined in accordance with ASTM F121, 1979, The average oxygen concentration in the region from the surface of the back surface of the silicon wafer to a depth of 10 μm was 4.0 x 1018 atoms / cm3. 17 atoms / cm3 3 The average oxygen concentration in the region from the surface of the back surface of the silicon wafer to a depth of 10 μm was 4.0 x 1018 atoms / cm3. 17 atoms / cm3 3 The average oxygen concentration in the region from the surface of the back surface of the silicon wafer to a depth of 10 μm was 4.0 x 1018 atoms / cm3. The high-oxygen-concentration region has a thickness of 10 μm or more and 30 μm or less.

2. The silicon wafer of claim 1, wherein, The average oxygen concentration in the region from the top surface of the front surface of the silicon wafer to a depth of 10 μm was 4.0 x 1018atoms / cm2 17 atoms / cm2 3 The following.

3. The silicon wafer of claim 1 or 2, wherein, The oxygen concentration of the silicon wafer is 4.0 x 10 17 atoms / cm 3 The following.

4. The silicon wafer of claim 1 or 2, wherein, The silicon wafer has a resistivity of 30 Ω·cm or more and 10,000 Ω·cm or less.

5. The silicon wafer of claim 1 or 2, wherein, The silicon wafer contains no dislocation clusters and COP.

6. A method for manufacturing a silicon wafer, the method comprising: a high-oxygen-concentration layer forming step of forming a high-oxygen-concentration layer in a surface layer portion of each of a front surface side and a back surface side of a pre-polish silicon wafer by heat treating the pre-polish silicon wafer in an oxygen-containing gas atmosphere, and a high-oxygen-concentration layer removing step of removing the high-oxygen-concentration layer of the front surface side of the pre-polish silicon wafer after the high-oxygen-concentration layer forming step; wherein, in the oxygen concentration distribution in the thickness direction of the silicon wafer before the polishing, the high oxygen concentration layer formed in the high oxygen concentration layer forming step has an oxygen concentration that is 1.5 x 10 17 atoms / cm 3 of the above regions, the oxygen concentration is in accordance with ASTM F121, 1979, The average oxygen concentration of a region from the surface of the back surface of the silicon wafer after the removing step to a depth of 10 μm was 4.0 x 1019 atoms / cm3. 17 atoms / cm3 3 The average oxygen concentration of a region from the surface of the back surface of the silicon wafer after the removing step to a depth of 10 μm was 4.0 x 1019 atoms / cm3. 17 atoms / cm3 3 Hereinafter, the high-oxygen-concentration layer formed in the high-oxygen-concentration layer forming step is formed in each region of 20 μm or less in thickness from the surface of each of the front surface and the back surface of the pre-polish silicon wafer.

7. The method of manufacturing a silicon wafer according to claim 6, wherein, The oxygen concentration of the pre-polished silicon wafer is 4.0 x 10 17 atoms / cm 3 The following.

8. The method of manufacturing a silicon wafer according to claim 6, wherein, The high-oxygen-concentration layer removing step includes a double-side polishing step of simultaneously polishing the front surface and the back surface of the pre-polish silicon wafer using a double-side polishing device.

9. The method of manufacturing a silicon wafer according to claim 8, wherein, In the double-side polishing step, double-side polishing is performed under a condition that a polishing rate on the front surface side is faster than a polishing rate on the back surface side.

10. The method of manufacturing a silicon wafer according to claim 8, wherein, Before the double-side polishing step, an oxide film is formed only on the back surface side.

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