Signal verification method, device, vehicle and storage medium

Abstract

The embodiment of the present invention discloses a signal verification method, device, vehicle and storage medium. The method includes: determining a first processing result by a first ECU based on a signal to be sent, the type of the signal to be sent and a set verification algorithm; determining whether a second processing result needs to be determined based on the first processing result by a SOC of a second ECU when a type identifier indicates a first type, and sending the determined second processing result to an MCU of the second ECU; sending the first processing result to the MCU by the SOC when the type identifier indicates a second type; and determining a target verification result by the MCU based on the received processing result. The signal sent by the first ECU is preliminarily processed by the SOC, and then the signal verification processing is performed by the MCU, thereby avoiding the problem that only the MCU is responsible for the signal input and signal verification of the data transmission signal, and improving the versatility of signal verification of ECU communication.

Description

Technical Field

[0001] Embodiments of the present invention relate to the technical field of vehicle signal processing, and in particular to a signal verification method, device, vehicle, and storage medium. Background Art

[0002] As automotive features become increasingly diverse, communication between automotive electronic control units (ECUs) is becoming increasingly complex. This is especially true in the context of functional safety development. Incorrect signal transmission due to environmental or hardware factors can significantly impact functional implementation and even the safe operation of the vehicle. Therefore, data transmission of critical functional safety-related signals requires verification and protection to ensure the correctness of ECU communication data. ECUs typically require the collaborative implementation of multiple processing chips, typically in a system-on-chip (SOC) + microcontroller unit (MCU) architecture. Complex computations are performed by a powerful SOC, while functional logic and monitoring are implemented by a highly stable, functional safety-critical MCU.

[0003] Currently, the MCU within the ECU is typically responsible for signal input and signal verification to implement data transmission verification protection. However, this solution is only suitable for verification protection of ECU communications with minimal information exchange and simple functional implementations. It is not suitable for the complex vehicle communication systems commonly used today, thus limiting the versatility of ECU communication signal verification. Summary of the Invention

[0004] Embodiments of the present invention provide a signal verification method, device, vehicle, and storage medium to improve the versatility of signal verification in ECU communication.

[0005] According to one aspect of an embodiment of the present invention, a signal verification method is provided, comprising:

[0006] Determining, by the first ECU, a first processing result according to a signal to be sent, a type of the signal to be sent, and a set verification algorithm, and sending the first processing result and a type identifier to a second ECU, the type including a first type and a second type;

[0007] determining, by the SOC of the second ECU, whether a second processing result needs to be determined according to the first processing result when the type identifier indicates the first type, and sending the determined second processing result to the MCU of the second ECU when the second processing result needs to be determined;

[0008] sending, by the SOC, the first processing result to the MCU when the type identifier indicates the second type;

[0009] The target verification result of the signal to be sent is determined according to the received processing result by the MCU.

[0010] According to another aspect of an embodiment of the present invention, a signal verification device is provided, comprising:

[0011] a first determining module, configured to determine, by the first ECU, a first processing result based on a signal to be sent, a type of the signal to be sent, and a set verification algorithm, and send the first processing result and a type identifier to a second ECU, the type including a first type and a second type;

[0012] a second determining module, configured to determine, through the SOC of the second ECU, whether a second processing result needs to be determined based on the first processing result when the type identifier indicates the first type, and send the determined second processing result to the MCU of the second ECU when the second processing result needs to be determined;

[0013] a sending module, configured to send the first processing result to the MCU through the SOC when the type identifier indicates the second type;

[0014] The verification module is used to determine the target verification result of the signal to be sent according to the received processing result through the MCU.

[0015] According to another aspect of an embodiment of the present invention, a vehicle is provided, comprising:

[0016] First ECU;

[0017] Second ECU;

[0018] at least one processor; and

[0019] a memory communicatively connected to the at least one processor; wherein,

[0020] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can perform the signal verification method described in any embodiment of the present invention.

[0021] According to another aspect of an embodiment of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the signal verification method described in any embodiment of the present invention when executed.

[0022] The technical solution of an embodiment of the present invention is as follows: a first ECU determines a first processing result based on a signal to be sent, the type of the signal to be sent, and a set verification algorithm, and sends the first processing result and a type identifier to a second ECU, where the types include a first type and a second type; a second ECU's SOC determines whether a second processing result needs to be determined based on the first processing result when the type identifier indicates the first type, and sends the determined second processing result to the MCU of the second ECU when the second processing result needs to be determined; a second ECU sends the first processing result to the MCU when the type identifier indicates the second type; and a MCU determines a target verification result of the signal to be sent based on the received processing result. This technical solution preliminarily processes the signal sent by the first ECU through the SOC of the second ECU, and then performs signal verification processing through the MCU of the second ECU, thereby avoiding the problem of the MCU being solely responsible for signal input and signal verification of the data transmission signal, and improving the versatility of signal verification in ECU communication. In addition, receiving the input signal through the SOC of the second ECU avoids the cost increase caused by adding an additional MCU.

[0023] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 A schematic diagram of a flow chart of a signal verification method provided in the first embodiment of the present invention;

[0026] Figure 2 A schematic flow chart of a signal verification method provided in the second embodiment of the present invention;

[0027] Figure 3 A schematic structural diagram of a signal verification device provided in Embodiment 3 of the present invention;

[0028] Figure 4 A schematic structural diagram of a vehicle provided in accordance with a fourth embodiment of the present invention. DETAILED DESCRIPTION

[0029] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0030] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0031] Example 1

[0032] Figure 1 This is a flow chart of a signal verification method provided in Example 1 of the present invention. The method is applicable to signal verification of ECU communication. The method can be performed by a signal verification device, wherein the device can be implemented by software and / or hardware and is generally integrated on the vehicle.

[0033] like Figure 1 As shown, a signal verification method provided by embodiment 1 of the present invention includes the following steps:

[0034] S110 , determining, by the first ECU, a first processing result according to a signal to be sent, a type of the signal to be sent, and a set verification algorithm, and sending the first processing result and a type identifier to a second ECU.

[0035] In this embodiment, the first ECU can be understood as the ECU that sends the signal. Correspondingly, the second ECU can be understood as the ECU that receives and verifies the signal sent by the first ECU. The signal to be sent can be understood as the signal to be sent to the second ECU.

[0036] The types of signals to be transmitted may include a first type and a second type. The first type may be understood as a type in which the signals to be transmitted include both a signal to be verified and a signal not to be verified. The second type may be understood as a type in which the signals to be transmitted include both a signal to be verified. A signal to be verified may be understood as a signal to be verified. A signal not to be verified may be understood as an ordinary signal that does not require verification.

[0037] The set check algorithm can be understood as a pre-set check algorithm for signal verification; the set check algorithm is not specifically limited here, and can be, for example, a cyclic redundancy check (CRC) check algorithm, a parity check algorithm, etc.

[0038] The first processing result can be understood as the result of the first ECU processing the signal to be transmitted. The type identifier can be understood as an identifier indicating the type of the signal to be transmitted. Different types can correspond to different methods for determining the first processing result.

[0039] In one embodiment, the first ECU may first identify a signal to be sent to the second ECU (i.e., the signal to be sent) and determine the type of the signal to be sent. If the type of the signal to be sent is the first type, a verification algorithm may be set to perform a corresponding verification process on the signal to be verified in the signal to be sent to obtain a corresponding verification result. The verification algorithm may then be set to perform a verification process on a message composed of the verification result corresponding to the signal to be verified and the signal to be sent to obtain a corresponding verification result, and the obtained verification result and the message composed of the verification result and the message are used as the first processing result.

[0040] In one embodiment, if the type of the signal to be sent is the second type, since the second type of signal to be sent only includes the signal to be verified, the corresponding verification result can be obtained by directly performing corresponding verification processing on the message composed of the signal to be sent by setting a verification algorithm, and the verification result and the composed message are used as the first processing result.

[0041] S120. When the type identifier indicates the first type, the SOC of the second ECU determines whether a second processing result needs to be determined based on the first processing result, and sends the determined second processing result to the MCU of the second ECU when the second processing result needs to be determined.

[0042] In this embodiment, the second processing result can be understood as a processing result determined based on the first processing result.

[0043] There are no specific limitations on how to determine whether to determine the second processing result based on the first processing result. For example, a message consisting of the verification result corresponding to the signal to be verified and the signal to be transmitted in the first processing result can be verified to obtain a corresponding verification result. The obtained verification result is then compared with the verification result in the first processing result. If they are consistent, the second processing result must be determined. If they are inconsistent, the second processing result does not need to be determined, which also indicates a verification failure. Based on this, after the second processing result needs to be determined, the verification result corresponding to the signal to be verified and the signal to be verified can be used as the second processing result, and the second processing result can be sent to the MCU of the second ECU for further verification.

[0044] S130 . Send, through the SOC, the first processing result to the MCU when the type identifier indicates the second type.

[0045] In this embodiment, if the type of the signal to be sent is the second type, since the second type of signal to be sent only includes the signal to be verified, the first processing result can be directly sent to the MCU through the SOC for further verification.

[0046] S140 : Determine, by the MCU, a target verification result of the signal to be sent according to the received processing result.

[0047] In this embodiment, the received processing result may include the second processing result corresponding to the first type or the first processing result corresponding to the second type. Different processing results may correspond to different target verification result determination methods. The target verification result can be understood as the final verification result of the signal to be transmitted.

[0048] In one embodiment, if the received processing result is the second processing result corresponding to the first type, the signal to be verified in the second processing result can be verified by setting a verification algorithm to obtain the corresponding verification result, and then the obtained verification result and the verification result corresponding to the signal to be verified in the second processing result are compared. If they are consistent, the target verification result can be determined as a successful verification; if they are inconsistent, the target verification result can be determined as a failed verification.

[0049] In one embodiment, if the received processing result is the first processing result corresponding to the second type, the message composed of the signal to be sent in the first processing result can be verified by setting a verification algorithm to obtain the corresponding verification result, and then the obtained verification result is compared with the verification result corresponding to the signal to be sent in the first processing result. If they are consistent, the target verification result can be determined as a successful verification; if they are inconsistent, the target verification result can be determined as a failed verification.

[0050] A signal verification method provided in a first embodiment of the present invention comprises: a first ECU determining a first processing result based on a signal to be transmitted, its type, and a set verification algorithm, and sending the first processing result and a type identifier to a second ECU, where the types include a first type and a second type; a second ECU's SOC determining whether a second processing result needs to be determined based on the first processing result when the type identifier indicates the first type, and sending the determined second processing result to the MCU of the second ECU when the second processing result needs to be determined; a second ECU sending the first processing result to the MCU when the type identifier indicates the second type; and a MCU determining a target verification result for the signal to be transmitted based on the received processing result. This method utilizes the SOC of the second ECU to preliminarily process the signal sent by the first ECU, and then utilizes the MCU of the second ECU to perform signal verification processing, thereby avoiding the problem of solely relying on the MCU for signal input and signal verification of the data transmission signal, and improving the versatility of signal verification in ECU communication. Furthermore, by receiving the input signal through the SOC of the second ECU, the cost increase associated with the addition of an additional MCU is avoided.

[0051] Example 2

[0052] Figure 2 This is a flow chart of a signal verification method provided in the second embodiment of the present invention. This second embodiment refines the above embodiments. This embodiment specifically describes the process of determining a first processing result based on a signal to be transmitted, its type, and a set verification algorithm. It should be noted that any technical details not fully described in this embodiment can be referred to in any of the above embodiments.

[0053] like Figure 2 As shown, the method includes:

[0054] like Figure 2 As shown, a signal verification method provided by the second embodiment of the present invention includes the following steps:

[0055] S210 , determining, by the first ECU, whether the type of the signal to be sent is the first type, if so, executing S220 , otherwise executing S240 .

[0056] In this embodiment, the first type of signal to be sent includes a signal to be verified and a non-verification signal; the second type of signal to be sent includes a signal to be verified.

[0057] In this embodiment, the first ECU can determine whether the signal to be sent contains a non-verification signal in addition to the verification signal. If the non-verification signal is contained, it can be determined that the type of the signal to be sent is the first type, and S220 is executed; if the non-verification signal is not contained, it can be determined that the type of the signal to be sent is the second type, and S240 is executed.

[0058] S220 , performing verification processing on the signal to be verified in the signal to be sent by setting a verification algorithm to obtain a first sub-verification result.

[0059] In this embodiment, the first sub-verification result can be understood as a verification result obtained after performing verification processing on the signal to be verified.

[0060] S230 , verify the first message by setting a verification algorithm to obtain a second sub-verification result, and use the second sub-verification result and the first message as a first processing result, and send the first processing result and the type identifier to the second ECU, and continue to execute S250 .

[0061] In this embodiment, the first message may be understood as a message formed by packaging the first sub-check result and the signal to be sent. Packaging may be understood as encapsulating them into a data packet.

[0062] S240 , verify the second message by setting a verification algorithm to obtain a third sub-verification result, and use the third sub-verification result and the second message as the first processing result, and send the first processing result and the type identifier to the second ECU, and continue to execute S260 .

[0063] In this embodiment, the second message can be understood as a message formed by packetizing the signal to be sent. The third sub-verification result can be understood as a verification result obtained by performing verification processing on the second message.

[0064] S250 , determining, through the SOC of the second ECU, whether a second processing result needs to be determined according to the first processing result, and sending the determined second processing result to the MCU of the second ECU if the second processing result needs to be determined, and continuing to execute S270 .

[0065] S260 , sending the first processing result to the MCU via the SOC, and continuing to execute S270 .

[0066] S270 , determining, through the MCU, a target verification result of the signal to be sent according to the received processing result.

[0067] A second embodiment of the present invention provides a method for determining a first processing result based on a signal to be transmitted, its type, and a set verification algorithm. This method determines the method for determining the first processing result by judging the type of the signal to be transmitted, with different types corresponding to different determination methods, thereby achieving flexibility in determining the first processing result. Furthermore, the first processing result sent by the first ECU is initially processed by the SOC of a second ECU, and then the signal is verified by the MCU of the second ECU. This avoids the problem of the MCU being solely responsible for signal input and signal verification of the data transmission signal, thereby improving the versatility of signal verification in ECU communication.

[0068] Optionally, the first processing result includes the second sub-check result and the first message;

[0069] Determining whether a second processing result is required according to the first processing result includes:

[0070] The first message in the first processing result is verified by setting a verification algorithm to obtain a fourth sub-verification result; if the fourth sub-verification result is consistent with the second sub-verification result in the first processing result, the second processing result needs to be determined; if the fourth sub-verification result is inconsistent with the second sub-verification result in the first processing result, the second processing result does not need to be determined and the verification fails.

[0071] In this embodiment, when the type of the signal to be sent is the first type, the first processing result may include the second sub-check result and the first message. The fourth sub-check result may be understood as the check result obtained by checking the first message.

[0072] In the case where the type of the signal to be sent is the first type, the process of determining whether the second processing result needs to be determined based on the first processing result can be: by setting a verification algorithm to verify the first message in the first processing result, to obtain a fourth sub-verification result; comparing the fourth sub-verification result with the second sub-verification result in the first processing result, if the fourth sub-verification result is consistent with the second sub-verification result in the first processing result, it can be indicated that the signal sent by the first ECU has not been tampered with or lost, and the second processing result needs to be determined; if the fourth sub-verification result is inconsistent with the second sub-verification result in the first processing result, it can be indicated that the signal sent by the first ECU may have been tampered with or lost, and the second processing result does not need to be determined, and the verification fails.

[0073] Optionally, after determining the second processing result, the method further includes:

[0074] The signal to be checked in the first message and the first sub-check result are determined as the second processing result.

[0075] Optionally, the received processing result is a first processing result corresponding to the second type, and the first processing result includes the second message and the third sub-check result;

[0076] Determining a target verification result of the signal to be sent based on the received processing result, including:

[0077] A fifth sub-verification result is obtained by performing verification processing on the second message in the first processing result by setting a verification algorithm; if the fifth sub-verification result is consistent with the third sub-verification result in the first processing result, the target verification result is determined to be a verification success; if the fifth sub-verification result is inconsistent with the third sub-verification result in the first processing result, the target verification result is determined to be a verification failure.

[0078] In this embodiment, the fifth sub-verification result can be understood as a verification result obtained by performing verification processing on the second message.

[0079] In the case where the type of the signal to be sent is the second type, the process of determining the target verification result of the signal to be sent based on the received processing result may be to obtain a fifth sub-verification result by setting a verification algorithm to perform verification processing on the second message in the first processing result; if the fifth sub-verification result is consistent with the third sub-verification result in the first processing result, it can be indicated that the signal sent by the first ECU has not been tampered with or lost, and the target verification result is determined to be a verification success; if the fifth sub-verification result is inconsistent with the third sub-verification result in the first processing result, it can be indicated that the signal sent by the first ECU may have been tampered with or lost, and the target verification result is determined to be a verification failure.

[0080] Optionally, the received processing result is a second processing result, and the second processing result includes the signal to be verified and the first sub-verification result;

[0081] Determining a target verification result of the signal to be sent based on the received processing result, including:

[0082] A verification algorithm is set to perform verification processing on the signal to be verified in the second processing result to obtain a sixth sub-verification result; the sixth sub-verification result is compared with the first sub-verification result in the second processing result. If the sixth sub-verification result is consistent with the first sub-verification result in the second processing result, the target verification result is determined to be a verification success; if the sixth sub-verification result is inconsistent with the first sub-verification result in the second processing result, the target verification result is determined to be a verification failure.

[0083] In this embodiment, the sixth sub-verification result can be understood as a verification result obtained by performing verification processing on the signal to be verified in the second processing result.

[0084] When the type of the signal to be sent is the first type, the process of determining the target verification result of the signal to be sent based on the received processing result can be: by setting a verification algorithm, verification processing is performed on the signal to be verified in the second processing result to obtain a sixth sub-verification result; the sixth sub-verification result is compared with the first sub-verification result in the second processing result; if the sixth sub-verification result is consistent with the first sub-verification result in the second processing result, the target verification result is determined to be a verification success; if the sixth sub-verification result is inconsistent with the first sub-verification result in the second processing result, the target verification result is determined to be a verification failure.

[0085] Optionally, after determining that the target verification result is a verification failure, the method further includes:

[0086] Detecting the number of verifications of the signal to be sent by the second ECU;

[0087] If the number of verifications does not reach the set threshold, a target instruction is sent to the first ECU via the second ECU, where the target instruction is an instruction to re-verify the signal to be sent.

[0088] In this embodiment, the set threshold value may be understood as a pre-set number of times threshold value, which is not specifically limited here, and may be 3 times, 4 times or 5 times. The target instruction may be understood as an instruction to instruct to recheck the signal to be sent.

[0089] After determining that the target verification result is a verification failure, the second ECU can also detect the number of verifications of the signal to be sent; if the number of verifications does not reach the set threshold, the second ECU can send a target instruction to the first ECU to instruct the first ECU to re-verify the signal to be sent.

[0090] The present invention is described below by way of example.

[0091] Data verification is performed to ensure data integrity during transmission. A specified algorithm is used to calculate the original data and generate a checksum value. Upon receiving the data, the receiver uses the same checksum algorithm to calculate the original data. If the calculated result matches the received checksum value, the data verification is correct and the frame of data can be used. If they do not match, an error occurred during transmission and the data can be discarded or requested to be retransmitted. In this embodiment, the available checksum algorithms include parity check, checksum, and CRC. CRC has advantages over parity check in terms of error detection accuracy, speed, and cost due to its fast calculation speed and strong error detection capabilities. It is easily implemented using hardware circuits such as encoders. Therefore, CRC is the preferred algorithm for this embodiment of the present invention.

[0092] The signal verification method adopted in the embodiment of the present invention performs signal verification on both the MCU and the SOC, and adopts a signal nesting protection mechanism, thereby improving the effectiveness of signal input verification of the non-safety chip SOC and meeting functional safety requirements. It also implements protection of ECU communication through software, avoiding the wasteful problem of replacing or increasing the cost of the MCU chip.

[0093] Example 3

[0094] Figure 3 This is a schematic diagram of the structure of a signal verification device provided by the third embodiment of the present invention, which can be implemented by software and / or hardware. Figure 3 As shown, the device includes:

[0095] A first determining module 310 is configured to determine, by the first ECU, a first processing result based on a signal to be sent, a type of the signal to be sent, and a set verification algorithm, and to send the first processing result and a type identifier to a second ECU, where the type includes a first type and a second type;

[0096] a second determining module 320, configured to determine, through the SOC of the second ECU, whether a second processing result needs to be determined based on the first processing result when the type identifier indicates the first type, and send the determined second processing result to the MCU of the second ECU if the second processing result needs to be determined;

[0097] A sending module 330, configured to send the first processing result to the MCU via the SOC when the type identifier indicates the second type;

[0098] The verification module 340 is configured to determine, through the MCU, a target verification result of the signal to be sent according to the received processing result.

[0099] In this embodiment, the device, through a first determination module 310, determines a first processing result based on a signal to be transmitted, its type, and a set verification algorithm via a first ECU, and transmits the first processing result and a type identifier to a second ECU. The types include a first type and a second type. A second determination module 320, through the second ECU's SOC, determines whether a second processing result is required based on the first processing result when the type identifier indicates the first type, and transmits the determined second processing result to the second ECU's MCU if the second processing result is required. A transmission module 330, through the SOC, transmits the first processing result to the MCU when the type identifier indicates the second type. A verification module 340, through the MCU, determines a target verification result for the signal to be transmitted based on the received processing result. This device preliminarily processes the signal transmitted by the first ECU via the second ECU's SOC, and then performs signal verification processing via the second ECU's MCU. This avoids the problem of solely relying on the MCU for signal input and signal verification of the data transmission signal, thereby improving the versatility of signal verification in ECU communication. Furthermore, receiving the input signal via the second ECU's SOC avoids the cost increase associated with an additional MCU.

[0100] Optionally, the signal to be sent of the first type includes a signal to be verified and a non-verification signal; the signal to be sent of the second type includes a signal to be verified;

[0101] The first determining module 310 includes:

[0102] a first verification unit, configured to, if the type of the signal to be sent is the first type, perform verification processing on the signal to be verified in the signal to be sent by setting a verification algorithm to obtain a first sub-verification result;

[0103] a second verification unit, configured to verify the first message using a set verification algorithm to obtain a second sub-verification result, and use the second sub-verification result and the first message as a first processing result, where the first message is formed by packaging the first sub-verification result and the signal to be sent;

[0104] The third verification unit is used to, if the type of the signal to be sent is the second type, verify the second message by setting a verification algorithm to obtain a third sub-verification result, and use the third sub-verification result and the second message as the first processing result, where the second message is a message formed by packetizing the signal to be sent.

[0105] Optionally, the first processing result includes the second sub-check result and the first message;

[0106] The second determining module 320 includes:

[0107] a fourth verification unit, configured to perform verification processing on the first message in the first processing result by using a set verification algorithm to obtain a fourth sub-verification result;

[0108] a first determining unit, configured to determine a second processing result if the fourth sub-check result is consistent with the second sub-check result in the first processing result;

[0109] The second determining unit is configured to: if the fourth sub-check result is inconsistent with the second sub-check result in the first processing result, determine that the second processing result does not need to be determined and the check fails.

[0110] Optionally, the device further includes:

[0111] The third determining unit is configured to determine the signal to be checked and the first sub-check result in the first message as the second processing result after the second processing result needs to be determined.

[0112] Optionally, the received processing result is a first processing result corresponding to the second type, and the first processing result includes a second message and a third sub-check result;

[0113] The verification module 340 includes:

[0114] a fifth verification unit, configured to perform verification processing on the second message in the first processing result by using a set verification algorithm to obtain a fifth sub-verification result;

[0115] a fourth determining unit, configured to determine that the target verification result is a verification success if the fifth sub-verification result is consistent with the third sub-verification result in the first processing result;

[0116] A fifth determining unit is configured to determine that the target verification result is a verification failure if the fifth sub-verification result is inconsistent with the third sub-verification result in the first processing result.

[0117] Optionally, the received processing result is a second processing result, and the second processing result includes the signal to be verified and the first sub-verification result;

[0118] The verification module 340 includes:

[0119] a sixth verification unit, configured to perform verification processing on the signal to be verified in the second processing result by using a set verification algorithm to obtain a sixth sub-verification result;

[0120] a sixth determining unit, configured to determine that the target verification result is a verification success if the sixth sub-verification result is consistent with the first sub-verification result in the second processing result;

[0121] The seventh determining unit is configured to determine that the target verification result is a verification failure if the sixth sub-verification result is inconsistent with the first sub-verification result in the second processing result.

[0122] Optionally, the device further includes:

[0123] a detection module, configured to detect, by the second ECU, a number of verification times of the signal to be sent after determining that the target verification result is a verification failure;

[0124] The sending module is used to send a target instruction to the first ECU through the second ECU if the number of verification times does not reach a set threshold, and the target instruction is an instruction to instruct to re-verify the signal to be sent.

[0125] The signal verification device provided in the embodiment of the present invention can execute the signal verification method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0126] Example 4

[0127] Figure 4 This is a schematic diagram of the structure of a vehicle provided by the fourth embodiment of the present invention. Figure 4 As shown, vehicle 10 includes at least one processor 11, as well as a memory (such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc.) communicatively connected to the at least one processor 11, a first ECU 20, and a second ECU 21. The memory stores a computer program executable by the at least one processor, and processor 11 can perform various appropriate actions and processes based on the computer program stored in the read-only memory (ROM) 12 or loaded from storage unit 18 into the random access memory (RAM) 13. RAM 13 can also store various programs and data required for the operation of vehicle 10. Processor 11, ROM 12, RAM 13, first ECU 20, and second ECU 21 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to bus 14.

[0128] Various components in the vehicle 10 are connected to the I / O interface 15, including an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a magnetic disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the vehicle 10 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0129] The processor 11 may be any general-purpose and / or specialized processing component with processing and computing capabilities. Examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various specialized artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as the signal verification method.

[0130] In some embodiments, the signal verification method may be implemented as a computer program tangibly embodied in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on vehicle 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the signal verification method described above may be performed. Alternatively, in other embodiments, processor 11 may be configured to perform the signal verification method in any other suitable manner (e.g., via firmware).

[0131] Various embodiments of the systems and techniques described herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-chip systems (SOCs), programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that are executable and / or interpreted on a programmable system that includes at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0132] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when the computer program is executed by the processor, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The computer program may be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0133] In the context of the present invention, computer-readable storage media can be tangible media that can contain or store a computer program for use with an instruction execution system, device or equipment or used in combination with an instruction execution system, device or equipment. Computer-readable storage media can include but are not limited to electronic, magnetic, optical, electromagnetic, infrared or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, computer-readable storage media can be machine-readable signal media. More specific examples of machine-readable storage media can include electrical connections based on one or more lines, portable computer disks, hard disks, random access memories (RAM), read-only memories (ROM), erasable programmable read-only memories (EPROM or flash memory), optical fibers, portable compact disk read-only memories (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0134] To provide interaction with a user, the systems and techniques described herein can be implemented in a vehicle having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the vehicle. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0135] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0136] A computing system may include clients and servers. The clients and servers are typically remote from each other and typically interact via a communication network. This client-server relationship arises through computer programs running on the respective computers, creating a client-server relationship. The server may be a cloud server, also known as a cloud computing server or cloud host. This server is a hosting product within the cloud computing service ecosystem that addresses the management difficulties and limited scalability of traditional physical hosting and VPS services.

[0137] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. This is not limited herein.

[0138] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A signal verification method, characterized in that: The method comprises: Determining, by a first electronic control unit ECU, a first processing result according to a signal to be sent, a type of the signal to be sent, and a set verification algorithm, and sending the first processing result and a type identifier to a second ECU, the type including a first type and a second type; When the type identifier indicates the first type, the system-on-chip (SOC) of the second ECU determines whether a second processing result needs to be determined according to the first processing result, and when the second processing result needs to be determined, sends the determined second processing result to the microcontroller unit (MCU) of the second ECU; sending, by the SOC, the first processing result to the MCU when the type identifier indicates the second type; Determining, by the MCU, a target verification result of the signal to be sent according to the received processing result; The first type of signal to be sent includes a signal to be verified and a non-verification signal; the second type of signal to be sent includes a signal to be verified; Determining a first processing result according to a signal to be sent, a type of the signal to be sent, and a set verification algorithm includes: If the type of the signal to be sent is the first type, performing verification processing on the signal to be verified in the signal to be sent by setting a verification algorithm to obtain a first sub-verification result; performing verification processing on the first message by setting a verification algorithm to obtain a second sub-verification result, and using the second sub-verification result and the first message as a first processing result, where the first message is a message formed by combining the first sub-verification result and the signal to be sent; If the type of the signal to be sent is the second type, the second message is verified by setting a verification algorithm to obtain a third sub-verification result, and the third sub-verification result and the second message are used as the first processing result, and the second message is a message formed by packaging the signal to be sent.

2. The method according to claim 1, characterized in that The first processing result includes the second sub-check result and the first message; Determining whether a second processing result needs to be determined according to the first processing result includes: Performing verification processing on the first message in the first processing result by setting a verification algorithm to obtain a fourth sub-verification result; If the fourth sub-check result is consistent with the second sub-check result in the first processing result, the second processing result needs to be determined; If the fourth sub-verification result is inconsistent with the second sub-verification result in the first processing result, there is no need to determine the second processing result and the verification fails.

3. The method according to claim 2, characterized in that After determining the second processing result, the method further includes: The signal to be checked and the first sub-check result in the first message are determined as a second processing result.

4. The method according to claim 1, wherein The received processing result is a first processing result corresponding to the second type, and the first processing result includes a second message and a third sub-check result; Determining a target verification result of the signal to be sent according to the received processing result, including: Performing verification processing on the second message in the first processing result by setting a verification algorithm to obtain a fifth sub-verification result; If the fifth sub-verification result is consistent with the third sub-verification result in the first processing result, determining that the target verification result is verification success; If the fifth sub-verification result is inconsistent with the third sub-verification result in the first processing result, the target verification result is determined to be a verification failure.

5. The method according to claim 1, wherein The received processing result is a second processing result, and the second processing result includes the signal to be verified and the first sub-verification result; Determining a target verification result of the signal to be sent according to the received processing result, including: Performing verification processing on the signal to be verified in the second processing result by setting a verification algorithm to obtain a sixth sub-verification result; If the sixth sub-verification result is consistent with the first sub-verification result in the second processing result, determining that the target verification result is verification success; If the sixth sub-verification result is inconsistent with the first sub-verification result in the second processing result, the target verification result is determined to be a verification failure.

6. The method according to claim 1, characterized in that After determining that the target verification result is a verification failure, the method further includes: Detecting, by the second ECU, the number of verifications of the signal to be sent; If the number of verifications does not reach the set threshold, a target instruction is sent to the first ECU via the second ECU, where the target instruction is an instruction to re-verify the signal to be sent.

7. A signal verification device, characterized in that: include: a first determining module, configured to determine, by a first electronic control unit ECU, a first processing result according to a signal to be sent, a type of the signal to be sent, and a set verification algorithm, and send the first processing result and a type identifier to a second ECU, the type including a first type and a second type; a second determining module, configured to determine, through a system-on-chip (SOC) of a second ECU, whether a second processing result needs to be determined based on the first processing result when the type identifier indicates the first type, and to send the determined second processing result to a microcontroller unit (MCU) of the second ECU when the second processing result needs to be determined; a sending module, configured to send the first processing result to the MCU through the SOC when the type identifier indicates the second type; A verification module, configured to determine, through the MCU, a target verification result of the signal to be sent according to the received processing result; The signals to be sent of the first type include signals to be verified and non-verification signals; The signal to be sent of the second type includes a signal to be verified; The first determining module includes: a first verification unit, configured to, if the type of the signal to be sent is the first type, perform verification processing on the signal to be verified in the signal to be sent by setting a verification algorithm to obtain a first sub-verification result; a second verification unit, configured to verify the first message using a set verification algorithm to obtain a second sub-verification result, and use the second sub-verification result and the first message as a first processing result, where the first message is formed by packaging the first sub-verification result and the signal to be sent; The third verification unit is used to, if the type of the signal to be sent is the second type, verify the second message by setting a verification algorithm to obtain a third sub-verification result, and use the third sub-verification result and the second message as the first processing result, where the second message is a message formed by packetizing the signal to be sent.

8. A vehicle, characterized in that: The vehicle comprises: First ECU; Second ECU; at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor. The computer program is executed by the at least one processor so that the at least one processor can perform the signal verification method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the signal verification method according to any one of claims 1 to 6 when executed.

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