Test circuit and method, display panel

Abstract

The application provides a test circuit and method and a display panel. The test circuit is used for power-on lighting test of the display panel. The display panel comprises an effective TP line and a virtual TP line. The test circuit comprises a first test terminal, a first signal terminal, a second test terminal and a control unit. The first test terminal is electrically connected to the effective TP line through a first switching element. The first signal terminal is electrically connected to the first switching element and is used for controlling the first test terminal to transmit a test voltage to the effective TP line. The second test terminal is electrically connected to the virtual TP line to transmit the test voltage. The control unit is electrically connected to the first test terminal and the second test terminal and is used for controlling the first test terminal and the second test terminal to be turned on in a start-up stage and a shutdown stage and for controlling the first test terminal and the second test terminal to be disconnected from each other in a test stage. The application solves the problem that the existing display panel is prone to bright lines at the power-on and power-off moments during screen testing, which affects the accuracy of test results.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a test circuit and method, and a display panel. BACKGROUND

[0002] With the development of display technology, display panels are applied more and more widely. For example, in In-Cell products, In-Cell refers to a method of embedding touch panel functions into liquid crystal pixels, that is, embedding touch sensor functions in the display screen. In this way, the screen can be made more lightweight, but due to the design of In-Cell products, the number of TP lines is more than the actual number of TP lines required by the design, and the extra TP lines are also called virtual TP lines.

[0003] Generally speaking, before the display panel is put into use, the display panel needs to be tested (also known as cell test, CT) to test whether the display panel can display normally. When testing the In-Cell product, although the voltage transmitted to the actual required TP line and the virtual TP line is consistent, because the voltage source and the line design are different, the power-on and power-off speeds of the TP line and the virtual TP line are different, and there is a pressure difference between the two, so that the power-on time and the power-off time will appear bright lines, affecting the accuracy of the test results. SUMMARY

[0004] The embodiments of the present application provide a test circuit and method, and a display panel, by setting a control unit to connect the first test end and the second test end in series to control the first test end and the second test end to be turned on in the power-on stage and the power-off stage, thereby solving the problem that the existing display panel is prone to appear bright lines at the power-on and power-off time when testing, affecting the accuracy of the test results.

[0005] The present application is implemented in the following manner. A test circuit is used for power-on test of a display panel, the display panel includes an effective TP line and a virtual TP line, the test circuit includes a first test end, a first signal end, a second test end, and a control unit, the first test end is electrically connected to the effective TP line through a first switching element; the first signal end is electrically connected to the first switching element, and is used to control the first test end to transmit a test voltage to the effective TP line; the second test end is electrically connected to the virtual TP line, and is used to transmit a test voltage to the virtual TP line, the test voltage transmitted by the second test end is equal to the test voltage transmitted by the first test end; the control unit is electrically connected to the first test end and the second test end, and is used to control the first test end and the second test end to be turned on in the power-on stage and the power-off stage, and control the first test end and the second test end to be disconnected from each other in the test stage.

[0006] In one of the embodiments, the control unit comprises a second switch element and a second signal terminal, the second switch element is electrically connected with the second signal terminal, the first test terminal and the second test terminal;

[0007] The second signal terminal is used to control the second switch element to be opened in the power-on stage and the power-off stage, so as to make the first test terminal and the second test terminal conductive; and the second switch element is controlled to be disconnected in the test stage, so as to make the first test terminal and the second test terminal disconnected with each other.

[0008] In one of the embodiments, the second switch element comprises at least one first thin film transistor, the gate of the first thin film transistor is electrically connected with the second signal terminal, the source of the first thin film transistor is electrically connected with the first test terminal, and the drain of the first thin film transistor is electrically connected with the second test terminal.

[0009] In one of the embodiments, the number of the effective TP lines is multiple, each of the effective TP lines is connected with one of the first switch elements, and the multiple first switch elements are electrically connected with the first test terminal and the first signal terminal;

[0010] The number of the virtual TP lines is multiple, and the multiple virtual TP lines are connected in series and electrically connected with the second test terminal.

[0011] In one of the embodiments, the first switch element is a second thin film transistor, the gate of the second thin film transistor is electrically connected with the first signal terminal, the source of the second thin film transistor is electrically connected with the effective TP line, and the drain of the second thin film transistor is electrically connected with the first test terminal.

[0012] In one of the embodiments, the number of the first test terminals, the second test terminals, the first signal terminals and the control units is two, one of the control units is electrically connected with one of the first test terminals and one of the second test terminals, and the other of the control units is electrically connected with the other of the first test terminals and the other of the second test terminals.

[0013] The test circuit provided by the application has the following beneficial effects: compared with the prior art, the control unit is arranged to connect the first test terminal and the second test terminal in series, the first test terminal, the second test terminal, the effective TP line and the virtual TP line are connected together as one line, so that the transmission of the test voltage from the first test terminal to the effective TP line and the transmission of the test voltage from the second test terminal to the virtual TP line can be performed at the same time, the voltage transmission speed is the same, the difference caused by the transmission of the same voltage by different circuits is effectively eliminated, the bright line caused by the power-on and power-off during the power-on lighting test is avoided, and the accuracy of the test result is improved.

[0014] The embodiment of the present application further provides a testing method, and the display panel is subjected to power-on lighting test by using the testing circuit as described in the above embodiment, and the testing method comprises the following steps:

[0015] In the power-on stage, high-level signals are input to the first signal end and the second signal end respectively, and the same size of test voltage is input to the first test end and the second test end, so that the first thin film transistor is turned on, and the first test end and the second test end are conducted to each other;

[0016] In the test stage, a high-level signal is input to the first signal end, a low-level signal is input to the second signal end, and the same size of test voltage is input to the first test end and the second test end, so that the first thin film transistor is turned off, and the first test end and the second test end are disconnected to each other;

[0017] In the power-off stage, high-level signals are input to the first signal end and the second signal end respectively, and the same size of test voltage is input to the first test end and the second test end, so that the first thin film transistor is turned on, and the first test end and the second test end are conducted to each other.

[0018] In one of the embodiments, the testing method further comprises the following steps: after the display panel is subjected to power-on lighting test, the first signal end and the second signal end are connected in series through an external circuit, and a low-level signal is continuously input to the first signal end.

[0019] The testing method provided by the present application has the following beneficial effects: the display panel is subjected to power-on lighting test by using the testing circuit, the control unit is arranged to connect the first test end and the second test end in series, and the first test end, the second test end, the effective TP line and the virtual TP line are connected together as one line, so that the transmission of the test voltage from the first test end to the effective TP line and the transmission of the test voltage from the second test end to the virtual TP line can be performed simultaneously, the voltage transmission speed is the same, the difference caused by the transmission of the same voltage by different circuits is effectively eliminated, the bright line caused by power-on and power-off during the power-on lighting test is avoided, and the accuracy of the test result is improved.

[0020] The embodiment of the present application further provides a display panel, which comprises a color film substrate, an array substrate and the testing circuit as described in any one of the above embodiments; the array substrate protrudes from the color film substrate on one side and extends outward to form a protruding area; the first test end and the second test end of the testing circuit are arranged in the protruding area.

[0021] In one of the embodiments, the test circuit includes two groups of test ports, and the two groups of test ports are arranged on two opposite sides of the protruding area along a first direction, and the first direction is perpendicular to the direction in which the array substrate protrudes relative to the color film substrate.

[0022] The test port includes the first test end, the second test end, the first signal end, and the control unit.

[0023] The display panel provided by the present application has the following advantages: the test circuit is used, the control unit is arranged to connect the first test end and the second test end in series, the first test end, the second test end, the effective TP line, and the virtual TP line are connected together to form a line, so that the first test end and the second test end can transmit test voltages to the effective TP line and the virtual TP line at the same time, the transmission speed of the voltages is the same, the difference caused by different circuits transmitting the same voltage is effectively eliminated, the bright line caused by power-on and power-off during the power-on and lightening test is avoided, and the accuracy of the test result is improved. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 FIG. 1 is a schematic diagram of a test circuit provided by an embodiment of the present application;

[0025] Figure 2 FIG. 2 is a schematic diagram of a test circuit provided by an embodiment of the present application;

[0026] Figure 3 FIG. 3 is a flowchart of a test method provided by an embodiment of the present application;

[0027] Figure 4 FIG. 4 is a schematic diagram of voltages input to each port in the start-up stage, the test stage, and the power-off stage of the test method provided by an embodiment of the present application;

[0028] Figure 5 FIG. 5 is a structural schematic diagram of a display panel provided by an embodiment of the present application.

[0029] FIG. 1 is a structural schematic diagram of a display panel provided by an embodiment of the present application.

[0030] 100, display panel; 101, color film substrate; 102, array substrate; 103, protruding area; 104, test circuit; 1040, test port. DETAILED DESCRIPTION

[0031] In order to make the objects, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and not to limit the present application.

[0032] It should be noted that when an element is referred to as being "fixed" or "set" on another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or indirectly connected to the other element.

[0033] It should be understood that the terms "length", "width", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only used to facilitate the description of the present application and simplify the description, and therefore cannot be understood as indicating or implying that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0034] In addition, the terms "first", "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise specifically limited.

[0035] It should also be noted that the same reference signs in the embodiments of the present application represent the same component or the same part, and for the same parts in the embodiments of the present application, only one part or component may be labeled with reference signs in the drawings, and it should be understood that the reference signs are also applicable to other identical parts or components.

[0036] The embodiments of the present application provide a test circuit and method, and a display panel, which solve the problem that the existing display panel is prone to bright lines at the power-on and power-off moments during point screen testing, affecting the accuracy of the test results.

[0037] The test circuit provided by the embodiment of the present application is used for power-on lighting test of the display panel 100. The power-on lighting test is mainly used for detecting whether the electrical connection relationship of various electronic components on the display panel 100 is correct. The display panel 100 includes effective TP lines 1 and virtual TP lines 2. In the design of In-Cell products, the number of designed TP lines is more than the number of TP lines required by actual partition, and the extra TP lines are also called virtual TP lines 2. The TP lines required by actual partition are effective TP lines 1. When the power-on lighting test is powered on, because the lines of the effective TP lines 1 and the virtual TP lines 2 are two separate lines, the power-on speed of the effective TP lines 1 is different from the power-on speed of the virtual TP lines 2, which causes a pressure difference between the lines of the effective TP lines 1 and the virtual TP lines 2, liquid crystal rotation, and bright lines visible to the eye. After lighting, the frame switching is fast, so the bright line phenomenon is weak and short in time. Similarly, when the power-on lighting test is powered off, the power-on speed of the effective TP lines 1 is different from the power-off speed of the virtual TP lines 2, which causes a pressure difference between the lines of the effective TP lines 1 and the virtual TP lines 2, liquid crystal rotation, and the same bright lines visible to the eye. There is no next frame picture after power-off, and the screen becomes black, so the bright line phenomenon is obvious. The test equipment is easy to misjudge the display panel 100 as abnormal, which reduces the accuracy of the test result and affects the detection efficiency.

[0038] Embodiment one

[0039] Reference Figure 1 The test circuit provided by the embodiment of the present application includes a first test end 3, a first signal end 5, a second test end 6, and a control unit 7. The first test end 3 is electrically connected to the effective TP lines 1 through a first switching element 4. The first signal end 5 is electrically connected to the first switching element 4 and is used for controlling the first test end 3 to transmit a test voltage to the effective TP lines 1. The second test end 6 is electrically connected to the virtual TP lines 2 and is used for transmitting a test voltage to the virtual TP lines 2. The test voltage transmitted by the second test end 6 is equal to the test voltage transmitted by the first test end 3. The control unit 7 is electrically connected to the first test end 3 and the second test end 6 and is used for controlling the first test end 3 and the second test end 6 to be conductive in the boot stage and the shutdown stage and controlling the first test end 3 and the second test end 6 to be disconnected from each other in the test stage.

[0040] Since the bright line phenomenon only occurs when the power is turned on and off during the power-on lighting test process, which affects the accuracy of the test, and the test voltage needs to be transmitted to the effective TP line 1 and the virtual TP line 2 respectively during the test to accurately determine whether the electronic devices of each circuit are correctly connected, the control unit 7 is connected to the first test end 3 and the second test end 6 in the present application, and the first test end 3 and the second test end 6 are turned on during the power-on and power-off process. In this way, the voltage difference caused by the transmission of the same test voltage by different lines can be eliminated, the bright line phenomenon on the screen during power-on and power-off can be avoided, and the accuracy of the power-on lighting test can be improved. In addition, the control unit 7 will control the first test end 3 and the second test end 6 to be disconnected during the test phase, so that the transmission of the test voltage from the first test end 3 to the effective TP line 1 and the transmission of the test voltage from the second test end 6 to the virtual TP line 2 are two independent test lines, which is conducive to accurately testing whether the electronic devices on each line are correctly connected.

[0041] In some embodiments, with reference to Figure 1 The control unit 7 includes a second switching element 71 and a second signal end 72, the second switching element 71 is electrically connected to the second signal end 72, the first test end 3 and the second test end 6; the second signal end 72 is used to control the second switching element 71 to be turned on during the power-on and power-off phases to make the first test end 3 and the second test end 6 conductive; and the second switching element 71 is controlled to be disconnected during the test phase to make the first test end 3 and the second test end 6 disconnected with each other. In this way, the second switching element 71 can be controlled to be turned on during the power-on and power-off phases and to be disconnected during the test phase to quickly and accurately control the first test end 3 and the second test end 6 to be conductive during the power-on and power-off phases, thereby effectively eliminating the voltage difference caused by the transmission of the test voltage from the first test end 3 to the effective TP line 1 and the transmission of the test voltage from the second test end 6 to the virtual TP line 2, avoiding the bright line phenomenon during power-on and power-off, and ensuring the accuracy of the test results of the power-on lighting test.

[0042] It should be noted that the power-on phase in the embodiments of the present application refers to the phase when the display panel 100 is powered on, the power-off phase refers to the phase when the display panel 100 is powered off, and the test phase refers to the phase after the display panel 100 is powered on, that is, the power-on lighting test phase, which is used to test whether the electrical connection relationship of various electronic components on the display panel 100 is correct.

[0043] In some embodiments, with reference to Figure 1The second switch element 71 includes at least one first thin film transistor, the gate of the first thin film transistor is electrically connected to the second signal terminal 72, the source of the first thin film transistor is electrically connected to the first test terminal 3, and the drain of the first thin film transistor is electrically connected to the second test terminal 6. The first thin film transistor is used as the second switch element 71, which can facilitate the connection of the circuit, and the first thin film transistor and the second signal terminal 72 can be directly connected as the control unit 7 on the existing display panel 100, and the modification cost is low.

[0044] It should be noted that the thin film transistor (TFT) is a kind of field effect transistor, which includes a gate G, a source S and a drain D, and can be used as a control switch. Here, the type of thin film transistor is not limited, which can be an N-type thin film transistor or a P-type thin film transistor.

[0045] The first thin film transistor in the embodiment of the application is described by taking an N-type transistor as an example, but is not limited to the N-type transistor, and can be replaced by a P-type transistor. For the N-type transistor, the on level is high, and the off level is low. That is, when the control electrode of the N-type transistor is high, the first electrode and the second electrode are turned on, and when the control electrode of the N-type transistor is low, the first electrode and the second electrode are turned off. For the P-type transistor, the on level is low, and the off level is high. That is, when the control electrode of the P-type transistor is low, the first electrode and the second electrode are turned on, and when the control electrode of the P-type transistor is high, the first electrode and the second electrode are turned off. In the specific implementation, the gate of each transistor is used as the control electrode, and according to the signal of the gate of each transistor and the type of each transistor, the first electrode can be used as the source and the second electrode can be used as the drain, or the first electrode can be used as the drain and the second electrode can be used as the source, which are not distinguished here. In addition, the on level and the off level in the embodiment of the application are generic, the on level refers to any level that can turn on the transistor, and the off level refers to any level that can turn off / close the transistor.

[0046] In some embodiments, referring to Figure 1 The number of effective TP lines 1 is multiple, each effective TP line 1 is connected to one first switch element 4, and the multiple first switch elements 4 are electrically connected to the first test terminal 3 and the first signal terminal 5. The number of virtual TP lines 2 is multiple, and the multiple virtual TP lines 2 are connected in series and electrically connected to the second test terminal 6. In this way, the first switch elements 4 connected by the multiple effective TP lines 1 can be turned on or turned off at the same time, so that the first test terminal 3 can transmit test voltages to the multiple effective TP lines 1 at the same time, and the second test terminal 6 can also transmit test voltages to the multiple virtual TP lines 2 at the same time, thereby improving the test efficiency.

[0047] It should be noted that the plurality of effective TP lines 1 and the plurality of virtual TP lines 2 are arranged uniformly in the same direction on the array substrate 102, so as to ensure the consistency of the TP lines on the array substrate 102. The array substrate 102 includes an active area (AA area) and a peripheral area surrounding the active area. The peripheral area includes a fanout area and a pad area. The active area is used for display, the fanout area is used for collecting the metal lines of the active area, and the pad area is used for electrical connection of the fanout area and a circuit structure such as a driving chip. The test circuit can be located in the pad area and arranged between the chip and the data line. The plurality of effective TP lines 1 are arranged in the active area, and the plurality of virtual TP lines 2 extend to the fanout area and are electrically connected to the common electrode.

[0048] In some embodiments, with reference to Figure 1 The first switch element 4 is a second thin film transistor, the gate of the second thin film transistor is electrically connected to the first signal end 5, the source of the second thin film transistor is electrically connected to the effective TP line 1, and the drain of the second thin film transistor is electrically connected to the first test end 3. Using the second thin film transistor as the first switch element 4 can facilitate the connection of the lines, and the same type of thin film transistor can be used for the first switch element 4 when the display panel 100 is manufactured, which is beneficial to improve the installation and manufacturing efficiency.

[0049] It should be noted that the type of the second thin film transistor is not limited, which can be an N-type thin film transistor or a P-type thin film transistor. Of course, in order to facilitate installation and manufacturing, the first thin film transistor and the second thin film transistor in the embodiment of the present application can be of the same type.

[0050] In the first embodiment of the present application, the number of the first test end 3, the second test end 6, the first signal end 5 and the control unit 7 is one, that is, the gates of the second thin film transistors connected by the plurality of effective TP lines 1 are connected to the same first signal end 5, the sources of the second thin film transistors are connected to the effective TP lines 1, the drains of the second thin film transistors are connected to the first test end 3, the control unit 7 is connected to the first test end 3 and the second test end 6 respectively, and the plurality of virtual TP lines 2 are connected to the second test end 6.

[0051] Embodiment two

[0052] With reference to Figure 2Compared with the embodiment one, the embodiment two of the present application only differs in the number of the first test terminals 3, the second test terminals 6, the first signal terminals 5 and the control units 7. In the embodiment two of the present application, the number of the first test terminals 3, the second test terminals 6, the first signal terminals 5 and the control units 7 are both two, one control unit 7 is electrically connected with one first test terminal 3 and one second test terminal 6, and the other control unit 7 is electrically connected with the other first test terminal 3 and the other second test terminal 6. In this way, the test voltage can be transmitted from the two first test terminals 3 to the effective TP line 1 and from the two second test terminals 6 to the virtual TP line 2, so that the voltage transmission is more stable, and the accurate test result can be obtained.

[0053] Embodiment three

[0054] Reference Figure 3 The embodiment three of the present application provides a test method, which applies the test circuit of the above-mentioned embodiments to perform the power-on lighting test on the display panel 100, including:

[0055] S301, in the booting stage, inputting the high level signal to the first signal terminal 5 and the second signal terminal 72 respectively, and inputting the test voltage with the same size to the first test terminal 3 and the second test terminal 6, so as to open the first thin film transistor and make the first test terminal 3 and the second test terminal 6 conductive to each other.

[0056] It should be noted that the first thin film transistor and the second thin film transistor in the embodiment of the present application are both N-type transistors, that is, the high level is on and the low level is off. Since the bright line phenomenon is prone to occur in the booting stage, the first test terminal 3 and the second test terminal 6 are made conductive in the booting stage, which can effectively improve the power-on bright line phenomenon and improve the accuracy of the power-on lighting test.

[0057] S302, in the test stage, inputting the high level signal to the first signal terminal 5, inputting the low level signal to the second signal terminal 72, and inputting the test voltage with the same size to the first test terminal 3 and the second test terminal 6, so as to disconnect the first thin film transistor and disconnect the first test terminal 3 and the second test terminal 6 from each other.

[0058] It should be noted that the first test terminal 3 and the second test terminal 6 are disconnected in the test stage, so that the test voltage is transmitted from the first test terminal 3 to the effective TP line 1 and from the second test terminal 6 to the virtual TP line 2, which are two independent test lines, meeting the requirement of separately testing the lines on which the effective TP line 1 and the virtual TP line 2 are located, and being beneficial to improve the accuracy of the test result.

[0059] S303, in the power-off stage, inputting high level signals to the first signal end 5 and the second signal end 72 respectively, and inputting test voltages of the same size to the first test end 3 and the second test end 6, so as to make the first thin film transistor open and the first test end 3 and the second test end 6 conduct to each other.

[0060] It should be noted that the power-off stage and the power-on stage are the same, and the bright line phenomenon will occur, so the first test end 3 and the second test end 6 are turned on in the power-off stage, which can effectively improve the power-off bright line phenomenon and improve the accuracy of the power-on lighting test.

[0061] Reference Figure 4 Figure 4 is a voltage schematic diagram inputted by the test method provided by the embodiment three of the present application in the power-on stage, the test stage and the power-off stage.

[0062] S304, after the power-on lighting test of the display panel 100, the first signal end 5 and the second signal end 72 are connected in series through an external circuit, and a low level signal is continuously inputted to the first signal end 5.

[0063] It should be noted that after the power-on lighting test, the product after the test is put into use, the first signal end 5 and the second signal end 72 can be connected in series through an external circuit (such as IC, FPC, PCB and TCON and other circuits outside the panel) to continuously supply a low level voltage, so that only a low level voltage needs to be supplied to the original first signal end 5, without the need of adding an extra power supply, so as to realize the normal use of the function of separately controlling the line where the effective TP line 1 and the virtual TP line 2 of the In-Cell product are located.

[0064] Embodiment four

[0065] Reference Figure 5 The embodiment four of the present application provides a display panel, which comprises a color film substrate 101, an array substrate 102 and a test circuit 104 as described above; the array substrate 102 protrudes from the color film substrate 101 on one side and extends outward to form a protruding area 103; the first test end 3 and the second test end 6 of the test circuit 104 are both arranged in the protruding area 103.

[0066] The detailed structure of the test circuit 104 can be referred to the above-mentioned embodiment one, which will not be described here again; it can be understood that, since the test circuit 104 described above is used in the display panel 100 of the present application, the embodiments of the display panel 100 of the present application include all the technical solutions of all the embodiments of the test circuit 104 described above, and can achieve the technical effects of the technical solutions described above.

[0067] ​It should be noted that the area of the array substrate 102 and the color film substrate 101 in the display panel 100 of the fourth embodiment of the present application is not equal, the first test end 3 and the second test end 6 of the test circuit 104 are both arranged in the protruding area 103, that is, outside the display area, so that the test signal can be input by piercing. In addition, the test circuit 104 can also be arranged as a whole in the protruding area 103, so that the display aperture ratio of the display panel 100 can be effectively avoided, and the test circuit 104 can be arranged on the array substrate 102.

[0068] In some embodiments, with reference to Figure 5 The test circuit 104 includes two groups of test ports 1040, which are arranged on the opposite sides of the protruding area 103 along the first direction X, and the first direction X is perpendicular to the direction of the array substrate 102 protruding relative to the color film substrate 101; the test port 1040 includes the first test end 3, the second test end 6, the first signal end 5 and the control unit 7.

[0069] Through the above arrangement, the test voltage can be transmitted from the two first test ends 3 to the effective TP line 1, and the test voltage can be transmitted from the two second test ends 6 to the virtual TP line 2, so that the voltage transmission is more stable, and the accurate test result can be obtained. Moreover, the two groups of test ports 1040 are arranged on the opposite sides of the protruding area 103 along the first direction X, so that the space for arranging the two groups of test ports 1040 on the protruding area 103 is larger, and the two groups of test ports 1040 can be quickly and conveniently manufactured on the protruding area 103.

[0070] The above is only a specific embodiment of the present application, but the protection scope of the present application is not limited thereto, any person skilled in the art can easily think of changes or replacements within the technical range disclosed in the present application, which should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A test circuit for a power-up light test of a display panel (100) comprising active TP lines (1) and dummy TP lines (2), characterized in that, The test circuit comprises: a first test terminal (3) electrically connected to the active TP line (1) through a first switching element (4); a first signal terminal (5) electrically connected to the first switching element (4) and used for controlling the first test terminal (3) to transmit a test voltage to the active TP line (1); a second test terminal (6) electrically connected to the virtual TP line (2) and used for transmitting a test voltage to the virtual TP line (2), wherein the test voltage transmitted by the second test terminal (6) is equal to the test voltage transmitted by the first test terminal (3); a control unit (7) electrically connected to the first test terminal (3) and the second test terminal (6) and used for controlling the first test terminal (3) and the second test terminal (6) to be turned on in a power-on stage and a power-off stage and to be disconnected from each other in a test stage; the control unit (7) comprises a second switching element (71) and a second signal terminal (72), wherein the second switching element (71) is electrically connected to the second signal terminal (72), the first test terminal (3) and the second test terminal (6); the second signal terminal (72) is used for controlling the second switching element (71) to be turned on in the power-on stage and the power-off stage so that the first test terminal (3) and the second test terminal (6) are turned on and for controlling the second switching element (71) to be turned off in the test stage so that the first test terminal (3) and the second test terminal (6) are disconnected from each other; and the second switching element (71) comprises at least one first thin film transistor, wherein a gate of the first thin film transistor is electrically connected to the second signal terminal (72), a source of the first thin film transistor is electrically connected to the first test terminal (3), and a drain of the first thin film transistor is electrically connected to the second test terminal (6).

2. The test circuit according to claim 1, wherein: the number of the active TP lines (1) is plural, each of the active TP lines (1) is connected to a first switching element (4), and the plural first switching elements (4) are electrically connected to the first test terminal (3) and the first signal terminal (5); the number of the virtual TP lines (2) is plural, and the plural virtual TP lines (2) are connected in series and electrically connected to the second test terminal (6).

3. The test circuit according to claim 2, wherein: the first switching element (4) is a second thin film transistor, a gate of the second thin film transistor is electrically connected to the first signal terminal (5), a source of the second thin film transistor is electrically connected to the active TP line (1), and a drain of the second thin film transistor is electrically connected to the first test terminal (3).

4. The test circuit according to claim 3, wherein: The number of the first test terminals (3), the second test terminals (6), the first signal terminals (5) and the control units (7) is two, one of the control units (7) is electrically connected with one of the first test terminals (3) and one of the second test terminals (6), and the other of the control units (7) is electrically connected with the other of the first test terminals (3) and the other of the second test terminals (6).

5. A test method for applying a power-up light test to a display panel (100) using the test circuit according to claim 3 or 4, characterized in that, Comprise: In the starting stage, high level signals are input to the first signal terminals (5) and the second signal terminals (72) respectively, and the same size test voltages are input to the first test terminals (3) and the second test terminals (6) to make the first thin film transistors open, and the first test terminals (3) and the second test terminals (6) conduct to each other; In the testing stage, high level signals are input to the first signal terminals (5) respectively, low level signals are input to the second signal terminals (72), and the same size test voltages are input to the first test terminals (3) and the second test terminals (6) to make the first thin film transistors open, and the first test terminals (3) and the second test terminals (6) conduct to each other; In the starting stage, high level signals are input to the first signal terminals (5) and the second signal terminals (72) respectively, and the same size test voltages are input to the first test terminals (3) and the second test terminals (6) to make the first thin film transistors open, and the first test terminals (3) and the second test terminals (6) conduct to each other.

6. The test method of claim 5, wherein, The test method further comprises: After the power-on lighting test of the display panel (100), the first signal terminals (5) and the second signal terminals (72) are connected in series through an external circuit, and low level signals are continuously input to the first signal terminals (5).

7. A display panel, characterized by, Comprise: A color filter substrate (101); An array substrate (102) which protrudes from the color filter substrate (101) on one side and extends outward to form a protruding area (103); The test circuit (104) according to any one of claims 1-4, wherein the first test terminals (3) and the second test terminals (6) of the test circuit (104) are arranged in the protruding area (103).

8. The display panel of claim 7, wherein The test circuit (104) comprises two groups of test ports (1040), and the two groups of test ports (1040) are arranged on opposite sides of the protruding area (103) along a first direction (X) which is perpendicular to the direction in which the array substrate (102) protrudes from the color filter substrate (101); The test port (1040) comprises the first test terminal (3), the second test terminal (6), the first signal terminal (5) and the control unit (7).

Images