A four-level double-T half-bridge power module and a packaging method thereof

Abstract

The application discloses a four-level double-T type half-bridge power module and a packaging method thereof, comprising two DBC substrate layers, namely a DBC substrate layer one and a DBC substrate layer two, wherein the DBC substrate layer one is arranged with a power module, and the power module comprises a commutation circuit one, a commutation circuit two and a commutation circuit three which are connected in sequence. Therefore, the application has the following advantages: the four-level half-bridge power module packaging idea is proposed for the first time in the world, six different four-level half-bridge power module design structures are provided by taking the four-level double-T type converter as an example, and the emergence of the four-level half-bridge power module provides a new way for further improving the power density, conversion efficiency and other performances of a power electronic converter.

Description

TECHNICAL FIELD

[0001] The present application relates to a packaging method of a four-level half-bridge power module. BACKGROUND

[0002] Compared with two-level inverter topologies, multi-level inverter topologies have lower switching losses, less output voltage harmonic content, and other advantages, and are widely used in medium-voltage or even low-voltage high-power applications. Therefore, major well-known semiconductor device manufacturers have developed and industrialized various types of three-level half-bridge power modules, and the inverter topologies used mainly include three-level neutral point clamped (3L-NPC) inverters, three-level active neutral point clamped (3L-ANPC) inverters, and three-level T-type (3L-T) inverters, as shown in FIGS. 1-3, and the bus voltage levels mainly include 1.2 kV, 1.7 kV, and 3.3 kV, etc. For example, NXH350N100H4Q2F2P1G (produced by Onsemi) is a 1200V half-bridge power module based on a 3L-NPC topology, as shown in FIG. 1; B0-SP12NAA008ME01-LR88F78T (produced by Vincotech) is a 1200V SiC half-bridge power module based on a 3L-ANPC topology, as shown in FIG. 2; and F3L8MR12W2M1HP_B11 (produced by Infineon) is a 1200V SiC half-bridge power module based on a 3L-T topology, as shown in FIG. 3. Figure 1 Figure 2 Figure 3 Figure 4

[0003] ​​​​For medium and low voltage high power application occasions, such as 380V high power AC / DC ship power supply, Professor Johann W. Kolar of Swiss Federal Institute of Technology in Zurich pointed out in 2021 that three-level conversion technology has been unable to meet people's continuous pursuit of high efficiency, high power density and other performance indicators, and at least four-level conversion technology can realize the breakthrough of these performance indicators. For example, Schneider Electric four-level active neutral point clamped converter topology successfully developed Gaxlary VM series uninterruptible power supply products suitable for 380V-480V voltage level in 2016, compared with the same type of products based on three-level conversion technology, it realizes 2.1% efficiency improvement under full load condition and 5.8% efficiency improvement under light load condition. In addition, Professor David Xu of Ryerson University in Canada based on five-level active neutral point clamped converter topology, developed a three-phase rectifier with input voltage of 230V-460V and output power of 60kW for military aircraft field, although it realizes high conversion efficiency, but its flying capacitor needs to withstand 150A large current, and has to use multiple thin film capacitors in parallel, which inevitably reduces the system power density and reliability. In addition, in the electrified system with a DC bus voltage of 1000V, if a traditional two-level inverter and SiC MOSFET are used, a large dv / dt is easily caused, which forms a common-mode current with the parasitic capacitance in the circuit, and then generates an axis voltage. The axis voltage is divided by layer after layer of parasitic capacitance, and finally divided by a certain proportion to the two ends of the bearing, resulting in electric corrosion of the motor bearing; hard switching work causes large switching loss, increases the thermal stress of the system, and reduces the conversion efficiency of the system.

[0004] Compared with existing two-level converters and three-level converters, the advantages of four-level converters are: 1) dv / dt is reduced to 1 / 3 of two-level converters and 2 / 3 of three-level converters, which brings lower common-mode interference and smaller passive filter volume; 2) under the same bus voltage and the same thermal treatment capacity, the device stress of four-level converters is smaller, and the switching loss is smaller, which is beneficial to improve the working frequency. Therefore, for medium and low voltage high power power electronic equipment, four-level converters have more advantages. However, due to the complex packaging process of multi-level converter topology, the existing power module packaging stops at three-level half-bridge power module, which seriously hinders the further improvement of the working performance of the power module, and there is no report on four-level half-bridge power module so far. SUMMARY

[0005] The above technical problems of the present application are mainly solved by the following technical solutions:

[0006] A four-level double-T type half-bridge power module comprises two DBC substrate layers, i.e. a DBC substrate layer one and a DBC substrate layer two, and a power module is arranged on the DBC substrate layer one, which comprises a commutation circuit one, a commutation circuit two and a commutation circuit three connected in sequence.

[0007] In the four-level double-T type half-bridge power module, the commutation circuit one comprises capacitors connected in sequence in series C 1, switch tube S 1, switch tube S 2, diode D 5;

[0008] In the four-level double-T type half-bridge power module, the commutation circuit two comprises capacitors connected in sequence in series C 2, switch tube S 3, switch tube S 4;

[0009] In the four-level double-T type half-bridge power module, the commutation circuit three comprises capacitors connected in sequence in series C 3, switch tube S 6, diode D 5, switch tube S 5;

[0010] A packaging process of a four-level double-T type half-bridge power module, comprising:

[0011] Two DBC substrate layers, i.e. a DBC substrate layer one and a DBC substrate layer two, are provided, and three commutation modules, i.e. a commutation circuit one, a commutation circuit two and a commutation circuit three, are packaged on the DBC substrate layer one.

[0012] The commutation circuit one and the commutation circuit three are packaged in parallel on the DBC substrate layer one, and the commutation circuit three is packaged to the side of the commutation circuit three and the commutation circuit one.

[0013] In the packaging process, the commutation circuit one comprises capacitors welded in sequence C 1, switch tube S 1, switch tube S 2, diode D 5, wherein the source of the switch tube is connected to the upper copper layer of the DBC substrate layer one through an aluminum wire, and the gate and the Kelvin source are also connected through an aluminum wire;

[0014] The commutation circuit two comprises capacitors C 2, switch tube S 3, switch tube S 4; wherein the source of the switch tube is connected to the upper copper layer of the DBC substrate layer one through an Al wire, and the gate and the Kelvin source are also connected through an aluminum wire;

[0015] The commutation circuit three includes capacitors welded in sequence C 3, switch tube S 6, diode D 5, switch tube S 2, switch tube welding mode is the same as above;

[0016] In the above packaging process, the DBC substrate layer one and the DBC substrate layer two are combined into a whole by laser via copper injection.

[0017] In the above packaging process, the thickness of each DBC substrate is 0.635mm, wherein the copper thickness of the upper part of the DBC substrate is 0.3mm, the AlN substrate thickness is 0.335mm, and the DBC substrate layer one is provided with laser vias on the left and right sides.

[0018] In the above packaging process, the switch tube S 1, S 6、 S 3, S 4 uses two SiC MOSFET chips in parallel, and the switch tube S 2, S 5 uses two IGBT chips in parallel, and the antiparallel diode uses three diode chips in parallel.

[0019] In the above packaging process, C 1, C 2, C 3 uses a ceramic capacitor, D 1~ D 5 uses a 650V diode of Cree Company, model CPW5-0650-Z050B.

[0020] Therefore, the application has the following advantages: the four-level half-bridge power module packaging idea is proposed for the first time in the world, six different four-level half-bridge power module design structures are provided taking the four-level double-T type converter as an example. The emergence of the four-level half-bridge power module provides a new way for further improving the power density, conversion efficiency and other performances of the power electronic converter. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a two-level half-bridge power module (CAB400M12XM3) of Cree Company;

[0022] Figure 2 is a three-level NPC half-bridge power module (NXH350N100H4Q2F2P1G) of Onsemi Company;

[0023] Figure 3 is a three-level ANPC half-bridge power module of Vincotech Company

[0024] (B0-SP12NAA008ME01-LR88F78T);

[0025] Figure 4 is a three-level T-type half-bridge power module (F3L8MR12W2M1HP_B11) of Infineon Technologies;

[0026] Fig. 5(a) is a four-level double T-type converter topology of scheme one;

[0027] Fig. 5(b) is a four-level double T-type converter topology of scheme two;

[0028] Fig. 5(c) is a four-level double T-type converter topology of scheme three;

[0029] Fig. 5(d) is a four-level double T-type converter topology of scheme four;

[0030] Fig. 5(e) is a four-level double T-type converter topology of scheme five;

[0031] Fig. 5(f) is a four-level double T-type converter topology of scheme six;

[0032] Figure 6 is a stray inductance extraction method of four-level double T-type converter commutation loop 1;

[0033] Figure 7 is a stray inductance extraction method of four-level double T-type converter commutation loop 2;

[0034] Figure 8 is a stray inductance extraction method of four-level double T-type converter commutation loop 3;

[0035] Figure 9 is a four-level half-bridge power module circuit layout of scheme one;

[0036] Figure 10 is a four-level half-bridge power module circuit layout of scheme two;

[0037] Figure 11 is a four-level half-bridge power module circuit layout of scheme three;

[0038] Figure 12 is a four-level half-bridge power module circuit layout of scheme four;

[0039] Figure 13 is a four-level half-bridge power module circuit layout of scheme five;

[0040] Figure 14 is a four-level half-bridge power module circuit layout of scheme six;

[0041] Figure 15 . is the commutation loop of the four-level half-bridge power module;

[0042] Figure 16 . is the three-dimensional design of the four-level half-bridge power module of scheme one;

[0043] Figure 17 . is the three-dimensional design of the four-level half-bridge power module of scheme two;

[0044] Figure 18 . is the three-dimensional design of the four-level half-bridge power module of scheme three;

[0045] Figure 19 . is the three-dimensional design of the four-level half-bridge power module of scheme four;

[0046] Figure 20 . is the three-dimensional design of the four-level half-bridge power module of scheme five;

[0047] Figure 21 . is the three-dimensional design of the four-level half-bridge power module of scheme six;

[0048] Figure 22 . is the complete packaging 1 of the four-level half-bridge power module;

[0049] Figure 23 . is the complete packaging 2 of the four-level half-bridge power module. DETAILED DESCRIPTION

[0050] The technical solutions of the present application will be further specifically described below through examples and in combination with the drawings.

[0051] Example:

[0052] Taking the 4L-DT converter topology in FIG. 5 as an example, a 1200V / 100A 4L-DT half-bridge power module is researched and designed, and six power module design schemes are provided. S 1、 S 6 bear the entire DC bus voltage, and the switching tubes S 2、 S 3、 S 4、 S 5 bear one third of the entire DC bus voltage. In order to meet the continuous current output capability of 100A, the multi-chip parallel technology needs to be adopted due to the current carrying capability of the existing power device chip.

[0053] (1) In scheme one, the switching tubes S 1、 S 6 all adopt two 1200V SiC MOSFET chips in parallel; the switching tubes S 2、 S5 All use two 600V IGBT chips in parallel, and the antiparallel diode uses three 600V diode chips in parallel; switch tube S 3、 S 4 All use two 600V IGBT chips in parallel, and the antiparallel diode uses two 600V diode chips in parallel.

[0054] (2) In scheme two, the switch tube S 1、 S 6 All use two 1200V SiC MOSFET chips in parallel; switch tube S 2、 S 5 All use two 600V IGBT chips in parallel, and the antiparallel diode uses three 600V diode chips in parallel; switch tube S 3、 S 4 All use two 650V SiC MOSFET chips in parallel.

[0055] (3) In scheme three, the switch tube S 1、 S 6 All use two 1200V IGBT chips in parallel, and the antiparallel diode uses two 1200V diode chips in parallel; switch tube S 2、 S 3、 S 4、 S 5 All use two SiC MOSFET chips in parallel.

[0056] (4) In scheme four, the switch tube S 1、 S 6 All use two 1200V SiC MOSFET chips in parallel; switch tube S 2、 S 3、 S 4、 S 5 All use two 650V SiC MOSFET chips in parallel.

[0057] (5) In scheme five, the switch tube S 1、 S 6 All use two 1200V IGBT chips in parallel, and the antiparallel diode uses two 1200V diode chips in parallel; switch tube S 2、 S 3、 S 4、 S 5 All use two 600V IGBT chips in parallel, and the antiparallel diode uses two 600V diode chips in parallel.

[0058] (6) In scheme six, the switch tube S 1、 S6 Both of the 1200V IGBT chips are connected in parallel, and both of the 1200V diode chips are connected in parallel in anti-parallel; the switch tube S 3、 S 4 Both of the 600V IGBT chips are connected in parallel, and both of the 600V diode chips are connected in parallel in anti-parallel; the switch tube S 2、 S 5 Both of the 650V MOSFET chips are connected in parallel.

[0059] Compared with traditional Si devices, the SiC MOSFET is more sensitive to the stray parameters in the circuit. This is because the SiC MOSFET has high-frequency characteristics, small junction capacitance, low gate charge, fast switching speed, and great change rate of voltage and current in the switching process. The parasitic inductance is extremely easy to produce voltage overshoot and oscillation phenomenon under great di / dt, which increases the device voltage stress, switching loss and electromagnetic interference. Therefore, how to reduce the stray parameters in the commutation loop becomes an important performance indicator for evaluating the design of a power module.

[0060] The 4L-DT half-bridge power module has three different commutation loops 1, 2 and 3. In order to reduce the stray parameters of each commutation loop, the stray inductance parameters of the three commutation loops 1, 2 and 3 can be tested respectively through double-pulse experiments. As shown in Figure 6 , the switch tube S 3、 S 5 is always on, and the switch tube S 4、 S 6 is always off, and the switch tube S 1、 S 2 are switched with each other to measure the stray inductance of the commutation loop 1; as shown in Figure 7 , the switch tube S 1、 S 2、 S 5、 S 6 is always off, and the switch tube S 3、 S 4 are switched with each other to measure the stray inductance of the commutation loop 2; as shown in Figure 8 , the switch tube S 2、 S 4 is on, and the switch tube S 1、 S 3 is always off, and the switch tube S 5、 S 6 are switched with each other to measure the stray inductance of the commutation loop 3.

[0061] The circuit layout structures of the 4L-DT half-bridge power modules of the six schemes proposed in the application are respectively shown in Figure 9 、 10 , 11, 12, 13 and 14, whereinC 1. C 2. C 3 are high frequency decoupling capacitors of commutation circuits 1, 2, and 3 respectively. Figure 15 As shown, commutation loop 1 and commutation loop 3 respectively achieve mutual cancellation of magnetic flux in vertical structures through vias, and commutation loop 2 achieves mutual cancellation of magnetic flux in planar structures to reduce the stray inductance of each commutation loop. When implementing the four-level half-bridge power module packaging, the designed 4L-DT half-bridge module includes two DBC substrates, each DBC substrate is 0.635mm thick, of which the copper thickness is 0.3mm, and the top DBC adopts laser vias. Based on the proposed power module circuit layout, the stray inductance of each commutation loop is small, which is conducive to reducing the voltage spikes of each switching tube and reducing the impact of electromagnetic interference. Finally, the internal structures of the six schemes of the 4L-DT half-bridge power module are as follows Figure 16 、 17 , 18, 19, 20, and 21, the complete package structure of the 4L-DT half-bridge power module is as follows Figure 22 and Figure 23 shown.

[0062] The specific embodiments described herein are merely illustrative of the spirit of the present invention. Persons skilled in the art may make various modifications, additions, or substitutions to the described specific embodiments without departing from the spirit of the present invention or exceeding the scope of the appended claims.

Claims

1. A packaging process for a four-level dual T-type half-bridge power module, characterized in that: The four-level double-T type half-bridge power module comprises two DBC substrate layers, i.e., a DBC substrate layer one and a DBC substrate layer two, and the power module is arranged on the DBC substrate layer one and comprises the commutation circuit one, the commutation circuit two and the commutation circuit three connected in sequence; The converter circuit comprises a capacitor C 1. A switch tube S 1. A switch tube S 2. A diode D 5; The converter circuit two includes capacitors connected in series in turn as a loop C 2, switch tube S 3, switch tube S 4; The converter circuit three includes capacitors connected in series C 3, switch tube S 6, diode D 5, switch tube S 5; The packaging process comprises: Two DBC substrate layers, i.e., a DBC substrate layer one and a DBC substrate layer two, are provided, and three commutation modules, i.e., the commutation circuit one, the commutation circuit two and the commutation circuit three, are packaged on the DBC substrate layer one; The commutation circuit one and the commutation circuit three are packaged in parallel on the DBC substrate layer one, and the commutation circuit three is packaged to the side of the commutation circuit two and the commutation circuit one; the source of the switch tube is connected with the upper copper layer of the DBC substrate layer one through an aluminum wire, and the gate and the Kelvin source are also connected with the aluminum wire.

2. The packaging process of claim 1, wherein, The DBC substrate layer one and the DBC substrate layer two are combined into a whole through laser via copper injection.

3. The packaging process of claim 1, wherein, The thickness of each DBC substrate is 0.635 mm, wherein the upper copper of the DBC substrate is 0.3 mm thick, the AlN substrate is 0.335 mm thick, and the DBC substrate layer one adopts laser via on the left and right sides.

4. The packaging process of claim 1, wherein, The switch tube S 1、 S 6、 S 3、 S 4Two SiC MOSFET chips are connected in parallel, and the switch tube S 2、 S 5Two IGBT chips are connected in parallel, and the antiparallel diode of the switch tube uses three diode chips connected in parallel.

5. The packaging process of claim 1, wherein, C 1、 C 2、 C 3 Adopt ceramic capacitor, D 1~ D 5 Adopt Cree company's 650V diode, model is CPW5-0650-Z050B.

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