A high-power vertical structure LED chip structure and a preparation method of a current blocking layer thereof

Abstract

The application provides a high-power vertical structure LED chip structure and a preparation method of a current blocking layer of the LED chip structure. The LED chip comprises, from bottom to top, a conductive substrate, a metal bonding layer, a first electrode, a first semiconductor layer, an active layer, a second semiconductor layer, a current blocking layer and a second electrode. The complementary layer corresponds to the position of the current blocking layer. The current blocking layer is formed on the surface of the second semiconductor layer. The second electrode is formed on the surface of the current blocking layer. The second electrode comprises a pad, a transmission electrode and a transmission injection electrode. The width of the pad and the transmission electrode is smaller than the width of the current blocking layer below the pad and the transmission electrode. The width of the transmission injection electrode is larger than the width of the current blocking layer below the transmission injection electrode. Through the design of the width of the second electrode and the current blocking layer, the current crowding below the electrode is reduced, the current expansion uniformity of the high-power LED is improved, and the brightness of the chip under a large current is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of light emitting diode, in particular to a large power vertical structure LED chip structure and a preparation method of a current blocking layer thereof. BACKGROUND

[0002] Semiconductor light emitting diode (LED) has important application in display and illumination field. LED is actually a device for converting electric energy into light energy through active region between acceptor doped layer (P layer) and donor doped layer (N layer), and has the advantages of good controllability, fast response, long service life, high light emitting efficiency, energy saving and environmental protection, etc. With the development of LED industry, large power LED is more and more favored by people, and large power and high brightness LED has wide application in many fields such as automobile lighting, outdoor lighting, LCD backlight, projector, etc. With the increase of using power, the current injected per unit area also requires more and more, and large power LED still faces technical problems such as light emitting efficiency and light emitting unevenness.

[0003] In the prior art, the upper electrode of vertical structure LED usually adopts finger current expansion metal layer as a conductive channel. Under the condition of large current density, the current is concentrated at the injection end of the finger, and it is difficult to diffuse to the other end, so that the current of the local area of large power LED is crowded, the light emitting is uneven, and the light emitting efficiency is low. The uneven light emitting of the light emitting surface of large power LED not only reduces the light emitting brightness of LED, but also causes serious heat of LED chip and reduces the service life of LED chip. Therefore, the finger type electrode is not suitable for large size and large power LED chip design. SUMMARY

[0004] The first object of the present application is to provide a large power vertical structure LED chip structure capable of improving the light emitting brightness of LED, reducing the heat of LED chip and prolonging the service life of LED chip, which overcomes the defects of uneven light emitting and low light emitting efficiency of large power LED with finger type electrode.

[0005] The second object of the present application is to provide a preparation method of a current blocking layer of large power vertical structure LED chip structure.

[0006] The first object of the present application is specifically realized as follows:

[0007] A high-power vertical structure LED chip structure, characterized in that: the LED chip comprises, from bottom to top, a conductive substrate, a metal bonding layer, a first electrode, a first semiconductor layer, an active layer, a second semiconductor layer, a current blocking layer, and a second electrode; the complementary layer corresponds to the position of the current blocking layer; the current blocking layer is formed on the surface of the second semiconductor; the second electrode comprises at least one pad, a transmission electrode, and a transmission injection electrode; the pad and the transmission electrode are formed at a predetermined position on the surface of the current blocking layer, the transmission electrode is located on the left and right sides and the upper side of the pad, and the transmission electrode and the pad form a closed ring; a part of the transmission injection electrode is formed on the surface of the second semiconductor, and the remaining part of the transmission injection electrode is formed on the surface of the current blocking layer, and the transmission injection electrode is located inside the closed ring formed by the transmission electrode and the pad; the pad is connected with the transmission electrode, the transmission electrode is connected with the transmission injection electrode, and the transmission injection electrode is not connected with the pad; the electrode width of the pad and the transmission electrode is smaller than the width of the current blocking layer below the pad and the transmission electrode, and the width of the transmission injection electrode is greater than the width of the current blocking layer below the transmission injection electrode.

[0008] Further, the width of the pad is D a , the width of the current blocking layer below the pad is W a , and W a -D a ≥ 0.1 nm; the width of the transmission electrode is D b , the width of the current blocking layer below the transmission electrode is W b , and W b -D a ≥ 0.1 nm; the width of the transmission injection electrode is D c , the width of the current blocking layer below the pad is W c , and D c -W c ≥ 0.1 nm; the distance between the pad and the transmission injection electrode is d0, and d0≥ 0.1 nm.

[0009] Further, the width of the transmission electrode gradually changes from far away from the pad to close to the pad; the width of the transmission injection electrode gradually changes from far away from the transmission electrode to close to the transmission electrode.

[0010] Further, the gradual change trend is from wide to narrow, from narrow to wide, or from wide to narrow to wide.

[0011] Further, the transmission electrode comprises one or more U-shaped electrodes; and the transmission injection electrode comprises one or more strip-shaped electrodes.

[0012] Further, at least one end of the strip-shaped electrode is connected with the U-shaped electrode.

[0013] The second object of the present application is achieved in particular as follows:

[0014] The preparation method of the current blocking layer of a high-power vertical structure LED chip structure is characterized in that: a dielectric layer is deposited on the surface of the second semiconductor layer as the current blocking layer; or ion bombardment or ion implantation is performed on the surface of the second semiconductor layer to form a high-resistance region on the surface of the second semiconductor layer as the current blocking layer; or a metal layer forming a Schottky contact with the second semiconductor layer is deposited on the surface of the second semiconductor layer.

[0015] Further, the thickness of the current blocking layer is 1 nm to 10,000 nm.

[0016] Further, the dielectric layer is one or more of Al2O3, SiO2, Si3N4, TiO2 and Ti3O5.

[0017] Further, the ion source of the ion bombardment or ion implantation is any one or more of Ar, H, He, N, F, Mg, Zn, O, Ti, Fe, Cr, Mn or Co; and the ion energy of the ion bombardment is from 5 KeV to 1,000 KeV.

[0018] Further, the material of the metal layer includes one or more of Al, Ti, Ag, Cu, Cr, Mn, Co and W.

[0019] The second electrode of the present application includes a pad, a transmission electrode and a transmission injection electrode. Since the transmission electrode is connected with the pad, the transmission injection electrode is connected with the transmission electrode, and the pad is not connected with the transmission injection electrode, after the current is injected through the pad, since the pad and the transmission electrode are not in contact with the second semiconductor layer, the current will not be injected into the second semiconductor layer below the pad and the transmission electrode, but will be expanded in the transmission electrode, and then will be injected into the second semiconductor layer below through the transmission injection electrode, thereby changing the current injection position and avoiding the current crowding at the pad. Compared with the common N-Finger injection form, the current injection form reduces the light-emitting area lost due to the difficulty of the current to diffuse to the other end of the Finger from the injection end of the Finger, overcomes the defects of the uneven light emission and the low light-emitting efficiency of the existing Finger-type electrode high-power LED, improves the current expansion uniformity of the LED chip under a large current, and improves the saturation characteristics and the light-emitting brightness of the LED chip. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1 The chip structure cross-sectional view of one embodiment of the present application is shown in the figure;

[0021] Figure 2 The chip structure cross-sectional view of one embodiment of the present application is shown in the figure; Figure 1The second electrode schematic diagram of a high-power vertical structure LED chip structure is shown, wherein 1 is a pad, 2 is a transmission electrode, and 3 is a transmission injection electrode;

[0022] Figure 3 For Figure 1 The second electrode width schematic diagram of a high-power vertical structure LED chip structure is shown;

[0023] Figure 4 The second electrode width schematic diagram of a high-power vertical structure LED chip structure is shown;

[0024] Figure 5 The chip structure cross-sectional schematic diagram of a high-power vertical structure LED chip structure is shown. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme of the embodiments of the present application will be described in detail, clearly and completely below in combination with the drawings of the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments of the present application. In addition, the drawings of the present application are very simplified and not accurate in scale, and are only used to conveniently and clearly assist in describing the present application.

[0026] Embodiment 1:

[0027] Figure 1 The cross-sectional structure schematic diagram of a high-power vertical structure LED chip structure is shown, and the LED chip comprises, from bottom to top, a permanent substrate 100, a metal bonding layer 101, a first electrode 102, a complementary layer 103, a first semiconductor layer 104, an active region 105, a second semiconductor layer 106, a current blocking layer 107, a second electrode 108, and a passivation layer 109.

[0028] The passivation layer 109 covers the outer region of the LED chip.

[0029] The second electrode 108 is composed of three parts, as shown in the figure. Figure 2 As shown, 1 is a pad, 2 is a transmission electrode, and 3 is a transmission injection electrode. The pad and the transmission electrode are formed at a predetermined position on the surface of the current blocking layer, the transmission electrode is located on the left and right sides and the upper side of the pad, and the transmission electrode and the pad form a closed ring; a part of the transmission injection electrode is formed on the surface of the second semiconductor, and the remaining part of the transmission injection electrode is formed on the surface of the current blocking layer, and the transmission injection electrode is located inside the closed ring formed by the transmission electrode and the pad; the pad is connected with the transmission electrode, the transmission electrode is connected with the transmission injection electrode, and the transmission injection electrode is not connected with the pad;

[0030] AsFigure 3 The width of the pad is D a The width of the current blocking layer 107 under the pad is W a W a -D a ≥0.1nm; the width of the pad is less than the width of the current blocking layer under the pad, the pad is completely formed on the current blocking layer, the pad does not contact the second semiconductor layer 106, avoiding the current directly injected from the pad to the second semiconductor layer 106, reducing the current crowding under the pad and the transmission electrode.

[0031] The width of the transmission electrode is D b The width of the current blocking layer 107 under the transmission electrode is W b W b -D b ≥0.1nm; the width of the transmission electrode is less than the width of the current blocking layer under the transmission electrode, the transmission electrode is completely formed on the current blocking layer, thus the electrode does not contact the second semiconductor layer 106, avoiding the current directly injected from the transmission electrode to the second semiconductor layer 106, reducing the current crowding under the transmission electrode.

[0032] The width of the transmission injection electrode is D c The width of the current blocking layer 107 under the transmission injection electrode is W c D c -W c ≥0.1nm; the width of the transmission injection electrode is less than the width of the current blocking layer under the transmission injection electrode, the transmission injection electrode contacts the second semiconductor layer 106 through the outside of the current blocking layer 107. The current is injected from the transmission injection electrode to the second semiconductor layer 106, and the current blocking layer 107 under the injection area aims to reduce the current crowding under the transmission injection electrode.

[0033] The distance between the pad and the transmission injection electrode is d0, d0≥0.1nm. The pad is not connected with the transmission injection electrode, avoiding the current injected from the pad directly injected to the transmission injection electrode, causing the current crowding under the transmission injection electrode close to the pad.

[0034] The current blocking layer 107 is formed on the second semiconductor layer 106.

[0035] The complementary layer 103 corresponds to the position of the current blocking layer 107. The complementary layer 103 further reduces the current density under the second electrode 108, so that the current crowding will not be formed under the pad and the transmission electrode.

[0036] The preparation method of the complementary layer 103 is to deposit a dielectric layer on the first semiconductor layer by PECVD.

[0037] The current blocking layer 107 is prepared by depositing a dielectric layer in the second semiconductor layer using PECVD.

[0038] The thickness of the current blocking layer 107 and the complementary layer 103 is between 1 nm and 10000 nm, and the material of the dielectric layer is, but is not limited to, one or more of Al2O3, SiO2, Si3N4, TiO2, and Ti3O5.

[0039] The first electrode 102 has both high reflectivity and low contact resistance. The material of the first electrode 102 is NiAg, which reflects the light from the substrate direction of the LED chip toward the light-emitting surface, thereby improving the light extraction efficiency.

[0040] A roughened structure, photonic crystal structure, or antireflection film structure is formed on the surface of the second semiconductor layer 106 to improve the light extraction efficiency of the LED chip surface.

[0041] Example 2:

[0042] Figure 4 A schematic diagram of an embodiment of a high-power vertical LED chip structure with a gradually varying width of the second electrode is shown. Figure 4 The illustrated embodiments and Figure 1 The illustrated embodiments are basically the same, with the following differences: Figure 4 The illustrated embodiment features electrodes with a gradually narrowing width; the width of the transfer electrode gradually narrows from near the pad to far away from the pad; the width of the transfer injection electrode also gradually narrows from the side near the transfer electrode to the side far away from the transfer electrode. For example... Figure 4 As shown, the width D of the pad a The transmission electrode remains unchanged; it is divided into four parts, of which D b1 D b2 The width remains unchanged, D b1 > D b2 ;D b4 D b3 The width is gradually reduced from both sides to the middle, with an overall width of D. b4 > D b3 The width of the injection electrode gradually narrows from the distance from the transmission electrode to the distance from the transmission electrode. This gradient electrode design maximizes the effective light-emitting surface of the LED chip while maintaining current expansion and minimizing light obstruction by the electrodes.

[0043] Example 3:

[0044] Figure 5 A schematic cross-sectional view of a chip structure is shown as an embodiment of a high-power vertical LED chip structure. Figure 5 The illustrated embodiments and Figure 1The embodiments of the display are basically the same, and the difference is that the preparation method of the complementary layer 103 is to form a high resistance area on the surface of the first semiconductor layer by ion implantation; the preparation method of the barrier layer 107 is to form a high resistance area on the surface of the second semiconductor layer by ion implantation, and this structure does not have a passivation layer on the side wall.

[0045] The above embodiments only express the technical implementation manners of the present application, which are described in a more specific and detailed manner, but should not be understood as a limitation to the patent of the present application. Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can still be modified, or some technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A high-power vertical structure LED chip structure, characterized in that: The LED chip comprises, from bottom to top, a conductive substrate, a metal bonding layer, a first electrode, a complementary layer, a first semiconductor layer, an active layer, a second semiconductor layer, a current blocking layer, and a second electrode; the positions of the complementary layer and the current blocking layer correspond to each other; the current blocking layer is formed on the surface of the second semiconductor; the second electrode comprises at least one pad, a transmission electrode, and a transmission injection electrode; the pad and the transmission electrode are formed at predetermined positions on the surface of the current blocking layer, the transmission electrode is located on the left and right sides and the upper side of the pad, and the transmission electrode and the pad form a closed ring; a part of the transmission injection electrode is formed on the surface of the second semiconductor, and the remaining part of the transmission injection electrode is formed on the surface of the current blocking layer, and the transmission injection electrode is located inside the closed ring formed by the transmission electrode and the pad; the pad is connected to the transmission electrode, the transmission electrode is connected to the transmission injection electrode, and the transmission injection electrode is not connected to the pad; the electrode width of the pad and the transmission electrode is smaller than the width of the current blocking layer below the pad and the transmission electrode, and the width of the transmission injection electrode is greater than the width of the current blocking layer below the transmission injection electrode.

2. The high-power vertical structure LED chip structure according to claim 1, characterized in that: the pad width is D a , the width of the current blocking layer under the pad is W a , W a -D a ≥ 0.1 nm; the width of the transport electrode is D b , the width of the current blocking layer under the transport electrode is W b , W b -D a ≥ 0.1 nm; the width of the transport injection electrode is D c , the width of the current blocking layer under the pad is W c , D c -W c ≥ 0.1 nm; the spacing between the pad and the transport injection electrode is d0, d0≥ 0.1 nm.

3. The high-power vertical structure LED chip structure according to claim 1, characterized in that: The width of the transmission electrode gradually changes from far away from the pad to close to the pad; the width of the transmission injection electrode gradually changes from far away from the transmission electrode to close to the transmission electrode.

4. The high-power vertical structure LED chip structure according to claim 3, characterized in that: The gradual change trend is from wide to narrow, from narrow to wide, or from wide to narrow to wide.

5. The high-power vertical structure LED chip structure according to claim 1, characterized in that: The transmission electrode comprises one or more U-shaped electrodes; the transmission injection electrode comprises one or more strip-shaped electrodes.

6. The high-power vertical structure LED chip structure according to claim 5, characterized in that: At least one end of the strip-shaped electrode is connected to the U-shaped electrode.

7. A method for fabricating a current blocking layer of a high-power vertical structure LED chip structure, characterized in that: A dielectric layer is deposited on the surface of the second semiconductor layer as the current blocking layer, the dielectric layer is one or more of Al2O3, SiO2, Si3N4, TiO2, and Ti3O5; or ion bombardment or ion implantation is performed on the surface of the second semiconductor layer to form a high resistance region on the surface of the second semiconductor layer as the current blocking layer; or a metal layer forming a Schottky contact with the second semiconductor layer is deposited on the surface of the second semiconductor layer.

8. The method of claim 7, wherein the method further comprises: The thickness of the current blocking layer is 1 nm to 10,000 nm.

9. The method of claim 7, wherein the method further comprises: The ion source of the ion bombardment or ion implantation is any one or more of Ar, H, He, N, F, Mg, Zn, O, Ti, Fe, Cr, Mn, or Co; the ion energy of the ion bombardment is 5 KeV to 1,000 KeV.

10. The method of claim 7, wherein the method further comprises: The material of the metal layer comprises one or more of Al, Ti, Ag, Cu, Cr, Mn, Co, and W.

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