A solar cell array maximum power tracking control circuit for satellite
Through pure analog chip hardware circuit design, the use of solar cell arrays, DC/DC converters and control circuits has achieved low-cost, high-reliability maximum power point tracking, solved the power tracking problem of satellite solar cell arrays under different environmental conditions, improved solar energy utilization and reduced the area of the cell array and the weight of the satellite.
Patent Information
- Application Number
- CN202211546435.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-05
- Publication Date
- 2025-10-24
- Estimated Expiration
- 2042-12-05
AI Technical Summary
The existing maximum power point tracking control scheme for satellite solar cell arrays is costly and has low reliability, making it difficult to effectively track the maximum power point under different environmental conditions.
It adopts pure analog chip hardware circuit design, including solar cell array, DC/DC converter, battery pack, BUCK circuit-based multiplier, state comparator, logic control circuit, PI controller and PWM controller. It calculates power by sampling voltage and current, and uses logic control and PI control to achieve maximum power point tracking.
It achieves low-cost and high-reliability tracking of the maximum power point of the solar cell array, improves the utilization rate of solar energy, and reduces the area of the cell array and the weight and size of the satellite.
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Figure CN116317059B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application relates to the field of power supplies, in particular to a maximum power tracking control circuit for a solar cell array for satellites. BACKGROUND
[0002] The solar cell power generation has the characteristics that the output power is greatly affected by the environmental temperature, the light intensity and the load, the maximum power point of the solar cell array changes with the changes of the above factors, and the output power is greatly different in different working stages of the satellite power supply, therefore, the MPPT control is needed to make the solar cell work at the maximum power point or the maximum power point vicinity to reduce the solar cell array area, so as to reduce the size and weight of the whole machine.
[0003] In the prior art, the mainstream implementation mode is a digital control scheme based on FPGA, DSP and special control chips, the anti-radiation chips of the scheme have high cost and low reliability. SUMMARY
[0004] In order to solve the problems in the prior art, the application provides a maximum power tracking control circuit for a solar cell array for satellites, which comprises a solar cell array, a DC / CD converter, a battery pack, a multiplier based on a BUCK circuit, a first state comparator, a second state comparator, a logic control circuit, a PI controller and a PWM controller. The solar cell array is connected with the DC / CD converter, and the DC / CD converter is connected with the battery pack. The solar cell array voltage and the solar cell array current are sampled from the connection position of the solar cell array and the DC / CD converter. The solar cell array voltage and the solar cell array current are taken as the inputs of the multiplier based on the BUCK circuit, the multiplier based on the BUCK circuit calculates the solar cell array power, and the power is input to the first state comparator. The solar cell array voltage is input to the second state comparator. The inputs of the first state comparator and the second state comparator are connected with the input of the logic control circuit, the output of the logic control circuit is taken as the input of the PI controller, the output of the PI controller is connected with the PWM controller, and the duty ratio of the output of the PWM controller is taken as the input of the DC / CD converter.
[0005] Further, the DC / CD converter is a Boost converter or a Buck converter. If the DC / CD converter is the Buck converter, the output of the PWM controller is input to the DC / CD converter through an inverter.
[0006] Further, the DC / CD converter comprises a first capacitor, a first inductor, a first diode and a first field effect transistor, one end of the first capacitor is connected with one end of the solar cell array and one end of the first inductor, the other end is connected with the other end of the solar cell array, the source of the first field effect transistor and the negative pole of the battery pack and grounded; the other end of the first inductor is connected with the drain of the first field effect transistor and the positive pole of the first diode, the negative pole of the first diode is connected with the positive pole of the battery pack; the gate of the first field effect transistor is connected with the output of the PWM circuit.
[0007] Further, the BUCK circuit-based multiplier comprises a second capacitor, a third capacitor, a second field effect transistor, a second diode, a second inductor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first comparator and a PWM controller, one end of the second capacitor is connected with one end of the solar cell array and the drain of the second field effect transistor, the other end is connected with the other end of the solar cell array, the positive pole of the second diode, one end of the third capacitor and one end of the first resistor and grounded; the other end of the second diode is connected with one end of the second inductor, the other end of the second inductor is connected with the other end of the third capacitor and the other end of the first resistor and serves as the output of the BUCK circuit-based multiplier; the sampled solar cell array current serves as the input of one end of the third resistor, the other end of the third resistor and one end of the second resistor serve as the input of the positive pole of the first comparator, the other end of the second resistor is connected with the first reference voltage, one end of the fourth resistor is grounded, the other end and one end of the fifth resistor serve as the input of the negative pole of the first comparator, the other end of the fifth resistor and the output of the first comparator serve as the input of the PWM controller, the output of the PWM controller is connected with the gate of the second field effect transistor.
[0008] Further, the PWM controller is selected from the PWM controllers with model numbers of UC1825, UC1843 or UC1525.
[0009] Further, the first state comparator and the second state comparator have the same structure, the first state comparator comprises a sixth resistor, a seventh resistor, a fourth capacitor, a fifth capacitor and a second comparator, one end of the sixth resistor is connected with one end of the seventh resistor and serves as the input of the first state comparator, the other end of the sixth resistor, one end of the fourth capacitor and the negative pole input of the second comparator are connected together, the other end of the fourth capacitor and one end of the fifth capacitor are connected together and grounded, the other end of the fifth capacitor, the other end of the seventh resistor and the positive pole of the second comparator are connected together, the output of the second comparator serves as the output of the first state comparator.
[0010] Further, the logic control circuit comprises a tenth resistor, an eleventh resistor, a twelfth resistor, a third diode, a first triode and a second triode, one end of the tenth resistor and one end of the twelfth resistor are connected together and connected with an output end of the second state comparator; the other end of the twelfth resistor is connected with a base of the second triode, an emitter of the second triode is grounded, a collector is connected with an emitter of the first triode, a base of the first triode is connected with one end of the eleventh resistor, the other end of the eleventh resistor is connected with an output end of the first state comparator; the other end of the tenth resistor is connected with a positive electrode of a diode, a negative electrode of the diode is connected with the collector of the first triode and takes the collector as an output end of the logic control circuit.
[0011] Further, the PI controller comprises a thirteenth resistor, a fourteenth resistor, an eighth capacitor and a fourth comparator, one end of the thirteenth resistor is taken as an input end of the PI controller, the other end is connected with one end of the eighth capacitor and a negative electrode of the third comparator, a positive electrode of the third comparator is connected with a second reference voltage end; the other end of the eighth capacitor is connected with one end of the fourteenth resistor, the fourteenth resistor is connected with an output end of the third comparator together and taken as an output of the PI controller.
[0012] The application tracks the maximum power point of the solar cell array, makes the solar cell array work at the maximum power point all the time, improves the utilization rate of the solar cell array, reduces the area of the solar cell array and the weight and size of the satellite. BRIEF DESCRIPTION OF DRAWINGS
[0013] Figure 1 It is a structural schematic diagram of the maximum power tracking control circuit of the satellite solar cell array of the application;
[0014] Figure 2 It is a preferred embodiment of the maximum power tracking control circuit of the satellite solar cell array of the application;
[0015] Figure 3 It is a P-V curve diagram of the solar cell array of the application;
[0016] Figure 4 It is a simulation schematic diagram of the preferred embodiment of the application;
[0017] L1, first inductor; L2, second inductor; C1, first capacitor; C2, second capacitor; C3, third resistor; C4, fourth capacitor; C5, fifth capacitor; C6, sixth capacitor; C7, seventh capacitor; C8, eighth capacitor; R1, first resistor; R2, second resistor; R3, third resistor; R4, fourth resistor; R5, resistor; R6, resistor; R7, resistor; R8, resistor; R9, resistor; R 10 , resistor; R 11 , resistor; R 12, resistance; R 13 , resistance; R 14 , resistance; U1, first comparator; U2, first PWM controller; U3, second comparator; U4, third comparator; U5, fourth comparator; U6, second PWM controller. DETAILED DESCRIPTION
[0018] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative effort belong to the protection scope of the present application.
[0019] The present application provides a maximum power tracking control circuit for a solar cell array for satellites, as shown in Figure 1 , which comprises a solar cell array, a DC / CD converter, a battery pack, a multiplier based on a BUCK circuit, a first state comparator (i.e. state comparator 1 in Figure 1 ), a second state comparator (i.e. state comparator 2 in Figure 1 ), a logic control circuit, a PI controller and a second PWM controller (i.e. PWM circuit in Figure 1 ). In this embodiment, the PWM controller is named as the second PWM controller for distinguishing from the PWM controller in the multiplier based on the BUCK circuit). The solar cell array is connected with the DC / CD converter, and the DC / CD converter is connected with the battery pack. The solar cell array voltage and the solar cell array current are sampled from the connection between the solar cell array and the DC / CD converter. The solar cell array voltage and the solar cell array current are taken as the input of the multiplier based on the BUCK circuit, the multiplier based on the BUCK circuit calculates the solar cell array power, and the power is input to the first state comparator. The solar cell array voltage is input to the second state comparator. The input of the first state comparator and the second state comparator is connected with the input of the logic control circuit, the output of the logic control circuit is taken as the input of the PI controller, the output of the PI controller is connected with the PWM circuit, and the duty cycle output by the PWM circuit is taken as the input of the DC / CD converter.
[0020] The present application provides a specific embodiment as shown in Figure 2 . In this embodiment, the structure of the DC / CD converter, the multiplier based on the BUCK circuit, the first state comparator, the second state comparator, the logic control circuit and the PI controller is as follows:
[0021] The DC / CD converter comprises a first capacitor C1, a first inductor L1, a first diode and a first field effect transistor. One end of the first capacitor is connected with one end of a solar cell array and one end of the first inductor, and the other end is connected with the other end of the solar cell array, the source of the first field effect transistor and the negative pole of a battery pack, and is grounded. The other end of the first inductor is connected with the drain of the first field effect transistor and the positive pole of the first diode, and the negative pole of the first diode is connected with the positive pole of the battery pack. The gate of the first field effect transistor is connected with the output end of a PWM circuit.
[0022] The BUCK circuit-based multiplier comprises a second capacitor C2, a third capacitor C3, a second field effect transistor, a second diode, a second inductor L2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first comparator U1 and a first PWM controller U2 (in this embodiment, the PWM controller is named as the first PWM controller, which is used to distinguish the PWM controller connected with the PI controller). One end of the second capacitor is connected with one end of a solar cell array and the drain of the second field effect transistor, and the other end is connected with the other end of the solar cell array, the positive pole of the second diode, one end of the third capacitor and one end of the first resistor, and is grounded. The other end of the second diode is connected with one end of the second inductor, and the other end of the second inductor is connected with the other end of the third capacitor and the other end of the first resistor, and serves as the output end of the BUCK circuit-based multiplier. The sampled solar cell array current serves as the input of one end of the third resistor, and the other end of the third resistor and one end of the second resistor serve as the input of the positive pole of the first comparator. The other end of the second resistor is connected with a first reference voltage, one end of the fourth resistor is grounded, the other end of the fourth resistor and one end of the fifth resistor serve as the input of the negative pole of the first comparator, the other end of the fifth resistor is connected with the output of the first comparator, and the output of the second PWM controller is connected with the gate of the second field effect transistor.
[0023] The first state comparator and the second state comparator have the same structure. The first state comparator includes a sixth resistor R6, a seventh resistor R7, a fourth capacitor C4, a fifth capacitor C5, and a second comparator U3. One end of the sixth resistor is connected to one end of the seventh resistor and serves as the input of the first state comparator. The other end of the sixth resistor, one end of the fourth capacitor, and the negative input of the second comparator are connected together. The other end of the fourth capacitor and one end of the fifth resistor are connected together and grounded. The other end of the fifth resistor, another end of the seventh resistor, and the positive electrode of the second comparator are connected together. The output of the second comparator serves as the output of the first state comparator. Similarly, the second state comparator includes an eighth resistor R8, a ninth resistor R9, a sixth capacitor C6, a seventh capacitor C7, and a third comparator U4. One end of the eighth resistor is connected to one end of the ninth resistor and serves as the input of the second state comparator. The other end of the eighth resistor, one end of the sixth capacitor, and the negative input of the third comparator are connected together. The other end of the sixth capacitor and one end of the seventh capacitor are connected together and grounded. The other end of the fifth capacitor, another end of the ninth resistor, and the positive electrode of the third comparator are connected together. The output of the third comparator serves as the output of the second state comparator.
[0024] The logic control circuit includes a tenth resistor R 10 , the eleventh resistor R 11 , the twelfth resistor R 12 , a third diode, a first transistor, and a second transistor; one end of a tenth resistor and one end of a twelfth resistor are connected together and connected to the output end of the second state comparator; the other end of the twelfth resistor is connected to the base of the second transistor, the emitter of the second transistor is grounded, and the collector is connected to the emitter of the first transistor; the base of the first transistor is connected to one end of the eleventh resistor, and the other end of the eleventh resistor is connected to the output end of the first state comparator; the other end of the tenth resistor is connected to the anode of the diode, and the cathode of the diode is connected to the collector of the first transistor and serves as the output end of the logic control circuit;
[0025] PI controller, including the thirteenth resistor R 13 , the fourteenth resistor R 14 , an eighth capacitor C8, and a fourth comparator U5; one end of a thirteenth resistor serves as an input end of the PI controller, and the other end is connected to one end of the eighth capacitor and the negative electrode of the third comparator; the positive electrode of the third comparator is connected to the second reference voltage end; the other end of the eighth capacitor is connected to one end of a fourteenth resistor, and the fourteenth resistor is connected to the output end of the third comparator and serves as the output of the PI controller;
[0026] The output of the PI controller serves as the input of the second PWM controller U6 . The output of the PWM controller serves as the input of the DC / CD converter and is connected to the gate of the first field effect transistor in the DC / CD converter.
[0027] In addition to the above embodiments, the DC / CD converter of the present invention can select a Boost converter or a Buck converter. If the DC / CD converter adopts a Buck converter, then based on the above embodiment, the output of the PWM circuit passes through an inverter and then inputs into the DC / CD converter.
[0028] The present invention uses PWM controllers in two places: one is in the multiplier based on the BUCK circuit, i.e., the first PWM controller; the other is between the output of the PI controller and the input of the DC / CD converter, i.e., the second PWM controller. All PWM controllers used in the present invention can be selected from the models UC1825, UC1843, UC1525 or similar devices, and the controllers in the two places can be of the same model or different models.
[0029] The PU curve of the solar cell array is as follows: Figure 3 As shown in the figure, when dP / dV=0, it is the maximum power point. In this embodiment, in order to realize the multiplier, the Buck circuit is used to realize power calculation. From the input and output relationship of the Buck circuit, it can be seen that V o =V in *D, the solar cell array current signal is conditioned by the first comparator U1 and input into the first PWM controller U2, where it is compared with the triangular carrier wave inside the first PWM controller U2 and outputs a PWM wave with a duty cycle of D, where D = I in / V M , V M The triangular carrier amplitude is a fixed value. After substituting V o =V in *I in / V M =P in / V M , so power calculation can be achieved. Generally, the input and output capacitance of the multiplier circuit based on the Buck circuit is very small, and the power is very low. The device is small, and the size and weight are also very small.
[0030] In the process of implementing the first state comparator and the second state comparator in this embodiment, the capacitance of the sixth capacitor C6 is set to 3 to 10 times the capacitance of the seventh capacitor C7, and the capacitance of the fourth capacitor C4 is set to 3 to 10 times the capacitance of the fifth capacitor C5. The capacitance voltages of the fourth capacitor C4 and the sixth capacitor C6 represent the previous state value, and the capacitance voltages of the fifth capacitor C5 and the seventh capacitor C7 represent the current state value.
[0031] As Figure 3 , assuming the last state is P1, the current state is P2, at this time dU>0, the second state comparator output is high (the value of high and low is set by those skilled in the art, high voltage> low voltage); dP>0, the first state comparator output is high, the logic control circuit can be derived that the XOR logic output is low, thus the PI circuit output voltage increases, the duty ratio D decreases, which will cause the solar cell array voltage to further rise to P3 point;
[0032] Assuming the last state is P4, the current state is P5, at this time dU>0, the second state comparator output is high; dP<0, the first state comparator output is low, the logic control circuit can be derived that the XOR logic output is high, thus the PI circuit output voltage decreases, the duty ratio D increases, which will cause the solar cell array voltage to further rise to P6 point;
[0033] According to the above working principle, the working point of the solar cell array will be stabilized at P max , and oscillate around P max .
[0034] The first reference voltage and the second reference voltage in the application are set by those skilled in the art according to experience, for example, in the embodiment, the first reference voltage is set to 1.0V, and the second reference voltage is set to 2.5V, which can be adjusted according to actual conditions by those skilled in the art.
[0035] The simulation circuit diagram is built according to the schematic diagram shown in Figure 2 , and the simulation result is shown in Figure 4 , in which the vertical coordinate is the solar cell array output power, unit: watt, and the horizontal coordinate is time, unit: second, under the current light condition, the maximum output power is about 40W, and the simulation result shows that the topology can quickly track to the maximum power point.
[0036] The above examples further illustrate the purpose, technical solutions and advantages of the application, and it should be understood that the above examples are only preferred embodiments of the application, and are not intended to limit the application, and any modifications, equivalent replacements, improvements, etc. made to the application within the spirit and principles of the application shall be included in the protection scope of the application.
Claims
1. A maximum power tracking control circuit for a solar array for a satellite, characterized by, The application relates to a solar cell array, a DC / CD converter, a battery pack, a multiplier based on a BUCK circuit, a first state comparator, a second state comparator, a logic control circuit, a PI controller and a PWM controller; the solar cell array is connected with the DC / CD converter, and the DC / CD converter is connected with the battery pack; the solar cell array voltage and the solar cell array current are sampled from the connection position of the solar cell array and the DC / CD converter; the solar cell array voltage and the solar cell array current are taken as the input of the multiplier based on the BUCK circuit, the multiplier based on the BUCK circuit calculates the solar cell array power, and the power is input to the first state comparator; the solar cell array voltage is input to the second state comparator; the input of the first state comparator and the second state comparator is connected with the input of the logic control circuit, the output of the logic control circuit is taken as the input of the PI controller, the PI controller is connected with the PWM circuit, and the duty cycle of the output of the PWM circuit is taken as the input of the DC / CD converter; the multiplier based on the BUCK circuit comprises a second capacitor, a third capacitor, a second field effect tube, a second diode, a second inductor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first comparator and a PWM controller; one end of the second capacitor is connected with one end of the solar cell array and the drain of the second field effect tube, the other end of the second capacitor is connected with the other end of the solar cell array, the positive pole of the second diode, one end of the third capacitor and one end of the first resistor, and the two ends are connected together and grounded; the other end of the second diode is connected with one end of the second inductor, the other end of the second inductor is connected with the other end of the third capacitor and the other end of the first resistor, and the two ends are connected together and taken as the output end of the multiplier based on the BUCK circuit; the sampled solar cell array current is taken as the input of one end of the third resistor, the other end of the third resistor and one end of the second resistor are taken as the input of the positive pole of the first comparator, the other end of the second resistor is connected with a first reference voltage, one end of the fourth resistor is grounded, the other end of the fourth resistor and one end of the fifth resistor are taken as the input of the negative pole of the first comparator, the other end of the fifth resistor is connected with the output of the first comparator and taken as the input of the PWM controller, and the output of the PWM controller is connected with the gate of the second field effect tube; the first state comparator and the second state comparator have the same structure, the first state comparator comprises a sixth resistor, a seventh resistor, a fourth capacitor, a fifth capacitor and a second comparator, one end of the sixth resistor is connected with one end of the seventh resistor and taken as the input end of the first state comparator, the other end of the sixth resistor, one end of the fourth resistor and the negative pole input end of the second comparator are connected together, the other end of the fourth resistor and one end of the fifth capacitor are connected together and grounded, the other end of the fifth capacitor, the other segment of the seventh resistor and the positive pole of the second comparator are connected together, and the output end of the second comparator is taken as the output end of the first state comparator.
2. The maximum power tracking control circuit for a solar array used in a satellite according to claim 1, wherein The DC / CD converter is a Boost converter or a Buck converter, and if the DC / CD converter is a Buck converter, the output of the PWM circuit is input to the DC / CD converter through an inverter.
3. The maximum power tracking control circuit for a solar array used in a satellite according to claim 1, wherein The DC / CD converter comprises a first capacitor, a first inductor, a first diode and a first field effect transistor, one end of the first capacitor is connected with one end of the solar cell array and one end of the first inductor, the other end of the first capacitor is connected with the other end of the solar cell array, the source of the first field effect transistor and the negative pole of the battery pack and grounded together; the other end of the first inductor is connected with the drain of the first field effect transistor and the anode of the first diode, the cathode of the first diode is connected with the positive pole of the battery pack; the gate of the first field effect transistor is connected with the output of the PWM circuit.
4. The maximum power tracking control circuit for a solar array used in a satellite according to claim 1, wherein The PWM controller is selected from a PWM controller with model number of UC1825, UC1843 or UC1525.
5. The maximum power tracking control circuit for a solar array used in a satellite according to claim 1, wherein The capacitance of the fourth capacitor is set to be 3-10 times of the capacitance of the fifth capacitor, the capacitance voltage of the fourth capacitor represents the previous state value, and the capacitance voltage of the fifth capacitor represents the current state value.
6. The maximum power tracking control circuit for a solar array for a satellite according to claim 1, wherein The logic control circuit comprises a tenth resistor, an eleventh resistor, a twelfth resistor, a third diode, a first triode and a second triode, one end of the tenth resistor and one end of the twelfth resistor are connected together and connected with the output of the second state comparator; the other end of the twelfth resistor is connected with the base of the second triode, the emitter of the second triode is grounded, the collector is connected with the emitter of the first triode, the base of the first triode is connected with one end of the eleventh resistor, the other end of the eleventh resistor is connected with the output of the first state comparator; the other end of the tenth resistor is connected with the anode of the diode, the cathode of the diode is connected with the collector of the first triode and serves as the output of the logic control circuit.
7. The maximum power tracking control circuit for a solar array used in a satellite according to claim 1, wherein The PI controller comprises a thirteenth resistor, a fourteenth resistor, an eighth capacitor and a fourth comparator, one end of the thirteenth resistor serves as the input of the PI controller, the other end is connected with one end of the eighth capacitor and the cathode of the third comparator, the anode of the third comparator is connected with the second reference voltage terminal; the other end of the eighth capacitor is connected with one end of the fourteenth resistor, the fourteenth resistor is connected with the output of the third comparator and serves as the output of the PI controller.
Citation Information
Patent Citations
Maximum power tracking control circuit of solar cell array for satellites
CN219086864U