Light-load control method for coreless DC-DC converter based on passive PT symmetry
Through the passive PT symmetrical coreless DC-DC converter light load control method, the attenuated free oscillation of capacitors and inductors is used to transfer energy to the load, which solves the output voltage instability and high loss problems of the coreless DC-DC converter under light load conditions and achieves high-efficiency and low-ripple output voltage control.
Patent Information
- Application Number
- CN202310125872.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-02-15
- Publication Date
- 2025-09-19
- Estimated Expiration
- 2043-02-15
AI Technical Summary
Under light-load conditions, it is difficult to achieve stable output voltage control and high-efficiency operation of coreless DC-DC converters, especially due to high losses in semiconductor devices, large output voltage ripple, and complex existing control methods.
A light-load control method for a coreless DC-DC converter based on passive PT symmetry is adopted. By configuring a voltage sampling module, a current sampling module, a zero-crossing comparison module, a frequency detection module, a comparator and a control module based on passive PT, the passive PT symmetry of the circuit is achieved. The attenuated free oscillation of the capacitor and inductor is used to transfer energy to the load, and the output of the nonlinear saturated controlled voltage source is controlled to be synchronized with the drive signal.
The coreless DC-DC converter achieves high-efficiency output under light-load conditions, low semiconductor device loss, low output voltage ripple, and a simple and easy-to-implement control method.
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Figure CN116317470B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of power electronics, and in particular to a light-load control method for a coreless DC-DC converter based on passive PT symmetry. Background Art
[0002] Due to the switching and conduction losses of semiconductor devices, as well as the iron and copper losses of magnetic components, the cavities of power conversion devices (such as photovoltaic inverters and EV charging modules) are often exposed to high temperatures. This significantly impacts the reliability of the semiconductor device's PN junction and the stability of the magnetic material. Semiconductor devices can limit the PN junction temperature through heat dissipation measures such as water cooling, oil cooling, and air cooling. However, for magnetic devices, the wire windings need to be tightly wound around the magnetic core at a high density, causing the device's center temperature to be much higher than the ambient temperature. Furthermore, the proximity effect and skin effect further exacerbate the temperature of the magnetic material, causing the magnetic material to experience performance loss under high-temperature conditions, which affects the normal operation of the power conversion device. Coreless transformers do not have the impact of the magnetic core on transformer performance. This means that the design process does not need to consider core saturation, heat dissipation, insulation, and other issues. This makes coreless transformers have a much wider range of applications.
[0003] Parity-time (PT) symmetry theory is widely used in wireless power transmission, achieving strong resistance to offset and load fluctuations. This theory can also be applied to coreless transformers with a fixed coupling coefficient to achieve efficient and practical operation. When a DC converter using a coreless transformer satisfies PT symmetry, its input and output voltage and current characteristics are consistent with those of an iron-core transformer: the voltage ratio is equal to the turns ratio, and the current ratio is equal to the inverse of the turns ratio. However, under light-load conditions, the converter struggles to achieve PT symmetry, and stable output voltage control becomes a problem. Passive PT symmetry theory provides a new solution to this problem. Summary of the Invention
[0004] The purpose of the present invention is to overcome the shortcomings and deficiencies of the prior art and propose a light-load control method for a coreless DC-DC converter based on passive PT symmetry. The method can achieve high-efficiency output of the coreless DC-DC converter under light-load conditions, especially low semiconductor device loss and low output voltage ripple. The control method is simple and easy to implement.
[0005] To achieve the above object, the technical solution provided by the present invention is: a light-load control method for a coreless DC-DC converter based on passive PT symmetry, which requires the configuration of a voltage sampling module, a current sampling module, a zero-crossing comparison module, a frequency detection module, a comparator, and a control module based on passive PT, wherein the voltage sampling module is used to measure the output voltage u of the coreless DC-DC converter. oSampling, the current sampling module is used to sample the output current i of the nonlinear saturation controlled voltage source of the coreless DC-DC converter p Sampling, the zero-crossing comparison module is used to convert the current sampling signal into a square wave signal, the frequency detection module is used to convert the square wave signal into a digital signal f, and the comparator is used to convert the output voltage u o With the given output voltage u ref In comparison, the passive PT-based control module is used to control the output voltage of a nonlinear saturated controlled voltage source;
[0006] The specific implementation of this method includes the following steps:
[0007] The output current i is measured by the current sampling module p Sampling, inputting the current sampling signal into the zero-crossing comparison module to convert it into a square wave signal, then inputting the square wave signal into the frequency detection module, which converts the square wave signal into a digital signal f and inputs it into the control module based on the passive PT;
[0008] The output voltage u is measured by the voltage sampling module o Sampling, input the sampled voltage signal into the comparator, and the output voltage u o With the given output voltage u ref Comparison, when the output voltage u o Lower than the given output voltage u ref When the passive PT control module is triggered, otherwise the passive PT control module is not triggered;
[0009] When the passive PT-based control module is triggered, the passive PT-based control module will issue a signal that is proportional to the current i according to the input digital signal f. p The half-cycle pulse drive signal with the same phase controls the nonlinear saturated controlled voltage source to output a pulse voltage synchronized with the drive signal, which provides initial energy for the ironless DC-DC core converter. Subsequently, the ironless DC-DC converter enters a working state that satisfies the passive PT symmetry. The current of the primary and secondary inductors exhibits attenuated free oscillation to feed energy to the load, achieving an output voltage u under light load conditions. o stability control.
[0010] Furthermore, when the coreless DC-DC converter meets the primary resonant frequency Equal to the secondary resonant frequency When the equivalent Hamiltonian of the coreless DC-DC converter is Conforms to PT symmetry; where L p and L s are the self-inductance values of the primary coil and secondary coil of the coreless DC-DC converter respectively. The self-inductance value of the primary coil is expressed as L p=L kp +L m , the self-inductance of the secondary coil is expressed as L kp is the inductance of the primary leakage inductance of the coreless DC-DC converter, L ks is the inductance of the secondary leakage inductance of the coreless DC-DC converter, L m is the magnetizing inductance of the coreless DC-DC converter, n p :n s is the primary-to-secondary turns ratio of the coreless DC-DC converter; C p and C s are the capacitance values of the primary series capacitor and the secondary series capacitor of the coreless DC-DC converter, respectively; κ is the mutual inductance coefficient of the primary winding and the secondary winding of the coreless DC-DC converter; γ p is the primary loss rate of the coreless DC-DC converter; γ s is the secondary side loss rate of the coreless DC-DC converter.
[0011] Compared with the prior art, the present invention has the following advantages and beneficial effects:
[0012] 1. The use of coreless transformer technology avoids the saturation phenomenon of the magnetic core with iron core and the magnetic permeability will not be affected by temperature. There is no need to consider the insulation problem of the iron core and winding. It is light in weight, low in cost, and the weight power density is further improved.
[0013] 2. By making full use of the low inductance of the coreless transformer, the circuit is controlled to meet the passive PT symmetry, and energy is transferred to the load through the attenuated free oscillation of the capacitor and inductor to maintain the output voltage stability under light load. This realizes the high-efficiency output of the coreless DC-DC converter based on passive PT symmetry under light load conditions. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] Figure 1 The block diagram of the coreless DC-DC converter with supporting peripheral control loop.
[0015] Figure 2 This is the equivalent circuit diagram of the coreless DC-DC converter.
[0016] Figure 3 Implement the circuit diagram for a nonlinear saturated controlled voltage source.
[0017] Figure 4 The waveforms of the output voltage and current, primary winding current and secondary winding current, and drive signal of the coreless DC-DC converter are shown in FIG. DETAILED DESCRIPTION
[0018] The present invention will be described in further detail below with reference to the embodiments and drawings, but the embodiments of the present invention are not limited thereto.
[0019] This embodiment discloses a light-load control method for a coreless DC-DC converter based on passive PT symmetry. The method requires configuring a voltage sampling module, a current sampling module, a zero-crossing comparison module, a frequency detection module, a comparator, and a control module based on passive PT. Figure 1 As shown, the voltage sampling module is used to measure the output voltage u of the coreless DC-DC converter. o Sampling, the current sampling module is used to sample the output current i of the nonlinear saturation controlled voltage source of the coreless DC-DC converter p Sampling, the zero-crossing comparison module is used to convert the current sampling signal into a square wave signal, the frequency detection module is used to convert the square wave signal into a digital signal f, and the comparator is used to convert the output voltage u o With the given output voltage u ref In comparison, the passive PT-based control module is used to control the output voltage of a nonlinear saturated controlled voltage source.
[0020] The specific implementation of this method includes the following steps:
[0021] The output current i is measured by the current sampling module p Sampling, inputting the current sampling signal into the zero-crossing comparison module to convert it into a square wave signal, then inputting the square wave signal into the frequency detection module, which converts the square wave signal into a digital signal f and inputs it into the control module based on the passive PT;
[0022] The output voltage u is measured by the voltage sampling module o Sampling, input the sampled voltage signal into the comparator, and the output voltage u o With the given output voltage u ref Comparison, when the output voltage u o Lower than the given output voltage u ref When the passive PT control module is triggered, otherwise the passive PT control module is not triggered;
[0023] When the passive PT-based control module is triggered, the passive PT-based control module will issue a signal that is proportional to the current i according to the input digital signal f. p The half-cycle pulse drive signal with the same phase controls the nonlinear saturated controlled voltage source to output a pulse voltage synchronized with the drive signal, which provides initial energy for the ironless DC-DC core converter. Subsequently, the ironless DC-DC converter enters a working state that satisfies the passive PT symmetry. The current of the primary and secondary inductors exhibits attenuated free oscillation to feed energy to the load, achieving an output voltage u under light load conditions. o stability control.
[0024] like Figure 1 As shown, the parameters of the coreless DC-DC converter are: C p is the capacitance value of the primary series compensation capacitor, C s is the capacitance value of the secondary side series compensation capacitor, L kp is the inductance of the primary winding leakage inductance, L ks is the inductance of the secondary winding leakage inductance, R s is the resistance value of the primary winding stray resistance, R p is the resistance value of the secondary winding stray resistance, R o is the resistance value of the load, C o is the capacitance value of the output filter capacitor, L m is the inductance of the excitation inductance; n p :n s is the primary-secondary turns ratio, κ is the primary-secondary winding coupling coefficient; the resonant frequency of the primary loop is The resonant frequency of the secondary loop is Primary side loss rate γ p =R p / 2L p , secondary side loss rate γ s =(R s +R L ) / 2L s , coupling coefficient Primary inductance L p =L kp +L m , secondary inductance R L is the equivalent load resistance, which can be expressed as Primary inductance L p =L kp +L m , secondary inductance
[0025] Figure 2 This is the equivalent circuit diagram of the coreless DC-DC converter, the primary voltage is u i ', the secondary output voltage is u o ', the primary loop contains the equivalent negative resistance -R of the nonlinear saturated controlled voltage source. When the circuit satisfies ω p =ω s When , the Hamiltonian hidden in the circuit satisfies PT symmetry. At this time, the circuit energy presents passive decay free oscillation and feeds energy to the load resistor. According to the equivalent circuit diagram, the circuit equation can be written as:
[0026]
[0027] In the above formula is the voltage phasor of the primary inductance, is the current phasor of the primary inductance, is the voltage phasor of the secondary inductance, is the current phasor of the secondary inductor. Cs is the secondary side compensation capacitor voltage, u Cs is the secondary side compensation capacitor voltage, i s is the secondary current of the coreless DC-DC converter, and the primary energy amplitude is Secondary side energy amplitude Substituting into the above equation and ignoring the higher-order terms in the equation, the coupled mode equation of the circuit can be obtained as follows:
[0028]
[0029] From formula (1), the amplitude da of energy oscillation in the passive attenuated free oscillation process can be obtained: p / dt、da s The evolution of / dt can be expressed as:
[0030]
[0031] It can be obtained that the non-Hermitian Hamiltonian H can be expressed as Setting the canonical transformation Substituting, we can get the equivalent Hamiltonian corresponding to the passive PT symmetry Can be properly satisfied p =ω s When , H′ conforms to the PT symmetric Hamiltonian. The eigenvalues of H′ are The eigenvalues of H are That is, the eigenvalue is in complex form, and the imaginary part is The imaginary part can be understood as the energy of the system. The rate of decay is 0.01, and the system behaves as a passive decay free oscillation.
[0032] Figure 3 This is the circuit diagram for realizing a nonlinear saturated controlled voltage source. The structure is a half-bridge inverter circuit composed of switch tubes S1 and S2. The input voltage is DC U dc Specifically, the drain of the switch tube S1 and the input voltage U dc The positive electrode of the switch tube S2 is connected to the positive electrode of the switch tube S2, and the source of the switch tube S2 is connected to the input voltage U dc The negative electrode of the switch tube S1 is connected to the positive electrode of the output, the source electrode of the switch tube S1 is connected to the drain electrode of the switch tube S2 and the negative electrode of the output, and the input voltage signal of the primary winding is provided. The nonlinear saturation controlled voltage source is not limited to the above structure.
[0033] An embodiment is designed to illustrate the feasibility of the present invention, and its parameters are: primary leakage inductance L kp =20uH, primary capacitor Cp =50nF, winding resistor R p =80mΩ; secondary leakage inductance L ks =20uH, secondary capacitor C s =50nF, winding resistor R s =80mΩ; the turns ratio of the primary and secondary windings is n p :n s =35:35, the primary-secondary winding coupling coefficient κ is 0.5, and the negative impedance is Figure 3 The nonlinear saturation controlled voltage source is realized as shown, and the output capacitor C o =220uF. Rated power P o 250W, input voltage U dc is 100VDC, output voltage U o is 50VDC, the load resistance R o The resistance is 100 ohms, and the output power is 10% of the rated power.
[0034] Figure 4 The waveforms of the output voltage and current, primary and secondary coil currents, and drive signal for the coreless DC-DC converter of this embodiment are shown. When the output voltage falls below 50V, the control strategy based on passive PT symmetry theory is triggered. The controller sends a pulsed drive signal to turn on switch S1, causing the primary inductor and capacitor to resonate and the secondary to remain closed. When the primary resonant current crosses zero, switch S1 turns off and switch S2 turns on. At this point, no energy is input into the primary resonant cavity.
[0035] The pulse width of the pulse drive signal of the switch tube S1 must ensure that the output voltage and current of the nonlinear saturated controlled voltage source are in phase to minimize the switching loss. When the voltage of the secondary resonant cavity is greater than the output voltage, the secondary rectifier diode is turned on and the output voltage u o Start to rise.
[0036] Obviously, under light-load output conditions, this embodiment has fewer switching times, low switching losses, and controllable output voltage ripple, thereby achieving high-efficiency, low-ripple output of a coreless DC-DC converter based on passive PT symmetry.
[0037] The above embodiments are preferred implementation modes of the present invention, but the implementation modes of the present invention are not limited to the above embodiments. Any other changes, modifications, substitutions, combinations, and simplifications that do not deviate from the spirit and principles of the present invention should be considered as equivalent replacement methods and are included in the scope of protection of the present invention.
Claims
1. A light-load control method for a coreless DC-DC converter based on passive PT symmetry, characterized by: The method requires the configuration of a voltage sampling module, a current sampling module, a zero-crossing comparison module, a frequency detection module, a comparator, and a control module based on a passive PT, wherein the voltage sampling module is used to measure the output voltage u of the coreless DC-DC converter. o Sampling, the current sampling module is used to sample the output current i of the nonlinear saturation controlled voltage source of the coreless DC-DC converter p Sampling, the zero-crossing comparison module is used to convert the current sampling signal into a square wave signal, the frequency detection module is used to convert the square wave signal into a digital signal f, and the comparator is used to convert the output voltage u o With the given output voltage u ref In comparison, the passive PT-based control module is used to control the output voltage of a nonlinear saturated controlled voltage source; The specific implementation of this method includes the following steps: The output current i is measured by the current sampling module p Sampling, inputting the current sampling signal into the zero-crossing comparison module to convert it into a square wave signal, then inputting the square wave signal into the frequency detection module, which converts the square wave signal into a digital signal f and inputs it into the control module based on the passive PT; The output voltage u is measured by the voltage sampling module o Sampling, input the sampled voltage signal into the comparator, and the output voltage u o With the given output voltage u ref Comparison, when the output voltage u o Lower than the given output voltage u ref When the passive PT control module is triggered, otherwise the passive PT control module is not triggered; When the passive PT-based control module is triggered, the passive PT-based control module will issue a signal that is proportional to the current i according to the input digital signal f. p The half-cycle pulse drive signal with the same phase controls the nonlinear saturated controlled voltage source to output a pulse voltage synchronized with the drive signal, which provides initial energy for the coreless DC-DC converter. Subsequently, the coreless DC-DC converter enters a working state that satisfies the passive PT symmetry. The current of the primary and secondary inductors shows a decaying free oscillation to feed energy to the load, achieving an output voltage u under light load conditions. o stability control.
2. The light-load control method for a coreless DC-DC converter based on passive PT symmetry according to claim 1 is characterized in that: When the coreless DC-DC converter meets the primary resonant frequency Equal to the secondary resonant frequency When the equivalent Hamiltonian of the coreless DC-DC converter is Conforms to PT symmetry; where L p and L s are the self-inductance values of the primary coil and secondary coil of the coreless DC-DC converter respectively. The self-inductance value of the primary coil is expressed as L p =L kp +L m , the self-inductance of the secondary coil is expressed as L kp is the inductance of the primary leakage inductance of the coreless DC-DC converter, L ks is the inductance of the secondary leakage inductance of the coreless DC-DC converter, L m is the magnetizing inductance of the coreless DC-DC converter, n p :n s is the primary-to-secondary turns ratio of the coreless DC-DC converter; C p and C s are the capacitance values of the primary series capacitor and the secondary series capacitor of the coreless DC-DC converter, respectively; κ is the mutual inductance coefficient of the primary winding and the secondary winding of the coreless DC-DC converter; γ p is the primary loss rate of the coreless DC-DC converter; γ s is the secondary side loss rate of the coreless DC-DC converter.
Citation Information
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