Switching converter and light load control circuit therefor

Abstract

The application discloses a switching converter and a light load control circuit thereof. The switching converter comprises a reference voltage generation module configured to generate a first reference voltage; a sample-and-hold module configured to sample and hold the first reference voltage to generate a second reference voltage; a pulse width modulator configured to compare an output voltage of the switching converter with the second reference voltage to generate a pulse width modulation signal; a zero-crossing detection module configured to compare an inductor current of the switching converter with a first threshold to provide a detection signal; and a mode switching module configured to receive the detection signal and control the switching converter to switch from an operation period to a sleep period when the detection signal indicates that the inductor current decreases to the first threshold. The sample-and-hold module is configured to sample the first reference voltage in the operation period and hold the first reference voltage in the sleep period to obtain the second reference voltage, so that the reference voltage generation module can be turned off in the sleep period.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a switching converter and its light-load control circuit. Background Technology

[0002] Switching converters can provide two different operating modes, light load and heavy load, to improve their adaptability and meet the power supply needs of more different types of downstream loads.

[0003] Figure 1 A schematic diagram of a switching converter according to the prior art is shown, such as... Figure 1 As shown, the switching converter includes a power stage circuit 10, a light-load control circuit 20, and voltage divider resistors R1 and R2 that provide the feedback voltage VFB for the output voltage Vout. The power stage circuit 10 is configured to convert the input voltage Vin to the output voltage Vout and includes power switches Q1 to Q4, an inductor L, and an output capacitor Cout. The light-load control circuit 20 is used to control the on and off of the power switches Q1 to Q4 to control the energy conversion from the input voltage Vin to the output voltage Vout. It includes an error amplifier EA, first to fourth comparators COMP1-COMP4, a logic and drive module 21, a zero-crossing detection module 22, a ramp circuit Vslope, a sampling circuit 23, a reference voltage generation module (not shown in the figure) that provides a reference voltage Vref to the error amplifier EA, and a bias circuit (not shown in the figure) that provides a bias signal to the error amplifier EA.

[0004] Figure 1 The switching converter shown in the diagram requires the reference voltage generation module, error amplifier EA, bias circuit, and first to fourth comparators COMP1-COMP4 to operate during the sleep period after entering the light-load operating mode. In addition, the voltage divider resistors R1 and R2 also consume current. Although it switches to the low-power mode, there is still current, resulting in a large overall static current of the chip and low light-load efficiency.

[0005] Therefore, a new switching converter and its light-load control circuit are needed to solve the above problems. Summary of the Invention

[0006] In view of the above problems, the purpose of this invention is to provide a switching converter and its light-load control circuit, so that the switching converter can have extremely low quiescent current, high light-load efficiency, and small and controllable output voltage ripple in light-load operating mode.

[0007] According to one aspect of the present invention, a light-load control circuit for a switching converter is provided. The switching converter includes a first power switch coupled between an input voltage and a first switching node, a second power switch coupled between the first switching node and a reference ground, a third power switch coupled between a second switching node and a reference ground, a fourth power switch coupled between the second switching node and an output voltage, and an inductor coupled between the first switching node and the second switching node. The light-load control circuit includes: a reference voltage generation module for generating a first reference voltage; a sample-and-hold module for sampling and holding the first reference voltage to generate a second reference voltage; and a pulse width modulator for comparing the output voltage of the switching converter with the second reference voltage. The system generates a pulse width modulation signal to control the turn-on times of the first power switch and the third power switch; a zero-crossing detection module compares the inductor current of the switching converter with a first threshold to provide a detection signal, which controls the turn-off times of the second power switch and the fourth power switch; and a mode switching module receives the detection signal and controls the switching converter to switch from an operating period to a sleep period when the detection signal indicates that the inductor current has decreased to the first threshold. The sample-and-hold module is configured to sample the first reference voltage during the operating period and hold the first reference voltage during the sleep period to obtain the second reference voltage.

[0008] Optionally, the mode switching module is further configured to control the sample-and-hold module to sample the first reference voltage again when the duration of the sleep period exceeds a preset time, and to control the switching converter to switch from the sleep period to the working period when the pulse width modulation signal indicates that the output voltage has decreased to less than the second reference voltage.

[0009] Optionally, the first threshold has a reference ground potential.

[0010] Optionally, the light-load control circuit further includes a peak current sampling module for acquiring the current flowing through the first power switch and comparing it with a preset current to obtain a peak current signal, the peak current signal being used to control the off-time of the third power switch and the on-time of the fourth power switch; an on-time control module for providing an on-time control signal after the on-time of the fourth power switch reaches a first time, the on-time control signal being used to control the off-time of the first power switch and the on-time of the second power switch; and a logic and drive module for providing first to fourth drive signals according to the pulse width modulation signal, the peak current signal, the on-time control signal, and the detection signal to control the on and off of the first to fourth power switches respectively.

[0011] Optionally, the logic and drive module is configured to control the first power switch and the third power switch to turn on when the pulse width modulation signal indicates that the output voltage has dropped to less than the second reference voltage; control the third power switch to turn off and control the fourth power switch to turn on when the peak current signal indicates that the current flowing through the first power switch has reached the preset current; control the first power switch to turn off and control the second power switch to turn on when the on-time control signal is received; and control the second power switch and the fourth power switch to turn off when the detection signal indicates that the inductor current has dropped to the first threshold.

[0012] Optionally, the conduction time control module is configured to determine the first time by the voltage difference between the average value of the output voltage and the input voltage.

[0013] Optionally, the mode switching module includes an enable signal generation module for receiving the pulse width modulation signal and the detection signal, and providing an enable signal based on the pulse width modulation signal and the detection signal to control the switching converter to switch between the working period and the sleep period; a refresh module for providing a refresh signal, which controls the sample-and-hold module to sample the first reference voltage again when the duration of the sleep period exceeds a preset time, and controls the sample-and-hold module to stop sampling after the duration of the resampling reaches a second time; and an OR gate, whose first input receives the enable signal and the second input receives the refresh signal, for providing a control signal based on the refresh signal and the enable signal, wherein the control signal is used to control the opening and closing of the reference voltage generation module, the zero-crossing detection module, the peak current sampling module, the conduction time control module, the logic and drive module.

[0014] Optionally, the refresh module includes: a current source and a first capacitor connected sequentially between the power supply voltage and ground, the current source and the first capacitor being connected to a first node; a first inverter and a second inverter connected sequentially between the first node and the second input terminal of the OR gate; a first switch connected between the power supply voltage and the first node, the control terminal of the first switch being connected to the common node of the first inverter and the second inverter; and a second switch connected between the first node and reference ground, the control terminal of the second switch being connected to the control signal through a delay module, wherein the delay module is used to delay the control signal for a second time at the rising edge of the control signal before providing it to the control terminal of the second switch.

[0015] Optionally, the sample-and-hold module includes: a first switch, with a first terminal connected to the first reference voltage, a second terminal providing the second reference voltage, and a control terminal connected to the control signal; and a second capacitor connected between the second terminal of the first switch and the reference ground.

[0016] Optionally, the reference voltage generation module includes: a reference circuit for providing a reference voltage; a third capacitor connected between the output terminal of the reference circuit and a reference ground; a third switch, a first resistor, and a second resistor connected between the power supply voltage and the reference ground; and an error amplifier, with its positive input terminal connected to the output terminal of the reference circuit, its negative input terminal connected to the common node of the first resistor and the second resistor, and its output terminal connected to the control terminal of the third switch, wherein the common node of the third switch and the first resistor is used to provide the first reference voltage.

[0017] According to another aspect of the present invention, a switching converter is provided, comprising a first power switch coupled between an input voltage and a first switching node; a second power switch coupled between the first switching node and a reference ground; a third power switch coupled between a second switching node and a reference ground; a fourth power switch coupled between the second switching node and an output voltage; an inductor coupled between the first switching node and the second switching node; and the light-load control circuit described above.

[0018] The present invention provides a switching converter and its light-load control circuit. A sample-and-hold module samples and holds a first reference voltage to generate a second reference voltage. A pulse width modulator compares the second reference voltage with the output voltage to provide a pulse width modulation signal. A zero-crossing detection module compares the inductor current of the switching converter with a first threshold to provide a detection signal. A mode switching module controls the switching converter to switch from an operating period to a sleep period when the detection signal indicates that the inductor current has decreased to the first threshold. The sample-and-hold module is configured to sample the first reference voltage during the operating period and hold it during the sleep period to obtain the second reference voltage. This allows modules such as the reference voltage generation module to be shut down after entering the sleep period, requiring only the pulse width modulator, sample-and-hold module, and mode switching module to remain operational, thus reducing the power consumption of the switching converter.

[0019] In a preferred embodiment, when the duration of the switching converter in the sleep period exceeds a preset time, the first reference voltage is sampled again, which can keep the second reference voltage stable during the sleep period. Moreover, the preset time is achieved by charging the capacitor with a low quiescent current, resulting in minimal power consumption.

[0020] In a preferred embodiment, in the first stage of the inductor current rising phase, the rising slope of the current is a first slope, and in the second stage of the inductor current rising phase, the rising slope of the inductor current is a second slope. By reasonably setting the time of the first and second stages of the inductor current rising phase, the ripple of the output voltage can be reasonably controlled. Attached Figure Description

[0021] The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0022] Figure 1 A schematic diagram of a switching converter according to the prior art is shown;

[0023] Figure 2 A schematic diagram of a switching converter according to an embodiment of the present invention is shown;

[0024] Figure 3 A circuit diagram of a mode switching module according to an embodiment of the present invention is shown;

[0025] Figure 4 A circuit diagram of a reference voltage generation module according to an embodiment of the present invention is shown;

[0026] Figure 5 An operation timing diagram of a switching converter according to an embodiment of the present invention is shown. Detailed Implementation

[0027] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements or modules are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0028] It should be understood that, in the following description, "circuit" may include single or combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuit. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it may be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0029] Furthermore, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0030] Figure 2 A schematic diagram of a switching converter according to an embodiment of the present invention is shown, as follows: Figure 2 As shown, the switching converter includes a power stage circuit 100 and a light-load control circuit 200. The power circuit 100 includes one or more switching and filter elements (e.g., inductors and capacitors), which are configured to regulate power transfer from the input to the output of the power converter in response to one or more switching drive signals from the light-load control circuit 200. In some embodiments, one or more switches in the power circuit are integrated with the light-load control circuit 200 to form an integrated circuit chip.

[0031] The power stage circuit 100 includes power switches Q1 to Q4, an inductor L, and an output capacitor Cout. Power switch Q1 has a first terminal, a second terminal, and a control terminal, with its first terminal coupled to the input voltage Vin. Power switch Q2 has a first terminal, a second terminal, and a control terminal, with its first terminal coupled to the second terminal of power switch Q1 and its second terminal coupled to a reference ground. Inductor L has a first terminal and a second terminal; the common terminal of power switches Q1 and Q2 forms a first switching node SW1, and the first terminal of inductor L is coupled to this first switching node SW1. Power switch Q3 has a first terminal, a second terminal, and a control terminal, with its second terminal connected to the reference ground. Power switch Q4 has a first terminal, a second terminal, and a control terminal; its first terminal is coupled to the first terminal of power switch Q3, and its second terminal is coupled to the output voltage Vout. The output capacitor Cout is coupled between the second terminal of power switch Q4 and the reference ground. The common terminal of power switches Q3 and Q4 forms a second switching node SW2, and the second terminal of inductor L is coupled to this second switching node SW2. Power switches Q1 to Q4 can be any controllable semiconductor switching device, such as a metal-oxide-semiconductor field-effect transistor (MOSFET) or an insulated-gate bipolar transistor (IGBT).

[0032] The light-load control circuit 200 is used to control the on and off of power switches Q1-Q4, and includes a reference voltage generation module 210, a mode switching module 220, a peak current sampling module 230, a zero-crossing detection module 240, a sample and hold module 250, a pulse width modulator 260, an on-time control module 270, and a logic and drive module 280.

[0033] The reference voltage generation module 210 is used to generate a reference voltage Vea1. The reference voltage generation module 210 is implemented, for example, by a bandgap reference voltage generation circuit.

[0034] Zero-crossing detection module 240 is used to compare the inductor current IL of the switching converter with a first threshold and provide a detection signal based on the comparison result. The detection signal is used to control the turn-off time of power switches Q2 and Q4, wherein the first threshold has a ground reference voltage. For example, a first level (e.g., high level) detection signal is provided when the inductor current IL is greater than the first threshold (e.g., zero), and the detection signal is flipped to a second level (e.g., low level) when the inductor current IL drops to the first threshold.

[0035] The sample-and-hold module 250 is used to sample and hold the reference voltage Vea1 to generate the reference voltage Vea.

[0036] The pulse width modulator 260 is implemented, for example, as a comparator. Its positive input receives a reference voltage Vea, and its negative input receives an output voltage Vout. This comparator compares the reference voltage Vea with the output voltage Vout and provides a pulse width modulation (PWM) signal at its output. The PWM signal is used to control the on-time of power switches Q1 and Q3. For example, when the output voltage Vout is less than the reference voltage Vea, the PWM modulator 260 provides a first-level (e.g., high-level) PWM signal; when the output voltage Vout is greater than the reference voltage Vea, the PWM modulator 260 provides a second-level (e.g., low-level) PWM signal.

[0037] The mode switching module 220 receives the detection signal and the pulse width modulation signal (PWM). It is configured to control the switching converter to switch from the operating period to the sleep period when the inductor current IL, represented by the detection signal, decreases to a first threshold, and to control the switching converter to switch from the sleep period to the operating period when the output voltage Vout, represented by the PWM, decreases to less than the reference voltage Vea. The mode switching module 220 is also configured to control the sample-and-hold module 250 to sample the reference voltage Vea1 again when the duration of the sleep period exceeds a preset time T. During the sleep period, power switches Q1-Q4 are all off, and during the operating period, power switches Q1-Q4 alternately turn on and off.

[0038] The peak current sampling module 230 is used to collect the current flowing through power switch Q1 and compare it with a preset current to obtain the peak current signal Ipeak. The peak current signal Ipeak is used to control the turn-off time of power switch Q3 and the turn-on time of power switch Q4. Both the current flowing through power switch Q1 and the preset current can be represented in voltage form. The above sampling can be achieved using a sampling resistor, current transformer, or current mirror, etc.

[0039] The on-time control module 270 provides an on-time control signal after the on-time of power switch Q4 reaches the first time Ton. This on-time control signal controls the off-time of power switch Q1 and the on-time of power switch Q2. The first time Ton is determined by the voltage difference between the average value of the output voltage Vout and the input voltage Vin. For example, it can be set such that the larger the voltage difference between the average value of the output voltage Vout and the input voltage Vin, the shorter the first time Ton.

[0040] The logic and drive module 280 is used to provide drive signals DR_Q1, DR_Q2, DR_Q3, and DR_Q4 according to the pulse width modulation signal PWM, the peak current signal Ipeak, the on-time control signal, and the detection signal to control the on and off of power switches Q1-Q4 respectively.

[0041] In this embodiment of the invention, during each inductor current cycle, when the output voltage Vout drops below the reference voltage Vea, the pulse width modulation signal PWM output by the pulse width modulator 260 flips to a high level. The mode switching module 220 controls the switching converter to enter the working period according to the pulse width modulation signal PWM, that is, controls the reference voltage generation module 210, peak current sampling module 230, zero-crossing detection module 240, conduction time control module 270, and logic and drive module 280 to turn on. The logic and drive module 280 turns on power switches Q1 and Q3 according to the rising edge of the pulse width modulation signal PWM. When the current flowing through power switch Q1 reaches the preset current, the peak current signal Ipeak flips to a high level. The logic and drive module 280 turns off power switch Q3 and turns on power switch Q4 according to the rising edge of the peak current signal Ipeak. At the same time, when power switch Q4 is turned on, the conduction time control module 270 turns on. When the on-time of power switch Q4 reaches the first time Ton, the on-time control module 270 outputs an on-time control signal. The logic and drive module 280 then turns on power switch Q2 and turns off power switch Q1 according to the on-time control signal. When the detection signal indicates that the inductor current IL has decreased to the first threshold, the logic and drive module 280 turns off power switches Q2 and Q4 according to the detection signal. The mode switching module 220 controls the switch converter to enter a sleep period according to the detection signal, i.e., the reference voltage generation module 210, peak current sampling module 230, zero-crossing detection module 240, on-time control module 270, and logic and drive module 280 are all turned off, and the pulse width modulator 260 enters a low-power mode. When the duration of the switch converter in the sleep period exceeds the preset time T, the mode switching module 220 controls the reference voltage generation module 210 to turn on and controls the sample-and-hold module 250 to sample the reference voltage Vea1 again, thereby maintaining the voltage of the reference voltage Vea.

[0042] The peak current sampling module 230 includes a sampling circuit 231 and a comparator 232. The sampling circuit 231 is connected to the first and second terminals of the power switch Q1, respectively, and is used to collect the current flowing through the power switch Q1 and convert it into a sampled current signal. The positive input terminal of the comparator 232 is connected to a reference voltage Vref1, and the negative input terminal receives the sampled current signal. The comparator 232 compares the reference voltage Vref1 and the sampled current signal, and provides a peak current signal Ipeak at its output terminal. The preset current value can be achieved by adjusting the reference voltage Vref1. For example, when the sampled current signal is less than the reference voltage Vref1, the peak current signal Ipeak is at a second level (e.g., low level); when the sampled current signal reaches the reference voltage Vref1, the peak current signal Ipeak flips to a first level (e.g., high level).

[0043] The sample-and-hold module 250 includes a switch S1 and a capacitor C2. The first terminal of switch S1 receives a reference voltage Vea1, and the control terminal is connected to a control signal S. Capacitor C2 is connected between the second terminal of switch S1 and ground. The common node of capacitor C2 and the second terminal of switch S1 provides the reference voltage Vea. During the sleep period, the sample-and-hold module 250 maintains the voltage of the reference voltage Vea through capacitor C2. Due to leakage, the voltage of capacitor C2 will decrease over time, causing the voltage value of the reference voltage Vea to decrease. In order to keep the reference voltage Vea stable, the reference voltage Vea1 will be sampled again after the duration of the sleep period exceeds a preset time T (i.e., the reference voltage Vea drops to a certain value).

[0044] Figure 3 A circuit diagram of a mode switching module according to an embodiment of the present invention is shown.

[0045] In one embodiment, the mode switching module 220 includes only an enable signal generation module 221, which outputs an enable signal EN based on the pulse width modulation signal PWM and the detection signal to control the switching converter to switch between a sleep period and a working period. For example, the enable signal EN controls the switching converter to enter the sleep period when it is at a second level (e.g., low level) and controls the switching converter to enter the working period when it is at a first level (e.g., high level).

[0046] In another embodiment, the mode switching module 220 further includes a refresh module 222 and an OR gate 223. The refresh module 222 provides a refresh signal, which controls the sample-and-hold module 250 to sample the reference voltage Vea1 again when the duration of the sleep period exceeds a preset time, and controls the sample-and-hold module 250 to stop sampling after the duration of the resampling reaches a second time T2. Specifically, the refresh module 222 provides a second-level (e.g., low-level) refresh signal during the working period and when just entering the sleep period, and flips the second-level refresh signal to a first level (e.g., high-level) after the duration of the sleep period reaches a preset time T, so as to control the sample-and-hold module 250 to sample the reference voltage Vea1 again, so that the reference voltage Vea remains stable, and flips the level of the refresh signal to the second level again after the duration of the resampling reaches the second time T2, so as to control the sample-and-hold module 250 to stop sampling. The first input terminal of the OR gate 223 receives an enable signal EN, and the second input terminal receives the refresh signal, which is used to provide a control signal S according to the refresh signal and the enable signal EN. The control signal S is used to control the opening and closing of modules such as the reference voltage generation module 210, peak current sampling module 230, zero-crossing detection module 240, conduction time control module 270, and logic and drive module 280.

[0047] The refresh module 222 includes a current source 224 and a capacitor C3 connected sequentially between the power supply voltage VDD and ground; an inverter 225 and an inverter 226 connected sequentially between the common node B of the current source 224 and the capacitor C3 and the second input terminal of the OR gate 223; a switch M2 connected between the power supply voltage VDD and node B; and a switch M3 connected between node B and reference ground. The control terminal of the switch M2 is connected to the common node of the inverter 225 and the inverter 226. The control terminal of the switch M3 is connected to the control signal S through the delay module 227. The delay module 227 is used to provide the control signal S to the control terminal of the switch M3 after a second delay T2 at the rising edge of the control signal S, and to provide the control signal S to the control terminal of the switch M3 normally at other times.

[0048] During the working period, the enable signal EN is high, so the control signal S is also high, and the switch M3 is turned on. The voltage of node B is pulled to ground by the switch M3, and after passing through inverters 225 and 226, it provides a low-level refresh signal. After entering the sleep period, the enable signal EN switches to low, the switch M3 is turned off, and the current source 224 charges the capacitor C3. At this time, node B remains low, the refresh signal also remains low, and the control signal S is also low. After a preset time T, the voltage of capacitor C3 rises to turn on the switch M2, and the voltage of node B is pulled high by the switch M2 to the power supply voltage VDD, thus starting the refresh. When the signal flips to a high level, the control signal S also flips to a high level. The control signal S controls the reference voltage Vea1 to charge capacitor C2. At this time, a rising edge appears in the control signal S, so the delay module 227 will not provide the control signal S to the control terminal of the switching transistor M3. The switching transistor M3 remains in the off state. After the second time T2, the reference voltage Vea1 has finished charging capacitor C2, and the delay module 227 provides the high-level control signal S to the switching transistor M3. The switching transistor M3 turns on again, pulling the level of node B to a low level. The refresh signal flips to a low level again, and the control signal S also flips to a low level again, and the switching transistor M3 turns off again. It can be understood that as long as the switching converter does not enter the working stage, that is, as long as the enable signal EN does not flip to a high level, the refresh signal will continue to cycle through the flipping level.

[0049] Furthermore, in order to reduce power consumption, current source 224 uses a low quiescent current Ibias to charge capacitor C3.

[0050] Furthermore, the second time T2 can be set to be less than the preset time T.

[0051] Figure 4 A circuit diagram of a reference voltage generation module according to an embodiment of the present invention is shown, such as... Figure 4As shown, the reference voltage generation module 210 includes a reference circuit 211, a capacitor C1, a switching transistor M1, an error amplifier EA, and resistors R1 and R2. The reference circuit 211 provides a reference voltage Vref2. Capacitor C1 is connected between the output of the reference circuit 211 and reference ground. The switching transistor M1, resistors R1 and R2 are sequentially connected between the power supply voltage VDD and reference ground. The output of the error amplifier EA is connected to the control terminal of the switching transistor M1, its positive input is connected to the reference voltage Vref2, and its negative input is connected to the common node A of resistors R1 and R2. The error amplifier EA adjusts the output current of the switching transistor M1 according to the error between the reference voltage Vref2 and the voltage at node A, so that the voltage at node A equals the reference voltage Vref2, thus obtaining the reference voltage Vea1. The reference voltage Vea1 = Vref2 * (R2 + R1) / R1, and is provided by the common node of the switching transistor M1 and resistor R1. The switching on and off of the reference circuit 211 and the error amplifier EA are controlled by the control signal S.

[0052] Furthermore, switching transistors M1 and M3 are N-type metal-oxide-semiconductor field-effect transistors (MOSFETs), abbreviated as NMOS transistors, while switching transistor M2 is a P-type metal-oxide-semiconductor field-effect transistor (MOSFET), abbreviated as PMOS transistor.

[0053] Figure 5 An operation timing diagram of a switching converter according to an embodiment of the present invention is shown. Figure 5 The time interval t0-t6 is one inductor current cycle.

[0054] Combination Figures 2-5 The operating principle of the switching converter in this embodiment will be explained. At time t0, the output voltage Vout drops below the reference voltage Vea, and the logic level of the pulse width modulation signal PWM flips from 0 to 1. The mode switching module 220 flips the logic level of the control signal S from 0 to 1 according to the rising edge of the pulse width modulation signal PWM. The logic and drive module 280 flips the logic levels of the drive signals DQ_Q1 and DQ_Q3 from 0 to 1 according to the rising edge of the pulse width modulation signal PWM to turn on the power switches Q1 and Q3. At this time, the inductor current IL begins to rise, and its rising slope is the first slope, i.e., Vin / L.

[0055] At time t1, the current flowing through power switch Q1 reaches the preset current, and the logic level of the peak current signal Ipeak flips from 0 to 1. The logic and drive module 280, based on the peak current signal Ipeak, flips the logic level of drive signal DQ_Q3 from 1 to 0 and the logic level of drive signal DQ_Q4 from 0 to 1, thereby turning off power switch Q3 and turning on power switch Q4. Simultaneously, the turn-on time control module 270 is activated. At this time, the rising slope of the inductor current IL is the second slope, i.e., (Vin-Vout) / L.

[0056] At time t2, the on-time of power switch Q4 reaches the preset time T. The on-time control module 270 outputs the on-time control signal. The logic and drive module 280 flips the logic level of drive signal DQ_Q1 from 1 to 0 and the logic level of drive signal DQ_Q2 from 0 to 1 according to the on-time control signal, so that power switch Q1 is turned off and power switch Q2 is turned on. At this time, the inductor current IL begins to decrease. The slope of the decrease of inductor current IL is the third slope, i.e., Vout / L.

[0057] At time t3, the inductor current IL drops to 0. The logic and drive module 280 flips the logic level of drive signals DQ_Q2 and DQ_Q4 from 1 to 0 according to the inductor current IL, so as to turn off power switches Q2 and Q4. At this time, the control signal S flips to 0, and the switching converter enters the sleep period.

[0058] At time t4, the duration of the sleep period of the switching converter reaches the preset time T. The logic level of the control signal S provided by the mode switching module 220 is switched from 0 to 1, which turns on the reference voltage generation module 210 and turns on the switch S1. The sample and hold module 250 samples the reference voltage Vea1 again.

[0059] At time t5, the voltage difference of capacitor C2 is equal to the reference voltage Vea, and the logic level of the control signal S provided by the mode switching module 220 is switched from 1 to 0 again.

[0060] At time t6, the output signal Vout decreases to below the reference voltage Vea, and the switching converter enters the next inductor current cycle. Here, t1-t2 is the first time Ton, t3-t4 is the preset time T, t4-t5 is the second time T2, and t3-t6 is the sleep period T3.

[0061] The time interval T1 (t0-t1) and the first time interval Ton affect the ripple of the output voltage Vout. During the time interval T1+Ton, the greater the energy stored in the inductor current IL, the greater the ripple of the output voltage Vout. By reasonably setting the time interval T1 and the first time interval Ton, the ripple of the output voltage Vout can be controlled, thereby reducing the ripple of the output voltage Vout.

[0062] The present invention provides a switching converter and its light-load control circuit. A sample-and-hold module 250 samples and holds a reference voltage Vea to generate a reference voltage Vea1. A pulse width modulator 260 compares the reference voltage Vea with the output voltage Vout to provide a pulse width modulation signal (PWM). A zero-crossing detection module compares the inductor current IL of the switching converter with a first threshold to provide a detection signal. A mode switching module 220 controls the switching converter to switch from a working period to a sleep period when the detection signal indicates that the inductor current IL has decreased to the first threshold. The sample-and-hold module 250 is configured to sample the reference voltage Vea1 during the working period and hold the reference voltage Vea1 during the sleep period to obtain the reference voltage Vea. This allows modules such as the reference voltage generation module 210 to be shut down after entering the sleep period, requiring only the pulse width modulator 260 and the mode switching module 220 to remain operational, thus reducing the power consumption of the switching converter. Furthermore, by directly comparing the reference voltage Vea with the output voltage Vout, the switching converter does not require feedback voltages R1 and R2. Therefore, during the sleep period, there is no feedback voltage R1 and R2 to generate static current, which can reduce power consumption.

[0063] Furthermore, when the duration of the switching converter's sleep period exceeds the preset time T, the reference voltage Vea1 is sampled again, which can keep the reference voltage Vea stable during the sleep period. Moreover, the preset time T is timed by charging the capacitor with a low quiescent current, resulting in minimal power consumption.

[0064] As described above, these embodiments of the present invention do not exhaustively describe all details, nor do they limit the invention to specific embodiments. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The scope of protection of this invention should be determined by the scope defined in the claims and their equivalents.

Claims

1. A light-load control circuit for a switching converter, the switching converter comprising a first power switch coupled between an input voltage and a first switching node, a second power switch coupled between the first switching node and a reference ground, a third power switch coupled between a second switching node and a reference ground, a fourth power switch coupled between the second switching node and an output voltage, and an inductor coupled between the first switching node and the second switching node, the light-load control circuit comprising: A reference voltage generation module is used to generate a first reference voltage. A sample-and-hold module is used to sample and hold the first reference voltage to generate a second reference voltage; A pulse width modulator is used to compare the output voltage of the switching converter with the second reference voltage to generate a pulse width modulated signal, which is used to control the turn-on time of the first power switch and the third power switch. A zero-crossing detection module is used to compare the inductor current of the switching converter with a first threshold to provide a detection signal, which is used to control the turn-off time of the second power switch and the fourth power switch. as well as A mode switching module is configured to receive the detection signal and, when the detection signal indicates that the inductor current has decreased to the first threshold, control the switching converter to switch from an operating period to a sleep period. The sample-and-hold module is configured to sample the first reference voltage during the working period and hold the first reference voltage during the sleep period to obtain the second reference voltage.

2. The light-load control circuit according to claim 1, wherein, The mode switching module is further configured to control the sample-and-hold module to sample the first reference voltage again when the duration of the sleep period exceeds a preset time, and to control the switching converter to switch from the sleep period to the working period when the pulse width modulation signal indicates that the output voltage has decreased to less than the second reference voltage.

3. The light-load control circuit according to claim 2, wherein, The first threshold has a reference ground potential.

4. The light-load control circuit according to claim 2 further includes: A peak current sampling module is used to collect the current flowing through the first power switch and compare it with a preset current to obtain a peak current signal. The peak current signal is used to control the off time of the third power switch and the on time of the fourth power switch. The on-time control module is used to provide an on-time control signal after the on-time of the fourth power switch reaches a first time. The on-time control signal is used to control the off-time of the first power switch and the on-time of the second power switch. The logic and drive module is used to provide first to fourth drive signals according to the pulse width modulation signal, the peak current signal, the on-time control signal and the detection signal to control the on and off of the first to fourth power switches respectively.

5. The light-load control circuit according to claim 4, wherein, The logic and drive module is configured to control the first power switch and the third power switch to turn on when the pulse width modulation signal indicates that the output voltage has dropped to less than the second reference voltage; to control the third power switch to turn off and the fourth power switch to turn on when the peak current signal indicates that the current flowing through the first power switch has reached the preset current; to control the first power switch to turn off and the second power switch to turn on when the on-time control signal is received; and to control the second power switch and the fourth power switch to turn off when the detection signal indicates that the inductor current has dropped to the first threshold.

6. The light-load control circuit according to claim 4, wherein, The conduction time control module is configured to determine the first time by the voltage difference between the average value of the output voltage and the input voltage.

7. The light-load control circuit according to claim 6, wherein, The mode switching module includes: An enable signal generation module is used to receive the pulse width modulation signal and the detection signal, and provide an enable signal according to the pulse width modulation signal and the detection signal to control the switching converter to switch between the working period and the sleep period; A refresh module is used to provide a refresh signal, which is used to control the sample-and-hold module to sample the first reference voltage again when the duration of the sleep period exceeds a preset time, and to control the sample-and-hold module to stop sampling after the duration of the resampling reaches a second time. An OR gate, with its first input receiving the enable signal and its second input receiving the refresh signal, is used to provide a control signal based on the refresh signal and the enable signal. The control signal is used to control the opening and closing of the reference voltage generation module, the zero-crossing detection module, the peak current sampling module, the conduction time control module, the logic and drive module.

8. The light-load control circuit according to claim 7, wherein, The refresh module includes: A current source and a first capacitor are connected sequentially between the power supply voltage and ground, and the current source and the first capacitor are connected to the first node; A first inverter and a second inverter are sequentially connected between the first node and the second input terminal of the OR gate; and The first switching transistor is connected between the power supply voltage and the first node, and the control terminal of the first switching transistor is connected to the common node of the first inverter and the second inverter. A second switch is connected between the first node and the reference ground. The control terminal of the second switch receives the control signal through a delay module. The delay module is used to delay the control signal by the second time on the rising edge of the control signal and provide it to the control terminal of the second switching transistor.

9. The light-load control circuit according to claim 8, wherein, The sample-and-hold module includes: A first switch has a first terminal connected to the first reference voltage, a second terminal providing the second reference voltage, and a control terminal connected to the control signal. The second capacitor is connected between the second terminal of the first switch and the reference ground.

10. The light-load control circuit according to claim 9, wherein, The reference voltage generation module includes: A reference circuit is used to provide a reference voltage; A third capacitor connected between the output terminal of the reference circuit and the reference ground; A third switch, a first resistor, and a second resistor are connected between the power supply voltage and the reference ground; and The error amplifier has its positive input connected to the output of the reference circuit, its negative input connected to the common node of the first and second resistors, and its output connected to the control terminal of the third switching transistor. Wherein, the common node of the third switch and the first resistor is used to provide the first A reference voltage.

11. A switching converter, comprising: A first power switch coupled between the input voltage and the first switching node; A second power switch coupled between the first switching node and reference ground; A third power switch coupled between the second switching node and reference ground; A fourth power switch coupled between the second switching node and the output voltage; as well as An inductor coupled between the first switching node and the second switching node; And the light-load control circuit according to any one of claims 1-10.

Images