A reference clock signal generation system

Abstract

A reference clock signal generation system, comprising a first coupler, a selection switch control module, a selection switch, a crystal oscillator, a second coupler, a phase-locked loop module and an adjustable resistor; the input end of the crystal oscillator is connected with the output end of the selection switch, and the output end of the crystal oscillator is connected with the input end of the second coupler; the input end of the adjustable resistor is connected with the output end of the crystal oscillator, and the output end of the adjustable resistor is connected with the input end of the selection switch; the input end of the selection switch control module is connected with the output end of the first coupler, and the output end of the selection switch control module is connected with the input end of the selection switch; the input end of the phase-locked loop module is connected with the input end of the first coupler and the input end of the second coupler respectively; the output end of the phase-locked loop module is connected with the input end of the selection switch; the system can ensure that the output reference clock signal is phase coherent when the internal and external reference clock signals of different sources are switched, and can also adjust the frequency of the output signal of the internal crystal oscillator.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of electronic equipment, in particular to a reference clock signal generation system. BACKGROUND

[0002] In electronic equipment, the reference clock signal generation system is equivalent to the heart of the electronic equipment, and the stability of the reference clock signal during operation directly affects the performance of the electronic equipment.

[0003] The existing electronic equipment is internally provided with a crystal oscillator for generating an internal reference clock signal, which serves as the reference clock signal during operation of the electronic equipment; when the electronic equipment needs to access an external reference clock signal as the reference clock signal, if the frequency of the internal reference clock signal is not the same as that of the external reference clock signal, when the internal reference clock signal and the external clock reference signal are switched, the output reference clock signal changes, which will affect the stable operation of the electronic equipment.

[0004] The existing reference clock signal generation system cannot solve the problem that the output reference clock signal does not change when the internal and external reference clock signals of different frequencies are switched. At the same time, during long-term use, the stability of the crystal oscillator will decrease, and the frequency of the output signal of the crystal oscillator will shift, and the existing reference clock signal generation system cannot adjust this shift. SUMMARY

[0005] The present application aims to solve the above-mentioned problems, and provides a reference clock signal generation system, which can ensure that the output reference clock signal is the same when the internal and external reference clock signals of different frequencies are switched, and can adjust the output signal of the crystal oscillator to avoid signal shift.

[0006] The technical scheme adopted by the present application is as follows:

[0007] A reference clock signal generation system, comprising a first coupler, a selection switch control module, a selection switch, a crystal oscillator, a second coupler, a phase-locked module and an adjustable resistor.

[0008] The input end of the crystal oscillator is connected to the output end of the selection switch, and the output end of the crystal oscillator is connected to the input end of the second coupler.

[0009] The input end of the adjustable resistor is connected to the output end of the crystal oscillator, and the output end of the adjustable resistor is connected to the input end of the selection switch.

[0010] The input end of the selection switch control module is connected to the output end of the first coupler, and the output end of the selection switch control module is connected to the input end of the selection switch.

[0011] The input end of the phase-locked module is connected with the input end of the first coupler and the second coupler respectively; the output end of the phase-locked module is connected with the input end of the selection switch;

[0012] The crystal oscillator is used for generating an internal reference clock signal;

[0013] The first coupler is used for receiving an external reference clock signal and generating a control signal and an operating signal;

[0014] The second coupler is used for receiving an output signal of the crystal oscillator and generating a reference clock signal and a feedback signal;

[0015] The selection switch control module is used for receiving the control signal and controlling the working state of the selection switch;

[0016] The phase-locked module is used for receiving the operating signal and the feedback signal, so that the internal crystal oscillator is phase-locked according to the external reference clock signal.

[0017] Further, the phase-locked module comprises a phase detector and a loop filter; the input end of the loop filter is connected with the output end of the phase detector, and the output end of the loop filter is connected with the input end of the selection switch; the input end of the phase detector is used for receiving the operating signal generated by the first coupler and the feedback signal generated by the second coupler.

[0018] Further, the phase-locked module further comprises a signal processing module two and a signal processing module three;

[0019] The operating signal generated by the first coupler is sent to the phase detector through the signal processing module two;

[0020] The feedback signal generated by the second coupler is sent to the phase detector through the signal processing module three.

[0021] Further, the signal processing module two comprises a first attenuator and a second filter; the operating signal generated by the first coupler is sent to the phase detector through the first attenuator and the second filter in sequence.

[0022] Further, the signal processing module three comprises a second attenuator, a microwave amplifier, a third filter and a third attenuator; the feedback signal generated by the second coupler is sent to the phase detector through the second attenuator, the microwave amplifier, the third filter and the third attenuator in sequence.

[0023] Further, the selection switch control module comprises a comparator; the control signal generated by the first coupler is sent to the selection switch through the comparator.

[0024] Further, the selection switch control module comprises a comparator and a signal processing module one; the control signal generated by the first coupler is sent to the selection switch through the signal processing module one and the comparator in sequence.

[0025] Further, the selection switch control module comprises a comparator and a controller, and the control signal generated by the first coupler is sent to the selection switch through the comparator and the controller in sequence.

[0026] Further, the selection switch control module comprises a comparator, a controller and a signal processing module one, and the control signal generated by the first coupler is sent to the selection switch through the signal processing module one, the comparator and the controller in sequence.

[0027] Further, the signal processing module one comprises a first filter, a detector and an operational amplifier, and the control signal generated by the first coupler is sent to the comparator through the first filter, the detector and the operational amplifier in sequence.

[0028] As described above, the present application has the following advantages:

[0029] When the internal reference clock signal is needed as the reference clock signal to ensure the operation of the electronic device, the selection switch control module does not receive the control signal, the phase-locked module and the selection switch are not turned on, the crystal oscillator generates the internal reference clock signal, which is input into the electronic device through the second coupler to provide the reference clock signal required for the operation of the electronic device; when the electronic device receives the external reference clock signal, the first coupler receives the external reference clock signal and generates the control signal and the working signal through coupling processing, when the selection switch control module receives the control signal, the selection switch and the phase-locked module are turned on, the phase-locked module performs phase-locked frequency locking on the external reference clock signal according to the received working signal and feedback signal, so that the external reference clock signal and the internal reference clock signal generated by the crystal oscillator are phase-locked and homologous, thereby ensuring that the reference clock signal output by the whole reference clock signal generation system is phase-locked and homologous during the switching process, and ensuring the stable operation of the electronic device. At the same time, due to the existence of the high-precision adjustable resistor, the resistance value of the adjustable resistor can be adjusted to change the voltage difference between the voltage output end of the crystal oscillator and the input voltage control end, thereby fine-tuning the frequency of the crystal oscillator output signal, and avoiding signal drift. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 The structure diagram of the present application. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme of the embodiments of the present application will be described clearly and completely below in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.

[0032] The following detailed description of the embodiments of the application in the accompanying drawings provides merely by way of non-limiting examples, and therefore, should not be taken to mean limiting the scope of the application. Based on the embodiments of the application, all other embodiments obtained by those of ordinary skill in the art without creative effort fall within the scope of the application.

[0033] It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict.

[0034] It should be noted that: similar reference numerals and letters in the following drawings represent similar items, therefore, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0035] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship commonly understood by those skilled in the art, and are only for the convenience of describing the present application and simplifying the description, and therefore, cannot be understood as indicating or implying that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore, cannot be understood as limiting the present application. In addition, the terms "first", "second" and the like are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0036] In the description of the present application, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set", "mount", "connected", "connected" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium, or it can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0037] As shown in Figure 1 The present application discloses a reference clock signal generation system, which comprises a first coupler, a selection switch control module, a selection switch, a crystal oscillator, a second coupler, a phase-locked module and an adjustable resistor.

[0038] The input end of the crystal oscillator is connected with the output end of the selection switch, and the output end of the crystal oscillator is connected with the input end of the second coupler.

[0039] The input end of the adjustable resistor is connected with the output end of the crystal oscillator, and the output end of the adjustable resistor is connected with the input end of the selection switch.

[0040] The input end of the selection switch control module is connected with the output end of the first coupler, and the output end of the selection switch control module is connected with the input end of the selection switch;

[0041] The input end of the phase-locked module is connected with the input end of the first coupler and the second coupler respectively, and the output end of the phase-locked module is connected with the input end of the selection switch;

[0042] The crystal oscillator is used for generating an internal reference clock signal;

[0043] The first coupler is used for receiving an external reference clock signal and performing coupling processing to generate a control signal and a working signal;

[0044] The second coupler is used for receiving an output signal of the crystal oscillator and performing coupling processing to generate a reference clock signal and a feedback signal;

[0045] The selection switch control module is used for receiving the control signal to control the working state of the selection switch;

[0046] The phase-locked module is used for receiving the working signal and the feedback signal to make the internal crystal oscillator phase-locked according to the external reference clock signal.

[0047] Due to the above structure, when the internal reference clock signal is needed as the reference clock signal to ensure the operation of the electronic device, the selection switch control module does not receive the control signal, the phase-locked module and the selection switch are not turned on, the crystal oscillator generates the internal reference clock signal, which is input into the electronic device through the second coupler to provide the reference clock signal required for the operation of the electronic device; when the electronic device needs the external reference clock signal, the first coupler receives the external reference clock signal and performs coupling processing to generate the control signal and the working signal, and when the selection switch control module receives the control signal, the selection switch and the phase-locked module are turned on, the phase-locked module phase-locks the external reference clock signal according to the received working signal and feedback signal, so that the external reference clock signal and the internal reference clock signal generated by the crystal oscillator are phase-related and homologous, thereby ensuring that the reference clock signal output by the entire reference clock signal generation system is phase-related and homologous during the switching process, and ensuring the stable operation of the electronic device. At the same time, due to the existence of the high-precision adjustable resistor, the resistance range of the high-precision adjustable resistor is 0-1K ohm, according to the resistance series voltage division formula, the adjustable voltage range is designed to be 1600-2400mV, and the frequency output range of the crystal oscillator is 100MHz positive and negative 300Hz frequency range. Adjusting the resistance value of the adjustable resistor can change the voltage difference between the crystal oscillator output voltage end and the input voltage control end, thereby fine-tuning the frequency of the crystal oscillator output signal, avoiding signal drift, and calibrating and maintaining the instrument.

[0048] In the application, the frequency of the internal reference clock signal is 100MHz, and the frequency of the external reference clock signal is 10MHz.

[0049] Further, the phase-locked loop module comprises a phase detector and a loop filter; the input end of the loop filter is connected with the output end of the phase detector, and the output end of the loop filter is connected with the input end of the selection switch; the input end of the phase detector is used for receiving the working signal generated by the first coupler and the feedback signal generated by the second coupler.

[0050] Due to the above structure, the loop formed by the phase detector, the loop filter and the crystal oscillator forms a phase-locked loop. When the electronic device needs to input the external reference clock signal, the internal reference clock signal output by the crystal oscillator is coupled and processed by the second coupler to generate the feedback signal, the feedback signal is input to the phase detector, the external reference clock signal is coupled and processed by the first coupler to generate the working signal, the working signal is input to the phase detector, the phase detector adjusts according to the received working signal and feedback signal, so that the signal output by the phase detector is phase-locked with the internal reference clock signal generated by the crystal oscillator, and then the external reference clock signal and the internal reference clock signal are phase-related and homologous. The loop filter can filter out the interference signals outside the loop bandwidth, and the loop bandwidth is narrow-band hertz level, so as to ensure that the performance of the signal output by the phase detector is consistent with the internal reference clock signal generated by the crystal oscillator.

[0051] Further, the phase-locked loop module further comprises a second signal processing module and a third signal processing module;

[0052] The working signal generated by the first coupler is sent to the phase detector through the second signal processing module;

[0053] The feedback signal generated by the second coupler is sent to the phase detector through the third signal processing module.

[0054] Due to the existence of the second signal processing module and the third signal processing module, the signals generated by the first coupler and the second coupler can be processed, so that the signals are more accurate and stable when input to the phase detector.

[0055] Further, the second signal processing module comprises a first attenuator and a second filter; the working signal generated by the first coupler is sent to the phase detector through the first attenuator and the second filter in sequence.

[0056] The first attenuator is a resistance-adjustable attenuator, which is used for adjusting the power of the working signal according to the power calibration value debugging of the design requirement, and strengthening the matching of the first coupler and the second filter; the second filter has a relative suppression of 40dBc or more in a working frequency band of 2000MHz, and is used for supplementing the problem of poor parasitic passband suppression of the fourth filter, so as to reduce the far-end interference of the external reference clock signal.

[0057] Further, the signal processing module three comprises a second attenuator, a microwave amplifier, a third filter and a third attenuator; the feedback signal generated by the second coupler is sequentially sent to the phase discriminator through the second attenuator, the microwave amplifier, the third filter and the third attenuator.

[0058] The second attenuator is a fixed resistance attenuator, and the attenuation value is set to 8dB, which is used to improve the matching between the second coupler and the microwave amplifier, and to enhance the reverse isolation between the feedback signal and the reference clock signal.

[0059] The microwave amplifier is an ultra-low phase noise amplifier, and the additional noise is as low as-172dBc / Hz, which can reduce the phase noise deterioration degree of the phase-locked loop, is used to amplify the power of the feedback signal, and enhances the reverse isolation between the feedback signal and the reference clock signal.

[0060] The third filter has a working frequency band of up to 5000MHz, and has at least 25dBc or more suppression to the harmonics of the 100MHz crystal oscillator signal within 5000MHz, which can filter out the high-order interference signal in the feedback signal and improve the spectral purity of the signal.

[0061] The third attenuator is a fixed resistance attenuator, and the attenuation value is set to 5dB, which can adjust the power of the amplified feedback signal to adapt to the feedback power condition of the phase discriminator, and enhance the reverse isolation between the feedback signal and the reference clock signal.

[0062] The selection switch control module comprises the following four schemes:

[0063] In the first scheme, the selection switch control module comprises a comparator, and the control signal generated by the first coupler is sent to the selection switch after passing through the comparator.

[0064] Due to the above structure, the comparator compares whether the value of the control signal reaches the comparison threshold value of the comparator, and if the value of the control signal is less than the comparison threshold value, the selection switch and the loop filter are not conductive, at this time, the external reference clock signal is not used.

[0065] In the second scheme, the selection switch control module comprises a comparator and a signal processing module one, and the control signal generated by the first coupler is sent to the selection switch after passing through the signal processing module one and the comparator.

[0066] Compared with the first scheme, due to the existence of the signal processing module one, the control signal generated by the first coupler can be processed, so that the control signal is more accurate and stable when input to the comparator.

[0067] In the third scheme, the selection switch control module comprises a comparator and a controller, and the control signal generated by the first coupler is sent to the selection switch after passing through the comparator and the controller.

[0068] Compared with the first aspect, the output signal of the comparator is input to the controller first, and then the controller controls the state of the selection switch; the controller is connected with other control systems, and the working state of the whole reference clock signal generation system is monitored through the other control systems.

[0069] In the fourth aspect, the selection switch control module comprises a comparator, a controller and a signal processing module one, and the control signal generated by the first coupler is sent to the selection switch through the signal processing module one, the comparator and the controller in sequence.

[0070] Compared with the first aspect, the control signal generated by the first coupler is processed through the signal processing module one, so that the control signal is more accurate and stable when input to the comparator.

[0071] Further, the signal processing module one comprises a first filter, a detector and an operational amplifier, and the control signal generated by the first coupler is sent to the comparator through the first filter, the detector and the operational amplifier in sequence.

[0072] The first filter is a customized band-pass filter, the relative working bandwidth is 5 MHz, the relative suppression of the working frequency band 800 MHz is more than 50 dBc, and the first filter is used to compensate for the poor parasitic passband suppression of the fourth filter, so that the remote interference of the external reference clock signal is reduced, the interference of the remote large signal on the detector is avoided, and the false triggering of the detection level is avoided.

[0073] The detector has a working frequency band DC~400 MHz and a linear power range of up to 95 dB, and is used for power detection of the control signal to realize conversion of the analog power signal to the analog voltage signal.

[0074] The operational amplifier has low voltage and low current noise, a gain bandwidth of up to 45 MHz or more, and a response time of up to 700 ns, can effectively reduce interference pulses, and is used for voltage amplification of the analog small voltage converted by the detector to improve and improve the judgment threshold voltage of the rear-end comparator.

[0075] Further, in order to ensure that the external reference clock signal can be accurately and stably input to the whole reference clock signal generation system, the input end of the first coupler is further connected with a fourth filter, and the external reference clock signal is sent to the first coupler after passing through the fourth filter. In order to ensure that the reference clock signal generated by the reference clock signal generation system is stable and accurate, the output end of the second coupler is further connected with a fifth filter, and the reference clock signal output by the second coupler is output after passing through the fifth filter.

[0076] The fourth filter is a customized narrow-band filter, with an effective working bandwidth of about 30 KHz, high temperature stability coefficient, and near-end rejection degree reaching above 30 dBc. It is used for narrow-band filtering of the near end of the external reference clock signal, on the one hand, to filter out the near-end interference of the external reference clock, and avoid the mislaunching of the detector. On the other hand, the phase-locked frequency range of the external reference signal is determined by the voltage-controlled tuning range of the internal crystal oscillator.

[0077] The fifth filter has a working frequency band of up to 5000 MHz, and has at least 25 dBc or above suppression on the harmonics of the 100 MHz crystal oscillator signal within 5000 MHz, thereby improving the signal spectral purity.

[0078] Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art can make modifications to the technical solutions recorded in the foregoing embodiments, or make equivalent replacements to part of the technical features, and any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A reference clock signal generation system, characterized by: It includes a first coupler, a selection switch control module, a selection switch, a crystal oscillator, a second coupler, a phase-locked loop module and an adjustable resistor; The input end of the crystal oscillator is connected with the output end of the selection switch, and the output end of the crystal oscillator is connected with the input end of the second coupler; The input end of the adjustable resistor is connected with the output end of the crystal oscillator, and the output end of the adjustable resistor is connected with the input end of the selection switch; The input end of the selection switch control module is connected with the output end of the first coupler, and the output end of the selection switch control module is connected with the input end of the selection switch; The input end of the phase-locked loop module is connected with the input end of the first coupler and the input end of the second coupler respectively, and the output end of the phase-locked loop module is connected with the input end of the selection switch; The crystal oscillator is used for generating an internal reference clock signal. The first coupler is used for receiving an external reference clock signal and generating a control signal and a working signal. The second coupler is used for receiving an output signal of the crystal oscillator and generating a reference clock signal and a feedback signal. The selection switch control module is used for receiving the control signal and controlling the working state of the selection switch. The phase-locked loop module is used for receiving the working signal and the feedback signal, so that the internal crystal oscillator is phase-locked according to the external reference clock signal. The phase-locked loop module includes a phase detector and a loop filter, the input end of the loop filter is connected with the output end of the phase detector, the output end of the loop filter is connected with the input end of the selection switch, and the input end of the phase detector is used for receiving the working signal generated by the first coupler and the feedback signal generated by the second coupler. The selection switch control module includes a comparator and a signal processing module one, and the control signal generated by the first coupler is sent to the selection switch through the signal processing module one and the comparator in sequence. The signal processing module one includes a first filter, a detector and an operational amplifier, and the control signal generated by the first coupler is sent to the comparator through the first filter, the detector and the operational amplifier in sequence.

2. The reference clock signal generation system of claim 1, wherein: The phase-locked loop module further includes a signal processing module two and a signal processing module three. The working signal generated by the first coupler is sent to the phase detector through the signal processing module two. The feedback signal generated by the second coupler is sent to the phase detector through the signal processing module three.

3. The reference clock signal generation system of claim 2, wherein: The signal processing module two includes a first attenuator and a second filter, and the working signal generated by the first coupler is sent to the phase detector through the first attenuator and the second filter in sequence.

4. The reference clock signal generation system of claim 2, wherein: The signal processing module three includes a second attenuator, a microwave amplifier, a third filter and a third attenuator, and the feedback signal generated by the second coupler is sent to the phase detector through the second attenuator, the microwave amplifier, the third filter and the third attenuator in sequence.

5. The reference clock signal generation system of claim 1, wherein: The selection switch control module includes a comparator, and the control signal generated by the first coupler is sent to the selection switch through the comparator.

6. The reference clock signal generation system of claim 1, wherein: The selection switch control module includes a comparator and a controller, and the control signal generated by the first coupler is sent to the selection switch through the comparator and the controller in sequence.

7. The reference clock signal generation system of claim 1, wherein: The selection switch control module includes a comparator, a controller and a signal processing module one, and the control signal generated by the first coupler is sent to the selection switch through the signal processing module one, the comparator and the controller in sequence.

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