Coupling capacitance simulation structure, method, device, system and readable storage medium

Abstract

This invention discloses a coupling capacitor simulation structure, method, apparatus, system, and readable storage medium, relating to the field of printed circuit board technology. The structure includes: a parameter sheet representing the electrical parameters of a corresponding capacitor element; the parameter sheet is rectangular or rounded, covering the surface of a capacitor pad corresponding to the capacitor element, with its edges conforming to the shape of the capacitor pad; a solder structure disposed on the surface of the parameter sheet; the solder structure is columnar, with its base shape conforming to the shape of the capacitor pad; and capacitor leads disposed on the surface of the solder structure, with the shape of the capacitor leads corresponding to the lead shape of the corresponding capacitor element. By implementing the coupling capacitor simulation structure, method, apparatus, system, and readable storage medium disclosed in this application, the simulation accuracy of coupling capacitors can be improved, and the time spent constructing capacitor models can be reduced, thus improving circuit design efficiency.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board technology, and in particular to coupling capacitor simulation structures, methods, apparatus, systems, and readable storage media. Background Technology

[0002] Coupling capacitors are a type of signal coupling caused by the presence of distributed capacitance. In circuit design, especially in high-speed and radio frequency circuits, coupling capacitors are commonly used to block DC signals and eliminate common-mode signals. However, in actual circuits, capacitors are not ideal devices, causing changes in the characteristic impedance of the signal transmission path. This can lead to signal reflections at nodes with impedance discontinuities, affecting signal quality. Therefore, it is necessary to fully consider the parasitic parameters of capacitors during the circuit design phase to ensure that simulation results accurately reflect the actual circuit.

[0003] Commonly used methods for simulating coupling capacitors include: (1) using models provided by capacitor manufacturers; (2) manually building internal structure models of capacitors; and (3) using LumpRLC to simulate actual capacitors. However, capacitor models provided by capacitor manufacturers are usually pre-packaged, and during the design process, it is impossible to adjust the internal structure and parameters of the capacitor model, resulting in poor design flexibility and often significant differences between simulation and actual results. Manually building internal structure models of capacitors is difficult to achieve. On the one hand, it is impossible to accurately reproduce the internal materials, structure, and technical details of capacitors during the design process; on the other hand, the workload of restoring the internal structure of capacitors to build simulation capacitor models is large and consumes a lot of time, which is not in line with the design process. Furthermore, using overly detailed capacitor models for design will consume a lot of time in the simulation stage, and may even lead to abnormal overall results due to node non-convergence. When using LumpRLC to simulate actual capacitors, the simulation results are severely affected by the contact area of ​​the solder pads, and the difference between simulation and actual results is significant. Summary of the Invention

[0004] To address the issue of significant discrepancies between the results obtained from coupling capacitor simulation methods and actual measurements in existing technologies, this invention provides a coupling capacitor simulation structure, method, apparatus, system, and readable storage medium. This allows for accurate prediction of the time required for thin pool repair, enabling engineers to coordinate the recovery of server clusters based on the predicted repair time.

[0005] To solve one or more of the above-mentioned technical problems, the present invention adopts the following technical solution:

[0006] Firstly, a coupling capacitor simulation structure is provided, including:

[0007] Parameter sheets are used to represent the electrical parameters of the corresponding capacitor element. The parameter sheets are rectangular or rounded rectangles and cover the surface of the capacitor pads corresponding to the capacitor element. Their edges match the shape of the capacitor pads.

[0008] The solder structure is located on the surface of the parameter sheet. The solder structure is columnar, and its bottom shape matches the shape of the capacitor pad.

[0009] The capacitor leads are located on the surface of the solder structure, and the shape of the capacitor leads corresponds to the lead shape of the corresponding capacitor element.

[0010] Furthermore, the solder structure has a preset thickness.

[0011] Furthermore, the coupling capacitor simulation structure also includes:

[0012] The printed circuit board stack includes a surface copper layer, on which capacitor pads and signal connection lines are provided. Each capacitor pad is electrically connected to one end of a signal connection line, and the shape of the pad is adapted to the pin of the corresponding capacitor element.

[0013] Secondly, a method for simulating coupling capacitors is provided for simulating the coupling capacitor simulation structure described in the first aspect above. The method includes:

[0014] A parameter sheet is set on the surface of the capacitor pad, wherein the capacitor pad is set on the surface copper layer of the printed circuit board stack;

[0015] A solder structure is set on the surface of the parameter sheet;

[0016] Capacitor pins are provided on the surface of the solder structure, wherein the shape of the capacitor pins corresponds to the pin shape of the corresponding capacitor element.

[0017] Furthermore, a parameter sheet is set on the surface of the capacitor pad, including:

[0018] Draw a parameter sheet on the surface of the capacitor pad, so that the parameter sheet covers the capacitor pad corresponding to the corresponding capacitor element, and the edge of the parameter sheet matches the shape of the capacitor pad.

[0019] Set the lumped parameters of the parameter sheet according to the lumped parameters of the corresponding capacitor element.

[0020] Furthermore, a solder structure is provided on the surface layer of the parameter sheet, including:

[0021] A solder base with a shape matching the capacitor pad is set on the surface of the parameter sheet;

[0022] The bottom surface shape is stretched to a preset thickness in a direction perpendicular to the parameter sheet and outward to form a solder structure.

[0023] Furthermore, the coupling capacitance simulation method also includes:

[0024] Signal connection lines are set on the surface copper layer so that each capacitor pad is electrically connected to one end of a signal connection line.

[0025] Set up an excitation / receiver at the other end of the signal connection line.

[0026] Thirdly, a coupling capacitor simulation device is provided, comprising:

[0027] A thin-film setting module is used to set parameter thin films on the surface of capacitor pads, wherein the capacitor pads are set on the surface copper layer of the printed circuit board stack.

[0028] Solder setting module, used to set solder structure on the surface of parameter sheet;

[0029] The pin setting module is used to set capacitor pins on the surface of the solder structure, wherein the shape of the capacitor pins corresponds to the pin shape of the corresponding capacitor element.

[0030] Fourthly, a coupling capacitance simulation system is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method described in the second aspect above.

[0031] Fifthly, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the method described in the second aspect above.

[0032] The beneficial effects of the technical solution provided by the embodiments of the present invention are as follows:

[0033] 1. By implementing the coupling capacitor simulation structure, method, apparatus, system and readable storage medium disclosed in the embodiments of this application, the simulation accuracy of coupling capacitors can be improved in circuit design, especially in high-speed signal, radio frequency signal and other application scenarios, the simulation accuracy of coupling capacitors is significantly improved;

[0034] 2. It reduces the time spent building capacitor models, and at the same time, it enables high-precision, high-speed circuit simulation based on component nominal values, thereby improving circuit design efficiency. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 This is a cross-sectional view of the simulated coupling capacitor structure provided in an embodiment of the present invention;

[0037] Figure 2 This is a schematic diagram of the coupling capacitor simulation structure applied to high-speed differential circuits provided in an embodiment of the present invention;

[0038] Figure 3 This is a schematic diagram of the coupling capacitor simulation method provided in an embodiment of the present invention;

[0039] Figure 4 This is a schematic diagram of the capacitor impedance result obtained by simulating using the coupling capacitor simulation method provided in the embodiments of the present invention;

[0040] Figure 5 This is a schematic diagram of the capacitance impedance results obtained from capacitance model simulation;

[0041] Figure 6 This is a schematic diagram of the capacitance impedance results obtained using LumpRLC simulation;

[0042] Figure 7 This is a schematic diagram of the coupling capacitor simulation device provided in an embodiment of the present invention;

[0043] Figure 8 This is a schematic diagram of the coupling capacitor simulation system provided in an embodiment of the present invention. Detailed Implementation

[0044] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0045] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The numbers in the accompanying drawings are only used to distinguish individual functional parts or modules and do not indicate logical relationships between parts or modules. The terms “comprising,” “including,” or “including,” and similar terms mean that the element or object preceding the term encompasses the element or object listed following the term and its equivalents, without excluding other elements or objects. The terms “connected,” “linked,” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. “Above,” “below,” “left,” “right,” etc., are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0046] The various embodiments according to this disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that in the drawings, the same reference numerals are assigned to components having substantially the same or similar structure and function, and repeated descriptions of them will be omitted.

[0047] In one embodiment, a coupling capacitor simulation structure, such as Figure 1 As shown, it includes:

[0048] Parameter sheets are used to represent the electrical parameters of the corresponding capacitor element. The parameter sheets are rectangular or rounded rectangles and cover the surface of the capacitor pads corresponding to the capacitor element. Their edges match the shape of the capacitor pads.

[0049] The solder structure is located on the surface of the parameter sheet. The solder structure is columnar, and its bottom shape matches the shape of the capacitor pad.

[0050] The capacitor leads are located on the surface of the solder structure, and the shape of the capacitor leads corresponds to the lead shape of the corresponding capacitor element.

[0051] To simulate high-speed differential circuits, this junction is typically configured as a high-speed differential circuit, such as... Figure 2 As shown.

[0052] The solder structure has a preset thickness, typically set to 5 mil in high-speed circuits. Different preset thickness values ​​exist in other circuits and can be set according to actual conditions. This application does not limit the specific value of the preset thickness.

[0053] The simulation structure for coupling capacitors also includes:

[0054] The printed circuit board (PCB) stack-up includes a surface copper layer. PCB pads are used to simulate the PCB substrate material, typically fiberglass epoxy resin copper-clad laminate, whose material parameters (such as relative permittivity) affect the simulation results. The surface copper layer is used to set up pads, signal lines, and other structures related to coupling capacitance simulation. The surface copper layer has capacitor pads and signal lines, where each capacitor pad is electrically connected to one end of a signal line, and the shape of the pad is adapted to the pins of the corresponding capacitor element.

[0055] In another embodiment, a coupling capacitor simulation method is provided for simulating the coupling capacitor simulation structure described in the first aspect above. Figure 3 As shown, the method includes:

[0056] S100: A parameter sheet is set on the surface of the capacitor pad, wherein the capacitor pad is set on the surface copper layer of the printed circuit board stack.

[0057] S200: A solder structure is set on the surface of the parametric sheet;

[0058] S300: Capacitor pins are provided on the surface of the solder structure, wherein the shape of the capacitor pins corresponds to the pin shape of the corresponding capacitor element.

[0059] Specifically, a parameter sheet is set on the surface of the capacitor pad, including:

[0060] S110: Draw a parameter sheet on the surface of the capacitor pad, so that the parameter sheet covers the capacitor pad corresponding to the corresponding capacitor element, and the edge of the parameter sheet matches the shape of the capacitor pad.

[0061] S120: Set the lumped parameters of the parameter sheet according to the lumped parameters of the corresponding capacitor element.

[0062] These lumped parameters can be obtained from the component datasheet provided by the manufacturer, including: capacitance value, resistance value, and inductance value.

[0063] A solder structure is set on the surface layer of the parametric sheet, including:

[0064] S210: A solder base with a shape that matches the shape of the capacitor pad is set on the surface of the parameter sheet;

[0065] S220: The bottom surface shape is stretched to a preset thickness in a direction perpendicular to the parameter sheet and outward to form a solder structure.

[0066] The simulation methods for coupling capacitors also include:

[0067] S400: Signal connection lines are set on the surface copper layer so that each capacitor pad is electrically connected to one end of a signal connection line;

[0068] S500: Set the excitation / receiver end at the other end of the signal connection line.

[0069] By implementing the above-mentioned coupling capacitance simulation method, the following results were obtained: Figure 4 The impedance simulation results are shown. For a capacitor with a measured capacitance of 87Ω, the simulation result is 87.27Ω. Compared to... Figure 5 As shown, the simulation results (122Ω) obtained using the capacitor model provided by the manufacturer, and as... Figure 6 The simulation result of LumpRLC shown is 103Ω. The coupling capacitor simulation method disclosed in this embodiment of the invention has improved accuracy.

[0070] In another embodiment, a coupling capacitance simulation device, such as Figure 7 As shown, it includes:

[0071] A thin-film setting module is used to set parameter thin films on the surface of capacitor pads, wherein the capacitor pads are set on the surface copper layer of the printed circuit board stack.

[0072] Solder setting module, used to set solder structure on the surface of parameter sheet;

[0073] The pin setting module is used to set capacitor pins on the surface of the solder structure, wherein the shape of the capacitor pins corresponds to the pin shape of the corresponding capacitor element.

[0074] In another embodiment, the coupling capacitance simulation device further includes:

[0075] A connection line arrangement device is used to arrange signal connection lines on the surface copper layer, so that each capacitor pad is electrically connected to one end of a signal connection line.

[0076] An excitation receiving setup device is used to set an excitation / receiver end at the other end of a signal connection line.

[0077] In another embodiment, a coupling capacitance simulation system, such as Figure 8 As shown, it includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the method described in the second aspect above.

[0078] Specifically, it includes:

[0079] S100: A parameter sheet is set on the surface of the capacitor pad, wherein the capacitor pad is set on the surface copper layer of the printed circuit board stack.

[0080] Specifically, a parameter sheet is set on the surface of the capacitor pad, including:

[0081] S110: Draw a parameter sheet on the surface of the capacitor pad, so that the parameter sheet covers the capacitor pad corresponding to the corresponding capacitor element, and the edge of the parameter sheet matches the shape of the capacitor pad.

[0082] S120: Set the lumped parameters of the parameter sheet according to the lumped parameters of the corresponding capacitor element.

[0083] S200: A solder structure is set on the surface of the parametric sheet;

[0084] Specifically, a solder structure is set on the surface layer of the parameter sheet, including:

[0085] S210: A solder base with a shape that matches the shape of the capacitor pad is set on the surface of the parameter sheet;

[0086] S220: The bottom surface shape is stretched to a preset thickness in a direction perpendicular to the parameter sheet and outward to form a solder structure.

[0087] S300: Capacitor pins are provided on the surface of the solder structure, wherein the shape of the capacitor pins corresponds to the pin shape of the corresponding capacitor element.

[0088] S400: Signal connection lines are set on the surface copper layer so that each capacitor pad is electrically connected to one end of a signal connection line;

[0089] S500: Set the excitation / receiver end at the other end of the signal connection line.

[0090] In another embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the method described in the second aspect above.

[0091] Specifically, it includes:

[0092] S110: Draw a parameter sheet on the surface of the capacitor pad, so that the parameter sheet covers the capacitor pad corresponding to the corresponding capacitor element, and the edge of the parameter sheet matches the shape of the capacitor pad.

[0093] S120: Set the lumped parameters of the parameter sheet according to the lumped parameters of the corresponding capacitor element.

[0094] S200: A solder structure is set on the surface of the parametric sheet;

[0095] Specifically, a solder structure is set on the surface layer of the parameter sheet, including:

[0096] S210: A solder base with a shape that matches the shape of the capacitor pad is set on the surface of the parameter sheet;

[0097] S220: The bottom surface shape is stretched to a preset thickness in a direction perpendicular to the parameter sheet and outward to form a solder structure.

[0098] S300: Capacitor pins are provided on the surface of the solder structure, wherein the shape of the capacitor pins corresponds to the pin shape of the corresponding capacitor element.

[0099] S400: Signal connection lines are set on the surface copper layer so that each capacitor pad is electrically connected to one end of a signal connection line;

[0100] S500: Set the excitation / receiver end at the other end of the signal connection line.

[0101] By implementing the coupling capacitor simulation structure, method, apparatus, system, and readable storage medium disclosed in the embodiments of this application, the simulation accuracy of coupling capacitors can be improved in circuit design, especially in high-speed signal and radio frequency signal application scenarios, where the simulation accuracy of coupling capacitors is significantly improved; it can also reduce the time spent building capacitor models, and at the same time, high-precision high-speed circuit simulation can be performed based on the nominal values ​​of components, thereby improving circuit design efficiency.

[0102] All of the above-mentioned optional technical solutions can be combined in any way to form optional embodiments of the present invention, and will not be described in detail here.

[0103] Specific limitations regarding the coupling capacitor simulation device can be found in the limitations of the coupling capacitor simulation method described above, and will not be repeated here. Each module in the aforementioned coupling capacitor simulation device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independently of the processor in a computer device, or stored in software in the memory of a computer device, so that the processor can call and execute the operations corresponding to each module.

[0104] Example 1

[0105] A simulation structure for coupling capacitors, such as Figure 1 As shown, it includes: a parameter sheet for representing the electrical parameters of the corresponding capacitor element. The parameter sheet is rectangular or rounded and covers the surface of the capacitor pad corresponding to the capacitor element. Its edges match the shape of the capacitor pad.

[0106] The solder structure is located on the surface of the parameter sheet. The solder structure is columnar, and its bottom shape matches the shape of the capacitor pad.

[0107] The capacitor leads are located on the surface of the solder structure, and the shape of the capacitor leads corresponds to the lead shape of the corresponding capacitor element.

[0108] The solder structure has a preset thickness of 5 mil.

[0109] The simulation structure for coupling capacitors also includes:

[0110] The printed circuit board stack includes a surface copper layer. The surface copper layer is provided with capacitor pads and signal connection lines, wherein each capacitor pad is electrically connected to one end of a signal connection line, and the shape of the pad is adapted to the pin of the corresponding capacitor element.

[0111] Example 2

[0112] Figure 2 A high-speed differential circuit simulated using a coupling capacitor simulation structure is shown.

[0113] The simulation structure includes two sets of adjacent coupling capacitors with their signal connection lines arranged in parallel. The two ends of the signal connection lines are connected to excitation / receiving devices to send signals and receive corresponding signals for simulation verification.

[0114] Each set of coupling capacitor simulation structures includes:

[0115] The solder structure is located on the surface of the parameter sheet. The solder structure is columnar, and its bottom shape matches the shape of the capacitor pad.

[0116] The capacitor leads are located on the surface of the solder structure, and the shape of the capacitor leads corresponds to the lead shape of the corresponding capacitor element.

[0117] The solder structure has a preset thickness of 5 mil.

[0118] The simulation structure for coupling capacitors also includes:

[0119] The printed circuit board stack includes a surface copper layer. The surface copper layer is provided with capacitor pads and signal connection lines, wherein each capacitor pad is electrically connected to one end of a signal connection line, and the shape of the pad is adapted to the pin of the corresponding capacitor element.

[0120] Example 3

[0121] A method for simulating coupling capacitors is provided for simulating the coupling capacitor simulation structure described in the first aspect above. For example... Figure 3 As shown, the method includes:

[0122] S100: A parameter sheet is set on the surface of the capacitor pad, wherein the capacitor pad is set on the surface copper layer of the printed circuit board stack.

[0123] S200: A solder structure is set on the surface of the parametric sheet;

[0124] S300: Capacitor pins are provided on the surface of the solder structure, wherein the shape of the capacitor pins corresponds to the pin shape of the corresponding capacitor element.

[0125] Specifically, a parameter sheet is set on the surface of the capacitor pad, including:

[0126] S110: Draw a parameter sheet on the surface of the capacitor pad, so that the parameter sheet covers the capacitor pad corresponding to the corresponding capacitor element, and the edge of the parameter sheet matches the shape of the capacitor pad.

[0127] S120: Set the lumped parameters of the parameter sheet according to the lumped parameters of the corresponding capacitor element.

[0128] A solder structure is set on the surface layer of the parametric sheet, including:

[0129] S210: A solder base with a shape that matches the shape of the capacitor pad is set on the surface of the parameter sheet;

[0130] S220: The bottom surface shape is stretched to a preset thickness in a direction perpendicular to the parameter sheet and outward to form a solder structure.

[0131] The simulation methods for coupling capacitors also include:

[0132] S400: Signal connection lines are set on the surface copper layer so that each capacitor pad is electrically connected to one end of a signal connection line;

[0133] S500: Set the excitation / receiver end at the other end of the signal connection line.

[0134] Example 4

[0135] A coupling capacitor simulation device, such as Figure 7 As shown, it includes:

[0136] A thin-film setting module is used to set parameter thin films on the surface of capacitor pads, wherein the capacitor pads are set on the surface copper layer of the printed circuit board stack.

[0137] Solder setting module, used to set solder structure on the surface of parameter sheet;

[0138] The pin setting module is used to set capacitor pins on the surface of the solder structure, wherein the shape of the capacitor pins corresponds to the pin shape of the corresponding capacitor element.

[0139] Example 5

[0140] A coupling capacitance simulation system, such as Figure 8 As shown, it includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the method described in the second aspect above.

[0141] Specifically, it includes:

[0142] S100: A parameter sheet is set on the surface of the capacitor pad, wherein the capacitor pad is set on the surface copper layer of the printed circuit board stack.

[0143] Specifically, a parameter sheet is set on the surface of the capacitor pad, including:

[0144] S110: Draw a parameter sheet on the surface of the capacitor pad, so that the parameter sheet covers the capacitor pad corresponding to the corresponding capacitor element, and the edge of the parameter sheet matches the shape of the capacitor pad.

[0145] S120: Set the lumped parameters of the parameter sheet according to the lumped parameters of the corresponding capacitor element.

[0146] S200: A solder structure is set on the surface of the parametric sheet;

[0147] Specifically, a solder structure is set on the surface layer of the parameter sheet, including:

[0148] S210: A solder base with a shape that matches the shape of the capacitor pad is set on the surface of the parameter sheet;

[0149] S220: The bottom surface shape is stretched to a preset thickness in a direction perpendicular to the parameter sheet and outward to form a solder structure.

[0150] S300: Capacitor pins are provided on the surface of the solder structure, wherein the shape of the capacitor pins corresponds to the pin shape of the corresponding capacitor element.

[0151] S400: Signal connection lines are set on the surface copper layer so that each capacitor pad is electrically connected to one end of a signal connection line;

[0152] S500: Set the excitation / receiver end at the other end of the signal connection line.

[0153] Example 6

[0154] In another embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the method described in the second aspect above.

[0155] Specifically, it includes:

[0156] S110: Draw a parameter sheet on the surface of the capacitor pad, so that the parameter sheet covers the capacitor pad corresponding to the corresponding capacitor element, and the edge of the parameter sheet matches the shape of the capacitor pad.

[0157] S120: Set the lumped parameters of the parameter sheet according to the lumped parameters of the corresponding capacitor element.

[0158] S200: A solder structure is set on the surface of the parametric sheet;

[0159] Specifically, a solder structure is set on the surface layer of the parameter sheet, including:

[0160] S210: A solder base with a shape that matches the shape of the capacitor pad is set on the surface of the parameter sheet;

[0161] S220: The bottom surface shape is stretched to a preset thickness in a direction perpendicular to the parameter sheet and outward to form a solder structure.

[0162] S300: Capacitor pins are provided on the surface of the solder structure, wherein the shape of the capacitor pins corresponds to the pin shape of the corresponding capacitor element.

[0163] S400: Signal connection lines are set on the surface copper layer so that each capacitor pad is electrically connected to one end of a signal connection line;

[0164] S500: Set the excitation / receiver end at the other end of the signal connection line.

[0165] Specifically, according to embodiments of this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this application include a computer program product comprising a computer program loaded on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from memory, or installed from ROM. When the computer program is executed by an external processor, it performs the functions defined in the methods of embodiments of this application.

[0166] It should be noted that the computer-readable medium in the embodiments of this application can be a computer-readable signal medium or a computer-readable storage medium, or any combination of the two. A computer-readable storage medium can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In the embodiments of this application, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In the embodiments of this application, a computer-readable signal medium can include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium may be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wires, optical fibers, RF (Radio Frequency), etc., or any suitable combination thereof.

[0167] The aforementioned computer-readable medium may be included in the aforementioned server; or it may exist independently and not assembled into the server. The aforementioned computer-readable medium carries one or more programs that, when executed by the server, cause the server to: in response to detecting that the peripheral mode of the terminal is not activated, acquire the frame rate of the application on the terminal; when the frame rate meets the screen-off condition, determine whether the user is acquiring the terminal's screen information; and in response to the determination that the user is not acquiring the terminal's screen information, control the screen to enter an immediate dimming mode.

[0168] Computer program code for performing the operations of the embodiments of this application can be written in one or more programming languages ​​or a combination thereof. Programming languages ​​include object-oriented programming languages—such as Java, Smalltalk, and C++—and conventional procedural programming languages—such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0169] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, for system or system embodiments, since they are basically similar to method embodiments, the description is relatively simple, and relevant parts can be referred to the descriptions in the method embodiments. The systems and system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0170] The technical solutions provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. Furthermore, those skilled in the art will recognize that, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.

[0171] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A coupling capacitance simulation structure, characterized by, The coupling capacitor simulation structure is arranged in a high-speed differential circuit, and the structure comprises: a parameter sheet provided with lumped parameters for representing electrical parameters of a corresponding capacitor element, the parameter sheet being rectangular or circularly rectangular, covering a surface layer of a capacitor pad corresponding to the corresponding capacitor element, and the edges of the parameter sheet matching the shape of the capacitor pad; a solder structure arranged on the surface layer of the parameter sheet, the solder structure being a columnar body with a bottom surface matching the shape of the capacitor pad; a capacitor pin arranged on the surface layer of the solder structure, the capacitor pin matching the shape of a pin of the corresponding capacitor element; wherein the solder structure has a preset thickness.

2. The coupling capacitance simulation structure according to claim 1, wherein The structure further comprises: a printed circuit board stack comprising a surface copper layer provided with the capacitor pads and signal connection lines, wherein each capacitor pad is electrically connected to one end of one of the signal connection lines, and the shape of the capacitor pad matches the shape of the pin of the corresponding capacitor element.

3. A coupling capacitance simulation method characterized by comprising: The method is used for simulating the coupling capacitor simulation structure of claim 1 or 2, and the method comprises: arranging a parameter sheet on the surface layer of a capacitor pad, wherein the capacitor pad is arranged on a surface copper layer of a printed circuit board stack; arranging a solder structure on the surface layer of the parameter sheet; arranging a capacitor pin on the surface layer of the solder structure, wherein the shape of the capacitor pin matches the shape of a pin of a corresponding capacitor element.

4. The coupled capacitance emulation method of claim 3, wherein, The arrangement of the parameter sheet on the surface layer of the capacitor pad comprises: drawing the parameter sheet on the surface layer of the capacitor pad, so that the parameter sheet covers the capacitor pad corresponding to the corresponding capacitor element, and the edges of the parameter sheet match the shape of the capacitor pad; arranging lumped parameters of the parameter sheet according to the lumped parameters of the corresponding capacitor element.

5. The coupled capacitance emulation method of claim 3, wherein, The arrangement of the solder structure on the surface layer of the parameter sheet comprises: arranging a solder bottom surface on the surface layer of the parameter sheet, the solder bottom surface matching the shape of the capacitor pad; stretching the solder bottom surface to a preset thickness in a direction perpendicular to the parameter sheet, to form the solder structure.

6. The coupled capacitance emulation method of claim 3, wherein, The method further comprises: arranging signal connection lines on the surface copper layer, so that each capacitor pad is electrically connected to one end of one of the signal connection lines; arranging an excitation / receiving end on the other end of the signal connection line.

7. A coupled capacitance emulation system comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein, The processor executes the computer program to implement the method of any one of claims 3 to 6.

8. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the method of any one of claims 3 to 6.

Images