A SiP chip for analog image signal acquisition

Abstract

This invention discloses a SiP chip for analog image signal acquisition, comprising n dual-channel operational amplifiers, 2n differential operational amplifiers, 2n differential filter circuits, a multi-channel high-speed differential ADC analog-to-digital converter, a channel mode control module, a multi-channel digital potentiometer, a reference source, an LDO, and a low-speed operational amplifier; where n is an integer greater than or equal to 2. This invention employs SiP packaging technology to encapsulate the bare cores of the high-speed single-ended operational amplifiers, high-speed differential operational amplifiers, low-speed buffers, LDO power supplies, reference sources, ADCs, digital potentiometers, and peripheral resistors and capacitors used in the detector's analog signal processing circuit into a single SiP chip. The chip weighs approximately 1g and measures 10×17×1mm. 3 It realizes the acquisition and conditioning function of up to four analog image signals on a single SIP chip. Using this SIP chip can greatly reduce the size and weight of the circuit board.

Description

Technical Field

[0001] This invention belongs to the field of electronic technology, specifically relating to an analog image signal acquisition SIP chip. Background Technology

[0002] Currently, many infrared detectors output analog signals. Typically, an amplifier chip combined with an analog-to-digital converter chip converts the analog signal output by the detector into a digital signal, which is then sent to the main control chip to be organized into a complete infrared image.

[0003] As detector image resolution and image data volume increase, the number of channels for analog output also increases, leading to larger circuit sizes for processing analog signals. This is highly unfavorable for weight-sensitive applications such as aerospace, airborne, and handheld devices. Summary of the Invention

[0004] The purpose of this invention is to provide an analog image signal acquisition SIP chip that enables multi-channel analog image signal acquisition and conditioning, while reducing size and weight.

[0005] The technical solution provided by this invention is as follows:

[0006] A SiP chip for analog image signal acquisition includes n dual-channel operational amplifiers, 2n differential operational amplifiers, 2n differential filter circuits, a multi-channel high-speed differential ADC analog-to-digital converter, a channel mode control module, a multi-channel digital potentiometer, a reference source, an LDO, and a low-speed operational amplifier; where n is an integer greater than or equal to 2.

[0007] The dual-channel op-amp supports two analog image signal inputs;

[0008] The non-inverting inputs of every two differential op-amps are connected to the two outputs of a dual op-amp. The inverting input of each differential op-amp is connected to the external pin Vbias to provide external DC bias. The common-mode voltage input pin of the differential op-amp is connected to a multi-channel high-speed differential ADC to match the common-mode voltage between the differential op-amp output and the analog input of the multi-channel high-speed differential ADC. The two outputs of the differential op-amp are connected to one channel of the multi-channel high-speed differential ADC through a differential filter circuit.

[0009] The channel mode control module is used to control the on / off state of the power supply ports of the dual operational amplifiers and the differential operational amplifiers connected to them.

[0010] The multi-channel digital potentiometer is an IIC interface digital potentiometer. Each pair of channels of the digital potentiometer serves as two feedback resistors in a differential operational amplifier to achieve differential operational amplifier gain adjustment, so as to adapt to the input amplitude of analog image signals and the input amplitude of multi-channel high-speed differential ADC analog-to-digital converter.

[0011] The reference source is used to provide a low bias power supply for the infrared detector.

[0012] LDO, or low dropout linear regulator, is used to provide bias power for infrared detectors with large power supply current.

[0013] A low-speed operational amplifier, combined with a reference source, is used to achieve an arbitrary voltage output below the reference source voltage, providing a low bias power supply for the infrared detector.

[0014] Furthermore, the differential filter circuit includes a first resistor, a second resistor, and a capacitor; the two output terminals of the differential operational amplifier are respectively connected to one channel of the multi-channel high-speed differential ADC analog-to-digital converter through the first resistor and the second resistor, and the capacitor is located between the first resistor, the second resistor, and the connection terminal of the multi-channel high-speed differential ADC analog-to-digital converter.

[0015] Furthermore, the channel mode control module includes control pins and a load switch. The power supply port is controlled by controlling the on / off state of the load switch through the control pins.

[0016] Furthermore, one channel of the analog image signal is always on, and a load switch is used to control the on / off state of the power supply ports of the remaining channels.

[0017] Furthermore, the SIP chip's leads are in the form of a BGA array.

[0018] Furthermore, the SIP chip uses a substrate-type plastic encapsulation, an organic substrate is used inside the circuit, passive components are fixed with solder paste, the chip is fixed to the PAD on the substrate surface using conductive adhesive, and electrical connection is ensured by gold wire bonding.

[0019] Furthermore, the dual-channel operational amplifier is located in the first column, the differential operational amplifier is located in the second column, the multi-channel digital potentiometer is located in the middle of the second column, the differential filter circuit is located in the third column, the channel mode control module is located at the top of the fourth column, the multi-channel high-speed differential ADC is located in the middle of the fourth column, and the reference source, LDO, and low-speed operational amplifier are located at the bottom of the fourth column.

[0020] Furthermore, the SIP chip is rectangular.

[0021] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0022] 1. This invention employs SiP packaging technology to encapsulate the bare-chip components used in the detector's analog signal processing circuit, including high-speed single-ended operational amplifiers, high-speed differential operational amplifiers, low-speed buffers, LDO power supplies, reference sources, AD analog-to-digital converters, digital potentiometers, and peripheral resistors and capacitors, into a single SiP chip. The chip weighs approximately 1g and measures 10×17×1mm. 3 It realizes the acquisition and conditioning function of up to four analog image signals on a single SIP chip. Using this SIP chip can greatly reduce the size and weight of the circuit board.

[0023] 2. This invention allows the operational amplifier's amplification factor to be adjusted via a digital potentiometer with an IIC interface to adapt to the analog output signal of the infrared detector and the AD analog-to-digital converter; at the same time, using an IIC interface potentiometer can effectively reduce the number of peripheral I / O pins of the SIP chip and reduce the size of the SIP chip.

[0024] 3. This invention selectively shuts down channels through the channel-mode power control pin, enabling single-channel and four-channel transmission, which can effectively reduce the power consumption of the SIP chip.

[0025] 4. This invention incorporates an LDO power supply chip, a reference source, and a low-speed operational amplifier, which can directly supply bias power to the detector, reducing the external power supply circuitry of the SIP and further reducing the circuit board size.

[0026] 5. In traditional solutions, the DC bias of each channel first passes through dual low-speed operational amplifiers and then is input to the inverting input of a differential operational amplifier. This invention connects the DC bias input pin directly to the input of the differential operational amplifier, which can effectively reduce the number of chips used, shrink the size of the SIP chip, reduce power consumption, and reduce costs.

[0027] 6. This invention adopts a three-stage structure: a single-ended amplifier, a differential amplifier, and a differential AD converter. Compared with the traditional two-stage structure: a single-ended amplifier and a single-ended AD converter, it can greatly reduce common-mode interference in analog circuits and improve image quality.

[0028] 7. Based on the analog signal data flow, this invention designs a rectangular shape with dimensions of 10mm×17mm×1mm, compared to the traditional square-shaped SIP chip. This can effectively reduce the internal winding length of the chip, reduce the common-mode interference of the winding on the analog signal, and improve the internal signal-to-noise ratio of the chip.

[0029] 8. The present invention reserves a negative power supply port - V5A2 for the differential operational amplifier. Depending on the range of the analog input signal, the differential operational amplifier power supply port - V5A2 can be directly connected to ground or connected to the negative power supply, which increases the flexibility of the present invention and improves the input range of the analog signal of the present invention. Attached Figure Description

[0030] Figure 1 This is a block diagram of the SIP chip composition according to an embodiment of the present invention;

[0031] Figure 2 This is a block diagram of the channel mode control module according to an embodiment of the present invention;

[0032] Figure 3 This is a diagram showing the dimensions of a SIP chip according to an embodiment of the present invention;

[0033] Figure 4 This is an internal layout diagram of the SIP chip according to an embodiment of the present invention. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.

[0035] The analog image signal acquisition SIP chip of the present invention includes n dual-channel operational amplifiers, 2n differential operational amplifiers, 2n differential filter circuits, a multi-channel high-speed differential ADC analog-to-digital converter, a channel mode control module, a multi-channel digital potentiometer, a reference source, an LDO, and a low-speed operational amplifier; wherein n is an integer greater than or equal to 2;

[0036] The dual-channel op-amp supports two analog image signal inputs;

[0037] The non-inverting inputs of every two differential op-amps are connected to the two outputs of a dual op-amp. The inverting input of each differential op-amp is connected to the external pin Vbias to provide external DC bias. The common-mode voltage input pin of the differential op-amp is connected to a multi-channel high-speed differential ADC to match the common-mode voltage between the differential op-amp output and the analog input of the multi-channel high-speed differential ADC. The two outputs of the differential op-amp are connected to one channel of the multi-channel high-speed differential ADC through a differential filter circuit.

[0038] The channel mode control module is used to control the on / off state of the power supply ports of the dual operational amplifiers and the differential operational amplifiers connected to them.

[0039] The multi-channel digital potentiometer is an IIC interface digital potentiometer. Each pair of channels of the digital potentiometer serves as two feedback resistors in a differential operational amplifier to achieve differential operational amplifier gain adjustment, so as to adapt to the input amplitude of analog image signals and the input amplitude of multi-channel high-speed differential ADC analog-to-digital converter.

[0040] The reference source is used to provide a low bias power supply for the infrared detector.

[0041] LDO, or low dropout linear regulator, is used to provide bias power for infrared detectors with large power supply current.

[0042] A low-speed operational amplifier, combined with a reference source, is used to achieve an arbitrary voltage output below the reference source voltage, providing a low bias power supply for the infrared detector.

[0043] Furthermore, the differential filter circuit includes a first resistor, a second resistor, and a capacitor; the two output terminals of the differential operational amplifier are respectively connected to one channel of the multi-channel high-speed differential ADC analog-to-digital converter through the first resistor and the second resistor, and the capacitor is located between the first resistor, the second resistor, and the connection terminal of the multi-channel high-speed differential ADC analog-to-digital converter.

[0044] Furthermore, the channel mode control module includes control pins and load switches. The power supply ports are controlled by switching the load switch on and off via the control pins. One channel of the analog image signal is always on, and the load switch is used to control the power supply ports of the remaining channels.

[0045] Furthermore, the dual-channel operational amplifier is located in the first column, the differential operational amplifier is located in the second column, the multi-channel digital potentiometer is located in the middle of the second column, the differential filter circuit is located in the third column, the channel mode control module is located at the top of the fourth column, the multi-channel high-speed differential ADC is located in the middle of the fourth column, and the reference source, LDO, and low-speed operational amplifier are located at the bottom of the fourth column.

[0046] Figure 1 This is a schematic diagram of the internal structure of the chip in an embodiment of the present invention. It mainly includes two dual-channel operational amplifiers, four differential operational amplifiers, four differential filter circuits composed of resistors R and capacitors C, a four-channel high-speed differential ADC analog-to-digital converter, a channel mode control module, an eight-channel digital potentiometer, a reference source, an LDO, and a low-speed operational amplifier.

[0047] In this embodiment, the dual operational amplifier uses the SX8042MD die from the 24th Research Institute of China Electronics Technology Group Corporation (CETC). This die has a power supply of ±5V, a bandwidth of 210MHz, an input range of ±3.4V, an output range of ±4.9V, and a static power consumption of 0.06W. The SX8042MD die supports two analog inputs and is mainly used to buffer the analog input signals AIN1, AIN2, AIN3, and AIN4.

[0048] The non-inverting inputs of the two differential op-amps are connected to the two outputs of a dual op-amp, respectively. The inverting input of the differential op-amp is connected to the external pin Vbias to provide external DC bias. The common-mode voltage input pin of the differential op-amp is connected to a 4-channel high-speed differential ADC to match the common-mode voltage between the output of the differential op-amp and the analog input of the 4-channel high-speed differential ADC. The differential op-amp used is the SF207 bare die from the 24th Research Institute of China Electronics Technology Group Corporation.

[0049] The filtering circuit is mainly used to filter the analog signal output by the differential operational amplifier without changing the common-mode voltage between the differential operational amplifier and the high-speed ADC. The original manufacturer of resistor R and capacitor C is Torch Electronics, and the original packages of R and C are directly packaged into the SIP chip.

[0050] The four-channel high-speed differential ADC (Analog-to-Digital Converter) uses the MXT2401 from the 722 Research Institute of China Aerospace Science and Technology Corporation. The MXT2401 is a four-channel 16-bit data converter. Each channel can operate independently. It features on-chip sample-and-hold circuitry and has been optimized for lower cost, lower power consumption, smaller size, and easier use. This product exhibits excellent dynamic performance across the entire input range at a conversion rate of 125 MSPS. This invention directly packages the bare MXT2401 die into a SIP chip.

[0051] Channel mode control module such as Figure 2 As shown, it mainly consists of the control pin MS_CH and a load switch. The power supply pin V5A1 is controlled by the MS_CH pin level to switch on / off the power supply ports of the dual operational amplifiers in channels 2, 3, and 4. The power supply pin V5A2 is controlled by the MS_CH pin level to switch on / off the power supply ports of the differential operational amplifiers in channels 2, 3, and 4.

[0052] The eight-channel digital potentiometer uses the SZ522E0 bare die of the IIC interface digital potentiometer from the 24th Research Institute of China Electronics Technology Group Corporation. Each pair of digital potentiometers serves as two feedback resistors in a differential operational amplifier to achieve differential operational amplifier gain adjustment, so as to adapt to the amplitude of analog signal input AIN1, AIN2, AIN3, AIN4 and the amplitude of 4-channel high-speed differential ADC input.

[0053] The reference source used is the JS3033 bare die of the 3.3V output reference source from the 58th Research Institute of China Electronics Technology Group Corporation, which is mainly used to provide a bias power supply with a low power supply current for the infrared detector.

[0054] The low-speed op-amp uses the SGM8558-2XG bare die from Saint-Gobain Microelectronics. This op-amp is mainly used as a buffer. It can be combined with the reference source voltage divider and the low-speed op-amp buffer to achieve any voltage output below 3.3V. It is mainly used to provide a low bias power supply for the infrared detector.

[0055] The LDO uses a GED7151S8 die from Beijing Galle Electronics. This LDO is a low-dropout linear regulator, operating from a 4.5V to 16V supply, with a maximum output current of 800mA. It employs an advanced proprietary architecture, providing high power supply rejection and ultra-low noise characteristics, achieving excellent line and load transient response performance. The voltage can be adjusted from 1.5V to 5.1V using an external resistor. It is primarily used to provide a large bias power supply for infrared detectors.

[0056] The present invention uses a BGA array for the pins, with a total of 57 pins. Table 1 shows the detailed definition of the pin order.

[0057] Table 1. SIP Chip Pinout Table

[0058]

[0059]

[0060]

[0061]

[0062] The dimensions of this invention are 10mm × 17mm × 1mm, and the circuit dimensions are as follows: Figure 3 As shown.

[0063] This SIP uses a substrate-type plastic encapsulation. The internal circuit uses an organic substrate, and passive components are fixed with solder paste. The chip is fixed to the PAD on the substrate surface using conductive adhesive, and electrical connection is ensured by gold wire bonding. For chip process details, please refer to Table 2.

[0064] Table 2 SIP Chip Process Specification

[0065]

[0066]

[0067] The internal layout of the circuit is as follows Figure 4 As shown, circuits 1 and 2 are dual-channel operational amplifiers, 3, 4, 6, and 7 are differential operational amplifiers, 5 is a digital potentiometer, 8, 9, 10, and 11 are filter circuits, 12 is a channel mode control module, 13 is a 4-channel high-speed differential ADC, 14 is an LDO, 15 is a reference source, and 16 is a low-speed operational amplifier.

[0068] It should be noted that, depending on the implementation needs, the various steps / components described in this application can be broken down into more steps / components, or two or more steps / components or parts of the operation of steps / components can be combined into new steps / components to achieve the purpose of this invention.

[0069] Those skilled in the art will readily understand that the above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A Simulataneous Image Signal Acquisition (SIP) chip, characterized by, It includes n dual-channel operational amplifiers, 2n differential operational amplifiers, 2n differential filter circuits, a multi-channel high-speed differential ADC analog-to-digital converter, a channel mode control module, a multi-channel digital potentiometer, a reference source, an LDO, and a low-speed operational amplifier; where n is an integer greater than or equal to 2; The dual-channel op-amp supports two analog image signal inputs; The non-inverting inputs of every two differential op-amps are connected to the two outputs of a dual op-amp. The inverting input of each differential op-amp is connected to the external pin Vbias to provide external DC bias. The common-mode voltage input pin of the differential op-amp is connected to a multi-channel high-speed differential ADC to match the common-mode voltage between the differential op-amp output and the analog input of the multi-channel high-speed differential ADC. The two outputs of the differential op-amp are connected to one channel of the multi-channel high-speed differential ADC through a differential filter circuit. The channel mode control module is used to control the on / off state of the power supply ports of the dual operational amplifiers and the differential operational amplifiers connected to them. The multi-channel digital potentiometer is an IIC interface digital potentiometer. Each pair of channels of the digital potentiometer serves as two feedback resistors in a differential operational amplifier to achieve differential operational amplifier gain adjustment, so as to adapt to the input amplitude of analog image signals and the input amplitude of multi-channel high-speed differential ADC analog-to-digital converter. The reference source is used to provide a low bias power supply for the infrared detector. LDO, or low dropout linear regulator, is used to provide bias power for infrared detectors with large power supply current. A low-speed operational amplifier, combined with a reference source, is used to achieve an arbitrary voltage output below the reference source voltage, providing a low bias power supply for the infrared detector.

2. The analog image signal acquisition SIP chip according to claim 1, characterized in that, The differential filter circuit includes a first resistor, a second resistor, and a capacitor; the two output terminals of the differential operational amplifier are respectively connected to one channel of the multi-channel high-speed differential ADC analog-to-digital converter through the first resistor and the second resistor, and the capacitor is located between the first resistor, the second resistor, and the connection terminal of the multi-channel high-speed differential ADC analog-to-digital converter.

3. The analog image signal acquisition SIP chip according to claim 1, characterized in that, The channel mode control module includes control pins and a load switch. The power supply port is controlled by controlling the load switch through the control pins.

4. The analog image signal acquisition SIP chip according to claim 3, characterized in that, One channel of the analog image signal is always on, and the load switch is used to control the on / off state of the power supply ports of the remaining channels.

5. The analog image signal acquisition SIP chip according to claim 1, characterized in that, The SIP chip uses a BGA array for its pinout.

6. The analog image signal acquisition SIP chip according to claim 1, characterized in that, The SIP chip uses a substrate-type plastic encapsulation, with an organic substrate inside the circuit. Passive components are fixed with solder paste, and the chip is fixed to the PAD on the substrate surface using conductive adhesive. At the same time, gold wire bonding is used to ensure electrical connection.

7. The analog image signal acquisition SIP chip according to any one of claims 1 to 6, characterized in that, Dual-channel op-amps are located in the first column, differential op-amps in the second column, multi-channel digital potentiometers in the middle of the second column, differential filter circuits in the third column, channel mode control modules at the top of the fourth column, multi-channel high-speed differential ADC analog-to-digital converters in the middle of the fourth column, and reference sources, LDOs, and low-speed op-amps at the bottom of the fourth column.

8. The analog image signal acquisition SIP chip according to claim 7, characterized in that, The SIP chip is rectangular.

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