Multilayer metal stack for active and black pixel regions of an image sensor and method thereof

Abstract

This application relates to a multi-layer metal stack for active and black pixel regions of an image sensor and methods thereof. An image sensor includes an active pixel photodiode, a black pixel photodiode, a metal grid structure, and a light shield. Each of the active pixel photodiode and the black pixel photodiode is disposed in a semiconductor material having a first side and a second side opposite the first side. The first side of the semiconductor material is disposed between the light shield and the black pixel photodiode. The metal grid structure includes a first multi-layer metal stack including a first metal and a second metal different from the first metal. The light shield includes a second multi-layer stack including the first metal and the second metal. A first thickness of the first multi-layer metal stack is less than a second thickness of the second multi-layer metal stack.

Description

Technical Field

[0001] This disclosure generally relates to image sensors, and specifically, but not exclusively, to CMOS image sensors and their applications. Background Technology

[0002] Image sensors have become ubiquitous and are now widely used in digital cameras, mobile phones, webcams, and medical, automotive, and other applications. As image sensors are integrated into a wider range of electronic devices, there is a desire to enhance their functionality, performance metrics, and the like in as many ways as possible (e.g., resolution, power consumption, dynamic range, etc.) through device architecture design and image processing.

[0003] A typical image sensor operates in response to image light reflected from an external scene being incident on the sensor. The image sensor comprises an array of pixels having photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and generate image charge after absorption. The image charge generated by the pixel light can be measured as an analog output image signal on the column lines, which varies with the incident image light. In other words, the amount of image charge generated is proportional to the intensity of the image light, which is read out as an analog image signal from the column lines and converted into digital values ​​to produce a digital image (i.e., image data) representing the external scene. Summary of the Invention

[0004] One aspect of this disclosure provides an image sensor comprising: an active pixel photodiode and a black pixel photodiode, each disposed in a semiconductor material, wherein the semiconductor material includes a first side and a second side opposite to the first side; a metal mesh structure disposed near the first side of the semiconductor material and including an aperture optically aligned with the active pixel photodiode, wherein the metal mesh structure includes a first multilayer metal stack, the first multilayer metal stack including a first metal and a second metal different from the first metal; a light shield optically aligned with the black pixel photodiode such that the first side of the semiconductor material is disposed between the light shield and the black pixel photodiode, wherein the light shield includes a second multilayer metal stack, the second multilayer metal stack including the first metal and the second metal, and wherein a first thickness of the first multilayer metal stack is less than a second thickness of the second multilayer metal stack.

[0005] Another aspect of this disclosure provides a method for manufacturing an image sensor, wherein the method includes: providing a semiconductor material having a first side and a second side opposite to the first side, wherein the semiconductor material includes an active pixel photodiode and a black pixel photodiode, each disposed in the semiconductor material; forming a metal mesh structure disposed near the first side of the semiconductor material and including apertures optically aligned with the active pixel photodiodes, wherein the metal mesh structure includes a first multilayer metal stack, the first multilayer metal stack including a first metal and a second metal different from the first metal; and forming a light shield optically aligned with the black pixel photodiodes such that the first side of the semiconductor material is disposed between the light shield and the black pixel photodiodes, wherein the light shield includes a second multilayer metal stack, the second multilayer metal stack including the first metal and the second metal, and wherein a first thickness of the first multilayer metal stack is less than a second thickness of the second multilayer metal stack. Attached Figure Description

[0006] The following figures illustrate non-limiting and non-exhaustive embodiments of the invention, wherein, unless otherwise stated, the same reference numerals refer to the same parts in all the various views. Appropriately, not all examples of a single element are necessarily labeled to avoid confusion in the drawings. The figures are not necessarily drawn to scale, but rather the focus is on illustrating the principles described.

[0007] Figure 1A The illustration shows a top view of an image sensor having a first multilayer metal stack for active pixel areas and a second multilayer metal stack for black pixel areas, according to the teachings of this disclosure.

[0008] Figure 1B Explain the teachings of this disclosure along line A-A' Figure 1A The image sensor is shown in the diagram.

[0009] Figure 2A and 2B The illustration illustrates an example of multi-layer metal stacking used to form a metal mesh structure and a light shield, based on the teachings of this disclosure.

[0010] Figures 3A to 3J This invention describes the process for manufacturing an image sensor having corresponding multilayer metal stacks for active pixel areas and black pixel areas, according to the teachings of this disclosure.

[0011] Figure 4 This is a functional block diagram of an imaging system comprising an image sensor having multiple layers of metal stacks, as taught in this disclosure.

[0012] The corresponding reference characters indicate the corresponding components in all several views of the diagram. Those skilled in the art will understand that the elements in the figures are for simplicity and clarity and are not necessarily drawn to scale. For example, the size of some elements in the figures may be enlarged relative to other elements to aid in understanding the various embodiments of the invention. Furthermore, common but easily understood elements that are useful or necessary in commercially viable embodiments are generally not depicted to facilitate unobstructed viewing of these different embodiments of the invention. Detailed Implementation

[0013] Embodiments of devices, systems, and methods described herein each include or otherwise relate to image sensors having corresponding multilayer metal stacks for active pixel areas and black pixel areas. In the following description, numerous specific details are set forth to provide a thorough understanding of the embodiments. However, those skilled in the art will recognize that the techniques described herein can be practiced without one or more of the specific details or using other methods, components, materials, etc. In other instances, well-known structures, materials, or operations have not been shown or described in detail to avoid obscuring certain aspects.

[0014] In this specification, references to "an example" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the invention. Therefore, the phrases "in an example" or "an embodiment" appearing in various places in this specification do not necessarily all refer to the same embodiment. Furthermore, specific features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0015] For ease of description, spatial relative terms such as “below,” “under,” “above,” “below,” “above,” “top,” “bottom,” “left,” “right,” “center,” “middle,” and the like may be used herein to describe the relationship of one element or feature relative to another element(s), as illustrated in the figures. It will be understood that, in addition to the orientations depicted in the figures, spatial relative terms are intended to cover different orientations of the device during use or operation. For example, if the device in the figures is rotated or flipped, then an element described as being “below,” “under,” or “below” other elements or features will be oriented “above” other elements or features. Thus, the exemplary terms “below” and “below” may cover both above and below orientations. The device may be oriented in other ways (rotated 90 degrees or otherwise) and the spatial relative descriptive terms used herein may be interpreted accordingly. Furthermore, it will be understood that when an element is described as being located “between” two other elements, it may be the only element between the two other elements, or there may be one or more intervening elements.

[0016] Several technical terms are used in this specification. These terms will be used with their general meaning in the art, unless otherwise specifically defined herein or the context in which they are used clearly implies otherwise. It should be noted that element names and symbols are used interchangeably in this document (e.g., Si and silicon); however, they have the same meaning.

[0017] Advances in semiconductor processing technology have enabled the fabrication of complementary metal-oxide-semiconductor devices (such as image sensors, processors, displays, and the like) with increasingly smaller feature sizes, achieving miniaturization of many devices. However, in the case of image sensors, the reduction in image pixel size can lead to a decrease in certain performance metrics. For example, as image pixels become smaller, sensitivity to light can decrease, and as image pixels become physically closer to each other, crosstalk (e.g., electrical, optical, or a combination thereof) between adjacent pixels can increase.

[0018] The embodiments described herein utilize, or otherwise involve, image sensors with corresponding multilayer metal stacks for active pixel areas and black pixel areas to enhance the image sensor's light sensitivity while reducing or mitigating electrical and / or optical crosstalk between adjacent pixels. Specifically, a first multilayer metal stack is used to form a metal mesh structure aligned with the active pixel areas (e.g., for capturing images of an external scene), and a second multilayer metal stack is used to form a light shield aligned with the black pixel areas (e.g., for generating one or more black reference signals). Advantageously, the first and second multilayer metal stacks share a common basis of metal layers to reduce manufacturing steps while still achieving the thickness difference between the first and second multilayer metal stacks. It should be noted that the metal mesh structure and the light shield serve opposite purposes. The metal mesh structure is designed to direct incident light toward the active pixel photodiodes in the active pixel region while mitigating electrical and optical crosstalk between adjacent active pixel photodiodes. The light shield is designed to attenuate or reduce the intensity of light incident on or otherwise directed toward the black pixel photodiodes in the black pixel region (e.g., attenuation of at least -45 dB for light incident on the black pixel region of the image sensor). Therefore, in the embodiments described herein, the respective thicknesses of the first and second multi-metal layer stacks can be adapted to achieve the desired performance of both the metal mesh structure (e.g., lower thickness and width to reduce light absorption and increase the photosensitivity of the active pixel region) and the light shield (e.g., relatively thicker than the metal mesh structure to increase light attenuation or intensity reduction).

[0019] Figure 1AThis illustration shows a top view of an image sensor 100 having a first multilayer metal stack for an active pixel region 110 and a second multilayer metal stack for a black pixel region 130, according to the teachings of this disclosure. As illustrated, the image sensor 100 includes an active pixel region 110, a dummy pixel region 120, a black pixel region 130, a peripheral region 140, a plurality of contact pads 190, and a plurality of through-silicon vias (TSVs) 195. In the illustrated embodiment, the dummy pixel region 120, the black pixel region 130, and the peripheral region 140 all laterally surround the active pixel region 110. The dummy pixel region 120 is disposed between the active pixel region 110 and the black pixel region 130. The black pixel region 130 is disposed between the peripheral region 140 and the dummy pixel region 120. The black pixel region 130 is also disposed between the peripheral region 140 and the active pixel region 110. The plurality of contact pads 190 and the plurality of TSVs 195 are disposed within the peripheral region 140 and are collectively positioned around the black pixel region 130.

[0020] Active pixel region 110 includes a plurality of active pixel photodiodes (see example) Figure 1B Multiple active pixel photodiodes 112 (described herein) are used to generate one or more image signals representing an external scene. For example, in response to incident light on an image sensor, image charge can be collected by individual active pixel photodiodes contained in the active pixel region 110. The image charge can then be read out as an analog signal to generate an image signal converted into a digital signal (e.g., an image signal for a given one or more pixels contained in the active pixel region 110). The black pixel region 130 contains multiple black pixel photodiodes (see example...). Figure 1B The multiple black pixel photodiodes 132 described herein are used to generate one or more black reference signals (e.g., based on the readout of one or more black pixel photodiodes contained in the black pixel region 130). The one or more black reference signals can be used to calibrate (e.g., based on active pixels, based on rows of active pixels, based on columns of active pixels, combinations thereof, or others) one or more image signals generated from the active pixel region 110. It should be understood that due to the presence of dark currents (e.g., noise not caused by absorbed photons) in the active pixels themselves, the CMOS image sensor may contain inaccurate image data, which can cause a raised baseline when generating one or more image signals from the active pixel region 110. To compensate for the dark currents, the one or more black reference signals can be used to correct one or more image signals (e.g., by subtracting one or more black reference signals from one or more image signals).

[0021] In some embodiments, the dummy pixel area 120 may be positioned between the black pixel area 130 and the active pixel area 110, such as... Figure 1A The description is as follows. The dummy pixel area 120 contains multiple dummy pixel photodiodes (see example...). Figure 1BThe multiple dummy pixel photodiodes 122 described herein may correspond to non-imaging photodiodes. Specifically, the dummy pixel region 120 may be disposed between the active pixel region 110 and one or more potential noise sources to the active pixel region 110 (e.g., black pixel region 130, multiple contact pads 190, multiple TSVs 195, other undescribed circuitry or logic or other components of the image sensor 100 that may be disposed within the peripheral region 140). Thus, in some embodiments, the dummy pixel region 120 provides physical separation between the active pixel region 110 and one or more potential noise sources.

[0022] like Figure 1A The description states that the dummy pixel region 120 and the black pixel region 130 are shaped (e.g., based on an arrangement of multiple black pixel photodiodes or dummy pixel photodiodes) to form corresponding closed-loop shapes that laterally surround the active pixel region 110. However, in other embodiments, the dummy pixel region 120 and the black pixel region 130 may have corresponding shapes different from the closed loop (e.g., open-loop shape, rectangular shape, circular shape, or others). Additionally, it should be understood that in some embodiments, the dummy pixel region 120 and the black pixel region 130 may have different shapes or arrangements. For example, the black pixel region 130 does not necessarily surround the active pixel region 110. In one embodiment, the black pixel region 130 may have a rectangular shape aligned with a row or column of active pixel photodiodes included in the active pixel region 110. In some embodiments, the multiple active pixel photodiodes included in the active pixel region 110 are arranged (e.g., in rows and columns) such that the active pixel region 110 has a square or rectangular shape. However, in other embodiments, the active pixel region 110 may have different shapes (e.g., circular, hexagonal, or any other shape).

[0023] Figure 1B Explanation based on the teachings of this disclosure Figure 1AThe image sensor 100 described herein is shown in a cross-sectional view 100-AA' along line A-A'. In the described embodiment, the image sensor 100 includes an active pixel region 110, a dummy pixel region 120, a black pixel region 130, and a peripheral region 140. The image sensor 100 further includes a semiconductor material 101 (e.g., silicon, silicon-germanium alloy, germanium, silicon carbide alloy, indium gallium arsenide alloy, any other alloy formed from group III to V compounds, other semiconductor materials or alloys, combinations thereof, its substrate, its bulk substrate, or its wafer) having a first side 103 (e.g., back side) and a second side 105 (e.g., front side), a plurality of metal layers 107, a plurality of isolation structures 108, a plurality of transistor gates 109, a plurality of active pixel photodiodes 112 (e.g., a first active pixel photodiode 112-1 and a second active pixel photodiode 112-2), and a plurality of dummy pixel photodiodes 112-1 and 120-2, respectively. The device includes a pixel photodiode 122 (e.g., a first dummy pixel photodiode 122-1), a plurality of black pixel photodiodes 132 (e.g., a first black pixel photodiode 132-1 and a second black pixel photodiode 132-2), an anti-reflective layer 150, a buffer oxide layer 152, a first metal layer 154, a second metal layer 156, a third metal layer 158, a buffer layer 172 (e.g., an oxide-based material layer), a plurality of color filters 174 (e.g., a green color filter 174-G, a red color filter 174-R, or any other color filter), a plurality of microlenses 176, and a plurality of contact pads 190.

[0024] Within the active pixel region 110, a first metal layer 154 and a second metal layer 156 form a first multilayer metal stack 160. Within the black pixel region 130, the first metal layer 154, the second metal layer 156, and the third metal layer 158 form a second multilayer metal stack 162 aligned with a plurality of black pixel photodiodes 132 (e.g., a first side 103 of the semiconductor substrate 101 is disposed between the second multilayer metal stack 162 and the plurality of black pixel photodiodes 132), such that the second multilayer metal stack 162 can block or otherwise attenuate light incident on the black pixel region 130 (e.g., prevent light from reaching the plurality of black pixel photodiodes 132).

[0025] In one or more embodiments, the first side 103 may be referred to as the irradiated surface or side of the semiconductor material 101, and the second side 105 may be referred to as the non-irradiated surface or side of the semiconductor material 101. In the illustrated embodiments, an antireflective layer 150 is disposed between the first side 103 of the semiconductor material 101 and a buffer oxide layer 152. In some embodiments, the antireflective layer 150 may comprise tantalum oxide (e.g., Ta₂O₅), hafnium oxide (e.g., HfO₂), aluminum oxide (e.g., Al₂O₃), zirconium oxide (e.g., Zr₂O₃), or combinations thereof. In one or more embodiments, the antireflective layer 150 is at least 50 nm thick. In the same or other embodiments, the antireflective layer 150 is between 50 nm and 100 nm thick. A buffer oxide layer 152 is disposed between the antireflective layer 150 and a second metal layer 156. In some embodiments, the buffer oxide layer 152 comprises a dielectric oxide (e.g., SiO₂) and is at least 100 nm thick. In some embodiments, the buffer oxide layer 152 has a thickness between 100 nm and 130 nm. In one or more embodiments, the buffer oxide layer 152 provides a planarization surface for subsequent processes, such as forming a first multilayer metal stack 160, a second multilayer metal stack 162, and / or multiple color filters 174. Additionally, the buffer oxide layer 152 may also provide protection for underlying layers (e.g., antireflective layer 150, semiconductor material 101, and any other components or materials disposed between the buffer oxide layer 152 and a second side 105 of the semiconductor material 101). It should be understood that the thickness of the buffer oxide layer 152 may be configured or otherwise adapted based on the specific configuration and / or processing requirements of the image sensor 100 (e.g., based on manufacturing nodes or manufacturing requirements, the thickness of previous or subsequent components, or the like). In one embodiment, the buffer oxide layer 152 has a thickness sufficient to buffer mechanical stress induced by the chemical mechanical polishing (CMP) process used for planarization (e.g., the buffer oxide layer 152 may buffer mechanical stress induced by the CMP process and mitigate or otherwise prevent mechanical stress from damaging the antireflective layer 150, the semiconductor material 101, or other components beneath the buffer oxide layer 152). The buffer oxide layer 152 further separates the first multilayer metal stack 160 and the second multilayer metal stack 162 from the semiconductor material 101.

[0026] In some embodiments, the semiconductor material 101 may further comprise one or more layers disposed beneath the buffer oxide layer 152 (e.g., between the buffer oxide layer 152 and the first side 103 of the semiconductor substrate 101). In one embodiment, a surface passivation layer may be disposed between the antireflective layer 152 and the first side 103 of the semiconductor material 101. The surface passivation layer may be formed of a high-k material (e.g., a material having a dielectric constant greater than that of silicon oxide), which provides a fixed negative charge (e.g., hafnium oxide, aluminum oxide, or other passivation oxides) to provide surface passivation of the first side 103 of the semiconductor material.

[0027] exist Figure 1B In the illustrated embodiments, a plurality of isolation structures 108 (e.g., deep trench isolation structures formed of at least one oxide material) are arranged to electrically and optically isolate individual photodiodes (e.g., individual of a plurality of active pixel photodiodes 112, a plurality of dummy pixel photodiodes 122, and / or a plurality of black pixel photodiodes 132) from each other. As illustrated, individual isolation structures included in the plurality of isolation structures 108 may extend from a first side 103 toward a second side 105 of the semiconductor material 101. In some embodiments, the plurality of isolation structures 108 may be formed by filling trenches formed in the semiconductor material 101 with one or more dielectric materials (e.g., oxide materials, low-n materials, different dielectric materials, or combinations thereof). In some embodiments, the plurality of isolation structures 108 may be formed by filling trenches with a combination of one or more dielectric materials and metallic materials (e.g., sequentially or simultaneously). The trenches may be formed prior to the formation of the antireflective layer 150, the buffer oxide layer 152, and any intermediate layers between the antireflective layer 150 and the buffer oxide layer 152. In optional or alternative embodiments, the trench may be formed prior to the formation of the antireflective layer 150, the buffer oxide layer 152, and any intermediate layer between the antireflective layer 150 and the buffer oxide layer 152, such that the isolation structure itself (see, for example, isolation structure 108-O) is formed by the antireflective layer 150, the buffer oxide layer 152, and any intermediate layer between the antireflective layer 150 and the buffer oxide layer 152, resulting in the antireflective layer 150, the buffer oxide layer 152, and any intermediate layer extending into the trench and collectively and continuously lining the sidewalls of the trench. It should be understood that in some embodiments, at least one and / or all of the plurality of isolation structures 108 in the active pixel region 110, the dummy pixel region 120, and / or the black pixel region 130 may have a structure similar to that of isolation structure 108-O. It should be further understood that, in some embodiments, an intermediate layer (e.g., a surface passivation layer disposed between the antireflective layer 150 and the buffer oxide layer 152) may also be lined or otherwise included in the plurality of isolation structures 108 to induce a cavity accumulation region surrounding the buffer oxide layer 152 disposed in the trench (e.g., a portion of the buffer oxide layer 152 formed or otherwise included in the plurality of isolation structures 108) to passivate surface defects and trench sidewall defects that may occur during manufacturing (e.g., reduce or otherwise mitigate material-induced stress or etch damage).

[0028] A first metal layer 154 is disposed between second metal layers 156. In one embodiment, the first metal layer 154 comprises a first metal corresponding to a thickness greater than 20 nm (e.g., 30 nm, 40 nm, 50 nm). In the same or other embodiments, the thickness of the first metal layer 154 is greater than that of at least one individual layer contained in the second metal layers 156. In some embodiments, at least one of the second metal layers 156 has a thickness less than 30 nm (e.g., 25 nm, 20 nm, 15 nm) and comprises a second metal corresponding to titanium nitride or titanium. As illustrated, the second metal layer 156 is disposed between a first side 103 of the semiconductor material 101 and a buffer layer 172. In one embodiment, a third metal layer 158 has a thickness of at least 50 nm or greater and comprises a third metal corresponding to tungsten or aluminum. In some embodiments, the third metal layer 158 has a thickness substantially similar to (e.g., differing by within 10%) that of the first metal layer 154. In some embodiments, the thickness of the third metal layer 158 is greater than that of the first metal layer 154. In some embodiments, a buffer layer 172 is disposed between the plurality of microlenses 176 and the first metal layer 154. In one embodiment, the buffer layer 172 is a transparent dielectric layer and comprises an oxide-based material (e.g., SiO2) or a low-n material having a refractive index less than the corresponding refractive index of the semiconductor material 101, the plurality of color filters 174, and / or the plurality of microlenses 176. In some embodiments, at least a portion of the buffer layer 172 has a thickness greater than 100 nm (e.g., 110 nm, 125 nm, 150 nm).

[0029] Figure 2A This description illustrates an example of multilayer metal stacks 260 and 262 used to form the metal mesh structure 241 and the light shield 251 of the image sensor 200-A, according to the teachings of this disclosure. The image sensor 200-A, components included in the image sensor 200-A, and... Figure 2A The corresponding arrangement of the components described in the text can be found in Figure 1A This is implemented in the image sensor 100 illustrated in Figure 1B. Therefore, it should be understood that similar marking features may share similar or identical attributes (e.g., composition, relative arrangement with other components, shape, function, or similar thereof). For example, image sensor 200-A includes semiconductor material 201, which may be identical or similar to the teachings of this disclosure. Figure 1A and Figure 1B Semiconductor material 101 is described herein. Furthermore, it should be understood that, for clarity, Figure 2A Some components (such as color filters, microlenses, isolation structures, contact pads or the like) may be omitted.

[0030] Return to reference Figure 2AThe image sensor 200-A includes a semiconductor material 201 comprising a first side 203 and a second side 205, a plurality of active pixel photodiodes 212 (e.g., active pixel photodiodes 212-1 disposed in the semiconductor material 201 between the first side 203 and the second side 205) contained in the active pixel array region 211, a plurality of dummy pixel photodiodes 222 (e.g., dummy pixel photodiodes 222-1 disposed in the dummy pixel array region 221 of the semiconductor material 201 between the first side 203 and the second side 205), a plurality of black pixel photodiodes 232 (e.g., black pixel photodiodes 232-1 disposed in the semiconductor material 201 between the first side 203 and the second side 205) contained in the black pixel array region 231, an anti-reflection layer 250, a buffer oxide layer 252, a first metal layer 254, a second metal layer 256, a third metal layer 258, and a buffer layer 272. Within the active pixel region 210, a first metal layer 254 and a second metal layer 256 form a first multilayer metal stack 260. Within the black pixel region 230, the first metal layer 254, the second metal layer 256, and the third metal layer 258 form a second multilayer metal stack 262 aligned with a plurality of black pixel photodiodes 232 (e.g., a first side 203 of the semiconductor substrate 201 is disposed between the second multilayer metal stack 262 and the plurality of black pixel photodiodes 232), such that the second multilayer metal stack 262 can block or otherwise attenuate light incident on the black pixel region 230 (e.g., prevent light from reaching the plurality of black pixel photodiodes 232).

[0031] The first side 203 can be referred to as the illumination side of the image sensor 200-A, and the second side 205 can be referred to as the non-illumination side of the image sensor 200-A.

[0032] As described, the active pixel array region 211 includes a plurality of active pixel photodiodes 212 (e.g., active pixel photodiodes 212-1 and 212-2), which can be arranged in a row and column array to at least partially form the active pixel region 210 of the image sensor 200-A. The dummy pixel array region 221 includes a plurality of dummy pixel photodiodes (e.g., dummy pixel 222-1), which are non-imaging photodiodes and at least partially form the dummy pixel region 220 of the image sensor 200-A. The black pixel array region 231 includes a plurality of black pixel photodiodes 232 (e.g., black pixel photodiodes 232-1 and 232-2), which can be arranged in a row and column array to at least partially form the black pixel region 230 of the image sensor 200-A.

[0033] The metal mesh structure 241 is positioned within the active pixel region 210 of the image sensor 200-A, and more specifically, is disposed close to the first side 203 of the semiconductor material 201. The metal mesh structure 241 includes a plurality of pillars 214 (e.g., pillars 214-1, 214-2, and 214-3) arranged to form a plurality of apertures 213 (e.g., apertures 213-1 and 213-2), each aperture being optically aligned with an underlying active pixel photodiode (e.g., active pixel photodiodes 212-1, 212-2, and the like) contained in the active pixel array region 211. For example, pillars 214-1 and 214-2 are physically separated from each other to at least partially form aperture 213-1, which is optically aligned with the underlying active pixel photodiode 212-1. Incident light parallel to the plane of the page will propagate through aperture 213-1 and be incident on and guided to the active pixel photodiode 212-1. However, incident light tilted towards pillars 214-1 and 214-2 will be blocked by pillars 214-1 and 214-2 through absorption and / or reflection before reaching the adjacent active pixel photodiode 212-1. In other words, the plurality of pillars 214 of the metal mesh structure 241 are structured and arranged to form light guides (e.g., corresponding to the plurality of apertures 213), which guide incident light to the corresponding underlying active pixel photodiode contained in the plurality of active pixel photodiodes 212 through reflection and / or refraction. In some embodiments, each of the plurality of color filters (e.g., color filters 174-G, 174-R) is disposed in a corresponding aperture 213-1 and 213-2 included in the plurality of apertures 213 and on a buffer oxide layer 252 aligned with the underlying active pixel photodiode. In some embodiments, the plurality of apertures 213 may be physically centered on their counterparts among the plurality of active pixel photodiodes 212. It should be understood that embodiments of the illustrated image sensor 200-A do not include areas (e.g., corresponding to the plurality of apertures 213) filled between the plurality of pillars 214 (e.g., as shown in the image sensor 200-A). Figure 1B The color filters (described in the text) have been omitted for clarity. However, in some embodiments, the area between the plurality of pillars 214 may be filled with color filters with different light responses (e.g., red, green, blue, yellow, cyan, magenta, yellow, black, infrared or other color filters).

[0034] In the illustrated embodiment, each of the plurality of pillars 214 of the metal mesh structure 241 includes a first multilayer metal stack 260 and a buffer layer 272. The first multilayer metal stack 260 includes a first metal layer 254 and a second metal layer 256. As illustrated, the first metal layer 254 is sandwiched (e.g., disposed) between the second metal layers 256, wherein one of the second metal layers 256 is between the first metal layer 254 and the buffer layer 272, and another of the second metal layers 256 is between the first metal layer 254 and the buffer oxide layer 252. In some embodiments, individual of the second metal layers 256 between the first metal layer 254 and the buffer oxide layer 252 may serve as a diffusion barrier layer to prevent metal from diffusing from the first metal layer 254 into the semiconductor material 201. In the same or other embodiments, the second metal layer 256 may further serve as an adhesive layer to increase the adhesion between the first metal layer 254 and the buffer oxide layer 252 and / or increase the adhesion between the first metal layer 254 and the buffer layer 272. In some embodiments, the first metal layer 254 may be formed of a first metal (e.g., tungsten or aluminum) and the second metal layer 256 may be formed of a second metal different from the first metal (e.g., titanium nitride or titanium). In other words, the metal mesh structure 241 includes a first multilayer metal stack 260, which includes the first metal and the second metal. In the same or other embodiments, the second metal included in the second metal layer 256 may be a metal alloy composed of at least a metallic material and a non-metallic material (e.g., titanium nitride).

[0035] A light shield 251 is positioned within the black pixel region 230 of the image sensor 200-A, and more specifically, is disposed near the first side 203 of the semiconductor material 201. In some embodiments, the light shield 251 covers the black pixel region 230. The light shield 251 includes a second multilayer metal stack 262 and a buffer layer 272. Figure 2AThe description states that the light shield is optically aligned with a plurality of black pixel photodiodes 232 contained in the black pixel array region 231, such that the first side 203 of the semiconductor material 201 is disposed between the light shield 251 and the plurality of black pixel photodiodes 232 (e.g., black pixel photodiode 232-1). The second multilayer metal stack 262 includes a first metal layer 254, a second metal layer 256, and a third metal layer 258. As described, the first metal layer 254 is sandwiched between the second metal layers 256. The first metal layer 254 is also disposed between the third metal layer 258 and the plurality of black pixel photodiodes 232. It should be understood that one of the second metal layers 256 is disposed between the first metal layer 254 and the third metal layer 258, and the other of the second metal layers 256 is disposed between the first metal layer 254 and the buffer oxide layer 252. In the same or other embodiments, some of the second metal layers 256 may be used as adhesive layers to increase the adhesion between the first metal layer 254 and the buffer oxide layer 252 and / or to increase the adhesion between the first metal layer 254 and the third metal layer 258. As previously discussed, the first metal layer 254 may comprise a first metal (e.g., tungsten or aluminum) and the second metal layer 256 may comprise a second metal (e.g., titanium nitride or titanium).

[0036] It should be understood that both the first multilayer metal stack 260 of the metal mesh structure 241 and the second multilayer metal stack 262 of the light shield 251 comprise a first metal layer 254 and a second metal layer 256. This is because, in the illustrated embodiment, the first multilayer metal stack 260 and the second multilayer metal stack 262 share common processing steps, but differ in location (i.e., the first region of the first metal layer 254 and the second metal layer 256 located in the active pixel region 210 is used to form the metal mesh structure 241, and the second region of the first metal layer 254 and the second metal layer 256 located in the black pixel region 230 is used to form the light shield 251). Therefore, as indicated by the shared name and reference numerals, the composition and thickness of the first metal layer 254 and the second metal layer 256 are substantially equal throughout the image sensor 200-A (e.g., the regions of the first metal layer 254 of both the metal mesh structure 241 and the light shield 251 have the same composition and approximately the same thickness). However, it should be understood that due to manufacturing differences, the second metal layer 256 above the active pixel region 210 may have a slight thickness difference (e.g., within 10%) than the second metal layer 256 above the black pixel region 230 (see example). Figure 3C The distal second metal layer in the second metal layer 356 above the active pixel area may be slightly etched relative to the distal second metal layer in the second metal layer 356 above the black pixel area.

[0037] One difference between the first multilayer metal stack 260 of the metal mesh structure 241 and the second multilayer metal stack 262 of the light shield 251 is that the second multilayer metal stack 262 includes a third metal layer 258, which is not included in the first multilayer metal stack 260. In some embodiments, the third metal layer 258 may include a first metal that is also included in the first metal layer 254. In one embodiment, the third metal layer 258 has a composition equivalent to the corresponding composition of the first metal layer 254. In other embodiments, the third metal of the third metal layer 258 may be different from the first metal included in the first metal layer 254 and the second metal included in the second metal layer 256. In the same or other embodiments, the first metal may be tungsten and the third metal may be aluminum (or vice versa).

[0038] Another difference between the first multilayer metal stack 260 and the second multilayer metal stack 262 is the total number of metal layers. In some embodiments, the first multilayer metal stack 260 contains N metal layers, where N corresponds to any integer greater than or equal to 2. In the same embodiment, the second multilayer metal stack 262 contains at least N+1 metal layers. In other words, in some embodiments, the second multilayer metal stack 262 has one or more metal layers than the first multilayer metal stack 260. This difference in the number of layers (and therefore thickness) results in a first thickness 261 of the first multilayer metal stack 260 being less than a second thickness 263 of the second multilayer metal stack 262. Therefore, the metal mesh structure 241 and the light shield 251 can be independently tuned to enhance their respective functions. For example, the first multilayer metal stack 260 can be made thinner to enhance the sensitivity of the underlying active pixel photodiodes included in the plurality of active pixel photodiodes 212, and the second multilayer metal stack 262 can be made thicker to improve the attenuation of incident light provided by the light shield 251. Another difference between the first multilayer metal stack 260 and the second multilayer metal stack 262 is the structure. As described above, the first multilayer metal stack 260 is structured to form a plurality of apertures 213 and the first multilayer metal stack 260 does not extend discontinuously over the active pixel region 210 (e.g., the first multilayer metal stack 260 forms a plurality of pillars 214 instead of extending continuously throughout the active pixel array region 211), while the second multilayer metal stack 262 extends continuously throughout the black pixel array region 231. It should be understood that the terms "multilayer metal stack" and "N metal layers" refer to the metal layers disposed near the first side 203 of the semiconductor substrate and used to form the metal mesh structure 241 and the light shield 251. For clarity, the terms "multilayer metal stack," "N metal layers," and the associated individual metal layers are different from and separate from the components formed during the metallization process, wherein wiring layers, metal interconnects, contacts, and the like are formed near the second side 205 of the semiconductor material 201 (see, for example...). Figure 1BIt displays multiple metal layers 107 that are clearly separated from the first multilayer metal stack 160 and the second multilayer metal stack 162.

[0039] Image sensor 200-A further includes a dummy pixel array region 221, which includes a plurality of dummy pixel photodiodes 222 (e.g., dummy pixel photodiode 222-1). As illustrated, the plurality of dummy pixel photodiodes 222 are laterally disposed between a plurality of active pixel photodiodes 212 and a plurality of black pixel photodiodes 232 (e.g., dummy pixel photodiode 222-1 is disposed within semiconductor material 201 between active pixel photodiode 212-1 and black pixel photodiode 232-1). Image sensor 200-A also includes a buffer layer 272. In some embodiments, the buffer layer 272 is a transparent dielectric layer comprising at least one of an oxide-based material, a metal oxide, or a low-n material. Low-n materials are defined as having a lower frequency response than the number of wavelengths formed in the visible frequency range (e.g., for one or more wavelengths between 380 nm and 750 nm) than the number of wavelengths formed in the formation of a plurality of color filters ( Figure 2A It is not stated in the text, but Figure 1A The buffer layer 272 is any material with a refractive index corresponding to the color filter material and / or semiconductor material 201 shown in the diagram. As illustrated, the buffer layer 272 has a varying thickness to compensate for the thickness difference between the first multilayer metal stack 260 of the metal mesh structure 241 and the second multilayer metal stack 262 of the light shield 251. The first multilayer metal stack 260 and the second multilayer metal stack 262 are each disposed between the buffer layer 272 and the first side 203 of the semiconductor material 201. The varying thickness allows the distal end 274 of the buffer layer 272 to be parallel to the first side 203 of the semiconductor material 201 for subsequent processing (e.g., color filter array formation, microlens array formation, formation of peripheral elements, such as through-silicon vias, contact pads, or components or elements). For the active pixel region 210, the buffer layer 272 includes a first portion 289 (e.g., a portion of the buffer layer 272 for any of the plurality of pillars 214). The first multilayer metal stack 260 is disposed between the first portion 289 of the buffer layer 272 and the first side 203 of the semiconductor material 201.

[0040] For the black pixel region 230, the buffer layer 272 includes a second portion 291 (e.g., a portion of the buffer layer 272 within the black pixel region 230). A second multilayer metal stack 262 is disposed between the second portion 291 of the buffer layer 272 and a plurality of black pixel photodiodes 232 (e.g., black pixel photodiode 232-1). As illustrated, the first buffer layer thickness 273 of the first portion 289 of the buffer layer 272 is greater than the second buffer layer thickness 285 of the second portion 291 of the buffer layer 272.

[0041] For the dummy pixel region 220, the buffer layer 272 includes a third portion 293 (e.g., a portion of the buffer layer 272 within the dummy pixel array region 220). The third portion 293 of the buffer layer 272 is aligned with a plurality of dummy photodiodes 222 (e.g., dummy photodiode 222-1) such that a first side 203 of the semiconductor material 201 is disposed between the third portion 293 of the buffer layer 272 and the plurality of dummy photodiodes 222 (e.g., dummy photodiode 222-1). As explained, the third buffer layer thickness 287 of the third portion 293 of the buffer layer 272 is equal to the first buffer layer thickness 273 of the first portion 289 of the buffer layer 272.

[0042] In some embodiments, the first metal layer thickness 271 of the first metal layer 254 is greater than the second metal layer thickness 281 of any of the second metal layers 256. In some embodiments, the first metal layer thickness 271 is at least 10 nm thick (e.g., 10 nm, 20 nm, 30 nm, 50 nm, etc.). In the same or other embodiments, the second metal layer thickness 281 is greater than 0 to 30 nm or less (e.g., 25 nm, 20 nm, 10 nm, etc.). In some embodiments, the first metal layer thickness 271 is configured based on the desired or target quantum efficiency of the plurality of active pixel photodiodes 212 in the active pixel region 210. In some embodiments, the combined thickness of the first metal layer 254 and the second metal layer 256 (e.g., the first thickness 261 of the first multilayer metal stack 260) is between 30 nm and 80 nm. In the same or other embodiments, the first thickness 261 may be less than or equal to 100 nm. In one embodiment, the third metal layer thickness 283 of the third metal layer 258 is at least 50 nm (e.g., 50 nm, 80 nm, 100 nm, etc.). In some embodiments, the combined thickness of the first metal layer 254, the second metal layer 256, and the third metal layer 258 (e.g., the second thickness 263 of the second multilayer metal stack 262) is at least 100 nm (e.g., 100 nm, 150 nm, 200 nm, etc.). In one embodiment, the thickness 283 of the third metal layer is greater than or equal to the thickness 271 of the first metal layer. In some embodiments, the thickness 271 of the first metal layer and / or the thickness 283 of the third metal layer is at least three times the thickness 281 of the second metal layer. In some embodiments, the thickness 283 of the third metal layer is configured based on the desired or target light suppression level or attenuation level of light incident on the black pixel area 230. In one embodiment, the first metal of the first metal layer 254 and / or the third metal of the third metal layer 258 is tungsten, and the second metal of the second metal layer 256 is titanium nitride. In this embodiment, the thickness 271 of the first metal layer and / or the thickness 283 of the third metal layer may be at least five times the thickness 281 of the second metal layer. In some embodiments, individual pillars among the plurality of pillars 214 are thicker than 150 nm (e.g., 150 nm, 175 nm, 200 nm, 250 nm, 300 nm, 325 nm, 350 nm, 400 nm, etc.). In the same or other embodiments, the pillar width of individual pillars included in the plurality of pillars 214 (e.g., orthogonal to the first thickness 261) is greater than 0 but less than or equal to 80 nm (e.g., 80 nm, 60 nm, 40 nm, etc.).

[0043] Figure 2B This description illustrates examples of multilayer metal stacks 260-B and 262-B used to form the metal mesh structure 241 and the light shield 251 of the image sensor 200-B according to the teachings of this disclosure. The image sensor 200-B, components included in the image sensor 200-B, and... Figure 2BThe corresponding arrangement of the components described in the text can be found in Figure 1A This is implemented in the image sensor 100 illustrated in Figure 1B. Therefore, it should be understood that similar marking features may share similar or identical attributes (e.g., composition, relative arrangement with other components, shape, function, or similar thereof). For example, image sensor 200-B includes semiconductor material 201, which may be identical or similar to the teachings of this disclosure. Figure 1A and Figure 1B Semiconductor material 101 is described herein. Furthermore, it should be understood that, for clarity, Figure 2B Some components (such as color filters, microlenses, isolation structures or the like) may be omitted.

[0044] Further understanding is needed. Figure 2B The 200-B image sensor is similar in many ways to Figure 2A The image sensor in it is 200-A. Actually, Figure 2B Many similar marker features can be identical to Figure 2A The corresponding features include (but are not limited to) composition, geometry, arrangement, and similar characteristics. Return to reference. Figure 2B One difference is the total number of metal layers within the first multilayer metal stack 260-B and the second multilayer metal stack 262-B. For example, an additional second metal layer is included in the second metal layer 256 (e.g., a separate second metal layer disposed between the first metal layer 254 and the intermediate layer 259, or a separate second metal layer disposed between the intermediate layer 259 and the third metal layer 258) and also includes the intermediate layer 259. In other words, a pair of adjacent metal layers (i.e., one of the second metal layers included in the second metal layer 256 and one intermediate layer 259) has been relative to... Figure 2AThe corresponding multilayer metal stacks (e.g., 260 and 262) described herein are included in both the first multilayer metal stack 260-B and the second multilayer metal stack 262-B. Accordingly, it should be understood that the thickness (e.g., the first thickness 261-B of the first multilayer metal stack 260-B and the second thickness 263-B of the second multilayer metal stack 262-B) can be tuned by including one or more examples of adjacent metal layer pairs such that N metal layers are included in the first multilayer metal stack 260-B and N+1 metal layers are included in the second multilayer metal stack 262-B. It should be understood that the intermediate thickness 284 of the intermediate layer 259 does not necessarily need to be the same as the other layers included in the first multilayer metal stack 260-A and / or the second multilayer metal stack 262-B. Similarly, individual layers of the second metal layer 256 do not necessarily need to have the same thickness. It should be understood that, in some embodiments, the first metal layer thickness 271 of the first metal layer 254, the intermediate thickness 284 of the intermediate layer 259, the thickness of each additional layer included in the second metal layer 256, and the third metal layer thickness 283 of the third metal layer 258 can each be independently tuned to achieve the target thicknesses of the first thickness 261-B of the first multilayer metal stack 260-B and / or the second thickness 263-B of the second multilayer metal stack 262-B.

[0045] Figures 3A to 3J This description illustrates the sequential process for manufacturing an image sensor with corresponding multilayer metal stacks for active pixel areas and black pixel areas, according to the teachings of this disclosure. It should be understood that the left and right sides (separated by ellipses) respectively contain the black pixel areas and active pixel areas of the manufactured image sensor. Figures 3A to 3J The described process can be used for manufacturing Figures 1A to 1B The image sensor 100 described in the document Figure 2A The image sensor 200-A described in the document and Figure 2B One feasible embodiment of the image sensor 200-B described herein. Therefore, it should be understood that similar marker features may share similar or identical attributes (e.g., composition, relative arrangement with other components, shape, function, or similar thereof). For example, Figures 3A to 3J The process described herein includes semiconductor material 301, which may be the same as or similar to the teachings of this disclosure. Figures 2A to 2B Semiconductor material 201 described in the document and Figures 1A to 1B Semiconductor material 101 is described in Figure 3. Additionally, it should be understood that, for clarity and / or simplicity, certain components (e.g., color filters, microlenses, anti-reflective layers, dummy pixel photodiodes, or the like) may be omitted from Figure 3. Figures 3A to 3JThe process described herein includes, in one or more of the aforementioned figures, a semiconductor material 301 having a first side 303 and a second side 305 opposite to the first side, an active pixel array region 311 (e.g., including a plurality of active pixel photodiodes), a black pixel array region 331 (e.g., including a plurality of black pixel photodiodes), a buffer oxide layer 350, a first metal layer 354, a second metal layer 356, a third metal layer 358, a first photoresist 337, a first multilayer metal stack 360, a second multilayer metal stack 362, a buffer layer 372, a second photoresist having a first pattern 339-1, a second photoresist having a second pattern 339-2, a metal mesh structure 341, and a light shield 351.

[0046] Figure 3A The description provides a semiconductor material 301 having a first side 303 (or an illumination side) and a second side 305 opposite to the first side 303. The semiconductor material 301 includes active pixel photodiodes (e.g., included in an active pixel array region 311) and black pixel photodiodes (e.g., included in a black pixel array region 331), each disposed in the semiconductor material 301, for example, by ion implantation. Each of the active pixel photodiodes and black pixel photodiodes may be a pinned photodiode, a non-pinned photodiode, or a partially pinned photodiode. The semiconductor material 301 may further have an oxide-based dielectric material deposited on the first side 303, followed by a planarization process to form a buffer oxide layer 350 having a planarized top surface. Although not described, in some embodiments and prior to the formation of the buffer oxide layer 350, a plurality of isolation trenches may be formed in the semiconductor material 301 to surround each individual active pixel photodiode included in the active pixel array region 311 and each individual black pixel photodiode included in the black pixel array region 331. The anti-reflective layer and any intermediate layer between the anti-reflective layer and the buffer oxide layer 350 may be deposited on the first side 303 of the semiconductor material 301 and deposited into a plurality of isolation trenches to line or otherwise coat the bottom surface and sidewalls of the plurality of isolation trenches (e.g., by chemical vapor deposition). In the same or other embodiments, the plurality of isolation trenches may then be filled with one or more dielectric materials (e.g., oxide-based materials, low-n materials, other dielectric materials, or combinations thereof) to form a plurality of isolation structures (e.g., Figure 1B The isolation structures 108 and / or 108-O described herein are used to electrically and / or optically isolate individual photodiodes (e.g., individual active pixel photodiodes, individual black pixel photodiodes, and / or individual dummy photodiodes) from each other. In one embodiment, the deposition of an oxide-based dielectric material for forming the buffer oxide layer 350 may include depositing one or more oxide-based dielectric materials into multiple isolation trenches to form multiple isolation structures.

[0047] Figure 3B exist Figure 3A Subsequently, a metal layer is deposited on the buffer oxide layer 350 near the first side 303 onto the semiconductor material 301 to form a first metal layer 354, a second metal layer 356 sandwiching the first metal layer 354, and a third metal layer 358. In some embodiments, the first metal layer 354, the second metal layer 356, and the third metal layer 358 respectively comprise a first metal (e.g., tungsten or aluminum), a second metal (e.g., titanium nitride or titanium), and a third metal (e.g., tungsten or aluminum). Figure 3B As explained, the first metal layer 354 is disposed between the third metal layer 358 and the first side 303 of the semiconductor material 301.

[0048] Figure 3C Can follow Figure 3B The process then describes the deposition of photoresist 337 to selectively cover portions of the metal layer (e.g., the first metal layer 354, the second metal layer 356, and the third metal layer 358) adjacent to or otherwise aligned with the black pixel array region 331. Specifically, the photoresist 337 is patterned to prevent the underlying metal layer from being etched in subsequent steps. In some embodiments, the process for forming an intermediate layer and an additional second metal layer 356 sandwiched between one of the intermediate layers and the first metal layer 354 may be performed within the intermediate layer. Figure 3B and Figure 3C Execute between to form Figure 2B The first multilayer metal stack and the second multilayer metal stack, wherein the deposition thickness of the first metal layer, the intermediate layer, the third metal layer and each second metal layer can be individually tuned.

[0049] Figure 3D exist Figure 3CThe active pixel portion of the etched metal layer is then shown to selectively remove the third metal layer 358 disposed near the active pixel photodiode (i.e., active pixel array region 311) to form a first multilayer metal stack 360. The unetched portion of the metal layer corresponds to a second multilayer metal stack 362. Advantageously, the second metal layer in the second metal layer 356 in the active pixel region, away from the first side 303 of the semiconductor material 301, acts as an etch stop layer to prevent the deposited metal layer, which is not protected by the photoresist 337, from being completely etched away (e.g., the first metal layer 354 and the second metal layer 356 near the active pixel array region 311 are retained after etching). This is at least partially achieved by selecting an etch process that etches the third metal layer 358 (e.g., the third metal) at a rate different from that of the second metal layer 356 (e.g., the second metal) so that the second metal layer 356 can be used as an etch stop layer. Therefore, the second metal layer 356 serves as an adhesion promoter (e.g., promoting adhesion between the third metal layer 358 and the first metal layer 354 and / or promoting adhesion between the first metal layer 354 and the buffer oxide layer 350) and an etch stop layer (e.g., protecting the first metal layer 354 from...). Figure 3D (The etching process described herein is protected from etching).

[0050] Figure 3E exist Figure 3D Next, it is explained that photoresist 337 is removed from the top of the third metal layer 358 near the black pixel array region 331. Photoresist 337 can be removed by chemical cleaning (e.g., one or more solvents capable of dissolving patterned or crosslinked photoresist 337).

[0051] Figure 3F exist Figure 3E Then, a buffer layer 372 is deposited on at least the active pixel portions and the unetched portions of the metal layers corresponding to the first multilayer metal stack 360 and the second multilayer metal stack 362, respectively. The first multilayer metal stack 360 and the second multilayer metal stack 362 are disposed between the buffer layer 372 and the first side 303 of the semiconductor material 301.

[0052] Figure 3G exist Figure 3F The planarization buffer layer 372 is then shown such that a first portion 389 of the buffer layer 372 has a first buffer layer thickness 373 that is greater than a second buffer layer thickness 385 of a second portion 391 of the buffer layer 372. In the illustrated embodiment, a first multilayer metal stack 360 is disposed between the first portion 389 of the buffer layer 372 and a first side 303 of the semiconductor material 301. A second multilayer metal stack 362 is disposed between the second portion 391 of the buffer layer 372 and a black pixel photodiode (e.g., a black pixel array region 331).

[0053] Figure 3H exist Figure 3G The following describes the deposition of a second photoresist having a first pattern 339-1 and a second pattern 339-2. The first pattern 339-1 of the photoresist is used to form a metal mesh structure 341 (see example). Figure 3J Multiple columns 314 (see example) Figure 3I Specifically, the first pattern 339-1 of the second photoresist protects the underlying buffer layer 372 and a portion of the first multilayer metal stack 360. The second pattern 339-2 of the second photoresist is structured to protect the buffer layer 372 adjacent to the black pixel array region 331 (and the dummy pixel array region adjacent to the black pixel array region, which is not described but can be seen in...). Figure 1B , Figure 2A and Figure 2B middle).

[0054] Figure 3I exist Figure 3H Subsequently, a selectively etched buffer layer 372 and a first multilayer metal stack 360 are shown to form a plurality of apertures 313 (e.g., apertures 313-1 and 313-2) aligned with the active pixel photodiodes that at least partially define the metal mesh structure 341. In some embodiments, portions of the buffer layer 372 associated with the plurality of pillars 314 serve as light guides, which have been self-aligned with a second photoresist having a first pattern 339-1. The light guides help mitigate electrical and optical crosstalk between adjacent active pixel photodiodes contained in the active pixel array region 311.

[0055] Figure 3J exist Figure 3I The process then describes the removal of a second photoresist having a first pattern 339-1 and a second pattern 339-2 to form a metal mesh structure 341 and a light shield 351. In some embodiments, after removing the second photoresist (e.g., the first pattern 339-1 and the second pattern 339-2), additional steps may be performed, such as selectively backfilling multiple apertures 313 with a color filter to form a color filter pattern (e.g., RGB, RGGB, RCCB, RGB-IR, Quad Bayer, CYMK, or any other color filter pattern), forming multiple microlenses, or other process steps.

[0056] It should be understood that, by Figures 3A to 3JThe various process steps described can be implemented or otherwise performed using existing CMOS manufacturing techniques, such as (but not limited to) photolithography (e.g., defining or otherwise patterning a first photoresist 337, a second photoresist having a first pattern 339-1, and a second photoresist 339-2), metal deposition techniques (e.g., atomic layer deposition, physical vapor deposition, thermal evaporation, magnetron sputtering, or the like to deposit a first metal layer 354, a second metal layer 356, a third metal layer 358, a buffer oxide layer 350, a buffer layer 372, or the like), etching techniques (e.g., dry etching techniques (e.g., plasma etching), wet etching techniques (e.g., chemical etching), or others to etch various components, such as the first metal layer 354, the second metal layer 356, the third metal layer 358, the buffer oxide layer 350, the buffer layer 372, or the like), and planarization techniques (e.g., chemical mechanical polishing or planarization to planarize the buffer layer 272).

[0057] Figure 4 This is a functional block diagram of an imaging system 402 including an image sensor 400 having multiple layers of metal stacked, according to the teachings of this disclosure. The image sensor 400 may have corresponding... Figures 1A to 1B The image sensor 100 described in the document Figure 2A The image sensor 200-A and / or described herein Figure 2B The structure of image sensor 200-B is described in the diagram. Image sensor 400 can be... Figures 3A to 3J The imaging system 402 is manufactured using the process described herein. It includes an image sensor 400 that generates an electrical or image signal in response to incident light 470, an objective lens 465 with adjustable optical power to focus on one or more points of interest within an external scene 403, and a controller 450 that controls the operation of the image sensor 400 and the objective lens 465. The image sensor 400 is... Figures 1A to 1B The image sensor 100 described in the document Figure 2A The image sensor 200-A and / or described herein Figure 2B The image sensor 200-B described herein is a feasible embodiment. The image sensor 400 is a simplified schematic diagram showing a semiconductor material 401 and a plurality of photodiodes 405, a plurality of color filters 410, and a plurality of microlenses 415 disposed within corresponding portions of the semiconductor material 401. The controller 450 includes one or more processors 452, a memory 454, a control circuit system 456, a readout circuit system 458, and functional logic 460.

[0058] Controller 450 includes logic and / or circuitry to control the operation of various components of imaging system 402 (e.g., before, after, and during in-situ image and / or video acquisition phases). Controller 450 may be implemented as hardware logic (e.g., application-specific integrated circuit, field-programmable gate array, system-on-a-chip, etc.), software / firmware logic executing on a general-purpose microcontroller or microprocessor, or a combination of both. In one embodiment, controller 450 includes processor 452 coupled to memory 454, which stores instructions executed by controller 450 and / or one or more other components of imaging system 402. When executed, the instructions may cause imaging system 402 to perform operations associated with various functional modules, logic blocks, or circuitry of imaging system 402, including any or a combination of: control circuitry 456, readout circuitry 458, functional logic 460, image sensor 400, objective lens 465, and any other elements of imaging system 402 (described or otherwise). The memory is a non-transitory computer-readable medium that may contain (but is not limited to) volatile (e.g., RAM) or non-volatile (e.g., ROM) storage systems that can be read by the controller 450. It should further be understood that the controller 450 may be a monolithic integrated circuit, one or more discrete interconnected electrical components, or a combination thereof. Additionally, in some embodiments, one or more electrical components may be coupled together to collectively serve as the controller 450 for orchestrating the operation of the imaging system 402.

[0059] Control circuitry 456 controls the operating characteristics of photodiode array 405 (e.g., exposure duration, when to capture digital images or video, and the like). Readout circuitry 458 reads or samples analog signals from individual photodiodes (e.g., reads electrical signals generated by each of the plurality of photodiodes 405 in response to incident light to generate image signals for capturing image frames, etc.) and may include amplification circuitry, analog-to-digital (ADC) circuitry, image buffers, or others. In the illustrated embodiment, readout circuitry 458 is included in controller 450, but in other embodiments, readout circuitry 458 may be decoupled from controller 450. Functional logic 460 is coupled to readout circuitry 458 to receive image data to demosaic the image data and generate one or more image frames. In some embodiments, electrical signals and / or image data may be manipulated or otherwise processed by functional logic 460 (e.g., applying post-image effects such as cropping, rotation, red-eye removal, brightness adjustment, contrast adjustment, or other post-image effects).

[0060] The process explained above can be implemented using software and / or hardware. The described techniques can constitute machine-executable instructions embodied in a tangible or non-transitory machine-readable storage medium, which, when executed by a machine (e.g., a computer)... Figure 4When the controller 450 is executed, it will cause the machine to perform the described operation. Alternatively, the process may be embodied in hardware, such as an application-specific integrated circuit (“ASIC”), a field-programmable gate array (FPGA), or others.

[0061] Tangible machine-readable storage media includes any means that provides (i.e., stores) information in a non-transitory form accessible by a machine (e.g., a computer, network device, personal digital assistant, manufacturing tool, any device having one or more processors). For example, machine-readable storage media includes recordable / non-recordable media (e.g., read-only memory (ROM), random access memory (RAM), disk storage media, optical storage media, flash memory devices, etc.).

[0062] The above description of the illustrative examples of the present invention (including those described in the abstract) is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Although specific examples of the invention have been described herein for illustrative purposes, those skilled in the art will recognize that various modifications can be made within the scope of the invention.

[0063] These modifications can be made to the invention in light of the above detailed description. The terminology used in the appended claims should not be construed as limiting the invention to the specific instances disclosed in the specification. Rather, the scope of the invention will be fully defined by the appended claims, which will be interpreted according to established principles of claim interpretation.

Claims

1. An image sensor, comprising: An active pixel photodiode and a black pixel photodiode are each disposed in a semiconductor material, wherein the semiconductor material includes a first side and a second side opposite to the first side; A metal mesh structure disposed close to the first side of the semiconductor material, the metal mesh structure including an aperture optically aligned with the active pixel photodiode, wherein the metal mesh structure includes a first multilayer metal stack, the first multilayer metal stack including a first metal and a second metal different from the first metal; A light shield is optically aligned with the black pixel photodiode, such that the first side of the semiconductor material is disposed between the light shield and the black pixel photodiode, wherein the light shield comprises a second multilayer metal stack, the second multilayer metal stack comprising the first metal and the second metal, and wherein the first thickness of the first multilayer metal stack is less than the second thickness of the second multilayer metal stack.

2. The image sensor of claim 1, wherein the first multilayer metal stack comprises N metal layers, wherein N corresponds to any integer greater than or equal to 2, and wherein the second multilayer metal stack comprises at least N+1 metal layers.

3. The image sensor of claim 1, further comprising a buffer layer having a varying thickness to compensate for the thickness difference between the first multilayer metal stack of the metal mesh structure and the second multilayer metal stack of the light shield, wherein the first multilayer metal stack and the second multilayer metal stack are each disposed between the buffer layer and the first side of the semiconductor material, and wherein the distal end of the buffer layer is parallel to the first side of the semiconductor material.

4. The image sensor of claim 3, wherein the buffer layer comprises at least one of a metal oxide material or a low-n material, wherein the refractive index of the low-n material is less than the corresponding refractive index of the semiconductor material in the visible frequency range.

5. The image sensor of claim 3, wherein the buffer layer comprises a first portion and a second portion, wherein the first multilayer metal stack is disposed between the first portion of the buffer layer and the first side of the semiconductor material, wherein the second multilayer metal stack is disposed between the second portion of the buffer layer and the black pixel photodiode, and wherein the first buffer layer thickness of the first portion of the buffer layer is greater than the second buffer layer thickness of the second portion of the buffer layer.

6. The image sensor of claim 5, further comprising a dummy photodiode in the semiconductor material disposed between the active pixel photodiode and the black pixel photodiode, wherein the buffer layer includes a third portion aligned with the dummy photodiode such that the first side of the semiconductor material is disposed between the third portion of the buffer layer and the dummy photodiode, wherein the thickness of the third portion of the buffer layer is equal to the thickness of the first buffer layer.

7. The image sensor of claim 1, wherein each of the first multilayer metal stack and the second multilayer metal stack comprises a first metal layer including the first metal, and wherein the first metal layer is sandwiched between second metal layers including the second metal.

8. The image sensor of claim 7, wherein the second metal is a metal alloy composed of at least metallic and non-metallic materials.

9. The image sensor of claim 7, wherein the second multilayer metal stack further comprises a third metal layer including a third metal, and wherein the first metal layer is disposed between the third metal layer and the black pixel photodiode.

10. The image sensor of claim 9, wherein each of the first metal and the third metal is tungsten or aluminum, wherein the second metal is titanium nitride or titanium, and wherein the combined thickness of the first metal layer and the third metal layer is at least three times the thickness of any one of the second metal layers.

11. The image sensor of claim 10, wherein the first metal is different from the third metal.

12. The image sensor of claim 7, wherein the second multilayer metal stack further comprises a third metal layer having a composition equivalent to that of the first metal layer, and wherein the first metal layer is disposed between the third metal layer and the black pixel photodiode.

13. The image sensor according to claim 1, further comprising: An active pixel region comprising an active pixel photodiode array for capturing an image of an external scene, wherein the active pixel photodiode array comprises the active pixel photodiodes; and A black pixel region that laterally surrounds the active pixel region, wherein the black pixel region includes a plurality of black pixel photodiodes for generating one or more black reference signals, wherein the plurality of black pixel photodiodes includes the black pixel photodiode.

14. A method for manufacturing an image sensor, the method comprising: A metal mesh structure is formed, the metal mesh structure is disposed on a first side close to the semiconductor material, the metal mesh structure includes an aperture optically aligned with an active pixel photodiode, wherein the semiconductor material includes the first side and a second side opposite to the first side, wherein the image sensor includes the active pixel photodiode and a black pixel photodiode, each disposed in the semiconductor material, wherein the metal mesh structure includes a first multilayer metal stack, the first multilayer metal stack including a first metal and a second metal different from the first metal; and A light-shielding mask is formed, optically aligned with the black pixel photodiode, such that the first side of the semiconductor material is disposed between the light-shielding mask and the black pixel photodiode. The light-shielding mask comprises a second multilayer metal stack, the second multilayer metal stack comprising the first metal and the second metal. The first thickness of the first multilayer metal stack is less than the second thickness of the second multilayer metal stack.

15. The method of claim 14, wherein forming the metal mesh structure and the light shield further comprises: A metal layer is deposited to form a first metal layer, a second metal layer sandwiching the first metal layer, and a third metal layer, wherein the first metal layer, the second metal layer, and the third metal layer respectively comprise the first metal, the second metal, and the third metal, and wherein the first metal layer is disposed between the third metal layer and the first side of the semiconductor material; and The active pixel portion of the metal layer is etched to selectively remove the third metal layer adjacent to the active pixel photodiode to form the first multilayer metal stack, wherein the unetched portion of the metal layer corresponds to the second multilayer metal stack.

16. The method of claim 15, wherein the first multilayer metal stack comprises N metal layers, wherein N corresponds to any integer greater than or equal to 2, and wherein the second multilayer metal stack comprises at least N+1 metal layers.

17. The method of claim 15, further comprising: A buffer layer is deposited at least on the active pixel portion and the unetched portion of the metal layer corresponding to the first multilayer metal stack and the second multilayer metal stack, respectively, wherein the first multilayer metal stack and the second multilayer metal stack are disposed between the buffer layer and the first side of the semiconductor material; The buffer layer is planarized such that a first portion of the buffer layer has a first buffer layer thickness greater than the second buffer layer thickness of the second portion of the buffer layer, wherein a first multilayer metal stack is disposed between the first portion of the buffer layer and the first side of the semiconductor material, and wherein a second multilayer metal stack is disposed between the second portion of the buffer layer and the black pixel photodiode.

18. The method of claim 15, wherein the combined thickness of the first metal layer and the third metal layer is at least three times the thickness of any one of the second metal layers.

19. The method of claim 15, wherein the first metal is different from the third metal.

20. The method of claim 15, wherein the third metal layer has a composition equivalent to that of the first metal layer.

21. An image sensor comprising: An active pixel photodiode and a black pixel photodiode are each disposed in a semiconductor material, wherein the semiconductor material includes a first side and a second side opposite to the first side; A metal mesh structure disposed close to the first side of the semiconductor material, the metal mesh structure including an aperture optically aligned with the active pixel photodiode, wherein the metal mesh structure includes a first multilayer metal stack, the first multilayer metal stack including a first metal and a second metal different from the first metal; A light shield is optically aligned with the black pixel photodiode, such that the first side of the semiconductor material is disposed between the light shield and the black pixel photodiode. The light shield includes a second multilayer metal stack, which includes the first metal and the second metal. The first thickness of the first multilayer metal stack is less than the second thickness of the second multilayer metal stack. The first multilayer metal stack and the second multilayer metal stack each include a first metal layer and a second metal layer. The first metal layer includes the first metal, the second metal layer includes the second metal, and the second multilayer metal stack further includes a third metal layer.

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