High-frequency dc / dc converter based on current pulse width conversion circuit and control method thereof

Abstract

The application relates to a high-frequency DC / DC converter based on a current pulse width conversion circuit, which comprises a power conversion circuit, a voltage sampling and comparison circuit, a voltage-current conversion circuit, a current pulse width conversion circuit 1, a sequential pulse generation circuit, a current pulse width conversion circuit 2 and a pulse addition circuit; the pulse addition circuit, the power conversion circuit, the voltage sampling and comparison circuit and the voltage-current conversion circuit are sequentially connected; the current pulse width conversion circuit 1 is connected with the pulse addition circuit, the sequential pulse generation circuit and the voltage-current conversion circuit respectively; and the current pulse width conversion circuit 2 is connected with the pulse addition circuit, the sequential pulse generation circuit and the voltage-current conversion circuit respectively. The application simultaneously realizes lower system power consumption, a larger output voltage range and good stability.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of DC / DC converter, in particular to a high-frequency DC / DC converter based on current pulse width conversion circuit and a control method thereof. BACKGROUND

[0002] High frequency of DC / DC converter is the development trend of mobile portable electronic device power supply, and high-frequency converter can reduce peripheral components. Conventional design uses high-speed comparator to realize high frequency, which causes sharp rise of converter power consumption and large reduction of conversion efficiency. Some designs use voltage delay line to replace high-speed comparator to reduce power consumption, but due to the structure of voltage delay line, serious nonlinearity problem is introduced, which reduces the output voltage range of the converter to avoid unstable operation of the converter. SUMMARY

[0003] Therefore, the present application aims to provide a high-frequency DC / DC converter based on current pulse width conversion circuit and a control method thereof, which aims to solve the above problems.

[0004] To achieve the above object, the present application adopts the following technical scheme:

[0005] A high-frequency DC / DC converter based on current pulse width conversion circuit, comprising a power conversion circuit, a voltage sampling and comparison circuit, a voltage-current conversion circuit, a current pulse width conversion circuit 1, a sequential pulse generation circuit, a current pulse width conversion circuit 2 and a pulse addition circuit; the pulse addition circuit, the power conversion circuit, the voltage sampling and comparison circuit and the voltage-current conversion circuit are connected in sequence; the current pulse width conversion circuit 1 is connected with the pulse addition circuit, the sequential pulse generation circuit and the voltage-current conversion circuit respectively; the current pulse width conversion circuit 2 is connected with the pulse addition circuit, the sequential pulse generation circuit and the voltage-current conversion circuit respectively.

[0006] Further, the input of the power conversion circuit is signal V IN and CK T , and the output is signal V OUT ; the power conversion circuit converts the input signal V T into the corresponding output signal V IN according to the pulse width duty cycle of the input signal CK OUT .

[0007] The input of the voltage sampling and comparison circuit is the output signal V OUT of the power conversion circuit and the input reference signal V REF ; the voltage sampling and comparison circuit amplifies the difference between the input signals V OUT and V REF , and the output is signal V EA .

[0008] The input of the voltage-to-current conversion circuit is signal V EA , and the output is signal I EA1 and I EA2 The working method of the voltage-to-current conversion circuit is that the voltage-to-current conversion circuit converts the input signal V EA into one-to-one corresponding output current signals I EA1 and I EA2 ;

[0009] The input of the sequential pulse generation circuit is signal CLK, and the output is signal CK L1 , CK T1 , CK R1 , CK L2 , CK T2 and CK R2 .

[0010] Further, the control method of the sequential pulse generation circuit is specifically as follows: under the action of the input signal CLK, the sequential pulse signals are alternately generated in two clock cycles as one cycle, and the specific operation is as follows:

[0011] (1) the low-level pulse of the first period of CLK is inverted and copied to CK L1 , and the high-level pulse of CLK is directly copied to CK T1 ; when the falling edge of the first period of CLK comes, a pulse signal is generated on CK R2 , and the duration of the pulse signal is equal to the duration of the first period of CLK;

[0012] (2) the low-level pulse of the second period of CLK is inverted and copied to CK L2 , and the high-level pulse of CLK is directly copied to CK ,2 ; when the falling edge of the second period of CLK comes, a pulse signal is generated on CK R1 , and the duration of the pulse signal is equal to the duration of the second period of CLK.

[0013] Further, the control method of the current pulse width conversion circuit 1 and the current pulse width conversion circuit 2 is specifically as follows:

[0014] The input of the current pulse width conversion circuit 1 is signal CK L1 , CK T1 , CK R1 , I REF , I EA1 , and the output is signal CK1. The input of the current pulse width conversion circuit 2 is signal CK L2 , CK T2 , CK R2 , IREF 、I EA2 , output signal CK 2， The specific operation is as follows:

[0015] When CK L1 is high, the current pulse width conversion circuit 1 is reset; after the reset is completed, when the stored signal CK T1 is high, the current pulse width conversion circuit 1 stores the difference between the input signals I REF and I EA1 ; after the storage is completed, when the conversion signal CK R1 is high, the current pulse width conversion circuit 1 converts the difference between the input signals I REF and I EA1 into the pulse width of the output signal CK1; the greater the difference between the input signals I REF and I EA1 , the wider the pulse width of the output signal CK1, and vice versa; the pulse width of the output signal CK1 is linearly related to the difference between the input signals I REF and I EA1 .

[0016] The principle of the current pulse width conversion circuit 2 is the same as that of the current pulse width conversion circuit 1, which converts the difference between the input signals I REF and I EA2 into the pulse width of the output signal CK2; the pulse width of the output signal CK2 is linearly related to the difference between the input signals I REF and I EA2 .

[0017] Under the control of the sequential pulse generation circuit, the current pulse width conversion circuit 1 and the current pulse width conversion circuit 2 work alternately, with two periods as one cycle, to linearly convert the current difference into a one-to-one corresponding pulse width; in the first period of the cycle, the current pulse width conversion circuit 1 stores the difference between the input signals I REF and I EA1 , and the current pulse width conversion circuit 2 converts the current difference stored in the previous cycle into the pulse width of the pulse signal CK2; in the second period of the cycle, the current pulse width conversion circuit 1 converts the current difference signal stored in the previous period into the pulse width of the pulse signal CK1, and the current pulse width conversion circuit 2 stores the difference between the input signals I REF and I EA2 . Under the action of the sequential pulse signal, the current pulse width conversion circuit 1 and the current pulse width conversion circuit 2 convert the current signals I EA1 , I EA2 into the pulse signals CK1 and CK2.

[0018] A control method of a high-frequency DC / DC converter based on a current pulse width conversion circuit, comprising the following steps:

[0019] A power stage circuit output signal V OUT Another input signal V REF greater than the voltage sampling and comparison circuit REF amplifies the difference between the input signals V OUT and V OUT , V REF greater than V EA causes the output signal V EA1 of the voltage sampling and comparison circuit to decrease, and the output signals I EA2 and I L1 of the voltage current conversion circuit 1 and the voltage current conversion circuit 2 decrease, while the sequential clock signal generation circuit generates a reset signal CK T1 , a storage signal CK R1 , a conversion signal CK L2 , a reset signal CK T2 , a storage signal CK R2；

[0020] With two periods as a cycle, in the first period, under the action of the reset signal CK L1 , the storage signal CK T1 , and the conversion signal CK R1 , the current pulse width conversion circuit 1 converts the difference between the input signals I REF and I EA1 into the pulse width of the output signal CK1, the input signal I EA1 decreases, and the difference between I REF and I EA1 increases, causing the pulse width of the output signal CK1 to increase; in the second period, under the action of the reset signal CK L2 , the storage signal CK T2 , and the conversion signal CK R2 , the current pulse width conversion circuit 2 converts the difference between the input signals I REF and I EA2 into the pulse width of the output signal CK2, the input signal I EA2 decreases, causing the pulse width of the output signal CK2 to increase;

[0021] The pulse adding circuit performs a logical OR operation on the input signal CK1 and the output signal CK2 to obtain the output signal CK T , the pulse width of the output signal CK T of the pulse adding circuit increases, and CK T is input to the power conversion circuit via the drive circuit, and CK TThe increase in pulse width causes the power conversion circuit to output signal V OUT After the voltage drops and the feedback loop adjusts the voltage, the high-frequency DC / DC converter eventually stabilizes.

[0022] If the power stage circuit outputs signal V OUT The other input signal V of the voltage sampling and comparison circuit is less than REF V EA Increasing the voltage-to-current conversion circuit output signal I EA1 and I EA2 The increase causes the pulse width of the output signals CK1 and CK2 of the current pulse width conversion circuit 1 and the current pulse width conversion circuit 2 to decrease, resulting in the output signal V of the power conversion circuit. OUT As the voltage increases, and after adjustments are made through the feedback loop, the high-frequency DC / DC converter eventually stabilizes.

[0023] Compared with the prior art, the present invention has the following advantages:

[0024] This invention replaces the high-speed comparator + ramp voltage generator or voltage delay line in current high-frequency DC / DC converters with a current pulse width conversion circuit and its control circuit, while achieving lower system power consumption, a larger output voltage range and good stability. Attached Figure Description

[0025] Figure 1 This is a schematic diagram of the structure of the present invention;

[0026] Figure 2 This is a schematic diagram of the sequential pulse generation circuit control in one embodiment of the present invention;

[0027] Figure 3 This is a schematic diagram of the control of current pulse width conversion circuit 1 and current pulse width conversion circuit 2 in one embodiment of the present invention;

[0028] Figure 4 This is a schematic diagram of pulse addition circuit control in one embodiment of the present invention;

[0029] Figure 5 This is a schematic diagram of the structure of Embodiment 1 of the present invention;

[0030] Figures 6-7 This is a control schematic diagram of Embodiment 1 of the present invention;

[0031] In the figure, (1) - feedback control circuit, (2) - power conversion circuit, (3) - voltage sampling and comparison circuit, (1.1) - voltage-current conversion circuit, (1.2) - current pulse width conversion circuit 1, (1.3) - sequential pulse generation circuit, (1.4) - current pulse width conversion circuit 2, (1.5) - pulse summing circuit. Detailed Implementation

[0032] The application will be further described in connection with the accompanying drawings and embodiments.

[0033] Please refer to Figure 1 The application provides a high-frequency DC / DC converter based on current pulse width conversion circuit, which comprises a power conversion circuit, a voltage sampling and comparison circuit, a voltage-current conversion circuit, a current pulse width conversion circuit 1, a sequential pulse generation circuit, a current pulse width conversion circuit 2 and a pulse addition circuit; the pulse addition circuit, the power conversion circuit, the voltage sampling and comparison circuit and the voltage-current conversion circuit are connected in sequence; the current pulse width conversion circuit 1 is connected with the pulse addition circuit, the sequential pulse generation circuit and the voltage-current conversion circuit respectively; the current pulse width conversion circuit 2 is connected with the pulse addition circuit, the sequential pulse generation circuit and the voltage-current conversion circuit respectively.

[0034] In the embodiment, the input of the power conversion circuit is signal V IN and CK T , and the output is signal V OUT ; the power conversion circuit converts the input signal V IN into corresponding output signal V OUT according to the pulse width duty cycle of input signal CK T .

[0035] The input of the voltage sampling and comparison circuit is the output signal V OUT of the power conversion circuit and input reference signal V REF ; the voltage sampling and comparison circuit amplifies the difference between input signals V OUT and V REF , and the output is signal V EA .

[0036] The input of the voltage-current conversion circuit is signal V EA , and the output is signal I EA1 and I EA2 ; the working method of the voltage-current conversion circuit is that the voltage-current conversion circuit converts the input signal V EA into one-to-one corresponding output current signals I EA1 and I EA2 .

[0037] The input of the sequential pulse generation circuit is signal CLK, and the output is signal CK L1 , CK T1 , CK R1 , CK L2 , CK T2 and CK R2 .

[0038] In the embodiment, the control method of the sequential pulse generating circuit is as follows: under the action of the input signal CLK, the sequential pulse signal is alternately generated in two clock cycles as a cycle, and the specific operation is as follows:

[0039] (1) the low level pulse of the first period of CLK is inverted and copied to CK L1 , and the high level pulse of CLK is directly copied to CK T1 ; when the falling edge of the first period of CLK comes, a pulse signal is generated on CK R2 , and the duration of the pulse signal is equal to the duration of the first period of CLK;

[0040] (2) the low level pulse of the second period of CLK is inverted and copied to CK L2 , and the high level pulse of CLK is directly copied to CK ,2 ; when the falling edge of the second period of CLK comes, a pulse signal is generated on CK R1 , and the duration of the pulse signal is equal to the duration of the second period of CLK.

[0041] In the embodiment, referring to Figure 3 , the input of the current pulse width conversion circuit 1 is the signal CK L1 , CK T1 , CK R1 , I REF , I EA1 , and the output is the signal CK1. The input of the current pulse width conversion circuit 2 is the signal CK L2 , CK T2 , CK R2 , I REF , I EA2 , and the output is the signal CK 2， , and the specific operation is as follows:

[0042] When CK L1 is at high level, the current pulse width conversion circuit 1 is reset; after the reset is completed, when the storage signal CK T1 is at high level, the current pulse width conversion circuit 1 stores the difference between the input signals I REF and I EA1 ; after the storage is completed, when the conversion signal CK R1 is at high level, the current pulse width conversion circuit 1 converts the difference between the input signals I REF and I EA1 into the pulse width of the output signal CK1. The greater the difference between the input signals I REF and I EA1 , the wider the pulse width of the output signal CK1, and vice versa.

[0043] The principle of current pulse width conversion circuit 2 is the same as that of current pulse width conversion circuit 1, which converts the difference between input signals I REF and I EA2 into the pulse width of output signal CK2.

[0044] Under the control of the sequential pulse generation circuit, current pulse width conversion circuit 1 and current pulse width conversion circuit 2 work alternately, with two periods as a cycle. In the first period of the cycle, current pulse width conversion circuit 1 stores the difference between input signals I REF and I EA1 , and current pulse width conversion circuit 2 converts the current difference stored in the previous cycle into the pulse width of pulse signal CK2. In the second period of the cycle, current pulse width conversion circuit 1 converts the current difference signal stored in the previous period into the pulse width of pulse signal CK1, and current pulse width conversion circuit 2 stores the difference between input signals I REF and I EA2 . Under the action of the sequential pulse signal, current pulse width conversion circuit 1 and current pulse width conversion circuit 2 convert current signals I EA1 and I EA2 into pulse signals CK1 and CK2.

[0045] In this embodiment, the input of the pulse addition circuit is signals CK1 and CK2, and the output is signal CK T . The working principle of the pulse addition circuit is shown in Figure 4 . The pulse addition circuit performs a logical OR operation on the output signals CK1 and CK2 of current pulse width conversion circuit 1 and current pulse width conversion circuit 2 to obtain output signal CK T .

[0046] Embodiment 1:

[0047] In this embodiment, referring to Figure 5 , if the output signal V OUT of the power conversion circuit shown in Figure 5 is greater than the other input signal V REF of the voltage sampling and comparison circuit, the voltage sampling and comparison circuit amplifies the difference between input signals V REF and V OUT . If V OUT is greater than V REF , the output signal V EA of the voltage sampling and comparison circuit decreases, and the output signals I EA1 and I EA2 of voltage current conversion circuit 1 and voltage current conversion circuit 2 decrease. At the same time, the sequential clock signal generation circuit generates reset signal CK L1 , storage signal CK T1 , and conversion signal CKR1 , reset signal CK L2 , storage signal CK T2 , conversion signal CK R2；

[0048] In two cycles as a cycle, the first cycle under the action of reset signal CK L1 , storage signal CK T1 , conversion signal CK R1 , current pulse width conversion circuit 1 converts the difference between input signal I REF and I EA1 to the pulse width of output signal CK1, input signal I EA1 decreases, the difference between I REF and I EA1 increases, resulting in the increase of pulse width of output signal CK1; in the second cycle under the action of reset signal CK L2 , storage signal CK T2 , conversion signal CK R2 , current pulse width conversion circuit 2 converts the difference between input signal I REF and I EA2 to the pulse width of output signal CK2, input signal I EA2 decreases, resulting in the increase of pulse width of output signal CK2;

[0049] The pulse adding circuit performs logical or operation on input signal CK1 and output signal CK2 to obtain output signal CK T , the pulse width of output signal CK T of the pulse adding circuit increases, CK T is input to the power conversion circuit via the driving circuit, CK T pulse width increases, resulting in the decrease of output signal V OUT of the power conversion circuit, after adjustment through the feedback loop, the final high-frequency DC / DC converter tends to be stable;

[0050] If the output signal V OUT of the power stage circuit is less than the other input signal V REF of the voltage sampling and comparison circuit, V EA increases, the output signals I EA1 and I EA2 of the voltage-current conversion circuit increase, resulting in the decrease of pulse width of output signals CK1 and CK2 of current pulse width conversion circuit 1 and current pulse width conversion circuit 2, resulting in the increase of output signal V OUT of the power conversion circuit, after adjustment through the feedback loop, the final high-frequency DC / DC converter tends to be stable.

[0051] The above merely describes preferred embodiments of the present application, and any equivalent changes and modifications made within the scope of the present application should be included in the scope of the present application.

Claims

1. A high-frequency DC / DC converter based on a current pulse width conversion circuit, characterized in that, It includes a power conversion circuit, a voltage sampling and comparison circuit, a voltage-to-current conversion circuit, a current pulse width conversion circuit 1, a sequential pulse generation circuit, a current pulse width conversion circuit 2, and a pulse summing circuit; the pulse summing circuit, power conversion circuit, voltage sampling and comparison circuit, and voltage-to-current conversion circuit are connected in sequence; the current pulse width conversion circuit 1 is connected to the pulse summing circuit, the sequential pulse generation circuit, and the voltage-to-current conversion circuit respectively; the current pulse width conversion circuit 2 is connected to the pulse summing circuit, the sequential pulse generation circuit, and the voltage-to-current conversion circuit respectively. The current pulse width conversion circuit 1 and the current pulse width conversion circuit 2, under the action of a sequential clock, can convert the current difference signal into a linearly corresponding pulse signal. The control method of the current pulse width conversion circuit 1 and the current pulse width conversion circuit 2 is as follows: Let the input of the current pulse width conversion circuit 1 be the signal CK. L1 CK T1 CK R1 I REF I EA1 The output is signal CK1, and the input of the current pulse width converter circuit 2 is signal CK. L2 CK T2 CK R2 I REF I EA2 The output is signal CK. 2， The specific steps are as follows: When CK L1 When the signal is high, the current pulse width conversion circuit 1 is reset; after the reset is complete, when the stored signal CK is... T1 When the signal is high, the current pulse width conversion circuit 1 will store the input signal I. REF and I EA1 The difference; after storage, when the conversion signal CK is... R1 When the signal is high, the current pulse width conversion circuit 1 converts the input signal I... REF and I EA1 The difference is converted into the pulse width of the output signal CK1, when the input signal I... REF and I EA1 The larger the difference, the wider the pulse width of the output signal CK1; conversely, the smaller the difference, the narrower the pulse width of the output signal CK1. The pulse width of CK1 is the same as that of the input signal I. REF and I EA1 The difference shows a linear relationship; The principle of current pulse width conversion circuit 2 is the same as that of current pulse width conversion circuit 1, which converts the input signal I... REF and I EA2 The difference is converted into the pulse width of the output signal CK2, and the pulse width of CK2 is the same as that of the input signal I. REF and I EA2 The difference shows a linear relationship; Under the control of the sequential pulse generation circuit, current pulse width conversion circuit 1 and current pulse width conversion circuit 2 work alternately, with two cycles constituting one loop. In the first cycle of the loop, current pulse width conversion circuit 1 stores the input signal I. REF and I EA1 The current pulse width conversion circuit 2 converts the current difference stored in the previous cycle into the pulse width of the pulse signal CK2; in the second cycle of the loop, the current pulse width conversion circuit 1 converts the current difference signal stored in the previous cycle into the pulse width of the pulse signal CK1, and the current pulse width conversion circuit 2 stores the input signal I. REF and I EA2 The difference; Current pulse width conversion circuit 1 and current pulse width conversion circuit 2, under the action of sequential pulse signals, convert the current signal I... EA1 I EA2 Converted into pulse signals CK1 and CK2.

2. The high-frequency DC / DC converter based on a current pulse width conversion circuit according to claim 1, characterized in that, The input to the power conversion circuit is signal V. IN and CK T The output is signal V. OUT The power conversion circuit is based on the input signal CK. T The pulse width duty cycle will affect the input signal V IN Converted into the corresponding output signal V OUT ; The input to the voltage sampling and comparison circuit is the output signal V of the power conversion circuit. OUT and input reference signal V REF The voltage sampling and comparison circuit will input signal V OUT and V REF The difference between them is amplified, and its output is signal V. EA ; The input to the voltage-to-current conversion circuit is signal V. EA Its output is signal I. EA1 and I EA2 The voltage-to-current conversion circuit works as follows: the voltage-to-current conversion circuit converts the input signal V... EA Converted into a one-to-one corresponding output current signal I EA1 and I EA2 ; The pulse summing circuit takes signals CK1 and CK2 as inputs and outputs signal CK. T The pulse summing circuit performs a logical OR operation on the output signals CK1 and CK2 of current pulse width conversion circuit 1 and current pulse width conversion circuit 2 to obtain the output signal CK. T .

3. The high-frequency DC / DC converter based on a current pulse width conversion circuit according to claim 2, characterized in that, The input to the sequential pulse generation circuit is signal CLK, and its output is signal CK. L1 CK T1 CK R1 CK L2 CK T2 and CK R2 The control method is as follows: Under the action of the input signal CLK, sequential pulse signals are generated alternately in a cycle of two clock cycles. The specific operation is as follows: 1) Invert the low-level pulse of the first cycle of CLK and copy it to CK. L1 Above; directly copy the high-level pulse of CLK to CK. T1 Above; when the falling edge of the first cycle of CLK arrives, at CK R2 A pulse signal is generated, the duration of which is equal to the duration of the first cycle of CLK; 2) Invert the low-level pulse of the second cycle of CLK and copy it to CK. L2 The high-level pulse of CLK is directly copied to CK,2; when the falling edge of the second cycle of CLK arrives, the high-level pulse of CK is copied to CK,2. R1 A pulse signal is generated, the duration of which is equal to the duration of the second cycle of CLK.

4. A control method for a high-frequency DC / DC converter based on a current pulse width conversion circuit as described in any one of claims 1-3, characterized in that, Includes the following steps: Power stage circuit output signal V OUT The other input signal V of the voltage sampling and comparison circuit is greater than REF The voltage sampling and comparison circuit will input signal V REF and V OUT The difference is amplified, V OUT Greater than V REF This leads to the output signal V of the voltage sampling and comparison circuit. EA If the voltage drops, the output signal I of voltage-to-current conversion circuit 1 and voltage-to-current conversion circuit 2 will decrease. EA1 and I EA2 As the clock signal decreases, the sequential clock signal generation circuit generates a reset signal CK under the action of the input signal CLK. L1 , storage signal CK T1 , conversion signal CK R1 Reset signal CK L2 , storage signal CK T2 , conversion signal CK R2 ; A cycle consists of two periods, with the reset signal CK included in the first cycle. L1 , storage signal CK T1 , conversion signal CK R1 Under the action of the current pulse width conversion circuit 1, the input signal I... REF and I EA1 The difference is converted into the pulse width of the output signal CK1, and the input signal I... EA1 Decrease, I REF and I EA1 The increase in the difference leads to an increase in the pulse width of the output signal CK1; in the second cycle, the reset signal CK... L2 , storage signal CK T2 , conversion signal CK R2 Under the action of the current pulse width conversion circuit 2, the input signal I... REF and I EA2 The difference is converted into the pulse width of the output signal CK2, and the input signal I... EA2 The decrease causes the pulse width of the output signal CK2 to increase; The pulse summing circuit performs a logical OR operation on the input signal CK1 and the output signal CK2 to obtain the output signal CK. T This causes the output signal CK of the pulse summing circuit to... T Increased pulse width; CK T The input is via the drive circuit to the power conversion circuit, CK T The increase in pulse width causes the power conversion circuit to output signal V OUT The voltage is reduced; after adjustment by the feedback loop, the high-frequency DC / DC converter eventually stabilizes. If the power stage circuit outputs signal V OUT The other input signal V of the voltage sampling and comparison circuit is less than REF V EA Increasing the voltage-to-current conversion circuit output signal I EA1 and I EA2 The increase causes the pulse width of the output signals CK1 and CK2 of the current pulse width conversion circuit 1 and the current pulse width conversion circuit 2 to decrease, resulting in the output signal V of the power conversion circuit. OUT Increase; after adjustment of the feedback loop, the high-frequency DC / DC converter eventually tends to stabilize.

Images