A high-voltage isolation circuit and its application method, impedance correction method

Abstract

This invention discloses a high-voltage isolation circuit and its usage method, as well as an impedance correction method. Utilizing the characteristic of capacitors to pass high frequencies and block low frequencies, a capacitor Cs is connected in series in the isolation circuit. Cs suppresses high-frequency power voltage without affecting the test signals sent by the BIS equipment. This achieves the goal of isolating normal high-frequency power voltage and protecting the BIS test equipment while allowing the BIS equipment test signals to be injected and returned. When a fault arc occurs, the MCU controls the series inductor matrix to adjust the inductance value so that the isolation circuit generates series resonance at the frequency corresponding to the arc signal with the highest energy, thereby achieving high-energy arc signal isolation and protecting the BIS test equipment. During testing, since the BIS is frequency-adjustable, the test signal frequency band is set to exclude the frequency corresponding to the arc signal with the highest energy. This further enables the isolation of high-frequency, high-energy arc signals, protection of the BIS test equipment, and the simultaneous injection and return of the BIS equipment test signals.

Description

Technical Field

[0001] This invention relates to the field of isolation circuit technology, and in particular to a high-voltage isolation circuit and its usage method and impedance correction method. Background Technology

[0002] Broadband impedance spectroscopy (BIS) technology is commonly used for defect location in cables and is now widely used for offline cable condition inspection. However, implementing online BIS condition inspection faces challenges due to the following two factors:

[0003] 1) The withstand voltage capability of the BIS equipment does not meet the requirements of high-voltage cable conditions (neither the conditions with nor without arc faults), and the power frequency high voltage can easily damage the test equipment.

[0004] 2) When an arc fault occurs, the bandwidth of the high-frequency arc signal and the BIS test signal overlaps and the energy is large. The high-frequency and high-energy arc signal can easily damage the test equipment.

[0005] Therefore, under high voltage conditions, how to suppress arc energy without affecting the injection / return of BIS test signals within the same signal bandwidth has become a difficult problem. Summary of the Invention

[0006] The present invention provides a high-voltage isolation circuit and its usage method, as well as an impedance correction method, which solves the problem mentioned in the background art of how to achieve arc energy suppression without affecting the injection / return of BIS test signals under high voltage conditions within the same signal bandwidth.

[0007] To achieve the above objectives, the present invention provides the following technical solution: a high-voltage isolation circuit, including a current sensor S. C Voltage sensor S V Series capacitor C S Transient voltage suppressor diode (TVS), voltage conditioning circuit (ADJ) V ADJ current conditioning circuit I Analog-to-digital converter (ADC), microcontroller unit (MCU), series matrix inductor (L) P Control L P Connection / Disconnection Switch S S Parallel capacitor C P Control C P Connection / Disconnection Switch S P ;

[0008] The parallel capacitor C P With control C P Connection / Disconnection Switch S P Series connection, the series matrix inductor LP With control L P Connection / Disconnection Switch S S The parallel capacitors C connected in series and in series with each other. P With control C P Connection / Disconnection Switch S P and the series matrix inductors L connected in series with each other P With control L P Connection / Disconnection Switch S S Connected in parallel with the transient voltage suppressor diode TVS and the voltage sensor S. V Current sensor S C Parallel connection; the series capacitor C S Set in transient suppression diode TVS, voltage sensor S V Between; the voltage sensor S V Current sensor S C Through voltage conditioning circuit ADJ respectively V ADJ current conditioning circuit I Connected to the analog-to-digital converter (ADC); the series matrix inductor L P Both the analog-to-digital converter (ADC) and the microcontroller (MCU) are connected to a single-chip microcomputer.

[0009] Preferably, the series matrix inductor L P Composed of several inductor elements L n and the control switch S in several series matrix inductors n Composition, the aforementioned inductor element L n With the corresponding control switch S in a series matrix inductor n Connected in parallel with another inductor element L n The control switch S in a series matrix inductor connected in parallel with it n In series, the single-chip microcomputer MCU has an FFT module.

[0010] Preferably, the high-voltage isolation circuit includes two operating modes, namely mode one and mode two; in mode one, L is controlled... P Connection / Disconnection Switch S S and control C P Connection / Disconnection Switch S P All disconnected; in mode two, control L P Connection / Disconnection Switch S S Close, control C P Connection / Disconnection Switch S P Close first, then open.

[0011] A method of using a high-voltage isolation circuit, characterized by comprising the following steps:

[0012] S1: Put the high-voltage isolation circuit into mode two;

[0013] S2: via current sensor S C With voltage sensor S V To measure the voltage and current flowing through the cable core;

[0014] S3: The voltage and current measured in step S2 are respectively passed through the corresponding voltage conditioning circuit ADJ. V ADJ current conditioning circuit I The measured analog signal is reduced and biased, and then converted into a digital signal by an ADC so that it is within the processing range of the MCU.

[0015] S4: The MCU then uses Fourier transform to process the signal processed in step S3 to find the frequency f corresponding to the component with the highest energy in the arc signal;

[0016] S5: Calculate the inductance L that causes the circuit to resonate at frequency f. S,exp ;

[0017] S6: MCU according to L S,exp The value controls the series matrix inductor L P The switch in L makes L P Approaching L S,exp ;

[0018] S7: Adjust the frequency band of the BIS test to exclude this frequency, then disconnect switch S. P .

[0019] Preferably, the inductor L in step S5 S,exp The calculation formula is as follows:

[0020]

[0021] Where f is the frequency corresponding to the component with the highest energy in the arc signal obtained in step S4, and C S It is a series capacitor.

[0022] The series matrix inductor L P With series matrix inductor L P Switch S in n The relationship is shown in the following formula:

[0023] L P =L1×(1×S1+2×S2+2) 2 ×S3+...+2 n-1 ×S n ).

[0024] An impedance correction method for a high-voltage isolation circuit, characterized in that, when the high-voltage isolation circuit is in mode one, the intrinsic broadband impedance Z(ω) of the cable is as follows:

[0025]

[0026] Where Z'(ω) is the equivalent impedance of the isolation circuit and the cascaded cable, measured by a broadband impedance spectrometer when the isolation circuit is operating in mode one, and C S For a series capacitor, ω is the angular frequency of the test signal. The impedance is only meaningful after the value of the angular frequency is determined.

[0027] When the high-voltage isolation circuit is in mode two, the intrinsic broadband impedance Z(ω) of the cable is as follows:

[0028]

[0029] Where Z”(ω) is the equivalent impedance of the isolation circuit and the cascaded cable, measured by a broadband impedance spectrometer when the isolation circuit is operating in mode two, and C S For series capacitors, L P For a series matrix inductor, ω is the angular frequency of the test signal. The impedance is only meaningful after the value of the angular frequency is determined.

[0030] The beneficial effects of this invention are as follows:

[0031] 1) Utilizing the characteristic of capacitors to pass high frequencies and block low frequencies, a capacitor C is connected in series in the isolation circuit. S C S It can suppress high power frequency voltage without affecting the test signals sent by the BIS equipment, thus achieving the goal of isolating normal high power frequency voltage and protecting the BIS test equipment while allowing the BIS equipment test signals to be injected and returned.

[0032] 2) The MCU controls the series inductor matrix to adjust the inductance value so that the isolation circuit generates series resonance at the frequency corresponding to the arc signal with the highest energy, thereby achieving high-energy arc signal isolation and protecting the BIS test equipment. During testing, since the BIS is frequency-adjustable, the test signal frequency band is set to not include the frequency corresponding to the arc signal with the highest energy. This allows the BIS equipment test signal to be injected and returned while isolating high-frequency, high-energy arc signals and protecting the BIS test equipment.

[0033] 3) Cable defect / fault detection and location require the cable's intrinsic broadband impedance. An algorithm corrects the broadband impedance measured through the isolation circuit, eliminating the influence of the isolation circuit on the cable's intrinsic broadband impedance. Attached Figure Description

[0034] Figure 1This is a circuit diagram of a high-voltage isolation circuit according to the present invention;

[0035] Figure 2 This is a flowchart illustrating the operation of a high-voltage isolation circuit in the event of an arc fault in a cable.

[0036] Explanation of key figure labels:

[0037] S C : Current sensor; S V Voltage sensor; C S Series capacitor; TVS: Transient voltage suppressor diode; ADJ V Voltage conditioning circuit; ADJ I Current conditioning circuit; ADC: Analog-to-digital converter; MCU: Microcontroller unit; L P Series matrix inductors; L1, L2, L3…L n Inductor elements in a series matrix inductor; S1, S2, S3…S n : Control switch in a series matrix inductor; S S Control L P A switch to indicate whether or not the device is connected; C P Parallel capacitor; S P Control C P A switch to control whether or not the device is connected. Detailed Implementation

[0038] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0039] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0040] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0041] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0042] The following is combined with Figures 1-2 Detailed explanation of the circuit structure, usage method, and principle of this embodiment:

[0043] This embodiment provides a high-voltage isolation circuit and its usage method, as well as an impedance correction method, combined with... Figure 1 To illustrate, including the current sensor S C Voltage sensor S V Series capacitor C S Transient voltage suppressor diode (TVS), voltage conditioning circuit (ADJ) V ADJ current conditioning circuit I Analog-to-digital converter (ADC), microcontroller unit (MCU), series matrix inductor (L) P Control L P Connection / Disconnection Switch S S Parallel capacitor C P Control C P Connection / Disconnection Switch S P ;

[0044] The parallel capacitor C P With control C P Connection / Disconnection Switch S P Series connection, the series matrix inductor L P With control L P Connection / Disconnection Switch S S The parallel capacitors C connected in series and in series with each other. P With control C P Connection / Disconnection Switch S P and the series matrix inductors L connected in series with each other P With control L P Connection / Disconnection Switch S S Connected in parallel with the transient voltage suppressor diode TVS and the voltage sensor S. V Current sensor S C Parallel connection; the series capacitor C S Set in transient suppression diode TVS, voltage sensor S V Between; the voltage sensor S V Current sensor S C Through voltage conditioning circuit ADJ respectively V ADJ current conditioning circuit I Connected to the analog-to-digital converter (ADC); the series matrix inductor L PBoth the analog-to-digital converter (ADC) and the series matrix inductor L are connected to a single-chip microcomputer (MCU). P Composed of several inductor elements L n and the control switch S in several series matrix inductors n Composition, the aforementioned inductor element L n With the corresponding control switch S in a series matrix inductor n Connected in parallel with another inductor element L n The control switch S in a series matrix inductor connected in parallel with it n In series, the single-chip microcomputer MCU has an FFT module.

[0045] The following is an explanation of the meaning and function of each component in the high-voltage isolation circuit described in this embodiment:

[0046] S C : Current sensor, used to measure the current flowing through the cable core;

[0047] S V Voltage sensor, used to measure the voltage flowing through the cable core;

[0048] C S A series capacitor of known size is used to suppress high voltage at the power frequency.

[0049] TVS: Transient Voltage Suppressor Diode, used to protect circuits;

[0050] ADJ V The voltage conditioning circuit transforms the analog signal output by the voltage sensor into an analog signal that can be processed by the MCU through reduction, biasing, filtering, and other transformations.

[0051] ADJ I The current conditioning circuit transforms the analog signal output by the current sensor into an analog signal that can be processed by the MCU through reduction, biasing, filtering, and other transformations.

[0052] ADC: Analog-to-Digital Converter, used to convert ADJ... V With ADJ I The transformed analog signal is converted into a digital signal;

[0053] MCU: A single-chip microcomputer used for digital signal processing and system control;

[0054] L P Series matrix inductors;

[0055] L1, L2, L3…L n The inductance elements in a series matrix inductor are arranged in binary order, i.e., L1:L2:L3:…:L… n = 1:2:4:…:2n;

[0056] S1, S2, S3…S n The control switch in the series matrix inductor is controlled by an MCU to achieve inductance adjustment from 0 to (2n-1)*L1;

[0057] S S Control L P A switch to indicate whether or not the connection is active;

[0058] C P Parallel capacitors are used to protect BIS equipment when an arc fault occurs in the cable.

[0059] S P Control C P A switch to indicate whether or not the connection is active;

[0060] Series capacitor C S The selection criteria are as follows

[0061]

[0062] Among them, U R U is the rated voltage of the power grid. max R is the maximum voltage that the BIS device can withstand. eq ω is the equivalent resistance of the BIS equipment during testing. g It is the angular frequency of the power grid.

[0063] Parallel capacitor C P The selection criteria are as follows

[0064]

[0065] Where Q is the reactive power allowed by the power grid.

[0066] This embodiment also provides a method for using a high-voltage isolation circuit, the operation steps of which are as follows: Figure 2 As shown.

[0067] When the cable is working normally, the isolation circuit operates in mode 1:S P and S S disconnect;

[0068] Due to the characteristic of capacitors to pass high frequencies and block low frequencies, the normal power frequency (normal power grid frequency is: the 50Hz operating frequency of the power grid) high voltage on the cable core will be blocked by C. S The signal is blocked, thus preventing damage to the BIS equipment; simultaneously, the high-frequency signal emitted by the BIS equipment during testing (the high-frequency test signal actively output by the instrument during BIS testing, somewhat like radar) will not be affected by C. SThis achieves the goal of isolating normal power frequency high voltage and protecting BIS test equipment while enabling the injection and return of BIS equipment test signals.

[0069] When an arc fault occurs in the cable, the isolation circuit operates in mode 2:S S Closed, S P Close first, then open.

[0070] 1) Since the frequency of the arc signal generated by the arc fault is unknown, in order to protect the BIS equipment, switch S should first be switched off. P Closed, the arc signal passes through the cable core and C S Passed to the isolation circuit, and through C P Grounding, and the high-frequency signal sent by the BIS equipment during testing will also pass through C. P Grounding;

[0071] 2) Through current sensor S C With voltage sensor S V The voltage and current flowing through the cable core are measured. The measured voltage and current are then passed through the corresponding conditioning circuits to reduce and bias the measured analog signals. Finally, the signals are converted into digital signals by the ADC so that they are within the processing range of the MCU.

[0072] 3) The MCU then uses Fourier transform to process the identified signal to find the frequency f corresponding to the component with the highest energy in the arc signal;

[0073] 4) After obtaining the frequency f, and because C S Given this information, the inductance L corresponding to the series resonance of the circuit at this frequency can be calculated. S,exp

[0074]

[0075] 5) MCU according to L S,exp The value controls the series matrix inductor L P The switch in L makes L P Approaching L S,exp L P The relationship with the switch state can be expressed as follows:

[0076] L P =L1×(1×S1+2×S2+2) 2 ×S3+...+2 n-1 ×S n )

[0077] 6) At this time, for an arc signal with frequency f, the isolation circuit will experience series resonance and short circuit, thus achieving the purpose of suppressing the arc signal;

[0078] 7) Since the BIS is frequency-adjustable, once the frequency f is known, adjust the frequency band of the BIS test to exclude that frequency. At this time, disconnect switch S. P This allows for the injection and return of BIS test signals while isolating high-frequency, high-energy arc signals and protecting BIS test equipment.

[0079] Because the isolation circuit affects the broadband impedance of the cable measured by the broadband impedance spectrometer, an algorithm is needed to correct the broadband impedance measured by the isolation circuit in order to obtain the intrinsic broadband impedance of the cable.

[0080] This embodiment also provides an impedance correction method for a high-voltage isolation circuit, when the isolation circuit is operating in mode...

[0081] In Equation 1, the intrinsic broadband impedance Z(ω) of the cable can be calculated as follows:

[0082]

[0083] Where Z'(ω) is the equivalent impedance of the isolation circuit and the cable cascaded by the broadband impedance spectrometer when the isolation circuit is working in mode 1, and ω is the angular frequency of the test signal. The impedance is only meaningful after the value of the angular frequency is determined.

[0084] When the isolation circuit operates in mode 2, the intrinsic broadband impedance Z(ω) of the cable can be calculated as follows:

[0085]

[0086] Where Z (ω) is the equivalent impedance of the isolation circuit and the cable cascaded by the broadband impedance spectrometer when the isolation circuit is working in mode 2, and ω is the angular frequency of the test signal. The impedance is only meaningful after the value of the angular frequency is determined.

[0087] In summary, this embodiment achieves the following technical effects:

[0088] 1) Utilizing the characteristic of capacitors to pass high frequencies and block low frequencies, a capacitor C is connected in series in the isolation circuit. S C S It can suppress high power frequency voltage without affecting the test signals sent by the BIS equipment, thus achieving the goal of isolating normal high power frequency voltage and protecting the BIS test equipment while allowing the BIS equipment test signals to be injected and returned.

[0089] 2) The MCU controls the series inductor matrix to adjust the inductance value so that the isolation circuit generates series resonance at the frequency corresponding to the arc signal with the highest energy, thereby achieving high-energy arc signal isolation and protecting the BIS test equipment. During testing, since the BIS is frequency-adjustable, the test signal frequency band is set to not include the frequency corresponding to the arc signal with the highest energy. This allows the BIS equipment test signal to be injected and returned while isolating high-frequency, high-energy arc signals and protecting the BIS test equipment.

[0090] 3) Cable defect / fault detection and location require the cable's intrinsic broadband impedance. An algorithm corrects the broadband impedance measured through the isolation circuit, eliminating the influence of the isolation circuit on the cable's intrinsic broadband impedance.

[0091] It solves the problems existing in the current technology.

[0092] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention, and they should all be covered within the scope of the claims and specification of the present invention.

Claims

1. A high-voltage isolation circuit, characterized in that, Including current sensor S C Voltage sensor S V Series capacitor C S Transient voltage suppressor diode (TVS), voltage conditioning circuit (ADJ) V ADJ current conditioning circuit I Analog-to-digital converter (ADC), microcontroller unit (MCU), series matrix inductor (L) P Control L P Connection / Disconnection Switch S S Parallel capacitor C P Control C P Connection / Disconnection Switch S P ; The parallel capacitor C P With control C P Connection / Disconnection Switch S P Series connection, the series matrix inductor L P With control L P Connection / Disconnection Switch S S The parallel capacitors C connected in series and in series with each other. P With control C P Connection / Disconnection Switch S P and the series matrix inductors L connected in series with each other P With control L P Connection / Disconnection Switch S S Connected in parallel with the transient voltage suppressor diode TVS and the voltage sensor S. V Current sensor S C Parallel connection; the series capacitor C S Set in transient suppression diode TVS, voltage sensor S V Between; the voltage sensor S V Current sensor S C Through voltage conditioning circuit ADJ respectively V ADJ current conditioning circuit I Connected to the analog-to-digital converter (ADC); the series matrix inductor L P Both the analog-to-digital converter (ADC) and the microcontroller unit (MCU) are connected to a single-chip microcomputer. The parallel capacitor C P Not with switch S P One end of the connection, and switch S P Not connected in parallel with capacitor C P One end of the connection is used to receive the injection signal, the current sensor S C After connecting to the cable, connect to the voltage sensor S. V in parallel.

2. The high-voltage isolation circuit according to claim 1, characterized in that, The series matrix inductor L P It consists of several inductor elements and several control switches in a series matrix inductor. One inductor element is connected in parallel with a corresponding control switch in a series matrix inductor and in series with another inductor element and a control switch in a series matrix inductor connected in parallel with it.

3. A high-voltage isolation circuit according to claim 2, characterized in that, The single-chip microcomputer MCU has an FFT module.

4. A high-voltage isolation circuit according to claim 2, characterized in that, The high-voltage isolation circuit includes two operating modes: Mode 1 and Mode 2. In Mode 1, L is controlled... P Connection / Disconnection Switch S S and control C P Connection / Disconnection Switch S P All disconnected; in mode two, control L P Connection / Disconnection Switch S S Close, control C P Connection / Disconnection Switch S P Close first, then open.

5. A high-voltage isolation circuit according to claim 2, characterized in that, The series capacitor C S The selection criteria are as follows: Among them, U R U is the rated voltage of the power grid. max R is the maximum voltage that the BIS device can withstand. eq This is the equivalent resistance of the BIS equipment during testing. The angular frequency of the power grid; Parallel capacitor C P The selection criteria are as follows: Where Q is the reactive power allowed by the power grid, and U R This is the rated voltage of the power grid. C is the angular frequency of the power grid. S It is a series capacitor.

6. The method of using a high-voltage isolation circuit as described in claim 4, characterized in that, Includes the following steps: S1: Set the high-voltage isolation circuit to mode two; S2: via current sensor S C With voltage sensor S V To measure the voltage and current flowing through the cable core; S3: The voltage and current measured in step S2 are respectively passed through the corresponding voltage conditioning circuit ADJ. V ADJ current conditioning circuit I The measured analog signal is reduced and biased, and then converted into a digital signal by an ADC so that it is within the processing range of the MCU. S4: The MCU then uses a Fourier transform to process the signal processed in step S3 to find the frequency corresponding to the component with the highest energy in the arc signal. f； S5: Calculate the frequency f The inductance corresponding to the series resonance of the lower circuit L S,exp ; S6: MCU according to L S,exp The value controls the series matrix inductor. L P The switch in the middle makes L P Approaching L S,exp ; S7: Adjust the frequency band of the BIS test to exclude this frequency, then disconnect switch S. P .

7. The method of using a high-voltage isolation circuit according to claim 6, characterized in that, The inductor in step S5 L S,exp The calculation formula is as follows: in, f C is the frequency corresponding to the component with the highest energy in the arc signal obtained in step S4. S It is a series capacitor.

8. The impedance correction method for a high-voltage isolation circuit as described in claim 4, characterized in that, When the high-voltage isolation circuit is in mode one, the intrinsic broadband impedance of the cable is... As shown in the following formula: in, C is the equivalent impedance of the isolation circuit and the cascaded cable, measured by a broadband impedance spectrometer when the isolation circuit is operating in mode one. S It is a series capacitor. This is the angular frequency of the test signal.

9. The impedance correction method for a high-voltage isolation circuit according to claim 8, characterized in that, When the high-voltage isolation circuit is in mode two, the intrinsic broadband impedance of the cable is... As shown in the following formula: in, C is the equivalent impedance of the isolation circuit and the cascaded cable, measured by a broadband impedance spectrometer when the isolation circuit is operating in mode two. S For series capacitors, L P For series matrix inductors, This is the angular frequency of the test signal.

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