Methods and systems for generating correlated random bit streams

Abstract

This invention provides a method and system for generating correlated random bitstreams, belonging to the field of storage and computing technology. It involves applying a series of pulse sequences with fixed amplitude and pulse width to a device integrating resistive switching and selection characteristics, causing the device to randomly turn on under each pulse, corresponding to the generation of a 0 / 1 random bitstream sequence. Within the pulse sequence under fixed pulse conditions, reset-set pulse pairs are inserted. The reset pulse sets the device to a non-volatile resistive switching mode, setting the subsequent random bitstream signal generated under the original pulse conditions to "0". Then, the set pulse returns the device to a volatile threshold switching mode. By controlling the number of reset-set pulse pairs, a probability between 0 and P can be achieved. base Random bitstream adjustment between input bitstreams controls the position of inserted 0s to be the same, thereby enhancing the correlation between input bitstreams.

Description

Technical Field

[0001] This invention belongs to the field of novel storage and computing technology, specifically relating to a method, system, electronic device, and storage medium for generating correlated random bit streams. Background Technology

[0002] As device dimensions continue to shrink to the nanoscale, circuit reliability will become an increasingly serious problem.

[0003] Stochastic computing (SC) is a novel computing method based on a random bitstream sequence of 0s and 1s. It boasts advantages such as simple circuitry, low power consumption, and high fault tolerance, and has attracted widespread attention in recent years. Unlike binary encoding, each bit in a random bitstream has equal weight, and the error caused by bit flipping at any position is equal. Therefore, stochastic computing has a high fault tolerance rate. Furthermore, due to its unique data encoding method, complex arithmetic operations can be implemented using simple gate circuits; for example, multiplication can be performed using only an AND gate.

[0004] The accuracy of random computation depends on two aspects: first, the numerical quantization accuracy determined by the length of the random bit stream, meaning that data will introduce some error after being converted from binary to a random bit stream; and second, the computational accuracy affected by the correlation between random bit streams. Extending the length of the random bit stream can reduce quantization errors during data encoding to some extent. To improve computational accuracy, different circuits for generating random bit streams with strong and weak correlations are needed. When performing multiplication calculations through AND gates, the input random bit streams must be independent; that is, the weaker the correlation between the input random bit streams, the higher the computational accuracy. Strongly correlated input random bit streams can be used to perform specific calculations through simple gate circuits, such as achieving a minimum value through an AND gate, a maximum value through an OR gate, and absolute value subtraction through an XOR gate.

[0005] Traditional CMOS-based random computing circuits require additional decorrelation or correlation enhancement circuits to generate independent or correlated random bitstreams, further increasing circuit overhead and power consumption. Furthermore, the circuits are difficult to reconfigure for different computational tasks. While random bitstream generators based on novel memory devices such as resistive random access memory (RRAM) and threshold switch selection devices can reduce power consumption and circuit overhead, no publicly available technology for controlling the correlation of generated bitstreams based on these novel memory devices has yet been disclosed.

[0006] Therefore, there is an urgent need for a technology to control and generate bitstream correlation in novel storage devices. Summary of the Invention

[0007] The present invention provides a method, system, electronic device and storage medium for generating a correlated random bit stream based on a novel resistive random access memory device, in order to overcome at least one technical problem existing in the prior art.

[0008] To achieve the above objectives, the present invention provides a method for generating a correlated random bit stream, comprising:

[0009] A device integrating resistive switching and selection characteristics is used, and the delay time enabled in the selection characteristic of the device is used as a random source to generate a random bit stream under preset pulse conditions; wherein, the probability of "1" in the random bit stream is a base probability;

[0010] The pulse sequence of the random bit stream is divided into N equal parts. segment Segment, from which N can be randomly selected slot Segment, in the selected N slot A reset-set pulse pair is inserted into the pulse sequence. The reset signal is used to put the device back into resistive switching mode and set the bit stream signal generated subsequently under the preset pulse condition to "0".

[0011] The device is reset back to the volatile threshold switching mode by using a set signal to restart the generation of random bit stream under the preset pulse condition.

[0012] The device generates two random bit streams, and the positions of the reset-set pulse pairs inserted in the two random bit streams are controlled to be the same, so that the 0 bits inserted in the two random bit streams overlap, thereby enhancing the correlation between the random bit streams.

[0013] To address the above problems, the present invention also provides a system for generating correlated random bit streams, comprising:

[0014] An initial random bit stream generation unit is used to generate a random bit stream under preset pulse conditions by using a device that integrates resistive switching and selection characteristics, with the delay time enabled in the selection characteristics of the device as a random source; wherein, the probability of "1" in the random bit stream is a base probability.

[0015] A pulse sequence processing unit is used to divide the pulse sequence of the random bit stream into N equal parts. segment Segment, from which N can be randomly selected slot Segment, in the selected N slot A reset-set pulse pair is inserted into the pulse sequence. The reset signal is used to put the device back into resistive switching mode and set the bit stream signal generated subsequently under the preset pulse condition to "0".

[0016] The device reset unit is used to restart the generation of random bit stream under the preset pulse condition using a set signal, so as to reset the device back to the volatile threshold switch mode.

[0017] A pulse control unit is used to generate two random bit streams using the device, and to control the positions of the reset-set pulse pairs inserted in the two random bit streams to be the same, so that the 0 bits inserted in the two random bit streams overlap, thereby enhancing the correlation between the random bit streams.

[0018] To address the aforementioned problems, the present invention also provides an electronic device, comprising at least one processor; and a memory communicatively connected to the at least one processor; wherein,

[0019] The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the steps in the method for generating a correlated random bit stream as described above.

[0020] To address the aforementioned problems, the present invention also provides a computer-readable storage medium storing at least one instruction, which, when executed by a processor in an electronic device, implements the aforementioned method for generating a correlated random bit stream.

[0021] The method, system, electronic device, and storage medium for generating correlated random bit streams provided by this invention have the following beneficial effects:

[0022] 1) Compared with the circuits that control bit stream correlation in traditional CMOS circuits, the present invention can realize the generation of correlated random bit streams in novel resistive switching devices without the need to introduce additional correlation control circuits, thus reducing circuit overhead and power consumption.

[0023] 2) This invention utilizes a novel resistive switching device to generate a random bit stream. Due to the nanosecond-level switching speed of the novel resistive switching device, the bit generation rate is higher.

[0024] 3) This invention can achieve a probability between 0 and P by controlling the number of reset-set pulse pairs inserted. base Random bitstream adjustment between them.

[0025] 4) This invention can adjust the calculation accuracy of the correlated random bit stream by controlling the number of segments under a fixed bit stream length. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a flowchart illustrating a method for generating a correlated random bit stream according to an embodiment of the present invention.

[0028] Figure 2 A schematic diagram illustrating different calculations performed on a correlated random bit stream using basic gate circuit units according to an embodiment of the present invention;

[0029] Figure 3 This is a schematic diagram of a correlated random bit stream obtained by controlling the insertion of reset-set pulse pairs at the same position according to an embodiment of the present invention;

[0030] Figure 4(a) is a schematic diagram showing the variation of the error of the correlation random bit stream generated according to the embodiment of the present invention as a function of bit stream length and number of segments by absolute value subtraction through an XOR gate.

[0031] Figure 4(b) is a schematic diagram showing the change of error in absolute value subtraction calculation of correlated random bit streams using an XOR gate as a function of bit stream length after optimizing the number of segments according to an embodiment of the present invention.

[0032] Figure 5(a) shows the variation of the error of the correlation random bit stream generated according to the embodiment of the present invention through the AND gate for minimum value calculation as a function of bit stream length and number of segments;

[0033] Figure 5(b) is a schematic diagram showing the change of error in the minimum value calculation of the correlated random bit stream by AND gate with the bit stream length after the number of segments is optimized according to an embodiment of the present invention.

[0034] Figure 6(a) is a schematic diagram showing the variation of the error in calculating the maximum value of the correlated random bit stream generated according to an embodiment of the present invention as a function of bit stream length and number of segments;

[0035] Figure 6(b) is a schematic diagram showing the change of error in calculating the maximum value of the correlated random bit stream through an OR gate as a function of the bit stream length after optimizing the number of segments according to an embodiment of the present invention.

[0036] Figure 7 This is a schematic diagram of the modules of a system for generating a correlated random bit stream according to an embodiment of the present invention;

[0037] Figure 8This is a schematic diagram of the internal structure of an electronic device that implements a method for generating a correlated random bit stream according to an embodiment of the present invention;

[0038] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0039] It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0040] Based on the problems existing in the prior art, the present invention mainly provides a method and system for generating correlated random bit streams.

[0041] Figure 1 This is a flowchart illustrating a method for generating a correlated random bitstream according to an embodiment of the present invention. The method can be executed by a system, which can be implemented in software and / or hardware.

[0042] Figure 1 The methods for generating correlated random bitstreams are described in general. For example... Figure 1 As shown, in this embodiment, the method for generating a correlated random bit stream includes steps S110 to S140.

[0043] S110. A device integrating resistive switching and selection characteristics is used, and the delay time enabled in the selection characteristic of the device is used as a random source to generate a random bit stream under a preset pulse condition.

[0044] S120. Divide the pulse sequence of the random bit stream into N equal parts. segment Segment, from which N can be randomly selected slot Segment, in the selected N slot A reset-set pulse pair is inserted into the pulse sequence. The reset signal is used to put the device back into resistive switching mode and set the bit stream signal generated subsequently under the preset pulse condition to "0".

[0045] S130. The random bit stream generation is restarted under the preset pulse condition using a set signal to reset the device back to the volatile threshold switch mode.

[0046] S140. Using the device, two random bit streams are generated, and the positions of the reset-set pulse pairs inserted in the two random bit streams are controlled to be the same, so that the 0 bits inserted in the two random bit streams overlap, thereby enhancing the correlation between the random bit streams.

[0047] Compared to traditional schemes that generate correlated bit streams based on CMOS circuits, this invention generates correlated random bit streams based on novel resistive switching devices. The random bit stream generation circuit is simpler and consumes less power. Due to the nanosecond-level switching speed of the novel resistive switching devices, the bit generation rate is higher. If the cross-shaped array structure is used simultaneously to apply corresponding pulses to a column / row of devices in the array, each device will generate a different response, corresponding to 0 and 1 bits in the bit stream. This allows for the large-scale parallel generation of correlated random bit streams, further reducing latency.

[0048] The following provides a detailed explanation of each step.

[0049] To generate a correlated random bit stream based on the novel resistive random access memory, the delay time enabled in the device's selection characteristics must first be used as a random source to generate a random bit stream under preset pulse conditions.

[0050] In this invention, a device integrating resistive switching and selection characteristics is selected as the device for generating a random bit stream. The delay time enabled in the device's selection characteristic is used as the random source, and the probability of a "1" in the random bit stream generated under preset pulse conditions is taken as the base probability P. base .

[0051] As an example, the device integrating resistive switching and selection characteristics is a two-terminal device structure or a three-terminal field-effect transistor structure employing a superimposed resistive layer and phase-change layer. Through voltage adjustment, this device integrating resistive switching and selection characteristics can switch between a non-volatile resistive switching mode and a volatile threshold switching mode. That is, a higher negative reset voltage can switch the device from the volatile threshold switching mode to the non-volatile resistive switching mode; a higher positive set voltage can set the device from the non-volatile mode to the volatile threshold switching mode. Furthermore, the resistive switching voltage V in the non-volatile resistive switching mode... set Threshold switching voltage V greater than the volatile threshold switching mode th .

[0052] In one specific embodiment of the present invention, the device with integrated resistive switching and selection characteristics used in the random bitstream generator adopts a structure of superimposed resistive switching layer and phase change layer. The resistive switching layer can be a metal oxide with resistive switching characteristics, such as HfO2 or TaO. x The phase change layer can be made of a phase change material with insulator-metal transition (IMT) properties, such as VO2+. x NbO x wait.

[0053] Because the device undergoes a metal-to-insulator (IMT) transition in volatile threshold switching mode, this transition process is affected by thermal disturbances. Therefore, the threshold switching voltage of the corresponding device will fluctuate in different current-voltage scan cycles. Utilizing this characteristic, if a series of pulse sequences with fixed amplitude and pulse width are applied to the device, the device will randomly turn on under each pulse, generating a random 0 / 1 bit stream sequence. Therefore, after using the turn-on delay time in the device selection characteristic as a random source, and using this pulse sequence with fixed amplitude and pulse width as a fixed pulse, the device generates a random bit stream under this fixed pulse. The probability of a "1" in this random bit stream can be considered as a baseline probability P. base .

[0054] Specifically, as an example, the preset pulse conditions for generating a random bit stream are: the pulse amplitude is within the threshold voltage fluctuation range, and the pulse width is the average value of the device turn-on delay time obtained statistically under the corresponding pulse amplitude.

[0055] After generating a random bit stream under preset pulse conditions, the pulse sequence of the generated random bit stream is divided into N equal parts. segment Segment, from which N can be randomly selected slot Segment, in the selected N slot In the pulse sequence, a reset-set pulse pair is inserted. The reset pulse sets the device to non-volatile resistive switching mode. Because the resistive switching voltage V in non-volatile resistive switching mode... set Threshold switching voltage V above the volatile threshold switching mode th Therefore, the device will not be able to turn on randomly under the original pulse, and all bits will be 0.

[0056] Then, the random bit stream generation is restarted via a set pulse to return the device to volatile threshold switching mode. At this point, the probability of a "1" in the resulting random bit stream is P. m =P base *

[0057] (N segment -N slot ) / N segment This allows for the adjustment of the probability of "1" in a random bit stream.

[0058] By controlling the number of reset-set pulse pairs, a probability between 0 and P can be achieved. base Random bitstream adjustment between them.

[0059] Therefore, by using the above method for generating random bit streams, two random bit streams can be generated using the same device, or two random bit streams can be generated simultaneously and in parallel using two devices, under the condition of controlling the reset-set pulse pairs. The reset-set pulse pairs act as control signals for bit stream generation, ensuring that the positions where the reset-set pulse pairs are inserted are the same in both random bit streams, thus ensuring that the inserted 0 bits in the two random bit streams overlap. Since the positions of 0 / 1 bits are the same between different random bit streams in highly correlated random bit streams, based on the above random bit stream generation scheme, the positions of inserted 0 bits between random bit streams can be controlled to be the same, i.e., the positions where the reset-set pulse pairs are inserted are controlled to be the same. This enhances the correlation between random bit streams, which can be used for calculating maximum, minimum, and absolute value subtraction.

[0060] Furthermore, in the above method for generating random bit streams, since the number of segments N segment This will affect the randomness of the bit stream, thereby further affecting the calculation accuracy. Therefore, the calculation accuracy of the correlated random bit stream can be adjusted by controlling the number of segments under a fixed bit stream length.

[0061] As an example, in controlling the number of segments, the pulse generation conditions can be adjusted by the pulse sequence processing unit during the aforementioned process of generating the correlated random bit stream, thereby achieving different numbers of pulse segments, and then adjusting the calculation accuracy of the correlated random bit stream by different numbers of pulse segments.

[0062] The following will combine Figures 2 to 6(b) The following is a more detailed explanation of the application examples of how the method for generating correlated random bit streams proposed in this invention improves the calculation accuracy in the calculation of maximum, minimum, and absolute value subtraction.

[0063] Figure 2 A schematic diagram illustrating different calculations performed on a correlated random bit stream using basic gate circuit units. (e.g.) Figure 2 As shown, the correlation of random bit streams can be processed by XOR gates, OR gates, and AND gates to calculate the absolute value subtraction, maximum value, and minimum value. In a correlation of random bit streams, the 0 / 1 positions overlap considerably.

[0064] Figure 3 This is a schematic diagram illustrating the correlated random bit stream obtained by controlling the insertion of reset-set pulse pairs at the same position in a specific embodiment of the present invention. For example... Figure 3 As shown, the present invention achieves correlated bit streams by controlling the overlapping positions of the inserted reset-set pulse pairs, thereby causing the positions of 0 bits in the two random bit streams to largely overlap, thus enhancing the correlation between the bit streams.

[0065] Figure 4(a) shows the variation of the error of the absolute value subtraction calculation of the correlated random bit stream generated by the XOR gate in a specific embodiment of the present invention with the bit stream length and the number of segments; Figure 4(b) shows the variation of the error of the absolute value subtraction calculation of the correlated random bit stream by the XOR gate with the bit stream length after optimizing the number of segments in a specific embodiment of the present invention.

[0066] As shown in Figure 4(a), the method for generating correlated random bitstreams in this invention calculates the absolute value of the generated correlated bitstreams through an XOR gate. The calculation error fluctuates with the number of segments for different bitstream lengths. After segment optimization, the lowest calculation error for the corresponding bitstream length is obtained, as shown in Figure 4(b). The lowest error for different bitstream lengths decreases as the bitstream length increases; with a bitstream length of 1024, the corresponding lowest calculation error is 5.4%.

[0067] Figure 5(a) shows the variation of the error of the correlation random bit stream generated in the specific embodiment of the present invention through the AND gate for minimum value calculation with the bit stream length and the number of segments; Figure 5(b) shows the variation of the error of the correlation random bit stream through the AND gate for minimum value calculation with the bit stream length after optimizing the number of segments in the specific embodiment of the present invention.

[0068] As shown in Figure 5(a), the method for generating correlated random bitstreams in this invention is used to calculate the minimum value of the generated correlated bitstream through an AND gate. The calculation error fluctuates with the number of segments for different bitstream lengths. After segment optimization, the lowest calculation error for the corresponding bitstream length is obtained, as shown in Figure 5(b). The lowest error for different bitstream lengths decreases as the bitstream length increases; with a bitstream length of 1024, the corresponding lowest calculation error is 2.9%.

[0069] Figure 6(a) shows the variation of the error in calculating the maximum value of the correlated random bit stream generated by the OR gate in a specific embodiment of the present invention with the bit stream length and the number of segments; Figure 6(b) shows the variation of the error in calculating the maximum value of the correlated random bit stream by the OR gate with the bit stream length after optimizing the number of segments in a specific embodiment of the present invention.

[0070] As shown in Figure 6(a), the method for generating correlated random bitstreams in this invention calculates the maximum value of the generated correlated bitstreams using an OR gate. The calculation error fluctuates with the number of segments for different bitstream lengths. After segment optimization, the lowest calculation error for the corresponding bitstream length is obtained, as shown in Figure 6(b). The lowest error for different bitstream lengths decreases as the bitstream length increases; with a bitstream length of 1024, the corresponding lowest calculation error is 2.6%.

[0071] Therefore, the novel resistive switching memory device proposed in this invention can generate a highly correlated random bit stream by controlling the overlapping positions of the inserted reset-set pulse pairs. In the calculation of absolute value subtraction, minimum value, and maximum value, high calculation accuracy can be obtained by optimizing the number of segments.

[0072] Corresponding to the above-described method for generating correlated random bit streams, the present invention also provides a system for generating correlated random bit streams, which can be installed in electronic devices. Figure 7 This is a schematic diagram of the logical structure of a system for generating a correlated random bit stream according to an embodiment of the present invention.

[0073] like Figure 7 As shown, depending on the functions implemented, the system 700 for generating correlated random bit streams may include an initial random bit stream generation unit 710, a pulse sequence processing unit 720, a device reset unit 730, and a pulse control unit 740. The unit of this invention can also be called a module, which refers to a series of computer program segments that can be executed by the processor of an electronic device and can perform a fixed function, and which are stored in the memory of the electronic device.

[0074] In this embodiment, the functions of each module / unit are as follows:

[0075] The initial random bitstream generation unit 710 is used in a device that integrates resistive switching and selection characteristics. It uses the delay time enabled in the selection characteristic of the device as a random source to generate a random bitstream under preset pulse conditions; wherein the probability of "1" in the random bitstream is a base probability P. base ;

[0076] Pulse sequence processing unit 720 is used to divide the pulse sequence of the random bit stream into N equal parts. segment Segment, from which N can be randomly selected slot Segment, in the selected N slot A reset-set pulse pair is inserted into the pulse sequence. The reset signal is used to put the device back into resistive switching mode and set the bit stream signal generated subsequently under the preset pulse condition to "0".

[0077] The device reset unit 730 is used to restart the generation of random bit stream under the preset pulse condition using a set signal, so as to reset the device back to the volatile threshold switch mode.

[0078] The pulse control unit 740 is used to generate two random bit streams using the device, and to control the positions of the reset-set pulse pairs inserted in the two random bit streams to be the same, so that the 0 bits inserted in the two random bit streams overlap, thereby enhancing the correlation between the random bit streams.

[0079] The system 700 for generating correlated random bit streams of the present invention is based on a novel resistive switching device. The random bit stream generation circuit is simpler and consumes less power. Due to the nanosecond-level switching speed of the novel resistive switching device, the bit generation rate is higher. At the same time, by utilizing its cross-shaped array structure, the correlated random bit stream can be generated in parallel on a large scale, further reducing the latency.

[0080] like Figure 8 As shown, the present invention provides an electronic device for generating a method for generating a correlated random bit stream.

[0081] The electronic device 8 may include a processor 80, a memory 81, and a bus. It may also include a computer program stored in the memory 81 and executable on the processor 80, such as a program 82 for generating a correlated random bit stream. The memory 81 may include both internal storage units of the system generating the correlated random bit stream and external storage devices. The memory 81 can be used not only to store application software and various types of data, such as the code for the program generating the correlated random bit stream, but also to temporarily store data that has been output or will be output.

[0082] The memory 81 includes at least one type of readable storage medium, such as flash memory, portable hard drive, multimedia card, card-type memory (e.g., SD or DX memory), magnetic memory, magnetic disk, optical disk, etc. In some embodiments, the memory 81 can be an internal storage unit of the electronic device 8, such as a portable hard drive. In other embodiments, the memory 81 can be an external storage device of the electronic device 8, such as a plug-in portable hard drive, smart media card (SMC), secure digital card (SD), flash card, etc., equipped on the electronic device 8.

[0083] In some embodiments, the processor 80 may be composed of integrated circuits, such as a single packaged integrated circuit or multiple integrated circuits with the same or different functions, including combinations of one or more central processing units (CPUs), microprocessors, digital processing chips, graphics processors, and various control chips. The processor 80 is the control unit of the electronic device, connecting various components of the entire electronic device through various interfaces and lines. It executes programs or modules stored in the memory 81 (e.g., programs that generate correlated random bit streams) and calls data stored in the memory 81 to perform various functions of the electronic device 8 and process data.

[0084] The bus can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This bus can be divided into an address bus, a data bus, a control bus, etc. The bus is configured to enable communication between the memory 81 and at least one processor 80, etc.

[0085] Figure 8 Only electronic devices with components are shown; it will be understood by those skilled in the art that... Figure 8 The structure shown does not constitute a limitation on the electronic device 8, and may include fewer or more components than shown, or combine certain components, or have different component arrangements.

[0086] For example, although not shown, the electronic device 8 may also include a power supply (such as a battery) to power various components. Preferably, the power supply can be logically connected to the at least one processor 80 through a power management system, thereby enabling functions such as charging management, discharging management, and power consumption management through the power management system. The power supply may also include one or more DC or AC power supplies, recharging systems, power fault detection circuits, power converters or inverters, power status indicators, and other arbitrary components. The electronic device 8 may also include various sensors, Bluetooth modules, Wi-Fi modules, etc., which will not be described in detail here.

[0087] Furthermore, the electronic device 8 may also include a network interface. Optionally, the network interface may include a wired interface and / or a wireless interface (such as a Wi-Fi interface, a Bluetooth interface, etc.), which is typically used to establish communication connections between the electronic device 8 and other electronic devices.

[0088] Optionally, the electronic device 8 may further include a user interface, which may be a display, an input unit (such as a keyboard), or a standard wired or wireless interface. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, or an OLED (Organic Light-Emitting Diode) touchscreen. The display may also be appropriately referred to as a screen or display unit, used to display information processed in the electronic device 8 and to display a visual user interface.

[0089] It should be understood that the embodiments described are for illustrative purposes only and are not limited to this structure in the scope of the patent application.

[0090] The program 82 for generating a correlated random bit stream, stored in the memory 81 of the electronic device 8, is a combination of multiple instructions that, when run in the processor 80, can achieve the following:

[0091] S110. A device integrating resistive switching and selection characteristics is used, and the delay time enabled in the selection characteristic of the device is used as a random source to generate a random bit stream under a preset pulse condition.

[0092] S120. Divide the pulse sequence of the random bit stream into N equal parts. segment Segment, from which N can be randomly selected slot Segment, in the selected N slot A reset-set pulse pair is inserted into the pulse sequence. The reset signal is used to put the device back into resistive switching mode and set the bit stream signal generated subsequently under the preset pulse condition to "0".

[0093] S130. The random bit stream generation is restarted under the preset pulse condition using a set signal to reset the device back to the volatile threshold switch mode.

[0094] S140. Using the device, two random bit streams are generated, and the positions of the reset-set pulse pairs inserted in the two random bit streams are controlled to be the same, so that the 0 bits inserted in the two random bit streams overlap, thereby enhancing the correlation between the random bit streams.

[0095] Specifically, the processor 80's implementation method for the above instructions can be found in [reference needed]. Figure 1 The descriptions of the relevant steps in the corresponding embodiments are not repeated here.

[0096] Furthermore, if the modules / units integrated in the electronic device 8 are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. The computer-readable medium may include: any entity or system capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, or a read-only memory (ROM).

[0097] This invention also provides a computer-readable storage medium, which may be non-volatile or volatile, and stores a computer program that is implemented when executed by a processor:

[0098] S110. A device integrating resistive switching and selection characteristics is used, and the delay time enabled in the selection characteristic of the device is used as a random source to generate a random bit stream under a preset pulse condition.

[0099] S120. Divide the pulse sequence of the random bit stream into N equal parts. segment Segment, from which N can be randomly selected slot Segment, in the selected N slot A reset-set pulse pair is inserted into the pulse sequence. The reset signal is used to put the device back into resistive switching mode and set the bit stream signal generated under the preset pulse conditions to "0".

[0100] S130. The random bit stream generation is restarted under the preset pulse condition using a set signal to reset the device back to the volatile threshold switch mode.

[0101] S140. Using the device, two random bit streams are generated, and the positions of the reset-set pulse pairs inserted in the two random bit streams are controlled to be the same, so that the 0 bits inserted in the two random bit streams overlap, thereby enhancing the correlation between the random bit streams.

[0102] Specifically, the specific implementation method of the computer program when executed by the processor can be referred to the description of the relevant steps in the method for generating a correlated random bit stream in the embodiment, and will not be repeated here.

[0103] In the several embodiments provided by this invention, it should be understood that the disclosed devices, systems, and methods can be implemented in other ways. For example, the system embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and other division methods may be used in actual implementation.

[0104] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0105] Furthermore, the functional modules in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in the form of hardware plus software functional modules.

[0106] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention.

[0107] Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be embraced within the invention. No appended diagram markings in the claims should be construed as limiting the scope of the claims.

[0108] Furthermore, it is clear that the word "comprising" does not exclude other units or steps, and the singular does not exclude the plural. Multiple units or systems stated in a system claim may also be implemented by a single unit or system through software or hardware. The term "second class" is used to indicate names and does not indicate any specific order.

[0109] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. A method for generating a correlated random bit stream, characterized in that, include: A device integrating resistive switching and selection characteristics is used, and the delay time enabled in the selection characteristic of the device is used as a random source to generate a random bit stream under preset pulse conditions; wherein, the probability of "1" in the random bit stream is a base probability. The pulse sequence of the random bit stream is divided into N equal parts. segment Segment, from which N can be randomly selected slot Segment, in the selected N slot A reset-set pulse pair is inserted into the pulse sequence to return the device to resistive switching mode using the reset signal, and to set the subsequent bitstream signal generated under the preset pulse conditions to "0"; wherein, in the selected N slot After inserting reset-set pulse pairs into a segmented pulse sequence, the probability of "1" in the resulting random bit stream is P. m = P base (N segment -N slot ) / N segment , where P base As the baseline probability; The device is reset back to the volatile threshold switching mode by using a set signal to restart the generation of random bit stream under the preset pulse condition. The device generates two random bit streams, and the positions of the reset-set pulse pairs inserted in the two random bit streams are controlled to be the same, so that the 0 bits inserted in the two random bit streams overlap, thereby enhancing the correlation between the random bit streams.

2. The method for generating a correlated random bit stream according to claim 1, characterized in that, The device integrating resistive switching and selection characteristics is a two-terminal device structure or a three-terminal field-effect transistor structure that uses a superimposed resistive switching layer and a phase change layer.

3. The method for generating a correlated random bit stream according to claim 2, characterized in that, The resistive switching layer is formed using a metal oxide with resistive switching properties, and the phase change layer is formed using a phase change material with insulator-metal transition properties.

4. The method for generating a correlated random bit stream according to claim 3, characterized in that, The metal oxides include HfO2 and TaO. x The phase change material includes VO x and NbO x .

5. The method for generating a correlated random bit stream according to any one of claims 1 to 4, characterized in that, The device is used to generate two random bit streams, including: Two random bit streams are generated using the same device; or, Two random bit streams are generated simultaneously and in parallel by the two devices.

6. The method for generating a correlated random bit stream according to claim 5, characterized in that, The preset pulse condition is a series of pulse sequences with fixed amplitude and pulse width; The device is randomly turned on under each pulse, which generates a random 0 / 1 bit stream sequence.

7. A system for generating a correlated random bit stream, characterized in that, include: An initial random bitstream generation unit is used in a device that integrates resistive switching and selection characteristics. It uses the delay time enabled in the selection characteristic of the device as a random source to generate a random bitstream under preset pulse conditions; wherein the probability of "1" in the random bitstream is a base probability P. base ; A pulse sequence processing unit is used to divide the pulse sequence of the random bit stream into N equal parts. segment Segment, from which N can be randomly selected slot Segment, in the selected N slot A reset-set pulse pair is inserted into the pulse sequence to return the device to resistive switching mode using the reset signal, and to set the subsequent bitstream signal generated under the preset pulse conditions to "0"; wherein, in the selected N slot After inserting reset-set pulse pairs into a segmented pulse sequence, the probability of "1" in the resulting random bit stream is P. m = P base (N segment -N slot ) / N segment , where P base As the baseline probability; The device reset unit is used to restart the generation of random bit stream under the preset pulse condition using a set signal, so as to reset the device back to the volatile threshold switch mode. A pulse control unit is used to generate two random bit streams using the device, and to control the positions of the reset-set pulse pairs inserted in the two random bit streams to be the same, so that the 0 bits inserted in the two random bit streams overlap, thereby enhancing the correlation between the random bit streams.

8. An electronic device, characterized in that, The electronic device includes at least one processor; and a memory communicatively connected to the at least one processor; wherein... The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the steps in the method for generating a correlated random bit stream as described in any one of claims 1 to 6.

9. A computer-readable storage medium storing at least one instruction, characterized in that, When the at least one instruction is executed by a processor in an electronic device, it implements the method for generating a correlated random bit stream as described in any one of claims 1 to 6.

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