High linearity low power consumption radio frequency transmitter circuit and transmitting chip

Abstract

The application provides a high-linearity low-power-consumption radio frequency transmitter circuit and a transmitting chip, which comprise a data processing module, a linear conversion module, a passive mixing module, a transformer module and a linear output module; the data processing module is used for converting and filtering a digital baseband signal to generate a corresponding analog signal; the linear conversion module is used for improving the linearity of the analog signal by introducing feedback and mode conversion; the passive mixing module is used for converting the analog signal into a radio frequency signal with improved linearity; the transformer module is used for providing a direct current bias and reducing the overall power consumption of a radio frequency link; and the linear output module is used for mode converting the radio frequency signal to maintain the linearity of the radio frequency signal and match the radio frequency signal with a subsequent circuit. Through the linear conversion module, the passive mixing module, the transformer module and the linear output module, the linearity of a fundamental frequency analog signal is greatly improved in a low frequency stage, the linearity of a signal link is maintained in a radio frequency stage, the anti-interference performance is greatly enhanced, and the power consumption is reduced.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit design and application technology, and in particular to a high linearity, low power consumption radio frequency transmitter circuit and transmitter chip. Background Technology

[0002] Radio frequency (RF) transmitter chips are highly integrated chips used in communication signal chains to convert baseband signals from digital to analog, filter, mix, and amplify them before outputting the signal. Linearity is a key indicator for evaluating the transmission of multi-tone signals. Higher linearity results in lower third-order intermodulation power at the transmitter chip's output, which is beneficial for outputting wideband multi-carrier signals with a high signal-to-noise ratio. In recent years, with the development of technologies such as communication and radar, the requirements for the linearity of transmitter chips have become increasingly stringent. Typically, the linearity of RF transmitter chips is improved by increasing the overdrive voltage of semiconductor devices in the transmission link. However, this approach has drawbacks, including: extremely limited improvement in linearity, increased area of ​​the conversion module within the RF transmitter chip, and limitation of the RF frequency band in which the RF transmitter chip can operate.

[0003] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention

[0004] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide an RF transmitter circuit and a transmitter chip to solve the problem that it is difficult to improve the linearity of RF transmitter circuits in the prior art.

[0005] To achieve the above and other related objectives, the present invention provides a high-linearity, low-power radio frequency transmitter circuit, which includes at least: a data processing module, a linear conversion module, a passive mixer module, a transformer module, and a linear output module, wherein:

[0006] The data processing module performs conversion and filtering operations on the digital baseband signal to generate the corresponding analog signal;

[0007] The input of the linear conversion module is connected to the output of the data processing module, and the linearity of the analog signal is improved by introducing feedback and mode conversion.

[0008] The input terminal of the passive mixer module is connected to the output terminal of the linear conversion module, and is used to convert the analog signal into a radio frequency signal with improved linearity;

[0009] The input terminal of the transformer module is connected to the output terminal of the passive mixer module to provide DC bias and reduce the overall power consumption of the RF link.

[0010] The input terminal of the linear output module is connected to the output terminal of the transformer module, which performs mode conversion on the radio frequency signal, maintains the linearity of the radio frequency signal, and matches the radio frequency signal with the subsequent circuit.

[0011] Optionally, the data processing module includes a digital-to-analog converter unit and a filtering unit, wherein: the input terminal of the digital-to-analog converter unit is connected to the digital baseband signal; and the input terminal of the filtering unit is connected to the output terminal of the digital-to-analog converter unit.

[0012] Optionally, the linear conversion module includes: a first resistor, a second resistor, an operational amplifier, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a first current source, and a second current source, wherein: the first terminals of the first resistor and the second resistor are both connected to the output terminal of the data processing module; the non-inverting input terminal of the operational amplifier is connected to the second terminal of the first resistor, and the inverting input terminal of the operational amplifier is connected to the second terminal of the second resistor; the first terminal of the first current source is connected to the operating voltage, and the second terminal of the first current source is connected to the non-inverting input terminal of the operational amplifier; the first terminal of the second current source is connected to the operating voltage, and the second terminal of the second current source is connected to the inverting input terminal of the operational amplifier; the drain of the first NMOS transistor is connected to the first current source. The second terminal of the first NMOS transistor is connected to the second terminal of the second current source. The gate of the first NMOS transistor is connected to the output terminal of the operational amplifier, and the source of the first NMOS transistor is connected to the reference ground. The gate of the second NMOS transistor is connected to the gate of the first NMOS transistor, and the source of the second NMOS transistor is connected to the reference ground. The analog signal after mode conversion is obtained through the drain of the second NMOS transistor. The drain of the third NMOS transistor is connected to the second terminal of the second current source. The gate of the third NMOS transistor is connected to the output terminal of the operational amplifier, and the source of the third NMOS transistor is connected to the reference ground. The gate of the fourth NMOS transistor is connected to the gate of the third NMOS transistor, and the source of the fourth NMOS transistor is connected to the reference ground. The analog signal after mode conversion is obtained through the drain of the fourth NMOS transistor.

[0013] Optionally, the passive mixer module includes: a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, and an eighth NMOS transistor, wherein: the gate of the fifth NMOS transistor is connected to a first local oscillator signal, and the source of the fifth NMOS transistor is connected to the output terminal of the linear conversion module; the gate of the seventh NMOS transistor is connected to a third local oscillator signal, and the source of the seventh NMOS transistor is connected to the output terminal of the linear conversion module, and the drain of the seventh NMOS transistor is connected to the drain of the fifth NMOS transistor, wherein an RF signal is generated through the drains of the seventh and fifth NMOS transistors; the gate of the sixth NMOS transistor is connected to the third local oscillator signal, and the source of the sixth NMOS transistor is connected to the output terminal of the linear conversion module; the gate of the eighth NMOS transistor is connected to a second local oscillator signal, and the source of the eighth NMOS transistor is connected to the output terminal of the linear conversion module, and the drain of the eighth NMOS transistor is connected to the drain of the sixth NMOS transistor, wherein an RF signal is generated through the drains of the eighth and sixth NMOS transistors.

[0014] Optionally, the transformer module includes an on-chip transformer structure.

[0015] Optionally, the current conversion ratio of the on-chip transformer structure includes 1:N, where N is a natural number greater than or equal to 2.

[0016] Optionally, the linear output module includes: a first inductor, a second inductor, a third resistor, a fourth resistor, a ninth NMOS transistor, a tenth NMOS transistor, an eleventh NMOS transistor, and a twelfth NMOS transistor, wherein: the gate of the ninth NMOS transistor is connected to a first DC bias signal, and the source of the ninth NMOS transistor is connected to the output terminal of the transformer module; the gate of the tenth NMOS transistor is connected to a second DC bias signal, and the source of the tenth NMOS transistor is connected to the drain of the ninth NMOS transistor, wherein the output linearity of the RF signal is further improved through the drain of the tenth NMOS transistor; the third resistor is connected to the operating voltage and the... The drain of the tenth NMOS transistor is connected to the drain of the eleventh NMOS transistor; the first inductor is connected in parallel with the third resistor; the gate of the twelfth NMOS transistor is connected to the gate of the ninth NMOS transistor, and the source of the twelfth NMOS transistor is connected to the output terminal of the transformer module; the gate of the eleventh NMOS transistor is connected to the gate of the tenth NMOS transistor, and the source of the eleventh NMOS transistor is connected to the drain of the twelfth NMOS transistor, wherein the linearity of the output RF signal is further improved through the drain of the eleventh NMOS transistor; the fourth resistor is connected between the operating voltage and the drain of the eleventh NMOS transistor; the second inductor is connected in parallel with the fourth resistor.

[0017] To achieve the above and other related objectives, the present invention provides a transmitter chip, comprising an I-channel module and a Q-channel module. Both the I-channel module and the Q-channel module include at least one of the aforementioned high-linearity, low-power radio frequency (RF) transmitter circuits. The high-linearity, low-power RF transmitter circuits in the I-channel module and the high-linearity, low-power RF transmitter circuits in the Q-channel module are coupled one-to-one. The output terminals of the two corresponding high-linearity, low-power RF transmitter circuits are coupled to generate an RF signal with improved linearity.

[0018] As described above, the high linearity, low power RF transmitter circuit and transmitter chip of the present invention have the following beneficial effects:

[0019] 1) The high linearity and low power consumption radio frequency transmitter circuit and transmitter chip of the present invention greatly improve the linearity of the baseband analog signal in the low frequency stage and maintain the linearity of the signal link in the radio frequency stage through the linear conversion module, passive mixing module, transformer module and linear output module.

[0020] 2) The high linearity and low power consumption radio frequency transmitter circuit and transmitter chip of the present invention greatly reduce power consumption and enhance anti-interference performance. Attached Figure Description

[0021] Figure 1 The diagram shown is an exemplary RF transmitter chip architecture of the present invention.

[0022] Figure 2 The diagram shown is a schematic diagram of an exemplary mixer circuit of the present invention.

[0023] Figure 3 The diagram shown is a structural schematic of the high linearity, low power consumption radio frequency transmitter circuit and transmitter chip of the present invention.

[0024] Figure 4 The diagram shown is a schematic diagram of the circuit structure of the linear conversion module of the present invention.

[0025] Figure 5 The diagram shown is a schematic of the circuit structure of the passive mixer module of the present invention.

[0026] Figure 6 The diagram shown is a layout schematic of the transformer module of the present invention.

[0027] Figure 7 The diagram shown is a schematic diagram of the circuit structure of the linear output module of the present invention.

[0028] Figure 8 The diagram shown is a schematic diagram of the circuit structure of the transmitter chip of the present invention.

[0029] Explanation of reference numerals in the attached figures

[0030] 1. High-linearity, low-power RF transmitter circuit and transmitter chip

[0031] 11 Data Processing Module

[0032] 111 Digital-to-Analog Converter Unit

[0033] 112 Filtering Unit

[0034] 12 Linear Transformation Module

[0035] 13 Passive Mixer Module

[0036] 14 Transformer Module

[0037] 141 Primary coil

[0038] 142 secondary coil

[0039] 15 Linear Output Module

[0040] 2. Transmitter chip

[0041] 21 I-channel module

[0042] 22 Q-channel module Detailed Implementation

[0043] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0044] Please see Figures 1 to 8 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. The illustrations only show components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0045] Figure 1This diagram illustrates the architecture of an RF transmitter chip, including a digital-to-analog converter (D / A converter or DAC), filters, and a mixer. The DAC converts digital baseband signals into analog signals. In digital communication systems, the unmodulated digital signal occupies frequencies starting from zero or very low frequencies, referred to as the digital baseband signal. The filter filters out the image signals generated by the DAC sampling; these image signals are symmetrical about the sampling clock. The mixer mixes the analog signals to a suitable RF frequency band for transmission, enabling communication.

[0046] Figure 2 A schematic diagram of a mixer circuit is shown. Due to... Figure 1 The DACs and filters shown in the example are relatively easy to achieve high linearity. Therefore, the overall linearity of the transmitter chip is usually limited by the voltage-to-current conversion circuit of the final stage (e.g., mixer). Linearity is an important dimension of communication systems, often referred to as a linear system. The definition of a linear system includes: if the response of a system to the sum of any two inputs is the sum of the responses to each of those inputs, then the system is called a linear system. The characteristics of a linear system include proportionality (also known as homogeneity) and time invariance. For example, in an amplifier, if the input signal is relatively small, its output is approximately linearly related to the input signal within a certain range. Similarly, filters and transmission channels can be considered linear systems. The higher the linearity, the stronger the anti-interference capability of the communication system, and vice versa.

[0047] like Figure 2 As shown, the working principle of the mixer includes: differential input transistors M21 and M22 convert low-frequency signals Vin+ and Vin- into current signals. The resulting differential current is mixed to a high frequency by the Gilbert unit (including switching transistors M23 to M26), and then the output signals Vo+ and Vo- are generated through matching resistors R21 and R22. Generally, increasing the overdrive voltage of differential input transistors M21 and M22 can improve linearity, but the degree of improvement is limited. On the other hand, increasing the overdrive voltage will cause the transconductance of differential input transistors M21 and M22 to increase continuously, thereby increasing the device area of ​​differential input transistors M21 and M22, while reducing the radio frequency of output signals Vo+ and Vo-.

[0048] Therefore, the present invention provides an RF transmitter circuit and a transmitter chip, the specific implementation of which is as follows:

[0049] like Figure 3As shown, this embodiment provides a high-linearity, low-power radio frequency transmitter circuit and transmitter chip 1. The high-linearity, low-power radio frequency transmitter circuit and transmitter chip 1 include: a data processing module 11, a linear conversion module 12, a passive mixer module 13, a transformer module 14, and a linear output module 15, wherein:

[0050] like Figure 3 As shown, the data processing module 11 converts and filters the digital baseband signal to generate a corresponding analog signal. Specifically, as an example, the data processing module 11 includes a digital-to-analog converter unit 111 and a filtering unit 112, wherein: the input terminal of the digital-to-analog converter unit 111 is connected to the digital baseband signal; the input terminal of the filtering unit 112 is connected to the output terminal of the digital-to-analog converter unit 111. It should be noted that the data processing module 11 includes, but is not limited to, the digital-to-analog converter unit 111 and the filtering unit 112, and can also adopt other configuration methods, such as a digital signal processor (DSP), etc. As long as the digital baseband signal can be converted and filtered to generate a corresponding analog signal, any configuration form of the data processing module 11 is applicable and is not limited to this embodiment.

[0051] like Figure 3 and Figure 4 As shown, the input of the linear conversion module 12 is connected to the output of the data processing module 11, and the linearity of the analog signal is improved by introducing feedback and mode conversion.

[0052] Specifically, as an example, such as Figure 3 and Figure 4As shown, the linear conversion module 12 includes: a first resistor R1, a second resistor R2, an operational amplifier A, a first NMOS transistor M1, a second NMOS transistor M2, a third NMOS transistor M3, a fourth NMOS transistor M4, a first current source I1, and a second current source I2. Specifically: the first terminals of the first resistor R1 and the second resistor R2 are both connected to the output terminals of the data processing module 11; the non-inverting input terminal of the operational amplifier A is connected to the second terminal of the first resistor R1, and the inverting input terminal of the operational amplifier A is connected to the second terminal of the second resistor R2; the first terminal of the first current source I1 is connected to the operating voltage VDD, and the second terminal of the first current source I1 is connected to the non-inverting input terminal of the operational amplifier A; the first terminal of the second current source I2 is connected to the operating voltage VDD, and the second terminal of the second current source I2 is connected to the inverting input terminal of the operational amplifier A; the drain of the first NMOS transistor M1 is connected to the second terminal of the first current source I1, and the first NMOS transistor M1... The gate of the first NMOS transistor M1 is connected to the output of the operational amplifier A. The source of the second NMOS transistor M2 is connected to the reference ground GND. The gate of the second NMOS transistor M2 is connected to the gate of the first NMOS transistor M1, and the source of the second NMOS transistor M2 is connected to the reference ground GND. The analog signal after mode conversion is obtained through the drain of the second NMOS transistor M2, which includes a current signal. The drain of the third NMOS transistor M3 is connected to the second terminal of the second current source I2. The gate of the third NMOS transistor M3 is connected to the output of the operational amplifier A, and the source of the third NMOS transistor M3 is connected to the reference ground GND. The analog signal after mode conversion is obtained through the drain of the fourth NMOS transistor M4, which includes a current signal.

[0053] It should be noted that, as Figure 4As shown, the operation of the linear conversion module 12 occurs before mixing. Due to the low frequency, high linearity is relatively easy to achieve. Within the operating bandwidth, operational amplifier A, together with the first NMOS transistor M1, the second NMOS transistor M2, the third NMOS transistor M3, and the fourth NMOS transistor M4, constitutes a TIA amplifier. The first current source I1 and the second current source I2 form negative feedback, making the input impedance of the linear conversion module 12 approximately equal to 1 / (gm*α), where gm is the transconductance of the first NMOS transistor M1 and the third NMOS transistor M3 (the input impedance of the non-inverting input terminal of operational amplifier A is formed by the transconductance of the first NMOS transistor M1, and the input impedance of the inverting input terminal of operational amplifier A is formed by the transconductance of the third NMOS transistor M3). (The transconductance of M3 is formed), α is the gain of operational amplifier A. Therefore, the input impedance of operational amplifier A is much smaller than the first resistor R1 and the second resistor R2. Therefore, the linear conversion module 12 converts the input signals Vin+ and Vin- into current signals with high linearity (wherein, the input signals Vin+ and Vin- are converted by the data processing module 11, and the input signals Vin+ and Vin- are voltage signals). The current signal is then processed by the first NMOS transistor M1, the second NMOS transistor M2, the third NMOS transistor M3 and the fourth NMOS transistor M4. The linearity of the output analog signal (the analog signal is a current signal) is improved by the drain output of the second NMOS transistor M2 and the fourth NMOS transistor M4.

[0054] It should be further noted that the linear conversion module 12 can also be configured in other ways, such as direct output current through operational amplifier negative feedback. As long as the linearity of the analog signal can be improved by introducing compensation and mode conversion, any configuration of the linear conversion module 12 is applicable and is not limited to this embodiment.

[0055] like Figure 3 and Figure 5 As shown, the input terminal of the passive mixer module 13 is connected to the output terminal of the linear conversion module 12, and is used to convert the analog signal into a radio frequency signal with improved linearity.

[0056] Specifically, as an example, such as Figure 3 and Figure 5As shown, the passive mixer module 13 includes: a fifth NMOS transistor M5, a sixth NMOS transistor M6, a seventh NMOS transistor M7, and an eighth NMOS transistor M8. The gate of the fifth NMOS transistor M5 is connected to the first local oscillator signal LO_Vn1, and the source of the fifth NMOS transistor M5 is connected to the output terminal of the linear conversion module 12. The gate of the seventh NMOS transistor M7 is connected to the third local oscillator signal LO_Vp, the source of the seventh NMOS transistor M7 is connected to the output terminal of the linear conversion module 12, and the drain of the seventh NMOS transistor M7 is connected to the drain of the fifth NMOS transistor M5. The signal is transmitted through the seventh NMOS transistor M8. The drain of transistor 7 is connected to the drain of the fifth NMOS transistor M5 to generate the radio frequency signal RF_Ip; the gate of the sixth NMOS transistor M6 is connected to the third local oscillator signal LO_Vp, and the source of the sixth NMOS transistor M6 is connected to the output terminal of the linear conversion module 12; the gate of the eighth NMOS transistor M8 is connected to the second local oscillator signal LO_Vn2, the source of the eighth NMOS transistor M8 is connected to the output terminal of the linear conversion module 12, and the drain of the eighth NMOS transistor M8 is connected to the drain of the sixth NMOS transistor M6. The radio frequency signal RF_In is generated through the drain of the eighth NMOS transistor M8 and the drain of the sixth NMOS transistor M6.

[0057] It should be further explained that the passive mixer module 13 can achieve higher linearity than the active mixer architecture. On the other hand, the passive mixer module 13 can also be cascaded with the linear conversion module 12 as a resistive load without affecting the linear conversion module 12's linearity. Specifically, the analog signal transmitted from the linear conversion module 12 to the passive mixer module 13 is a differential input baseband current signal. The fifth NMOS transistor M5, the sixth NMOS transistor M6, the seventh NMOS transistor M7, and the eighth NMOS transistor M8 generate RF signals RF_Ip and RF_In through the switching of differential local oscillator signals (the local oscillator signals include: the first local oscillator signal LO_Vn1, the second local oscillator signal LO_Vn2, and the third local oscillator signal LO_Vp, where the first local oscillator signal LO_Vn1 and the third local oscillator signal LO_Vp form a differential pair, and the second local oscillator signal LO_Vn2 and the third local oscillator signal LO_Vp form a differential pair) and mixing operation. It should be noted that the passive mixer module 13 includes, but is not limited to, the setting methods of the fifth NMOS transistor M5, the sixth NMOS transistor M6, the seventh NMOS transistor M7, and the eighth NMOS transistor M8 with the differential local oscillator signal. It can also be set in a quarter duty cycle structure or other ways. As long as the analog signal can be converted into an RF signal with improved linearity, any setting method of the passive mixer module 13 is applicable, and will not be described in detail here.

[0058] like Figure 3 and Figure 6As shown, the input terminal of transformer module 14 is connected to the output terminal of passive mixer module 13 to provide DC bias and reduce the power consumption of radio frequency signals. Specifically, as an example, transformer module 14 includes an on-chip transformer structure; the current conversion ratio of the on-chip transformer structure includes 1:N, where N is a natural number greater than or equal to 2.

[0059] It should be noted that the on-chip transformer structure can improve the linearity of the RF signal and increase the gain of the transmit link. The on-chip transformer structure has two advantages: first, it reduces the design complexity of the front-end circuits (including the data processing module 11, the linear conversion module 12, and the passive mixer module 13), that is, it reduces the design complexity while ensuring high linearity; second, it reduces the driving power consumption of the transmit link (i.e., the linear output module 15). In addition, the on-chip transformer structure is located after the passive mixer module 13 and operates in the RF band, thus enabling a smaller size.

[0060] Specifically, Figure 6 The layout of transformer module 14, i.e., the layout of the on-chip transformer structure, is shown. The on-chip transformer structure is configured as follows: ① Each of the primary coil 141 and secondary coil 142 has a center tap connected to reference ground GND; ② One center tap of the primary coil 141 is connected to a low dropout voltage regulator (LDO), and one center tap of the secondary coil 142 is connected to reference ground GND. This provides DC bias for the next stage output. It should be further noted that the on-chip transformer structure should be configured according to the specific application scenario. The current conversion ratio of the on-chip transformer structure can be set to 1:2, 1:3, etc. When the current conversion ratio of the on-chip transformer structure is 1:3, the current of the RF signal output by transformer module 14 is three times the current of the output RF signal, and the achievable current gain is 9dB. The current conversion ratio should be designed according to actual needs, and a trade-off should be made between power consumption, stability, and anti-interference. This embodiment is not the only limitation.

[0061] like Figure 3 and Figure 7 As shown, the input terminal of the linear output module 15 is connected to the output terminal of the transformer module 14, which performs mode conversion on the RF signal and maintains the linearity of the RF signal, and matches the RF signal with the subsequent circuit.

[0062] Specifically, as an example, such as Figure 7As shown, the linear output module 15 includes: a first inductor L1, a second inductor L2, a third resistor R3, a fourth resistor R4, a ninth NMOS transistor M9, a tenth NMOS transistor M10, an eleventh NMOS transistor M11, and a twelfth NMOS transistor M12. The gate of the ninth NMOS transistor M9 is connected to the first DC bias signal VB1, and the source of the ninth NMOS transistor M9 is connected to the output terminal of the transformer module 14. The source of the ninth NMOS transistor M9 is connected to the RF signal linp, which is output by the transformer module 14. The gate of the tenth NMOS transistor M10 is connected to the second DC bias signal VB2, and the source of the tenth NMOS transistor M10 is connected to the drain of the ninth NMOS transistor M9. The RF signal Voutp, with improved linearity, is output through the drain of the tenth NMOS transistor M10. The third resistor R3 is connected to the input... The operating voltage VDD is connected between the drain of the tenth NMOS transistor M10; the first inductor L1 is connected in parallel with the third resistor R3; the gate of the twelfth NMOS transistor M12 is connected to the gate of the ninth NMOS transistor M9, and the source of the twelfth NMOS transistor M12 is connected to the output terminal of the transformer module 14, wherein the source of the twelfth NMOS transistor M12 is connected to the RF signal linn, and the RF signal linn is output by the transformer module 14; the gate of the eleventh NMOS transistor M11 is connected to the gate of the tenth NMOS transistor M10, and the source of the eleventh NMOS transistor M11 is connected to the drain of the twelfth NMOS transistor M12, wherein the RF signal Voutn, whose linearity is further improved, is output through the drain of the eleventh NMOS transistor M11; the fourth resistor R4 is connected between the operating voltage and the drain of the eleventh NMOS transistor M11; the second inductor L2 is connected in parallel with the fourth resistor R4.

[0063] It should be noted that, as Figure 7 As shown, the RF signals linp and linn are differential input signals. The first DC bias signal VB1 and the second DC bias signal VB2 are used to provide DC bias. In this embodiment, the linear output module 15 adopts a Cascode structure, which can improve the output impedance of the linear output module 15, so that the RF signals Voutp and Voutn are approximately constant current sources, and are not affected by the ninth NMOS transistor M9, the tenth NMOS transistor M10, the eleventh NMOS transistor M11 and the twelfth NMOS transistor M12. The Cascode structure adopted by the linear output module 15 can improve the isolation between the RF signals linp and linn and the RF signals Voutp and Voutn.

[0064] It should be further noted that the linear output module 15 may include, but is not limited to, a Cascode structure, or may also employ a resistor structure, a composite transistor structure, etc. As long as it can further improve the linearity of the RF signal and improve the matching degree between the RF signal and the subsequent circuit, any configuration of the linear output module 15 is applicable and is not limited to this embodiment.

[0065] like Figure 8 As shown, this embodiment also provides a transmitter chip 2, which includes an I-channel module 21 and a Q-channel module 22. Both the I-channel module 21 and the Q-channel module include at least one high-linearity low-power radio frequency transmitter circuit as described in this embodiment. The high-linearity low-power radio frequency transmitter circuit in the I-channel module 21 corresponds one-to-one with the high-linearity low-power radio frequency transmitter circuit in the Q-channel module 22. The output terminals of the two corresponding high-linearity low-power radio frequency transmitter circuits are coupled to generate a radio frequency signal with improved linearity. In this embodiment, a center tap of the primary coil of the transformer module in the high-linearity low-power radio frequency transmitter circuit is connected to a low-dropout linear regulator (LDO). It should be noted that the transmitter chip 2 can be configured using an Application Specific Integrated Circuit (ASIC, which is a proprietary application chip designed and manufactured for specific user requirements and electronic systems, and whose computing power and efficiency can be customized according to algorithm needs), or using an IP core (IP core, short for intellectual property core, refers to a reusable module in the form of a logic unit or chip design provided by a party in the reusable design methodology of integrated circuits. IP cores have usually passed design verification, and designers can shorten the design cycle by using IP cores as a basis for design). Any configuration method is applicable as long as it can obtain a radio frequency signal with improved linearity, and is not limited to this embodiment.

[0066] In summary, the present invention provides a high-linearity, low-power radio frequency transmitter circuit and transmitter chip, comprising: a data processing module, a linear conversion module, a passive mixer module, a transformer module, and a linear output module, wherein: the data processing module performs conversion and filtering operations on the digital baseband signal to generate a corresponding analog signal; the input terminal of the linear conversion module is connected to the output terminal of the data processing module, and improves the linearity of the analog signal by introducing feedback and mode conversion; the input terminal of the passive mixer module is connected to the output terminal of the linear conversion module, and is used to convert the analog signal into a radio frequency signal with improved linearity; the input terminal of the transformer module is connected to the output terminal of the passive mixer module, and is used to provide DC bias and reduce the overall power consumption of the radio frequency link; the input terminal of the linear output module is connected to the output terminal of the transformer module, performs mode conversion on the radio frequency signal while maintaining the linearity of the radio frequency signal, and matches the radio frequency signal with the subsequent circuits. The high-linearity, low-power RF transmitter circuit and chip of this invention, through a linear conversion module, a passive mixer module, a transformer module, and a linear output module, significantly improves the linearity of the baseband analog signal in the low-frequency stage and maintains the linearity of the signal link in the RF stage. The high-linearity, low-power RF transmitter circuit and chip of this invention greatly reduce power consumption and enhance anti-interference capabilities. Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0067] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A high-linearity, low-power radio frequency transmitter circuit, characterized in that, The high-linearity, low-power RF transmitter circuit includes at least: a data processing module, a linear conversion module, a passive mixer module, a transformer module, and a linear output module, wherein: The data processing module performs conversion and filtering operations on the digital baseband signal to generate the corresponding analog signal; The input of the linear conversion module is connected to the output of the data processing module, and the linearity of the analog signal is improved by introducing feedback and mode conversion. The input terminal of the passive mixer module is connected to the output terminal of the linear conversion module, and is used to convert the analog signal into a radio frequency signal with improved linearity; The input terminal of the transformer module is connected to the output terminal of the passive mixer module to provide DC bias and reduce the overall power consumption of the RF link. The input terminal of the linear output module is connected to the output terminal of the transformer module, which performs mode conversion on the radio frequency signal, maintains the linearity of the radio frequency signal, and matches the radio frequency signal with the subsequent circuit. The linear conversion module includes: a first resistor, a second resistor, an operational amplifier, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a first current source, and a second current source, wherein: the first terminals of the first resistor and the second resistor are both connected to the output terminal of the data processing module; the non-inverting input terminal of the operational amplifier is connected to the second terminal of the first resistor, and the inverting input terminal of the operational amplifier is connected to the second terminal of the second resistor; the first terminal of the first current source is connected to the operating voltage, and the second terminal of the first current source is connected to the non-inverting input terminal of the operational amplifier; the first terminal of the second current source is connected to the operating voltage, and the second terminal of the second current source is connected to the inverting input terminal of the operational amplifier; the drain of the first NMOS transistor is connected to the first current source... The first NMOS transistor has two terminals connected: its gate is connected to the output of the operational amplifier, and its source is connected to ground; the second NMOS transistor has its gate connected to the gate of the first NMOS transistor, and its source is connected to ground, wherein the analog signal after mode conversion is obtained through the drain of the second NMOS transistor; the third NMOS transistor has its drain connected to the second terminal of the second current source, its gate connected to the output of the operational amplifier, and its source connected to ground; the fourth NMOS transistor has its gate connected to the gate of the third NMOS transistor, and its source is connected to ground, wherein the analog signal after mode conversion is obtained through the drain of the fourth NMOS transistor.

2. The high linearity, low power RF transmitter circuit according to claim 1, characterized in that: The data processing module includes a digital-to-analog converter unit and a filtering unit, wherein: the input terminal of the digital-to-analog converter unit is connected to the digital baseband signal; and the input terminal of the filtering unit is connected to the output terminal of the digital-to-analog converter unit.

3. The high linearity, low power RF transmitter circuit according to claim 1, characterized in that: The passive mixer module includes a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, and an eighth NMOS transistor, wherein: the gate of the fifth NMOS transistor is connected to a first local oscillator signal, and the source of the fifth NMOS transistor is connected to the output terminal of the linear conversion module; the gate of the seventh NMOS transistor is connected to a third local oscillator signal, and the source of the seventh NMOS transistor is connected to the output terminal of the linear conversion module, and the drain of the seventh NMOS transistor is connected to the drain of the fifth NMOS transistor, wherein an radio frequency signal is generated through the drains of the seventh and fifth NMOS transistors; the gate of the sixth NMOS transistor is connected to the third local oscillator signal, and the source of the sixth NMOS transistor is connected to the output terminal of the linear conversion module; the gate of the eighth NMOS transistor is connected to a second local oscillator signal, and the source of the eighth NMOS transistor is connected to the output terminal of the linear conversion module, and the drain of the eighth NMOS transistor is connected to the drain of the sixth NMOS transistor, wherein an radio frequency signal is generated through the drains of the eighth and sixth NMOS transistors.

4. The high linearity, low power RF transmitter circuit according to claim 1, characterized in that: The transformer module includes an on-chip transformer structure.

5. The high linearity, low power RF transmitter circuit according to claim 4, characterized in that: The current conversion ratio of the on-chip transformer structure is 1:N, where N is a natural number greater than or equal to 2.

6. The high linearity, low power RF transmitter circuit according to claim 1, characterized in that: The linear output module includes: a first inductor, a second inductor, a third resistor, a fourth resistor, a ninth NMOS transistor, a tenth NMOS transistor, an eleventh NMOS transistor, and a twelfth NMOS transistor. The gate of the ninth NMOS transistor is connected to a first DC bias signal, and the source of the ninth NMOS transistor is connected to the output terminal of the transformer module. The gate of the tenth NMOS transistor is connected to a second DC bias signal, and the source of the tenth NMOS transistor is connected to the drain of the ninth NMOS transistor. The output linearity of the RF signal is further improved through the drain of the tenth NMOS transistor. The third resistor is connected to the operating voltage and the twelfth NMOS transistor. The first inductor is connected in parallel with the third resistor; the gate of the twelfth NMOS transistor is connected to the gate of the ninth NMOS transistor, and the source of the twelfth NMOS transistor is connected to the output terminal of the transformer module; the gate of the eleventh NMOS transistor is connected to the gate of the tenth NMOS transistor, and the source of the eleventh NMOS transistor is connected to the drain of the twelfth NMOS transistor, wherein the linearity of the RF signal is further improved by outputting through the drain of the eleventh NMOS transistor; the fourth resistor is connected between the operating voltage and the drain of the eleventh NMOS transistor; the second inductor is connected in parallel with the fourth resistor.

7. A transmitting chip, characterized in that: The transmitting chip includes an I-channel module and a Q-channel module. Both the I-channel module and the Q-channel module include at least one high-linearity, low-power radio frequency transmitter circuit as described in any one of claims 1-6. The high-linearity, low-power radio frequency transmitter circuit in the I-channel module corresponds one-to-one with the high-linearity, low-power radio frequency transmitter circuit in the Q-channel module. The output terminals of the two corresponding high-linearity, low-power radio frequency transmitter circuits are coupled to generate a radio frequency signal with improved linearity.

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