A bandgap reference voltage circuit

Abstract

The application discloses a band gap reference voltage circuit, and relates to the field of circuit design, which comprises a positive and negative temperature coefficient voltage generating circuit, a temperature coefficient compensation circuit and a voltage dividing circuit. The positive and negative temperature coefficient voltage generating circuit generates positive temperature coefficient voltage and negative temperature coefficient voltage. The temperature coefficient compensation circuit generates zero temperature coefficient voltage based on the positive temperature coefficient voltage and the negative temperature coefficient voltage. The voltage at the first end of the voltage dividing circuit is the zero temperature coefficient voltage. The second end of the voltage dividing circuit is grounded. The reference voltage is less than the zero temperature coefficient voltage by adjusting the voltage division between the first end and the voltage dividing end and between the second end and the voltage dividing end in the voltage dividing circuit, so that the loss of a digital circuit working with the reference voltage provided by the band gap reference voltage circuit is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of circuit design, in particular to a bandgap reference voltage circuit. BACKGROUND

[0002] Bandgap reference voltage circuit can provide voltage which is not easily affected by temperature, so the bandgap reference voltage circuit is widely used as a stable voltage supply source. The basic principle of bandgap reference voltage circuit is to add the voltage with positive temperature coefficient and the voltage with negative temperature coefficient in proper proportion to obtain a temperature-independent voltage reference. The bandgap reference voltage circuit in the prior art can only generate a specific zero-temperature coefficient reference voltage (usually 1.25V), which makes the loss of digital circuit working with the reference voltage provided by the bandgap reference voltage circuit higher. Therefore, how to obtain smaller zero-temperature coefficient reference voltage through the bandgap reference voltage circuit is an urgent problem to be solved. SUMMARY

[0003] The purpose of the present application is to provide a bandgap reference voltage circuit which can generate smaller zero-temperature coefficient reference voltage than conventional, thereby reducing the loss of digital circuit working with the reference voltage provided by the bandgap reference voltage circuit.

[0004] To solve the above technical problems, the present application provides a bandgap reference voltage circuit, comprising a positive and negative temperature coefficient voltage generating circuit, a temperature coefficient compensation circuit and a voltage dividing circuit.

[0005] The positive and negative temperature coefficient voltage generating circuit is used for generating positive temperature coefficient voltage and negative temperature coefficient voltage.

[0006] The temperature coefficient compensation circuit is used for generating zero-temperature coefficient voltage based on the positive temperature coefficient voltage and the negative temperature coefficient voltage.

[0007] The first end of the voltage dividing circuit is connected with the output end of the temperature coefficient compensation circuit, the second end is grounded, and the output end between the first end and the second end is used for outputting reference voltage.

[0008] Preferably, the positive and negative temperature coefficient voltage generating circuit comprises a first NMOS, a second NMOS and a first resistor.

[0009] The first end of the first resistor is connected with the gate of the first NMOS, the second end of the first resistor is connected with the drain of the first NMOS and the gate of the second NMOS respectively, and the source of the first NMOS and the source of the second NMOS are both grounded.

[0010] The voltage between the gate and the source of the first NMOS is used as the negative temperature coefficient voltage, and the voltage across the first circuit is used as the positive temperature coefficient voltage.

[0011] Preferably, the temperature coefficient compensation circuit comprises an amplifier, a second resistor and a third resistor.

[0012] The positive input terminal of the amplifier is connected with the common terminal of the first resistor and the first NMOS and the first terminal of the first resistor, the negative input terminal of the amplifier is connected with the drain of the second NMOS and the first terminal of the third resistor, the second terminal of the second resistor is connected with the second terminal of the third resistor, and the output terminal of the amplifier is connected with the output terminal of the start-up circuit, wherein the start-up current is used for outputting the start-up current.

[0013] Preferably, the resistance value of the second resistor is equal to the resistance value of the third resistor.

[0014] Preferably, the voltage dividing circuit comprises a plurality of voltage dividing resistors connected in series.

[0015] The first terminal of the series-connected voltage dividing resistors is used as the first terminal of the voltage dividing circuit, the second terminal of the series-connected voltage dividing resistors is used as the second terminal of the voltage dividing circuit, and one terminal of the output voltage dividing resistor between the first terminal of the voltage dividing circuit and the second terminal of the voltage dividing circuit is used as the reference voltage.

[0016] Preferably, each of the voltage dividing resistors is a low-temperature-coefficient voltage dividing resistor.

[0017] Preferably, the zero-temperature-reference current generating circuit further comprises a zero-temperature-reference current generating circuit.

[0018] The zero-temperature-reference current generating circuit is used for generating a zero-temperature-coefficient reference current based on the reference voltage.

[0019] Preferably, the zero-temperature-reference current generating circuit comprises a first PMOS.

[0020] The source of the first PMOS is connected with a power supply, the gate is used for inputting a start-up current, and the drain is connected with the output terminal of the temperature coefficient compensation circuit.

[0021] Preferably, the zero-temperature-reference current generating circuit further comprises a second PMOS.

[0022] The source of the second PMOS is connected with the power supply, the gate is connected with the gate of the first PMOS, and the drain is connected with the output terminal of the voltage dividing circuit.

[0023] In summary, the application provides a band gap reference voltage circuit, which comprises a positive and negative temperature coefficient voltage generating circuit, a temperature coefficient compensation circuit and a voltage dividing circuit. The positive and negative temperature coefficient voltage generating circuit generates a positive temperature coefficient voltage and a negative temperature coefficient voltage. The temperature coefficient compensation circuit generates a zero temperature coefficient voltage based on the positive temperature coefficient voltage and the negative temperature coefficient voltage. The voltage at the first end of the voltage dividing circuit is the zero temperature coefficient voltage. The second end of the voltage dividing circuit is grounded. The reference voltage is less than the zero temperature coefficient voltage by adjusting the voltage division between the first end and the voltage dividing end and between the second end and the voltage dividing end of the voltage dividing circuit, so as to reduce the loss of the digital circuit working with the reference voltage provided by the band gap reference voltage circuit. BRIEF DESCRIPTION OF DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the prior art and the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and all other drawings obtained by those of ordinary skill in the art without creative effort based on these drawings also belong to the scope of protection of the present application.

[0025] Figure 1 A circuit diagram of a band gap reference voltage circuit provided by the present application is provided.

[0026] Figure 2 A circuit diagram of another band gap reference voltage circuit provided by the present application is provided. DETAILED DESCRIPTION

[0027] The core of the present application is to provide a band gap reference voltage circuit, which can generate a reference voltage smaller than the conventional zero temperature coefficient, so as to reduce the loss of the digital circuit working with the reference voltage provided by the band gap reference voltage circuit.

[0028] In order to make the purpose, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be described clearly and completely in combination with the drawings of the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort also belong to the scope of protection of the present application.

[0029] Considering that the band gap reference voltage circuit in the prior art can only generate a specific reference voltage with zero temperature coefficient (usually 1.25V), which makes the loss of the digital circuit working with the reference voltage provided by the band gap reference voltage circuit relatively high, how to obtain a smaller zero temperature coefficient reference voltage through the band gap reference voltage circuit is an urgent problem to be solved.

[0030] Please refer to Figure 1 ,Figure 1 A circuit diagram of a band gap reference voltage circuit is provided in the present application, the band gap reference voltage circuit comprising a positive and negative temperature coefficient voltage generating circuit 1, a temperature coefficient compensation circuit 2 and a voltage dividing circuit 3;

[0031] The positive and negative temperature coefficient voltage generating circuit 1 is used to generate a positive temperature coefficient voltage and a negative temperature coefficient voltage;

[0032] The temperature coefficient compensation circuit 2 is used to generate a zero temperature coefficient voltage based on the positive temperature coefficient voltage and the negative temperature coefficient voltage;

[0033] The first end of the voltage dividing circuit 3 is connected with the output end of the temperature coefficient compensation circuit 2, the second end is grounded, and the output end between the first end and the second end is used to output a reference voltage VREF.

[0034] To solve the problem that the band gap reference voltage circuit in the prior art cannot generate a zero temperature coefficient reference voltage smaller than 1V, the present application provides a band gap reference voltage circuit with a voltage dividing circuit 3. In the band gap reference voltage circuit, the positive and negative temperature coefficient voltage generating circuit 1 first generates a positive temperature coefficient voltage and a negative temperature coefficient voltage, then the temperature coefficient compensation circuit 2 adds the positive temperature coefficient voltage and the negative temperature coefficient voltage according to a certain ratio to obtain a zero temperature coefficient voltage which is not affected by temperature change. Instead of directly outputting the zero temperature coefficient voltage, the band gap reference voltage circuit outputs a reference voltage VREF obtained by dividing the zero temperature coefficient voltage through the voltage dividing circuit 3 as the final output of the band gap reference circuit. By adjusting the voltage dividing ratio of the voltage dividing circuit 3, the size of the final output reference voltage VREF can be adjusted, so that a relatively small zero temperature coefficient reference voltage VREF can be obtained, thereby reducing the loss of a digital circuit working with the zero temperature coefficient reference voltage VREF.

[0035] The band gap reference voltage circuit described above can obtain a zero temperature coefficient reference voltage smaller than 1V, i.e. smaller than the zero temperature coefficient reference voltage generated by the band gap reference voltage circuit in the prior art. Therefore, the digital circuit working with the zero temperature coefficient reference voltage generated by the band gap reference voltage circuit in the present application can reduce the loss.

[0036] The specific circuit structure of the positive and negative temperature coefficient voltage generating circuit 1, the temperature coefficient compensation circuit 2 and the voltage dividing circuit 3 in the present embodiment is not particularly limited, as long as the above functions can be realized.

[0037] On the basis of the above embodiment:

[0038] As a preferred embodiment, the positive and negative temperature coefficient voltage generating circuit 1 comprises a first NMOS M1, a second NMOS M2 and a first resistor R1.

[0039] The first end of the first resistor R1 is connected with the gate of the first NMOS M1, the second end of the first resistor R1 is connected with the drain of the first NMOS M1 and the gate of the second NMOS M2 respectively, and the source of the first NMOS M1 and the source of the second NMOS M2 are grounded.

[0040] The voltage between the gate and the source of the first NMOS M1 is a negative temperature coefficient voltage, and the voltage across the first circuit is a positive temperature coefficient voltage.

[0041] In the prior art, a bandgap reference voltage circuit is usually implemented by using a bipolar transistor to output a zero temperature coefficient reference voltage. Specifically, a negative temperature coefficient voltage can be generated by the voltage between the base and the emitter of the bipolar transistor, and a positive temperature coefficient voltage can be generated by the voltage difference between the bases and the emitters of two bipolar transistors operating at different current densities. However, the above circuit has the disadvantage of large circuit area due to the use of bipolar transistors. Therefore, in the present embodiment, MOS transistors are used to generate a positive temperature coefficient voltage and a negative temperature coefficient voltage, and then a temperature coefficient compensation circuit 2 and a voltage dividing circuit 3 are used to generate a reference voltage smaller than the zero temperature coefficient reference voltage in the prior art.

[0042] Please refer to Figure 1 , Figure 1 A circuit diagram of a bandgap reference voltage circuit is provided in the present application. The positive and negative temperature coefficient voltage generating circuit 1 includes a first NMOS M1, a second NMOS M2 and a first resistor R1. The drain current of the first NMOS M1 and the drain current of the second NMOS M2 are the same and can be represented as:

[0043] I1=I2=ID=I0*(W / L)exp((VGS-VTH) / (n*VT))(1-exp(-VDS / VT));

[0044] wherein, I0=u*COX*(n-1) wherein, u is the electron drift rate, COX is the capacitance value of the insulating layer of the NMOS, n is the subcritical region coefficient, VGS is the voltage difference between the gate and the source of the NMOS, VDS is the voltage difference between the drain and the source of the NMOS, VTH is the threshold voltage of the NMOS, VT is the thermal voltage (about 26mV), and W / L is the width-length ratio of the NMOS.

[0045] If VDS>4VT, the drain current of the first NMOS M1 and the drain current of the second NMOS M2 are the same and can be represented as:

[0046] I1=I2=ID=I0*(W / L)exp((VGS-VTH) / (n*VT));

[0047] Therefore, it can be deduced that VGS=VTH+n*VT*ln(IU / I0);

[0048] wherein IU=ID / (W / L); wherein W / L is the width-length ratio of NMOS, if the width-length ratio of the second NMOS M2 is K times of that of the first NMOS M1, then:

[0049] VGS1-VGS2=n*VT*ln(K);

[0050] wherein VT has a positive temperature coefficient, and n is between 1 and 2, thus it can be determined that VGS1-VGS2 is a positive temperature coefficient voltage. Since VGS1 is a negative temperature coefficient voltage, the above circuit can realize the function of the positive temperature coefficient voltage and negative temperature coefficient voltage generated by the positive and negative temperature coefficient voltage generation circuit 1.

[0051] In addition, in the embodiment, the positive and negative temperature coefficient voltage generation circuit 1 does not use bipolar transistors, but uses MOS transistors to generate positive and negative temperature coefficient voltages, thereby reducing the overall area of the bandgap reference voltage circuit.

[0052] In addition, in the embodiment, it is required to control the first NMOS M1 and the second NMOS M2 to work in the sub-threshold region, which is realized by adjusting the resistance value of the first resistor R1 and adjusting the width-length ratio of the first NMOS M1 and the second NMOS M2, which will not be described in detail herein.

[0053] As a preferred embodiment, the temperature coefficient compensation circuit 2 includes an amplifier, a second resistor R2 and a third resistor R3;

[0054] The positive input end of the amplifier is connected with the common end of the first resistor R1 and the first NMOS M1 and the first end of the first resistor R1, the negative input end of the amplifier is connected with the drain of the second NMOS M2 and the first end of the third resistor R3, the second end of the second resistor R2 is connected with the second end of the third resistor R3, and the output end of the amplifier is connected with the output end of the start-up circuit, wherein the start-up current is used for outputting the start-up current.

[0055] In the embodiment, the temperature coefficient compensation circuit 2 for generating zero temperature coefficient voltage based on the positive temperature coefficient voltage and the negative temperature coefficient voltage includes an amplifier, a second resistor R2 and a third resistor R3, and the voltages of the two input ends of the amplifier are approximately rectified by the virtual short characteristic of the amplifier.

[0056] Here, the process of generating zero temperature coefficient voltage is specifically explained in the case that the resistance value of the second resistor R2 is equal to the resistance value of the third resistor R3.

[0057] I1=I2=(VGS1-VGS2) / R1;

[0058] VBGR=VGS1+(VGS1-VGS2)R2 / R1;

[0059] Wherein, I1 is the current outputted by the source of the first NMOS M1, I2 is the current outputted by the source of the second NMOS M2, VGS1 is the voltage difference between the gate and the source of the first NMOS M1, VGS2 is the voltage difference between the gate and the source of the second NMOS M2, R1 is the resistance value of the first resistor R1, and R2 is the resistance value of the second resistor R2.

[0060] It can be known from the above formula that adjusting the resistance value of the first resistor R1 and the resistance value of the second resistor R2 can make VBGR be zero temperature coefficient voltage, and then the reference voltage VREF smaller can be obtained through the voltage division of the voltage dividing resistor.

[0061] In addition, the resistance value of each resistor in the embodiment is not particularly limited and can be selected according to actual conditions.

[0062] As a preferred embodiment, the voltage dividing circuit 3 comprises a plurality of voltage dividing resistors connected in series.

[0063] The first end of the voltage dividing resistors connected in series is the first end of the voltage dividing circuit 3, the second end of the voltage dividing resistors connected in series is the second end of the voltage dividing circuit 3, and one end of the output voltage dividing resistor between the first end of the voltage dividing circuit 3 and the second end of the voltage dividing circuit 3 is the reference voltage VREF.

[0064] Please refer to Figure 1 , Figure 1 The circuit diagram of the bandgap reference voltage circuit provided by the present application, in the embodiment, utilizes a plurality of voltage dividing resistors connected in series as the voltage dividing circuit 3, one end of the output voltage dividing resistor between the first end of the voltage dividing circuit 3 and the second end of the voltage dividing circuit 3 is the reference voltage VREF, thereby achieving the purpose of outputting zero temperature coefficient reference voltage VREF smaller than 1V through the bandgap reference voltage circuit.

[0065] In addition, the resistance value of each voltage dividing resistor in the voltage dividing circuit 3 is not particularly limited and can be selected according to actual conditions. There are various voltage dividing circuits that can realize the voltage dividing function, and the voltage dividing circuit in the embodiment has the advantages of simple circuit structure, stability and low cost.

[0066] In addition, in order to further ensure that the reference voltage VREF output by the bandgap reference voltage circuit is not affected by temperature, in the embodiment, each voltage dividing resistor is a voltage dividing resistor with low temperature coefficient, that is, each voltage dividing resistor is affected by temperature change to a very small extent, thereby further ensuring the reliability of the reference voltage VREF output by the bandgap reference voltage circuit.

[0067] As a preferred embodiment, the bandgap reference voltage circuit further comprises a zero-temperature reference current generation circuit.

[0068] The zero-temperature reference current generation circuit is configured to generate a reference current with zero temperature coefficient based on the reference voltage VREF.

[0069] In view of the fact that the bandgap reference voltage circuit in the prior art can only provide a reference voltage VREF with zero temperature coefficient, but cannot simultaneously provide a bias current, that is, a reference current with zero temperature coefficient, due to the circuit structure thereof, in the embodiment, a zero-temperature reference current generation circuit is additionally provided in the bandgap reference voltage circuit, and the zero-temperature reference current generation circuit is configured to generate a reference current with zero temperature coefficient based on the reference voltage VREF.

[0070] As a preferred embodiment, the zero-temperature reference current generation circuit comprises a first PMOS M3.

[0071] The source of the first PMOS M3 is connected to a power supply, the gate is configured to input a start-up current, and the drain is connected to an output terminal of the temperature coefficient compensation circuit 2.

[0072] In the embodiment, the current at the drain of the first PMOS M3 is used as the reference current with zero temperature coefficient. Specifically, the source of the first PMOS M3 is connected to a power supply, the gate is connected to an output terminal of the start-up circuit to input a start-up current, and the drain is connected to an output terminal of the temperature coefficient compensation circuit 2, so that the current output by the drain is also independent of temperature change.

[0073] In addition, please refer to Figure 2 , Figure 2 Another bandgap reference voltage circuit provided by the present application is shown in the circuit diagram. In order to provide more reference current output terminals and increase the parameters of the adjustable reference voltage VREF with zero temperature coefficient, a second PMOS M4 with a common gate and a common source with the first PMOS M3 can also be provided. The source of the second PMOS M4 is connected to a power supply, the gate is connected to the gate of the first PMOS M3, and the drain is connected to an output terminal of the voltage dividing circuit 3. Therefore, the current at the drain of the second PMOS M4 is also independent of temperature change, thereby enhancing the practicability of the bandgap reference voltage circuit.

[0074] Figure 2 In the embodiment, the current at the drain of the first PMOS M3 is used as the reference current with zero temperature coefficient. Specifically, the source of the first PMOS M3 is connected to a power supply, the gate is connected to an output terminal of the start-up circuit to input a start-up current, and the drain is connected to an output terminal of the temperature coefficient compensation circuit 2, so that the current output by the drain is also independent of temperature change. That is, the reference current, that is,

[0075] =2(VGS1-VGS2) / R1+I5;

[0076] I5=(VBGR-VREF) / R5;

[0077] VBGR=VGS1+(VGS1-VGS2)((R2+R4) / R1;

[0078] Combining the above two equations, we can derive that:

[0079] ((1 / 2)*R6+1 / R5)*VREF=VGS1 / R5+(VGS1-VGS2)(1+(R2+R4) / R5) / R1;

[0080] wherein VGS1 is a negative temperature coefficient voltage, VGS1-VGS2 is a positive temperature coefficient voltage, and by adjusting the values of the various parameters in the above equation, VREF can be made to be a small zero-temperature coefficient reference voltage.

[0081] Each of the embodiments described in this specification has at least one implementation. Accordingly, the terms "a" or "one" implementation, as used herein, refer to at least one of the implementations, unless the context clearly indicates otherwise. The terms "the" and "this" are used herein solely to convey the context of the various embodiments and are not intended to restrict any embodiment to the implementation at hand. The terms "comprises," "comprising," "includes," "including," and the like are used herein to allow for a detailed description of the embodiments, without placing limitations on the scope of what can be claimed. The articles "a" and "an" are used herein to refer to one or to more than one (i.e. to one or at least one) of the grammatical object of the article. By the use of the term "another" herein, it is meant at least one. The terms "including" and "comprising" are used herein in the sense of "including at least the recited item, and any equivalent thereof." The terms "and / or" and "or" are used herein in the sense of "and / or, that is, one or the other or both." The phrase "associated with," as used herein, means to have a constructive relationship with. The phrase "based on," as used herein, means based, at least in part, on. The term "coupled" as used herein, means to be directly or indirectly connected to or in contact with.

[0082] The above description of disclosed embodiments provides enough information to enable others skilled in the art to make or use the application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other embodiments without departing from the spirit or scope of the application. Accordingly, the application is not to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A bandgap reference voltage circuit, characterized by, The positive and negative temperature coefficient voltage generation circuit, the temperature coefficient compensation circuit and the voltage dividing circuit are included. The positive and negative temperature coefficient voltage generation circuit is used for generating a positive temperature coefficient voltage and a negative temperature coefficient voltage. The temperature coefficient compensation circuit is used for generating a zero temperature coefficient voltage based on the positive temperature coefficient voltage and the negative temperature coefficient voltage. The first end of the voltage dividing circuit is connected with the output end of the temperature coefficient compensation circuit, the second end is grounded, and the output end between the first end and the second end is used for outputting a reference voltage. The positive and negative temperature coefficient voltage generation circuit includes a first NMOS, a second NMOS and a first resistor, and the first NMOS and the second NMOS work in a subthreshold region. The first end of the first resistor is connected with the gate of the first NMOS, the second end of the first resistor is respectively connected with the drain of the first NMOS and the gate of the second NMOS, and the source of the first NMOS and the source of the second NMOS are both grounded. The voltage between the gate and the source of the first NMOS is used as the negative temperature coefficient voltage, and the voltage across the first resistor is used as the positive temperature coefficient voltage. The temperature coefficient compensation circuit includes an amplifier, a second resistor and a third resistor, and the resistance value of the second resistor is equal to that of the third resistor. The positive input end of the amplifier is connected with the common end of the first resistor and the first NMOS and the first end of the first resistor, the negative input end of the amplifier is connected with the drain of the second NMOS and the first end of the third resistor, the second end of the second resistor is connected with the second end of the third resistor, and the output end of the amplifier is connected with the output end of a starting circuit, wherein the starting circuit is used for outputting a starting current.

2. The bandgap reference voltage circuit of claim 1, wherein, The voltage dividing circuit includes a plurality of voltage dividing resistors connected in series. The first end of the series-connected voltage dividing resistors is used as the first end of the voltage dividing circuit, the second end of the series-connected voltage dividing resistors is used as the second end of the voltage dividing circuit, and one end of the output voltage dividing resistor between the first end of the voltage dividing circuit and the second end of the voltage dividing circuit is used as the reference voltage.

3. The bandgap reference voltage circuit of claim 2, wherein, Each of the voltage dividing resistors is a low-temperature-coefficient voltage dividing resistor.

4. The bandgap reference voltage circuit of any one of claims 1 to 3, wherein, A zero-temperature-reference-current generation circuit is further included. The zero-temperature-reference-current generation circuit is used for generating a zero-temperature-coefficient reference current based on the reference voltage.

5. The bandgap reference voltage circuit of claim 4, wherein, The zero-temperature-reference-current generation circuit includes a first PMOS. The source of the first PMOS is connected with a power supply, the gate is used for inputting a starting current, and the drain is connected with the output end of the temperature coefficient compensation circuit.

6. The bandgap reference voltage circuit of claim 5, wherein, The zero-temperature-reference-current generation circuit further includes a second PMOS. The source of the second PMOS is connected with the power supply, the gate is connected with the gate of the first PMOS, and the drain is connected with the output end of the voltage dividing circuit.

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