Semiconductor device and method for manufacturing the same

Abstract

A semiconductor device (10) and a method for manufacturing the same. The method for manufacturing the semiconductor device (10) includes: first forming a first conductive layer (12) on a substrate (11), wherein the first conductive layer (12) includes a heavily doped III-V compound; then forming an isolation structure (13) on the first conductive layer; and then growing a light-emitting structure (14) using the isolation structure (13) as a mask, wherein the light-emitting structure (14) includes a first semiconductor layer (141), an active layer (142), and a second semiconductor layer (143) that are sequentially stacked on the first conductive layer (12), and the conductivity type of the first semiconductor layer (141) is opposite to that of the second semiconductor layer (142).

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and particularly to a semiconductor device and a method for manufacturing the same. Background Art

[0002] In the related art, Micro-LED (micro light-emitting diode) is a new display technology with advantages such as high brightness and high luminous efficiency.

[0003] However, in the process of manufacturing Micro-LED, it is generally necessary to transfer to a temporary carrier board, and there may be multiple transfers. The specific number of transfers varies due to differences in actual processes. Finally, the Micro-LED is transferred to the driving circuit board. Multiple transfers may lead to a decrease in yield and an increase in production costs.

[0004] In view of this, it is necessary to provide a new semiconductor device and a method for manufacturing the same to meet the above requirements. Summary of the Invention

[0005] The object of the present invention is to provide a semiconductor device and a method for manufacturing the same, which can reduce the number of transfers, improve the yield, and reduce the cost.

[0006] To achieve the above object, a first aspect of the present invention provides a method for manufacturing a semiconductor device, including:

[0007] Forming a first conductive layer on a substrate, the first conductive layer including a heavily doped III-V compound;

[0008] Forming an isolation structure on the first conductive layer;

[0009] Growing a light-emitting structure using the isolation structure as a mask; the light-emitting structure includes a first semiconductor layer, an active layer, and a second semiconductor layer sequentially stacked on the first conductive layer, and the conductivity type of the first semiconductor layer is opposite to that of the second semiconductor layer.

[0010] Optionally, the method for manufacturing a semiconductor device further includes:

[0011] Forming a first electrode and a second electrode, the first electrode being electrically connected to the first conductive layer through a first via hole in the isolation structure, and the second electrode being located on the second semiconductor layer and electrically connected to the second semiconductor layer.

[0012] Optionally, forming the first electrode and the second electrode includes:

[0013] Forming the first via hole in the isolation structure, the first via hole penetrating the isolation structure;

[0014] Form the first electrode in the first via hole, one end of the first electrode is electrically connected to the first conductive layer, and the other end exposes the isolation structure;

[0015] Form the second electrode on the second semiconductor layer.

[0016] Optionally, the method for manufacturing the semiconductor device further includes:

[0017] Form a second via hole in the isolation structure and the first conductive layer, the second via hole penetrates the isolation structure and the first conductive layer;

[0018] Form a first insulating dielectric layer in the second via hole, and form a second insulating dielectric layer between the adjacent first electrode and the second electrode to obtain an intermediate transition structure.

[0019] Optionally, after obtaining the intermediate transition structure, it further includes:

[0020] Transfer the intermediate transition structure to a driving circuit board, the driving circuit board includes a first pad and a second pad, the first electrode corresponds to the first pad, and the second electrode corresponds to the second pad;

[0021] Weld the first electrode on the first pad, and weld the second electrode on the second pad;

[0022] Peel off the substrate to obtain the semiconductor device.

[0023] Optionally, before forming the first electrode and the second electrode, it further includes:

[0024] Form a mirror on the light-emitting structure, and the material of the mirror is a conductive material.

[0025] Optionally, a plurality of adjacent light-emitting structures form a light-emitting unit, and the plurality of light-emitting structures in the light-emitting unit are connected in series through the first conductive layer; the light-emitting unit further includes a plurality of the first electrodes and a plurality of the second electrodes, one of the plurality of first electrodes is welded on the first pad, and the remaining first electrodes are not welded on the first pad, and the plurality of second electrodes are welded on the plurality of second pads one by one.

[0026] The second aspect of the present invention provides a semiconductor device, including:

[0027] A first conductive layer, including a heavily doped III-V group compound;

[0028] An isolation structure located on the first conductive layer;

[0029] A light-emitting structure is located in the isolation structure. The light-emitting structure includes a first semiconductor layer, an active layer, and a second semiconductor layer that are sequentially stacked on the first conductive layer. The conductivity type of the first semiconductor layer is opposite to that of the second semiconductor layer.

[0030] Optionally, the semiconductor device further includes:

[0031] A first electrode and a second electrode. The first electrode is electrically connected to the first conductive layer through a first via hole in the isolation structure. The second electrode is located on the second semiconductor layer and is electrically connected to the second semiconductor layer.

[0032] Optionally, the first via hole is located in the isolation structure and penetrates the isolation structure. The first electrode is located in the first via hole. One end of the first electrode is electrically connected to the first conductive layer, and the other end exposes the isolation structure;

[0033] The semiconductor device further includes:

[0034] A second via hole that penetrates the isolation structure and the first conductive layer;

[0035] A first insulating dielectric layer and a second insulating dielectric layer. The first insulating dielectric layer is located in the second via hole, and the second insulating dielectric layer is located between the adjacent first electrode and the second electrode.

[0036] Optionally, the semiconductor device further includes:

[0037] A mirror located between the second electrode and the second semiconductor layer. The material of the mirror is a conductive material.

[0038] Optionally, the semiconductor device further includes:

[0039] A driving circuit board. The driving circuit board includes a first pad and a second pad. The first electrode is soldered on the first pad, and the second electrode is soldered on the second pad.

[0040] Optionally, a plurality of adjacent light-emitting structures form a light-emitting unit. The plurality of light-emitting structures in the light-emitting unit are connected in series through the first conductive layer; the light-emitting unit further includes a plurality of the first electrodes and a plurality of the second electrodes. One of the plurality of first electrodes is soldered on the first pad, and the remaining first electrodes are not soldered on the first pad. The plurality of second electrodes are soldered on the plurality of second pads one by one.

[0041] Compared with the prior art, the beneficial effect of the present invention is that: since a first conductive layer is first formed on the substrate to prepare the electrode before preparing the light-emitting structure, the light-emitting structure is no longer transferred to a temporary carrier to peel off the substrate and then prepare the electrode, the number of transfers can be reduced, and the risk of contamination caused by transferring back and forth between different chambers can be avoided, thereby improving the yield and reducing costs.

[0042] Moreover, due to the existence of the isolation structure, the light-emitting structure does not need to be dry-etched, and independent light-emitting structures can be naturally formed, thereby alleviating the side wall defects of the light-emitting structure caused by dry etching. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 is a flow chart of a method for preparing a semiconductor device according to a first embodiment of the present invention;

[0044] Figures 2 to 9 yes Figure 1 Schematic diagram of the intermediate structure corresponding to the process in;

[0045] Figure 10 is a schematic cross-sectional structural diagram of a semiconductor device according to a first embodiment of the present invention;

[0046] Figure 11 FIG. 4 is a schematic cross-sectional structural diagram of a semiconductor device according to a second embodiment of the present invention.

[0047] To facilitate understanding of the present invention, all reference numerals appearing in the present invention are listed below:

[0048] Substrate 11 First conductive layer 12

[0049] Isolation structure 13 Light emitting structure 14

[0050] First semiconductor layer 141 Active layer 142

[0051] The second semiconductor layer 143 and the first electrode 15

[0052] Second electrode 16 First via hole 17

[0053] Second via hole 18 First insulating dielectric layer 19

[0054] Second insulating dielectric layer 21 Reflector 22

[0055] Intermediate transition structure 30 Driving circuit board 31

[0056] First pad 311 Second pad 312

[0057] First welding portion 41 Second welding portion 42

[0058] Semiconductor device 10 DETAILED DESCRIPTION

[0059] To make the above objects, features, and advantages of the present invention more apparent and understandable, the following describes in detail the specific embodiments of the present invention with reference to the accompanying drawings.

[0060] Figure 1 is a flowchart of a method for manufacturing a semiconductor device according to a first embodiment of the present invention. Figures 2 to 9 is Figure 1 a schematic diagram of an intermediate structure corresponding to the process in Figure 10 is a schematic cross-sectional structure diagram of a semiconductor device according to a first embodiment of the present invention. As Figure 1 shown, the method for manufacturing the semiconductor device includes the following steps S101 to S110:

[0061] In step S101, a first conductive layer 12 is formed on a substrate 11, and the first conductive layer 12 includes a heavily doped III-V compound.

[0062] In this step, as Figure 2 shown, the first conductive layer 12 can be formed on the substrate 11 by an epitaxial process. Among them, the epitaxial process can be MOCVD (Metal Organic Chemical Vapor Deposition), MBE (Molecular Beam Epitaxy), or ALD (Atomic Layer Deposition), but is not limited thereto.

[0063] In this embodiment, the material of the first conductive layer 12 can be GaN, or can also be AlN, AlGaN, InGaN, or AlInGaN, but is not limited thereto.

[0064] In this embodiment, the doping elements in the first conductive layer 12 include at least one of Si ions, Ge ions, Sn ions, Se ions, and Te ions. For example, the doping elements of the first conductive layer 12 include Si ions, or include Si ions and Sn ions, but are not limited thereto.

[0065] In this embodiment, the material of the substrate 11 is silicon. Of course, the material of the substrate 11 can also be SiC, GaN, or sapphire.

[0066] In step S102, an isolation structure 13 is formed on the first conductive layer 12.

[0067] In this step, as Figure 3 shown, the isolation structure 13 can be formed on the first conductive layer 12 by an epitaxial process. Among them, the material of the isolation structure 13 is an insulating material. The isolation structure 13 is a hollow structure, and the accommodation space surrounded by the isolation structure 13 is used to accommodate the light-emitting structure 14. The isolation structure 13 is used to isolate adjacent light-emitting structures 14. The projection of the isolation structure 13 on the substrate 11 can be annular, for example, a circular ring, a rectangular ring, but is not limited thereto.

[0068] In this embodiment, as Figure 3 shown, the average aperture R of the isolation structure 13 is less than or equal to 100 microns. The average aperture R of the isolation structure 13 is the aperture of the ring formed by the centers of the side walls of the isolation structure 13.

[0069] In this embodiment, due to the presence of the isolation structure 13, dry etching does not need to be performed on the light-emitting structure 14, and the mutually independent light-emitting structures 14 can be naturally formed, thus alleviating the sidewall defects of the light-emitting structure 14 caused by dry etching.

[0070] In step S103, the light-emitting structure 14 is grown using the isolation structure 13 as a mask. The light-emitting structure 14 includes a first semiconductor layer 141, an active layer 142, and a second semiconductor layer 143 that are sequentially stacked on the first conductive layer 12. The conductivity type of the first semiconductor layer 141 is opposite to that of the second semiconductor layer 143.

[0071] In this step, as Figure 4 shown, the epitaxial process can be used to grow the light-emitting structure 14 using the isolation structure 13 as a mask. Among them, the light-emitting structure 14 includes a first semiconductor layer 141, an active layer 142, and a second semiconductor layer 143 that are sequentially stacked on the first conductive layer 12.

[0072] In this embodiment, the first semiconductor layer 141 is an N-type semiconductor layer. The material of the first semiconductor layer 141 is a group III-V compound, such as GaN, and may also be AlN, AlGaN, InGaN, or AlInGaN. The doping elements of the first semiconductor layer 141 include at least one of Si ions, Ge ions, Sn ions, Se ions, and Te ions. For example, the doping elements of the first semiconductor layer 141 include Si ions, or include Si ions and Sn ions, but are not limited thereto.

[0073] In this embodiment, the active layer 142 includes a multi-quantum well structure. Among them, the multi-quantum well structure may be a periodic structure in which GaN and AlGaN are alternately arranged, or a periodic structure in which GaN and AlInGaN are alternately arranged, but is not limited thereto.

[0074] In this embodiment, the second semiconductor layer 143 is a P-type semiconductor layer. The material of the second semiconductor layer 143 is a group III-V compound. For example, it may be GaN, or may also be AlN, AlGaN, InGaN, or AlInGaN. The doping elements of the second semiconductor layer 143 include at least one of Mg ions, Zn ions, Ca ions, Sr ions, or Ba ions. For example, it includes Mg ions, or includes Mg ions and Zn ions, but is not limited thereto.

[0075] In step S104, a mirror 22 is formed on the light-emitting structure 14, and the material of the mirror 22 is a conductive material.

[0076] In this embodiment, as Figure 5 shown, physical vapor deposition (PVD) or chemical vapor deposition (CVD) can be used to form the mirror 22 on the light-emitting structure 14. The mirror 22 is used to reflect the light emitted by the light-emitting structure 14 back.

[0077] In this embodiment, the mirror 22 can include a nickel metal layer and a silver metal layer, where the nickel metal layer is located between the light-emitting structure 14 and the silver metal layer. The mirror 22 can also include an indium tin oxide (ITO) layer, a nickel metal layer, and a silver metal layer, where the indium tin oxide layer, the nickel metal layer, and the silver metal layer are stacked on the light-emitting structure 14 in sequence. Of course, the structure of the mirror 22 is not limited to the structures listed above.

[0078] In step S105, a first via 17 is formed in the isolation structure 13, the first via 17 penetrates the isolation structure 13, and a second via 18 is formed on the isolation structure 13 and the first conductive layer 12, and the second via 18 penetrates the isolation structure 13 and the first conductive layer 12.

[0079] In this step, as Figure 6 shown, a dry etching process or a wet etching process can be used to form the first via 17 in the isolation structure 13 and the second via 18 on the isolation structure 13 and the first conductive layer 12. The first via 17 penetrates the isolation structure 13 to expose the surface of the first conductive layer 12 away from the substrate 11, and the second via 18 penetrates the isolation structure 13 and the first conductive layer 12 to cut off the first conductive layer 12.

[0080] In step S106, a first electrode 15 is formed in the first via 17, and a second electrode 16 is formed on the mirror 22. Among them, one end of the first electrode 15 is electrically connected to the first conductive layer 12, and the other end is exposed from the isolation structure 13.

[0081] In this step, as Figure 7 shown, a conductive material is filled in the first via 17 to form the first electrode 15, and a conductive material is covered on the mirror 22 to form the second electrode 16. One end of the first electrode 15 is in direct contact with the first conductive layer 12 to achieve electrical connection, and the other end is exposed from the isolation structure 13.

[0082] In this embodiment, the first electrode 15 can be an N-type electrode, or a cathode. The material of the first electrode 15 can include at least one of gold, silver, aluminum, nickel, platinum, chromium, and titanium. For example, the material of the first electrode 15 can include gold, aluminum, nickel, and chromium, but is not limited thereto.

[0083] In this embodiment, the second electrode 16 can be a P-type electrode, or an anode. The material of the second electrode 16 can include at least one of gold, silver, aluminum, nickel, platinum, chromium, and titanium. For example, the material of the second electrode 16 can include gold, aluminum, nickel, and chromium, but is not limited thereto.

[0084] In step S107, a first insulating dielectric layer 19 is formed in the second via 18, and a second insulating dielectric layer 21 is formed between the adjacent first electrode 15 and the second electrode 16, obtaining an intermediate transition structure 30.

[0085] In this step, as Figure 8 shown, an insulating material is filled in the second via 18 to form the first insulating dielectric layer 19, and an insulating material is filled between the adjacent first electrode 15 and the second electrode 16 to form the second insulating dielectric layer 21. Among them, one side of the first insulating dielectric layer 19 close to the second electrode 16 also covers one end of the second electrode 16 close to the second via 18. The first insulating dielectric layer 19 is used to prevent the adjacent first conductive layer (12) from conducting electricity, and the second insulating dielectric layer 21 is used to prevent the first electrode 15 and the second electrode 16 from conducting electricity.

[0086] In this embodiment, after the first insulating dielectric layer 19 and the second insulating dielectric layer 21 are formed, the intermediate transition structure 30 is obtained.

[0087] In step S108, the intermediate transition structure 30 is transferred onto the driving circuit board 31. The driving circuit board 31 includes a first pad 311 and a second pad 312. The first electrode 15 corresponds to the first pad 311, and the second electrode 16 corresponds to the second pad 312.

[0088] In this step, as Figure 9 shown, the intermediate transition structure 30 is transferred onto the driving circuit board 31, wherein the first electrode 15 on the intermediate transition structure 30 corresponds to the first pad 311 on the driving circuit board 31, and the second electrode 16 on the intermediate transition structure 30 corresponds to the second pad 312 on the driving circuit board 31.

[0089] In this embodiment, the driving circuit board 31 includes a driving circuit for driving the light-emitting structure 14 to emit light. The first pad 311 and the second pad 312 are respectively electrically connected to the driving circuit, and both the first pad 311 and the second pad 312 are conductive.

[0090] In step S109, the first electrode 15 is soldered onto the first pad 311, and the second electrode 16 is soldered onto the second pad 312.

[0091] In this step, as Figure 9As shown, the first electrode 15 can be welded to the first pad 311 by a welding process, and the second electrode 16 can be welded to the second pad 312. Among them, the first electrode 15 and the first pad 311 are welded together through the first welding portion 41, and the second electrode 16 and the second pad 312 are welded together through the second welding portion 42. After welding the first electrode 15 to the first pad 311 and welding the second electrode 16 to the second pad 312, the electrical connection between the light-emitting structure 14 and the driving circuit is achieved.

[0092] In this embodiment, the materials of the first welding portion 41 and the second welding portion 42 can be conductive materials. For example, they can be solder paste or conductive adhesive.

[0093] In step S110, the substrate 11 is peeled off to obtain a semiconductor device.

[0094] In this step, as Figure 10 shown, the substrate 11 is peeled off by a peeling process to obtain a semiconductor device. Among them, when the material of the substrate 11 is silicon, the substrate 11 can be peeled off by means such as wet etching, dry etching, or thinning the substrate 11 by mechanical grinding. When the material of the substrate 11 is sapphire, a laser lift-off (LLO) process is used to peel off the substrate 11.

[0095] In this embodiment, since the first conductive layer 12 is formed on the substrate 11 before preparing the light-emitting structure 14 to prepare the first electrode 15, it is not necessary to transfer the light-emitting structure 14 to a temporary carrier to peel off the substrate 11 and then prepare the first electrode 15. This can reduce the number of transfers, avoid the contamination risk caused by transferring back and forth between different chambers, improve the yield, and reduce the cost.

[0096] Figure 10 is a schematic cross-sectional structure diagram of the semiconductor device according to the first embodiment of the present invention. As Figure 10 shown, the semiconductor device includes: a first conductive layer 12, an isolation structure 13, a light-emitting structure 14, a mirror 22, a first via 17, a second via 18, a first electrode 15, a second electrode 16, a first insulating dielectric layer 19 and a second insulating dielectric layer 21, and a driving circuit board 31.

[0097] In this embodiment, the first conductive layer 12 includes a heavily doped III-V compound.

[0098] In this embodiment, as Figure 10 shown, the isolation structure 13 is located on the first conductive layer 12. The light-emitting structure 14 is located in the isolation structure 13. The light-emitting structure 14 includes a first semiconductor layer 141, an active layer 142, and a second semiconductor layer 143 that are sequentially stacked on the first conductive layer 12. Among them, the conductivity type of the first semiconductor layer 141 is opposite to that of the second semiconductor layer 143.

[0099] In this embodiment, as Figure 10 shown, the mirror 22 is located between the second electrode 16 and the second semiconductor layer 143, and the material of the mirror 22 is a conductive material.

[0100] In this embodiment, as Figure 10 shown, the first electrode 15 is electrically connected to the first conductive layer 12 through the first via 17 in the isolation structure 13. The second electrode 16 is located on the second semiconductor layer 143 and is electrically connected to the second semiconductor layer 143. Among them, the first via 17 is located in the isolation structure 13 and penetrates through the isolation structure 13. The first electrode 15 is located in the first via 17. One end of the first electrode 15 is electrically connected to the first conductive layer 12, and the other end is exposed from the isolation structure 13.

[0101] In this embodiment, the second via 18 penetrates through the isolation structure 13 and the first conductive layer 12. As Figure 10 shown, the first insulating dielectric layer 19 is located in the second via 18, and the second insulating dielectric layer 21 is located between the adjacent first electrode 15 and the second electrode 16.

[0102] In this embodiment, as Figure 10 shown, the driving circuit board 31 includes a first pad 311 and a second pad 312. The first electrode 15 is soldered on the first pad 311, and the second electrode 16 is soldered on the second pad 312. Among them, the first electrode 15 is soldered on the first pad 311 through the first soldering portion 41, and the second electrode 16 is soldered on the second pad 312 through the second soldering portion 42.

[0103] Figure 11 is a schematic cross-sectional structure diagram of a semiconductor device according to the second embodiment of the present invention. The semiconductor device 10 in this embodiment can be prepared by using the preparation method of the semiconductor device described in the first embodiment. In this embodiment, a plurality of adjacent light-emitting structures 14 form a light-emitting unit. Among them, a plurality means that the number of the light-emitting structures 14 is greater than 1. For example, two or three adjacent light-emitting structures 14 form a light-emitting unit. Figure 11 Only two light-emitting structures 14 in the light-emitting unit are shown in

[0104] As Figure 11 shown, a plurality of light-emitting structures 14 in the light-emitting unit are connected in series through the first conductive layer 12. The light-emitting unit further includes a plurality of first electrodes 15 and a plurality of second electrodes 16. One of the plurality of first electrodes 15 is soldered on the first pad 311, and the remaining first electrodes 15 are not soldered on the first pad 311. The plurality of second electrodes 16 are soldered on the plurality of second pads 312 in one-to-one correspondence.

[0105] For example, when three adjacent light-emitting structures 14 form a light-emitting unit, the three light-emitting structures 14 in the light-emitting unit are connected in series through the first conductive layer 12. The light-emitting unit includes three first electrodes 15 and three second electrodes 16. One of the three first electrodes 15 is welded to the first pad 311, and the remaining two first electrodes 15 are not welded to the first pad 311. The three second electrodes 16 are welded to the three second pads 312 in one-to-one correspondence. The light-emitting colors of the three light-emitting structures 14 in the light-emitting unit are the first primary color, the second primary color, and the third primary color, respectively. For example, they are red, green, and blue, respectively.

[0106] In this embodiment, when the first conductive layer 12 includes a plurality of annular isolation structures 13, the side walls of adjacent isolation structures 13 are in contact with each other, or in other words, adjacent isolation structures 13 share side walls, and the plurality of isolation structures 13 are in a net shape.

[0107] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.

Claims

1. A method for manufacturing a semiconductor device, characterized in that, Comprising: Forming a first conductive layer (12) on a substrate (11), the first conductive layer (12) comprising a heavily doped III-V compound; Forming an isolation structure (13) on the first conductive layer (12); Growing a light-emitting structure (14) using the isolation structure (13) as a mask; the light-emitting structure (14) includes a first semiconductor layer (141), an active layer (142), and a second semiconductor layer (143) that are sequentially stacked on the first conductive layer (12), and the conductivity type of the first semiconductor layer (141) is opposite to the conductivity type of the second semiconductor layer (143); Further comprising: Forming a first electrode (15) and a second electrode (16), the first electrode (15) is electrically connected to the first conductive layer (12) through a first via (17) in the isolation structure (13), the second electrode (16) is located on the second semiconductor layer (143) and is electrically connected to the second semiconductor layer (143); forming a second via (18) in the isolation structure (13) and the first conductive layer (12), the second via (18) penetrates the isolation structure (13) and the first conductive layer (12); Forming a first insulating dielectric layer (19) in the second via (18), and forming a second insulating dielectric layer (21) between the adjacent first electrode (15) and the second electrode (16) to obtain an intermediate transition structure (30).

2. The manufacturing method of the semiconductor device according to claim 1, characterized in that, The forming of the first electrode (15) and the second electrode (16) includes: Forming the first via (17) in the isolation structure (13), the first via (17) penetrates the isolation structure (13); Forming the first electrode (15) in the first via (17), one end of the first electrode (15) is electrically connected to the first conductive layer (12), and the other end exposes the isolation structure (13); Forming the second electrode (16) on the second semiconductor layer (143).

3. The manufacturing method of the semiconductor device according to claim 1, characterized in that, After obtaining the intermediate transition structure (30), further comprising: Transferring the intermediate transition structure (30) onto a driving circuit board (31), the driving circuit board (31) includes a first pad (311) and a second pad (312), the first electrode (15) corresponds to the first pad (311), and the second electrode (16) corresponds to the second pad (312); Welding the first electrode (15) to the first pad (311), and welding the second electrode (16) to the second pad (312); Peeling off the substrate (11) to obtain the semiconductor device (10).

4. The manufacturing method of the semiconductor device according to claim 1, wherein, Before forming the first electrode (15) and the second electrode (16), further comprising: Forming a mirror (22) on the light-emitting structure (14), the material of the mirror (22) is a conductive material.

5. The method for manufacturing a semiconductor device according to claim 3, wherein, A plurality of adjacent light-emitting structures (14) form a light-emitting unit, and the plurality of light-emitting structures (14) in the light-emitting unit are connected in series through the first conductive layer (12); the light-emitting unit further includes a plurality of the first electrodes (15) and a plurality of the second electrodes (16), one of the plurality of first electrodes (15) is welded to the first pad (311), and the remaining first electrodes (15) are not welded to the first pad (311), and the plurality of second electrodes (16) are welded to the plurality of second pads (312) in one-to-one correspondence.

6. A semiconductor device, characterized in that, Comprising: A first conductive layer (12), including a heavily doped III-V compound; An isolation structure (13) located on the first conductive layer (12); A light-emitting structure (14) located in the isolation structure (13), the light-emitting structure (14) includes a first semiconductor layer (141), an active layer (142) and a second semiconductor layer (143) sequentially stacked on the first conductive layer (12), and the conductivity type of the first semiconductor layer (141) is opposite to the conductivity type of the second semiconductor layer (143); A first electrode (15) and a second electrode (16), the first electrode (15) is electrically connected to the first conductive layer (12) through a first via (17) in the isolation structure (13), and the second electrode (16) is located on the second semiconductor layer (143) and is electrically connected to the second semiconductor layer (143); A second via (18) penetrating through the isolation structure (13) and the first conductive layer (12); A first insulating dielectric layer (19) and a second insulating dielectric layer (21), the first insulating dielectric layer (19) is located in the second via (18), and the second insulating dielectric layer (21) is located between adjacent first electrodes (15) and second electrodes (16).

7. The semiconductor device according to claim 6, wherein The first via (17) is located in the isolation structure (13) and penetrates through the isolation structure (13), the first electrode (15) is located in the first via (17), and one end of the first electrode (15) is electrically connected to the first conductive layer (12), and the other end exposes the isolation structure (13).

8. The semiconductor device according to claim 6, wherein, Further comprising: A mirror (22) located between the second electrode (16) and the second semiconductor layer (143), and the material of the mirror (22) is a conductive material.

9. The semiconductor device according to claim 6, wherein Further comprising: A driving circuit board (31), the driving circuit board (31) includes a first pad (311) and a second pad (312), the first electrode (15) is welded to the first pad (311), and the second electrode (16) is welded to the second pad (312).

10. The semiconductor device according to claim 9, wherein, A plurality of adjacent said light-emitting structures (14) form a light-emitting unit, and the plurality of said light-emitting structures (14) in the light-emitting unit are connected in series through the first conductive layer (12); the light-emitting unit further includes a plurality of said first electrodes (15) and a plurality of said second electrodes (16). One of the plurality of said first electrodes (15) is welded to the first pad (311), and the remaining said first electrodes (15) are not welded to the first pad (311). The plurality of said second electrodes (16) are welded to the plurality of second pads (312) in one-to-one correspondence.

Images