Voltage stabilizer, chip and electronic device

Abstract

The application discloses a voltage stabilizer, a chip and an electronic device. In the voltage stabilization, the first input end of an error amplifier module is used for connecting a reference voltage, the second input end is connected with the output end of a feedback network, the output end is connected with the gate of a power tube, the source of the power tube is connected with a set power supply, and the drain is connected with the first end of the feedback network and the first end of a load module respectively. The drain of the power tube is used as the voltage stabilization output end for voltage stabilization output. The feedback network is used for sampling the output voltage of the voltage stabilization output end, adjusting the sampled voltage, and outputting a feedback voltage to the second input end of the error amplifier module. The error amplifier module is used for reducing the static current, adjusting the current under the heavy load to drive the power tube in the corresponding load increasing scene of the load module, and simulating the preset application scene. The application can optimize the performance indexes of response efficiency and power consumption.

Description

Technical Field

[0001] This application relates to the field of circuit technology, specifically to a voltage regulator, chip, and electronic device. Background Technology

[0002] LDOs (Low Dropout Linear Regulators) are a crucial category of power management products, widely used in consumer electronics such as mobile phones, computers, tablets, and automotive electronics. Due to their low ripple and low noise characteristics, LDOs are required for power supply in all circuits with high noise and interference requirements. LDO design demands stability across the entire load range, along with high PSRR (Power Supply Rejection Ratio), low noise output, and fast transient response. Therefore, products have always involved trade-offs in these performance parameters.

[0003] As automotive electronics and other automotive-grade applications increasingly demand high-voltage performance, LDO efficiency becomes a critical limiting factor. Therefore, the lower the static power consumption of an LDO under light loads, the higher its efficiency. In short, in automotive electronics and similar scenarios, to achieve increasingly lower static power consumption, trade-offs and improvements must be made to various design parameters. While some solutions have proposed LDO architectures for automotive electronics, they suffer from poor performance. Summary of the Invention

[0004] In view of this, this application provides a voltage regulator, chip, and electronic device to solve the problem that although traditional solutions have proposed some LDO architectures for scenarios such as automotive electronics, they have poor performance indicators.

[0005] This application provides a voltage regulator, including an error amplification module, a power transistor, a feedback network, and a load module;

[0006] The first input terminal of the error amplification module is used to connect to the reference voltage, the second input terminal is connected to the output terminal of the feedback network, the output terminal is connected to the gate of the power transistor, the source of the power transistor is connected to the set power supply, and the drain is connected to the first terminal of the feedback network and the first terminal of the load module respectively.

[0007] The drain of the power transistor serves as the regulated output terminal for regulated output.

[0008] The feedback network is used to sample the output voltage of the regulated output terminal, adjust the sampled voltage, and output a feedback voltage to the second input terminal of the error amplification module.

[0009] The error amplification module is used to reduce the static current and adjust the current to drive the power transistor in the event of a heavy load as the load corresponding to the load module increases.

[0010] The load module is used to simulate preset application scenarios.

[0011] Optionally, the error amplification module includes a voltage generation unit, a first gain unit, a second gain unit, and a compensation unit; the voltage generation unit is used to convert the external voltage provided by the set power supply from the high-voltage domain to a reference voltage located in the low-voltage domain; the first gain unit is used to perform a first-stage gain processing on the reference voltage and the feedback voltage output by the feedback network; the second gain unit is used to perform a second-stage gain processing on the voltage signal after the first-stage gain processing; the compensation unit is used to adjust the zero point of the error amplification module under light and heavy loads, thereby compensating for pole changes.

[0012] Optionally, the voltage generating unit includes a first Zener diode, a second Zener diode, a first resistor, and a first transistor; the input terminal of the first Zener diode is grounded, and its output terminal is connected to the source of the first transistor and the current supply terminal of the first gain unit, respectively; the input terminal of the second Zener diode is grounded, and its output terminal is connected to the first terminal of the first resistor and the gate of the first transistor, respectively; the second terminal of the first resistor and the drain of the first transistor are connected to the set power supply, respectively; and the source of the first transistor is also used to output the reference voltage.

[0013] Optionally, the first gain unit includes a current source, a second transistor, a third transistor, a fourth transistor, and a fifth transistor; the input terminal of the current source is the current supply terminal of the first gain unit, and the output terminal is connected to the source of the second transistor and the source of the third transistor, respectively. The gate of the second transistor is used to connect to the reference voltage, and the drain is connected to the drain of the fourth transistor, the gate of the fourth transistor, and the gate of the fifth transistor, respectively. The gate of the third transistor is used to connect to the feedback voltage, and the drain is connected to the drain of the fifth transistor, the first terminal of the second gain unit, and the first terminal of the compensation unit, respectively. The source of the fourth transistor and the source of the fifth transistor are grounded.

[0014] Optionally, the compensation unit includes a second resistor and a first capacitor; the first end of the second resistor is the first end of the compensation unit, and the second end is grounded through the first capacitor.

[0015] Optionally, the second gain unit includes a sixth transistor, a seventh transistor, an eighth transistor, a third resistor, a fourth resistor, a fifth resistor, a third Zener diode, and a rectifier diode; the gate of the sixth transistor is the first terminal of the second gain unit, the source is grounded, the drain is connected to the source of the seventh transistor, the gate of the seventh transistor is used to connect to the reference voltage, the drain is connected to the drain of the eighth transistor, the gate of the eighth transistor, and the input terminal of the power transistor, the source of the eighth transistor is connected to the set power supply through the third resistor, the first terminal of the fourth resistor is connected to the set power supply, the second terminal is connected to the input terminal of the power transistor through the rectifier diode, the input terminal of the third Zener diode is connected to the input terminal of the power transistor, and the output terminal is connected to the set power supply through the fifth resistor.

[0016] Optionally, the feedback network includes a sixth resistor, a seventh resistor, and a second capacitor; the sixth resistor and the second capacitor are connected in parallel between the regulated output terminal and the output terminal of the feedback network, and the first terminal of the seventh resistor is the output terminal of the feedback network, while the second terminal is grounded.

[0017] Optionally, the load module is implemented using ceramic capacitors.

[0018] Optionally, the load module includes an eighth resistor, a ninth resistor, and a third capacitor; the first end of the eighth resistor is connected to the regulated output terminal, the second end of the eighth resistor is connected to the first end of the third capacitor, the second end of the third capacitor is grounded, and the ninth resistor is connected between the regulated output terminal and the ground terminal.

[0019] This application also provides a chip including any of the above-mentioned voltage regulators.

[0020] This application also provides an electronic device, including any of the above-described voltage regulators or any of the above-described chips.

[0021] In the voltage regulator, chip, and electronic device provided in this application, the error amplification module can reduce the quiescent current, resulting in low power consumption under light load and no-load conditions. Under heavy load conditions, it can adjust the current according to the load increase scenario corresponding to the load module to quickly drive the power transistor, thereby improving the response efficiency when changing from light load or no-load to heavy load. This gives the voltage regulator the advantage of fast transient response, and the low current under light load and no-load conditions results in low quiescent power consumption for the overall circuit. Therefore, the voltage regulator can optimize performance indicators such as response efficiency and power consumption.

[0022] Furthermore, in the voltage generation unit provided in this application, the first resistor and the second Zener diode can form a voltage divider branch. When the disturbance of the external voltage provided by the power supply is divided to the second Zener diode, it will be reduced by a corresponding proportion to obtain a reference voltage with smaller disturbance. Powering the internal circuit with the reference voltage can improve the PSRR of the overall circuit.

[0023] Furthermore, this application also employs voltage-regulating devices such as a first Zener diode, a second Zener diode, and a third Zener diode, as well as high-voltage NMOS transistors such as a first transistor and a seventh transistor, which have the advantage of high voltage resistance and can be applied to high-voltage scenarios such as automotive applications. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a schematic diagram of a voltage regulator structure according to an embodiment of this application;

[0026] Figure 2 This is a schematic diagram of the error amplification module structure according to an embodiment of this application. Detailed Implementation

[0027] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. In the absence of conflict, the following embodiments and their technical features can be combined with each other.

[0028] The first aspect of this application provides a voltage regulator, as referenced... Figure 1As shown, the voltage regulator includes an error amplification module 110, a power transistor MP0, a feedback network 120, and a load module 130. The first input terminal of the error amplification module 110 is connected to a reference voltage VREF. The second input terminal of the error amplification module 110 is connected to the output terminal of the feedback network 120 to receive the feedback voltage output by the feedback network 120. The output terminal of the error amplification module 110 is connected to the gate of the power transistor MP0. The source of the power transistor MP0 is connected to a setting power supply to receive an external voltage VDD provided by the setting power supply. The drain of the power transistor MP0 is connected to the first terminal of the feedback network and the first terminal of the load module. The setting power supply may include a high voltage in an automotive scenario, and the external voltage it provides may include a relatively high voltage such as 13.5V.

[0029] The drain of the power transistor MP0 serves as the regulated output terminal for voltage regulation, corresponding to the output voltage VOUT. The power transistor MP0 is a high-voltage device with a withstand voltage of 40V, which meets automotive-grade requirements and is suitable for applications requiring 13.5V.

[0030] The feedback network 120 is used to sample the output voltage VOUT of the regulated output terminal, adjust the sampled voltage, and output the feedback voltage VFB to the second input terminal of the error amplification module 110.

[0031] The error amplification module 110 is used to reduce the static current so as to have low power consumption under light load and no load. Under heavy load, it follows the load increase scenario corresponding to the load module 130 and adjusts the current to quickly drive the power transistor MP0 and improve the response efficiency when changing from light load or no load to heavy load.

[0032] The load module 130 is used to simulate preset application scenarios; for example, when the load module 130 has a relatively large resistance, the current at the output terminal of the error amplifier module 110 is small, which can simulate light load or no load scenarios; when the load module 130 has a relatively small resistance, the current at the output terminal of the error amplifier module 110 is large, which can simulate heavy load scenarios.

[0033] In the aforementioned voltage regulator, the error amplification module 110 can reduce the quiescent current, resulting in low power consumption under light load and no-load conditions. Under heavy load conditions, it can adjust the current according to the load increase scenario corresponding to the load module 130 to quickly drive the power transistor MP0, thereby improving the response efficiency when changing from light load or no-load to heavy load. This gives the voltage regulator the advantage of fast transient response, and the low current under light load and no-load conditions results in low quiescent power consumption for the overall circuit. Therefore, the voltage regulator can optimize performance indicators such as response efficiency and power consumption.

[0034] In one embodiment, reference Figure 2As shown, the error amplification module 110 includes a voltage generation unit 111, a first gain unit 112, a second gain unit 113, and a compensation unit 114.

[0035] The voltage generation unit 111 is used to convert the external voltage VDD provided by the set power supply from the high voltage domain to the reference voltage VPRE located in the low voltage domain, so as to clamp the reference voltage VPRE input to the first gain unit 112 to low voltage operation, ensuring that the first gain unit 112 is not affected by the change of high voltage. In this way, the device of the first gain unit 112 can be implemented with low voltage device, thereby saving circuit area.

[0036] The first gain unit 112 is used to perform a first-stage gain processing on the reference voltage VREF and the feedback voltage VFB output by the feedback network 120. The first gain unit 112 can adopt a five-transistor amplifier structure to perform differential-to-single-ended processing on the reference voltage VREF and the feedback voltage VFB, thereby realizing the first-stage gain processing and outputting the corresponding voltage signal. Among them, the reference voltage VREF can be implemented using a reference circuit implemented by a BJT (transistor) to achieve a balance between reference voltage accuracy and low power consumption.

[0037] The second gain unit 113 is used to perform a second-stage gain processing on the voltage signal after the first-stage gain processing. The second gain unit 113 has the advantage of low power consumption in the low current mode corresponding to light load or no load, and has a fast transient response in the high current mode corresponding to heavy load.

[0038] The compensation unit 114 is used to adjust the zero point of the error amplification module 110 under light and heavy loads, thereby compensating for the changes in the poles. The compensation unit 114 can be implemented by RC zero-point compensation, adjusting the zero point under light and heavy loads, thereby compensating for the changes in the poles and improving the stability of the entire feedback system.

[0039] The error amplification module 110 provided in this embodiment can employ dynamic bias current technology. The low current under no-load conditions results in low static power consumption for the corresponding voltage regulator. Under heavy load conditions, by detecting the gate voltage of the driving power transistor MP0, the current of the second-stage gain stage can increase with the increase of the output load, thereby achieving good transient response. Specifically, the voltage generation unit 111 can convert the external voltage VDD from the high-voltage domain to a reference voltage VPRE located in the low-voltage domain, clamping the reference voltage VPRE input to the first gain unit 112 to low-voltage operation, so that the first gain unit 112 is unaffected by changes in the high-voltage voltage. Thus, the devices of the first gain unit 112 can be implemented with low-voltage devices, thereby saving circuit area. The second gain unit 113 has the advantage of low power consumption in the low-current mode corresponding to light load or no-load conditions, and has a fast transient response in the high-current mode corresponding to heavy load conditions. The compensation unit 114 can compensate for pole changes, improving the stability of the entire feedback system.

[0040] In one embodiment, the voltage generating unit 111 includes a first Zener diode Z1, a second Zener diode Z2, a first resistor R2, and a first transistor MNH1. The input terminal of the first Zener diode Z1 is grounded, and its output terminal is connected to the source of the first transistor MNH1 and the current supply terminal of the first gain unit 112, respectively. The input terminal of the second Zener diode Z2 is grounded, and its output terminal is connected to the first terminal of the first resistor R2 and the gate of the first transistor MNH1, respectively. The second terminal of the first resistor R2 and the drain of the first transistor MNH1 are connected to the setting power supply, and the source of the first transistor MNH1 is also used to output the reference voltage VPRE.

[0041] The first transistor MNH1 is a high-voltage NMOS transistor, so that the set power supply connected to the corresponding voltage generation unit 111 can be a high-voltage voltage, thus enabling the corresponding error amplification module 110 to be applicable to high-voltage scenarios such as automotive scenarios.

[0042] The voltage generation unit 111 can output a reference voltage VPRE located in the low-voltage domain. This reference voltage VPRE is achieved by converting the clamping voltage of the second Zener diode Z2 into the VGS voltage of the first transistor MNH1. Furthermore, the aforementioned reference voltage VPRE can be around 4.8V.

[0043] Furthermore, in the voltage generation unit 111, the first resistor R2 and the second Zener diode Z2 can form a voltage divider branch. When the disturbance of the external voltage VDD supplied by the power supply is divided to the second Zener diode Z2, it will be reduced by the ratio Rz2 / (R2+Rz2), resulting in a reference voltage VPRE with smaller disturbance. Powering the internal circuit with the reference voltage VPRE can improve the overall circuit's PSRR (Power Supply Rejection Ratio). Here, Rz2 represents the equivalent resistance of the second Zener diode Z2.

[0044] In one embodiment, the first gain unit 112 includes a current source A, a second transistor MP1, a third transistor MP2, a fourth transistor MN1, and a fifth transistor MN2. The input terminal of the current source A is the current supply terminal of the first gain unit 112, used to connect to the current provided by the voltage generation unit 111; the output terminal of the current source A is connected to the source of the second transistor MP1 and the source of the third transistor MP2, respectively. The gate of the second transistor MP1 is used to connect to the reference voltage VREF, and its drain is connected to the drain of the fourth transistor MN1, the gate of the fourth transistor MN1, and the gate of the fifth transistor MN2, respectively. The gate of the third transistor MP2 is used to connect to the feedback voltage VFB, and its drain is connected to the drain of the fifth transistor MN2, the first terminal of the second gain unit 113, and the first terminal of the compensation unit 114, respectively. The sources of the fourth transistor MN1 and the fifth transistor MN2 are grounded.

[0045] Optionally, the second transistor MP1 and the third transistor MP2 are PMOS transistors, and the fourth transistor MN1 and the fifth transistor MN2 are NMOS transistors.

[0046] The first gain unit 112 described above can perform differential-to-single-ended processing on the reference voltage VREF and the feedback voltage VFB to achieve the first-stage gain processing and output the corresponding voltage signal; and all the devices used in the first gain unit 112 can be implemented with low-voltage devices, which are relatively small in size and thus can save circuit area.

[0047] In one embodiment, the compensation unit 114 includes a second resistor R1 and a first capacitor C1. The first terminal of the second resistor R1 is the first terminal of the compensation unit, and can be connected to the drain of the third transistor MP2 and the drain of the fifth transistor MN2, respectively; the second terminal of the second resistor R1 is grounded through the first capacitor. The compensation unit 114 can adjust the zero point of the voltage regulator under light and heavy loads, thereby compensating for pole changes and improving the stability of the entire feedback system.

[0048] In one embodiment, the second gain unit 113 includes a sixth transistor MN3, a seventh transistor MNH2, an eighth transistor MP3, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a third Zener diode Z3, and a rectifier diode D1. The gate of the sixth transistor MN3 is the first terminal of the second gain unit 113, its source is grounded, and its drain is connected to the source of the seventh transistor MNH2. The gate of the seventh transistor MNH2 can serve as the second terminal of the second gain unit 113, used to connect to the reference voltage VPRE. The drain of the seventh transistor MNH2 is connected to the drain of the eighth transistor MP3, the gate of the eighth transistor MP3, and the input terminal of the power transistor MP0. The source of the eighth transistor MP3 is connected to the set power supply through the third resistor R3. The first terminal of the fourth resistor R4 is connected to the set power supply, and the second terminal is connected to the input terminal of the power transistor MP0 through the rectifier diode D1. The input terminal of the third Zener diode Z1 is connected to the input terminal of the power transistor MP0, and its output terminal is connected to the set power supply through the fifth resistor R5.

[0049] Among them, the seventh transistor MNH2 can be a high-voltage NMOS transistor. The sixth transistor MN3 can be an NMOS transistor. The eighth transistor MP3 can be a PMOS transistor.

[0050] The aforementioned second gain unit 113, as the second common-source output gain stage, can provide higher gain and faster transient response.

[0051] In one embodiment, the feedback network 120 includes a sixth resistor RF1, a seventh resistor RF2, and a second capacitor CFF. The sixth resistor RF1 and the second capacitor CFF are connected in parallel between the regulated output terminal and the output terminal of the feedback network 120; for example, the first end of the sixth resistor RF1 is connected to the regulated output terminal, and the second end is connected to the output terminal of the feedback network 120; the first end of the second capacitor CFF is connected to the regulated output terminal, and the second end is connected to the output terminal of the feedback network 120. The first end of the seventh resistor RF2 is the output terminal of the feedback network 120, and the second end is grounded.

[0052] The aforementioned feedback network 120 is a negative feedback network. Specifically, based on the aforementioned feedback network 120, the expression for the output voltage VOUT can be derived as: VOUT=VREF*(1+RF1 / RF2); RF1 represents the resistance value of the sixth resistor RF1, and RF2 represents the resistance value of the sixth resistor RF2.

[0053] In one embodiment, the load module 130 is implemented using a ceramic capacitor. Because ceramic capacitors have advantages such as a wide operating stability range and low dielectric loss, the use of a ceramic capacitor in this embodiment enables the load module 130 to simulate preset application scenarios more stably.

[0054] In one embodiment, the load module 130 includes an eighth resistor Resr, a ninth resistor RL, and a third capacitor CL. The first terminal of the eighth resistor Resr is connected to the regulated output terminal, and the second terminal is connected to the first terminal of the third capacitor CL, with the second terminal of the third capacitor CL grounded. The ninth resistor RL is connected between the regulated output terminal and ground.

[0055] Specifically, when the ninth resistor RL is large, the load module 130 can simulate a light load scenario; when the ninth resistor RL is small, the load module 130 can simulate a heavy load scenario.

[0056] Specifically, the eighth resistor Resr and the third capacitor CL can form a ceramic capacitor model. The resistance of the eighth resistor Resr can be around 30m ohms, and the third capacitor CL can include a 4.7uF high-voltage X5R device.

[0057] In one example, to adopt Figure 2 Taking the voltage regulator of the error amplification module 110 shown as an example, the characteristics of light-load and heavy-load scenarios are analyzed in detail.

[0058] In light-load scenarios, the regulator output is driven in light-load mode, and the output resistance RL (i.e., the ninth resistor RL of the load module 130) is relatively large. The pole formed by the external capacitor and the output resistance RL is closer to the origin. The output of the first stage of the error amplification module 110 (i.e., the first gain unit 112) also has a low-frequency pole due to zero-point compensation. Both poles are very low, requiring a low zero Z0 to compensate for the phase margin. At this time, the second resistor R1 and the first capacitor C1 in the compensation unit 114 generate a low-frequency zero, as shown in the following expression:

[0059] ,

[0060] ,

[0061] ,

[0062] in, To represent an extreme point, Indicates another extreme point. Represents zero point. This represents the output resistance of the first gain unit 112. This indicates the resistance value of the ninth resistor, RL. This represents the capacitance of the third capacitor, CL. This indicates the resistance value of the second resistor R1. This indicates the capacitance of the first capacitor, C1.

[0063] When the voltage regulator operates under light load, the total current corresponding to the first gain unit 112 is I1 = 1uA, and the bias current corresponding to the second gain unit 113 is entirely determined by the second resistor R1 and the rectifier diode D1, which is set at 1uA. Therefore, the total quiescent current is controlled at 2uA. Adding the quiescent power consumption Istart = 0.5uA of the high-to-low voltage clamping circuit, the total current consumption is 2.5uA. It is evident that the above voltage regulator has the advantage of low quiescent power consumption.

[0064] In heavy-load scenarios, the regulator output is driven in heavy-load mode. The current I1 of the first stage (i.e., the first gain unit 112) remains constant at 1uA. The bias current of the second stage (i.e., the second gain unit 113) increases with the increase of the load current. This adjustment process can be called dynamic bias current technology. The main current of the regulator changes because the current branch of the regulator MP3 and the third resistor R3 increases significantly. At this time, the positions of all poles change. The output pole becomes a non-dominant pole due to the decrease in output resistance RL, while the first stage output becomes a dominant pole due to the zero-point compensation effect, and the zero position remains unchanged. In heavy-load mode, the significant increase in the source current I2 of the sixth transistor MN3 pushes the poles of the second stage output and the power transistor stage outside the bandwidth of the entire system, reducing their impact on the phase margin. At this time, the poles and zeros become:

[0065] ,

[0066] ,

[0067] ,

[0068] in, To represent an extreme point, Indicates another extreme point. Represents zero point. This represents the output resistance of the first gain unit 112. This indicates the resistance value of the ninth resistor, RL. This represents the capacitance of the third capacitor, CL. This indicates the resistance value of the second resistor R1. Let C1 represent the capacitance of the first capacitor. The above formula can ignore the effect of ESR (equivalent series resistance).

[0069] In the above voltage regulator, the error amplification module 110 can reduce the quiescent current, resulting in low power consumption under light load and no-load conditions. Under heavy load conditions, it can adjust the current according to the load increase corresponding to the load module 130 to quickly drive the power transistor MP0, improving the response efficiency when changing from light load or no-load to heavy load. This gives the voltage regulator the advantage of fast transient response, and the low current under light load and no-load conditions results in low quiescent power consumption for the overall circuit. Therefore, this voltage regulator can optimize performance indicators such as response efficiency and power consumption. In the voltage generation unit 111, the first resistor R2 and the second Zener diode Z2 can form a voltage divider branch. When the disturbance of the external voltage VDD provided by the power supply is divided to the second Zener diode Z2, it will be reduced by the ratio of Rz2 / (R2+Rz2), resulting in a reference voltage VPRE with smaller disturbance. Powering the internal circuit with the reference voltage VPRE can improve the PSRR of the overall circuit. In addition, the above-mentioned voltage regulator also uses voltage regulating devices such as the first voltage regulating diode Z1, the second voltage regulating diode Z2 and the third voltage regulating diode Z3, and high-voltage NMOS transistors such as the first transistor MNH1 and the seventh transistor MNH2, which have the advantage of high voltage resistance and can be used in high-voltage scenarios such as automotive applications.

[0070] In a second aspect, this application provides a chip including the voltage regulator described in any of the above embodiments, which can optimize performance indicators such as response efficiency and power consumption.

[0071] In a third aspect, this application provides an electronic device including the voltage regulator or the chip described in any of the above embodiments, which can optimize performance indicators such as response efficiency and power consumption.

[0072] Although this application has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art based on a reading and understanding of this specification and the accompanying drawings. This application includes all such modifications and variations and is limited only by the scope of the appended claims. In particular, with respect to the various functions performed by the aforementioned components, the terminology used to describe such components is intended to correspond to any component (unless otherwise indicated) that performs the specified function of said component (e.g., is functionally equivalent to it), even if structurally not equivalent to the disclosed structure performing the functions in the exemplary implementations of this specification shown herein.

[0073] That is, the above description is only an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, such as the combination of technical features between different embodiments, or direct or indirect application in other related technical fields, are similarly included within the patent protection scope of this application.

[0074] Furthermore, for structural elements with the same or similar characteristics, this application may use the same or different reference numerals for identification. In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0075] In this application, the term "exemplary" is used to mean "serving as an example, illustration, or description." Any embodiment described as "exemplary" in this application is not necessarily to be construed as more preferred or advantageous than other embodiments. This application has been provided above to enable any person skilled in the art to implement and use it. Various details have been set forth in the above description for purposes of explanation. It should be understood that those skilled in the art will recognize that this application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be described in detail to avoid obscuring the description of this application with unnecessary detail. Therefore, this application is not intended to be limited to the embodiments shown, but is consistent with the broadest scope of the principles and features disclosed herein.

Claims

1. A voltage regulator, characterized in that, The voltage regulator includes an error amplification module, a power transistor, a feedback network, and a load module; The first input terminal of the error amplification module is used to connect to the reference voltage, the second input terminal is connected to the output terminal of the feedback network, the output terminal is connected to the gate of the power transistor, the source of the power transistor is connected to the set power supply, and the drain is connected to the first terminal of the feedback network and the first terminal of the load module respectively. The drain of the power transistor serves as the regulated output terminal for regulated output. The feedback network is used to sample the output voltage of the regulated output terminal, adjust the sampled voltage, and output a feedback voltage to the second input terminal of the error amplification module. The error amplification module is used to reduce the static current and adjust the current to drive the power transistor in the event of a heavy load as the load corresponding to the load module increases. The load module is used to simulate a preset application scenario; The error amplification module includes a voltage generation unit, a first gain unit, a second gain unit, and a compensation unit; the voltage generation unit is used to convert the external voltage provided by the set power supply from the high voltage domain into a reference voltage located in the low voltage domain; the first gain unit is used to perform a first-stage gain processing on the reference voltage and the feedback voltage output by the feedback network; The second gain unit is used to perform a second-stage gain processing on the voltage signal after the first-stage gain processing; The compensation unit is used to adjust the zero point of the error amplification module under light and heavy loads, thereby compensating for changes in the poles.

2. The voltage regulator according to claim 1, characterized in that, The voltage generating unit includes a first Zener diode, a second Zener diode, a first resistor, and a first transistor; The input terminal of the first Zener diode is grounded, and its output terminal is connected to the source of the first transistor and the current supply terminal of the first gain unit, respectively. The input terminal of the second Zener diode is grounded, and its output terminal is connected to the first terminal of the first resistor and the gate of the first transistor, respectively. The second terminal of the first resistor and the drain of the first transistor are connected to the set power supply, respectively. The source of the first transistor is also used to output the reference voltage.

3. The voltage regulator according to claim 1, characterized in that, The first gain unit includes a current source, a second transistor, a third transistor, a fourth transistor, and a fifth transistor; The input terminal of the current source is the current supply terminal of the first gain unit, and the output terminal is connected to the source of the second transistor and the source of the third transistor respectively. The gate of the second transistor is used to connect to the reference voltage, and the drain is connected to the drain of the fourth transistor, the gate of the fourth transistor and the gate of the fifth transistor respectively. The gate of the third transistor is used to connect to the feedback voltage, and the drain is connected to the drain of the fifth transistor, the first terminal of the second gain unit and the first terminal of the compensation unit respectively. The source of the fourth transistor and the source of the fifth transistor are grounded respectively.

4. The voltage regulator according to claim 1, characterized in that, The compensation unit includes a second resistor and a first capacitor; the first end of the second resistor is the first end of the compensation unit, and the second end is grounded through the first capacitor.

5. The voltage regulator according to claim 1, characterized in that, The second gain unit includes a sixth transistor, a seventh transistor, an eighth transistor, a third resistor, a fourth resistor, a fifth resistor, a third Zener diode, and a rectifier diode; The gate of the sixth transistor is the first terminal of the second gain unit, the source is grounded, and the drain is connected to the source of the seventh transistor. The gate of the seventh transistor is used to connect to the reference voltage. The drain is connected to the drain of the eighth transistor, the gate of the eighth transistor, and the input terminal of the power transistor. The source of the eighth transistor is connected to the set power supply through the third resistor. The first terminal of the fourth resistor is connected to the set power supply, and the second terminal is connected to the input terminal of the power transistor through the rectifier diode. The input terminal of the third Zener diode is connected to the input terminal of the power transistor, and the output terminal is connected to the set power supply through the fifth resistor.

6. The voltage regulator according to claim 1, characterized in that, The feedback network includes a sixth resistor, a seventh resistor, and a second capacitor; The sixth resistor and the second capacitor are connected in parallel between the regulated output terminal and the output terminal of the feedback network. The first terminal of the seventh resistor is the output terminal of the feedback network, and the second terminal is grounded.

7. The voltage regulator according to claim 1, characterized in that, The load module is implemented using ceramic capacitors.

8. The voltage regulator according to claim 1, characterized in that, The load module includes an eighth resistor, a ninth resistor, and a third capacitor; the first end of the eighth resistor is connected to the regulated output terminal, the second end is connected to the first end of the third capacitor, the second end of the third capacitor is grounded, and the ninth resistor is connected between the regulated output terminal and the ground terminal.

9. A chip, characterized in that, Includes the voltage regulator as described in any one of claims 1 to 8.

10. An electronic device, characterized in that, It includes the voltage regulator as described in any one of claims 1 to 8 or the chip as described in claim 9.

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