Telecommunication signal integrity evaluation test fixture based on openvpx architecture

Abstract

The application discloses a kind of based on OpenVPX architecture's electric signal integrity evaluation test fixture, including plug lead assembly, socket lead assembly, backplane expansion component, cable adapter component and low-loss interconnection wire.The plug lead assembly, socket lead assembly, backplane expansion component, cable adapter component in the application can be adopted building block type flexible combination, communication link between modules, communication link between module and port and communication link between products and products can be estimated and measured using this combination mode, product design risk can be effectively estimated, product iteration target is clear, product design quality is improved, design implementation efficiency is effectively improved in engineering implementation process, avoid additional iteration times, realize cost reduction and efficiency increase.

Description

Technical Field

[0001] This invention belongs to the field of avionics equipment and relates to an electrical signal integrity evaluation test fixture based on the OpenVPX architecture. Background Technology

[0002] Avionics equipment is characterized by high reliability requirements, long service life, and high cost of solution iteration. Accurately grasping the design parameters of each key design stage and conducting simulation evaluations during the solution evaluation phase are effective ways to improve design implementation efficiency, avoid additional iterations, and achieve cost reduction and efficiency improvement goals. With the advent of Gbps data rates for electrical signals, signal integrity issues in serial interconnections between products and bus interconnections within products have become acute. As signal data rates continue to increase, signal analysis and evaluation become more complex. Transmission distance and the number of transfers are major influencing factors. However, due to the diverse forms of aviation equipment, transmission distance and the number of transfers cannot be directly applied to the evaluation of newly developed equipment by analogy, resulting in a lack of effective means to simulate signal transmission effects during the solution evaluation phase. High-speed interconnect bus systems based on the OpenVPX standard are widely used in contemporary aviation product design. The OpenVPX standard, with its high interconnect bandwidth, high transmission reliability, high design consistency, high market adaptability, and high scalability compatibility, has been established as one of the next-generation universal solutions for distributed systems in the field of avionics equipment. In recent years, the OpenVPX standard has become a major implementation solution in the research and development of avionics equipment. With the continuous increase in internal bus signal data rates, this standard will be used as the primary implementation solution in more products. Based on the above design challenges and development trends, this invention proposes an electrical signal integrity evaluation and testing fixture based on the OpenVPX architecture. It decomposes the serial transmission channel into independent and flexible design element component units. Through low-loss and high-reliability interconnection methods, these units are combined into channel configurations that meet different conditions and project design requirements, achieving the following functions:

[0003] 1. The signal transmission channel can be formed by freely combining component units to create the desired shape, flexibly simulating the design scheme.

[0004] 2. Within the 20Gbps data rate range, front-end simulation design is carried out by extracting the S-parameters of the transmission channel, and the design scheme is quantitatively evaluated based on the simulation results.

[0005] 3. By injecting actual signals into the transmission channel, the signal quality after transmission is measured and evaluated using measuring instruments.

[0006] This invention addresses the lack of quantitative analysis capabilities for high-speed serial interconnect channels in the early design phase, enabling effective prediction of product design risks, clarification of product iteration goals, and improvement of product design quality. It also significantly enhances design implementation efficiency during the engineering process, avoiding additional iterations and achieving cost reduction and efficiency improvement. This invention has undeniable value and promising application prospects for further improving the reliability and service life of aerospace equipment. Summary of the Invention

[0007] The purpose of this invention is to provide an electrical signal integrity assessment and testing fixture based on the OpenVPX architecture. The serial channel is functionally divided into adjustable components, which are then flexibly combined using low-loss interconnect wires to construct a channel configuration simulating a project design. Within a data rate range of 20Gbps, the fixture performs front-end simulation and actual signal quality measurement of the channel. This addresses the problem of lacking quantitative analysis capabilities for high-speed serial interconnect channels in the early design phase, enabling effective prediction of product design risks, clarification of product iteration goals, and improvement of product design quality. Furthermore, it effectively enhances design implementation efficiency during the engineering process, avoids additional iterations, and achieves cost reduction and efficiency improvement.

[0008] The objective of this invention is achieved through the following technical solution:

[0009] An electrical signal integrity evaluation test fixture based on the OpenVPX architecture includes a plug lead assembly, a socket lead assembly, a backplane extension assembly, and low-loss interconnect wires;

[0010] The plug lead assembly and socket lead assembly each lead out several analog channels to build differential signal pairs according to the VITA46 standard. The analog channel differential signal pairs are built using tightly coupled traces, and the ends of the traces are terminated with SMA RF connectors. The trace lengths of each pair of analog channel differential signal pairs increase in a stepwise manner and are distributed in different trace layers. The plug lead assembly and socket lead assembly are tightly connected with fully differential VPX connectors according to the test requirements to realize the conduction of the analog channel differential signal pair transmission channels on the signal plug lead assembly and socket lead assembly, simulating the trace lengths and different residual stake lengths of different functional components or functional components under test.

[0011] The backplane expansion assembly leads out several backplane length analog differential signal pairs. The backplane length analog differential signal pairs adopt tight-coupled traces and are terminated at the end with SMA RF connectors. The differential trace lengths of each backplane length analog differential signal pair increase in a stepwise manner. The backplane length analog differential signal pairs are cascaded through low-loss interconnect wires to simulate different backplane trace lengths.

[0012] Preferably, the analog channel setup differential signal's impedance to the trace is controlled to not exceed 5% of the target impedance, and the backplane length analog differential signal's impedance to the trace is controlled to not exceed 5% of the target impedance.

[0013] Preferably, the method for building the simulation model of the high-speed serial interconnect channel between the first functional component and the second functional component is as follows:

[0014] Step 11: Construct a first functional component model simulating the first functional component using a plug lead assembly and a socket lead assembly: Insert the plug lead assembly into the socket lead assembly to establish a differential signal pair connection between the plug lead assembly and the analog channel on the plug lead assembly and the socket lead assembly. Based on the expected layout position of the high-speed serial signal generator of the first functional component, select the analog channel closest to the trace length of the first printed circuit board within the first functional component to establish a differential signal pair. At this point, the first functional component model is completed.

[0015] Step 12: Use the same method as in Step 11 to build a model of the second functional component that simulates the second functional component;

[0016] Step 13: The analog channel selected in the first functional component model is used to build a differential signal pair on the SMA RF connector port of the plug lead assembly as the signal input port. The differential signal pair built on the analog channel is led out through the SMA RF connector port on the socket lead assembly via a low-loss interconnect wire.

[0017] Step 14: Select backplane length analog differential signal pairs on the backplane expansion assembly according to the trace length of the backplane printed circuit board and cascade them. Connect the low-loss interconnect wires led out from the first functional component model to one port of the cascaded backplane length analog differential signal pairs, and lead them out through the low-loss interconnect wires at the other port of the cascaded backplane length analog differential signal pairs.

[0018] Step 15: Connect the low-loss interconnect wires led out from the backplane expansion assembly to the selected analog channel in the second functional component model to build a differential signal pair on the SMA RF connector port of the socket lead assembly, and use the SMA RF connector port of the plug lead assembly as the signal output terminal.

[0019] Preferably, on the established high-speed serial interconnection channel simulation model between the first and second functional components, an impedance analyzer is used to measure the impedance of the simulated link from the signal input port and the signal output port, respectively, and a vector network analyzer is used to measure the simulated S-parameters of the simulated link through the signal input port and the signal output port.

[0020] Preferably, on the high-speed serial interconnection channel simulation model between the first and second functional components, a test signal is injected into the input port of the first functional component model through a signal generator, and the test instrument measures the channel bit error rate at the output port of the second functional component model; a functional component is added to the channel, and the overall bit error rate of the receiver is measured.

[0021] Preferably, several connector physical characteristic test differential signal pairs are also led out from the plug lead assembly and the socket lead assembly. The connector physical characteristic test differential signal pairs adopt tightly coupled traces, and the ends of the traces are terminated with SMA RF connectors.

[0022] The plug lead assembly also features a calibration circuit for testing differential signal pairs to match the physical characteristics of the connector. This calibration circuit is used to connect to the vector network analyzer cable and eliminates measurement errors through testing and calibration.

[0023] Preferably, the differential signal of the connector physical characteristic test controls the trace impedance to no more than 5% of the target impedance, and the residual stump of the trace path via does not exceed 10% of the via depth.

[0024] Preferably, the procedure for testing the physical characteristics of VPX connectors is as follows: First, connect the plug lead assembly and the socket lead assembly tightly using a VPX standard connector; then connect the calibration circuit on the plug lead assembly to the vector network analyzer cable to eliminate measurement errors through test calibration; finally, connect the calibrated vector network analyzer to any set of connector physical characteristic test differential signal pairs to measure the connector simulation S-parameters.

[0025] Preferably, the electrical signal integrity evaluation test fixture based on the OpenVPX architecture also includes a cable adapter assembly, which is made by soldering a single-core shielded wire to the tail end of an SMA RF connector.

[0026] The method for building a simulation model of a high-speed serial interconnection channel between the first functional component and the second functional component is as follows:

[0027] Step 21: Select a set of plug lead assembly, socket lead assembly, and backplane expansion assembly to build the first functional component model: Insert the plug lead assembly into the socket lead assembly to establish a differential signal pair connection between the plug lead assembly and the analog channel on the plug lead assembly. Based on the expected layout position of the high-speed serial signal generator of the first functional component, select the analog channel closest to the trace length of the first printed circuit board on the first functional component to build a differential signal pair. Then, use the SMA RF connector port of the plug lead assembly as the signal input port for the differential signal pair built on the analog channel. Lead out the SMA RF connector port on the socket lead assembly through low-loss interconnect wires and connect it to the backplane expansion assembly. According to the backplane routing plan of the first functional component, select the backplane length on the backplane expansion assembly through cascading to construct the corresponding length of the differential signal routing pattern, and lead out the terminal through low-loss interconnect wires. At this point, the model of the first functional component with simulated internal structure of the first functional component is completed.

[0028] Step 22: Using the same method as in Step 21, build a model of the second functional component to simulate the internal structure of the second functional component;

[0029] Step 23: Fabricate a cable that meets the transmission distance requirements between functional components, and connect both ends of the cable to the cable adapter assembly to form a cable transmission model;

[0030] Step 24: Connect the first functional component model, the cable transmission model, and the second functional component model in sequence to form a high-speed serial interconnection channel model between the first functional component and the second functional component.

[0031] Preferably, on the high-speed serial interconnection channel model between the first and second functional components, an impedance analyzer is used to measure the impedance of the simulated link from the signal input port and the signal output port, respectively, and the results are submitted to the project team for analysis and adjustment; a vector network analyzer is used to measure the simulation S-parameters of the simulated link through the signal input port and the signal output port.

[0032] The beneficial effects of this invention are as follows:

[0033] The plug lead assembly, socket lead assembly, backplane expansion assembly, and cable adapter assembly in this invention can be flexibly combined in a modular fashion. This combination method enables predictable and measurable communication links between modules, between modules and ports, and between products. It effectively predicts product design risks, clarifies product iteration goals, and improves product design quality. In the engineering implementation process, it effectively enhances design efficiency, avoids additional iterations, and achieves cost reduction and efficiency improvement. This has significant value and application prospects for further improving the reliability and service life of my country's aviation equipment. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 This is a schematic diagram of the structure of the present invention;

[0036] Figure 2 This is a schematic diagram of the physical characteristic test connection of the VPX connector of the present invention;

[0037] Figure 3 This is a schematic diagram of the simulation model and working margin test model of the high-speed serial interconnection channel between functional components of the present invention.

[0038] Figure 4This is a schematic diagram of the simulation model of the high-speed serial interconnection channel between functional components of the present invention;

[0039] Figure 5 This is a schematic diagram of the high-speed serial signal bit error rate test model for the functional components of this invention.

[0040] Among them, 1-plug lead wire assembly, 2-socket lead wire assembly, 3-backplane expansion assembly, 4-cable adapter assembly, 5-low loss interconnect wire, and 6-cable module. Detailed Implementation

[0041] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments.

[0042] See Figure 1 As illustrated, this embodiment presents an electrical signal integrity evaluation and testing fixture based on the OpenVPX architecture. It includes two plug lead-in assemblies 1, two socket lead-in assemblies 2, a backplane expansion assembly 3, eight cable adapter assemblies 4, and several low-loss interconnecting wires 5. The plug lead-in assemblies 1, socket lead-in assemblies 2, backplane expansion assembly 3, and cable adapter assemblies 4 are all self-developed designs and can be freely connected via the low-loss interconnecting wires 5 to form a complete electrical signal integrity evaluation and testing fixture. In this embodiment, the electronic device under test includes functional components and functional parts. Functional components refer to circuit systems that independently possess a single data operation or processing function, such as memory modules, discrete graphics cards, motherboards, etc.; functional parts refer to circuit systems composed of multiple different or identical functional components that complete complex tasks, such as PCs, etc.

[0043] The plug lead assembly 1 and socket lead assembly 2 each extend a total of 12 pairs of differential signals according to the VITA46 standard. Four pairs are used for connector physical characteristic testing differential signals, and eight pairs are used for analog channel setup differential signals. The connector physical characteristic testing differential signal pairs can also be used for signal analog channel setup. The connector physical characteristic testing differential signal pairs on plug lead assembly 1 and socket lead assembly 2 use tightly coupled traces, with the trace ends terminated with SMA RF connectors. The trace impedance is controlled to not exceed 5% of the target impedance, and the residual via pins in the trace path do not exceed 10% of the via depth. The analog channel differential signal pairs are constructed using tightly coupled traces, with SMA RF connectors at the ends of the traces. The trace impedance is controlled to not exceed 5% of the target impedance. The trace lengths of the eight analog channel differential signal pairs increase in a stepped manner and are distributed across different trace layers. The plug lead assembly 1 and the socket lead assembly 2 are tightly connected using fully differential VPX connectors according to test requirements to achieve the physical characteristics of the connectors on the plug lead assembly 1 and the socket lead assembly 2. The differential signal pairs and the analog channel differential signal pairs are tested for transmission channel conduction, simulating the trace lengths and residual stake lengths of different test components or functional components.

[0044] The plug lead assembly 1 also features an AFR (Automatic Fixture Removal) calibration circuit for testing the physical characteristics of the connector differential signal pairs and a TRL (transmission, reflection, line) calibration circuit. The calibration circuit is used to connect to the vector network analyzer cable and eliminate measurement errors through test calibration.

[0045] The backplane expansion assembly 3 uses SMA RF connectors to bring out a total of 8 pairs of simulated differential signal pairs for backplane length. These simulated differential signal pairs use tightly coupled traces, terminated at the ends with SMA RF connectors. The trace impedance is controlled to not exceed 5% of the target impedance. The differential trace lengths of the 8 pairs of simulated differential signal pairs increase in a stepped manner to simulate different backplane trace lengths. By cascading the simulated differential signal pairs using low-loss interconnect wires 5, the length distribution range can cover the adjacent module trace lengths defined by the VITA46 standard up to the furthest distance trace length on the 16-module backplane. Depending on testing needs, the simulated differential signal pairs on the backplane expansion assembly 3 can also be connected to the differential signal pairs on the plug lead assembly 1 and the socket lead assembly 2 via low-loss interconnect wires 5.

[0046] The cable adapter assembly 4 is made by soldering a single-core shielded wire to the tail of an SMA RF connector. The impedance of the cable adapter assembly is controlled to not exceed 10% of the target impedance. It is connected to the plug lead assembly 1, the socket lead assembly 2, or the backplane expansion assembly 3 through low-loss interconnecting wires 5 to simulate the cascading required for testing.

[0047] The engineering design specifications, such as the selection of printed circuit board materials, differential signal pair routing control, and via residual stake control, must be consistent with the characteristics of products from relevant industries and units to achieve the purpose of simulating engineering practice solutions. In this embodiment, the dielectric constant of the printed circuit board material used for the plug lead assembly, socket lead assembly, backplane expansion assembly, and cable adapter assembly is no greater than 3.2. Components such as SMA RF connectors and low-loss interconnect conductors 5 must be selected as standard devices with low loss, high impedance consistency, and wide frequency range to ensure negligible impact in the simulated assembly. The contact impedance jump between the SMA RF connector and the printed circuit board does not exceed 5% of the target impedance. The termination impedance of the low-loss interconnect conductor 5 is controlled to not exceed 3% of the target impedance, and the insertion loss within the 20GHz frequency range does not exceed -0.5dB.

[0048] By flexibly combining the various components in this invention, channel simulation parameter testing, channel operating margin testing, and bit error rate testing can be completed between functional components or functional parts under test. The electrical signal integrity evaluation test fixture based on the OpenVPX architecture provided by this invention can provide the following testing methods:

[0049] VPX connector physical characteristic testing procedure: Please refer to Figure 2 The diagram shown illustrates the connection for testing the physical characteristics of the VPX connector according to the present invention. First, the plug lead assembly and the socket lead assembly are tightly connected using a standard VPX connector. Then, the calibration circuit on the plug lead assembly is connected to the vector network analyzer cable, and measurement errors are eliminated through testing and calibration. The calibrated vector network analyzer is then connected to any set of differential signal pairs for connector physical characteristic testing to measure the connector's simulated S-parameters. The S-parameters describe the frequency domain characteristics of the transmission channel. The loss of the transmission channel at each frequency can be directly determined through the S-parameter curves. Simulation signals are injected into the S-parameter model using simulation tools to excite the signal, and the signal changes after passing through the transmission channel are observed.

[0050] Simulation Test Method for High-Speed ​​Serial Interconnect Channel between First and Second Functional Components: In practical operation, the high-speed serial signal is emitted by the signal transmitter on the first functional component (the transmitting end). It connects to the VPX standard connector plug of the first functional component via copper wires on the first section of the printed circuit board. The standard connector plug of the first functional component is then interlocked with the VPX standard connector socket in the first slot of the backplane, thus guiding the signal to the backplane. The signal then connects to the VPX standard connector socket in the second slot of the backplane via copper wires on the second section of the printed circuit board. The VPX standard connector plug of the second functional component is then interlocked with the VPX standard connector socket in the second slot, thus guiding the signal to the second functional component. Finally, the signal is connected to the final signal receiver via copper wires on the third section of the printed circuit board of the second functional component, completing the entire signal transmission process. The physical process that the high-speed serial signal undergoes from the signal transmitter to the signal receiver is called the high-speed serial interconnect channel between functional components. (See also...) Figure 3 The diagram shown illustrates the construction of a simulation model for a high-speed serial interconnection channel between functional components. Based on the above description, the method for constructing this simulation model is as follows:

[0051] Step 11: Construct a first functional component model simulating the first functional component using a plug lead assembly 1 and a socket lead assembly 2. Insert the plug lead assembly 1 into the socket lead assembly 2 to establish a differential signal pair connection between the plug lead assembly 1 and the analog channel inserted into the socket lead assembly 2. Based on the expected layout position of the high-speed serial signal generator of the first functional component, select the analog channel closest to the trace length of the copper conductor of the first printed circuit board in the first functional component to establish a differential signal pair. At this point, the construction of the first functional component model is completed.

[0052] Step 12: Use the same method as in Step 11 to build a model of the second functional component that simulates the second functional component;

[0053] Step 13: The analog channel selected in the first functional component model is used to build a differential signal pair on the SMA RF connector port of the plug lead assembly 1 as the signal input port. The differential signal pair built on the analog channel is led out through the SMA RF connector port on the socket lead assembly 2 via a low-loss interconnect wire.

[0054] Step 14: Based on the trace length of the copper conductor of the second printed circuit board on the backplane, select backplane length analog differential signal pairs on the backplane expansion assembly for cascading. Connect the low-loss interconnect wires led out from the first functional component model to one port of the cascaded backplane length analog differential signal pairs, and lead them out through the low-loss interconnect wires at the other port of the cascaded backplane length analog differential signal pairs.

[0055] Step 15: Connect the low-loss interconnect wires led out from the backplane expansion assembly to the selected analog channel in the second functional component model to build a differential signal pair on the SMA RF connector port of the socket lead assembly 2, and use the SMA RF connector port of the plug lead assembly 1 as the signal output terminal.

[0056] Step 16: Use an impedance analyzer to measure the impedance of the simulated link from the signal input port and signal output port respectively, and submit the results to the project team for analysis and adjustment; use a vector network analyzer to measure the simulation S-parameters of the simulated link through the signal input port and signal output port, simulate the target signal using simulation tools, and submit the results to the project team for analysis and adjustment; iterate the simulation model parameters by analyzing and adjusting the results, and repeatedly measure and simulate until the optimal effect is achieved.

[0057] Simulation Test Method for High-Speed ​​Serial Interconnection Channel between First and Second Functional Components: In practical applications, the main form of high-speed serial interconnection between functional components is as follows: The first functional component generates a high-speed serial signal, which travels through the traces on the first printed circuit board to the connector plug of the first functional component. The connector plug of the first functional component mates with the connector socket in the first slot of the backplane, thus guiding the signal to the backplane. The signal then travels through the traces on the second printed circuit board to the connection port of the backplane. An aviation connector is then connected through the connection port of the backplane, and the aviation connector cable connects to the second functional component. The internal structure of the second functional component is identical to that of the first functional component. (See also...) Figure 4 The diagram shows the simulation model of a high-speed serial interconnection channel between functional components. Based on the above signal flow process, the method for building the simulation model of a high-speed serial interconnection channel between functional components is as follows:

[0058] Step 21: Select a set of plug lead assembly 1, socket lead assembly 2, and backplane expansion assembly to build a model of the first functional component. Insert the plug lead assembly 1 into the socket lead assembly 2 to establish a differential signal pair connection between the analog channel on the plug lead assembly 1 and the inserted socket lead assembly 2. Based on the expected layout position of the high-speed serial signal generator of the first functional component, select the analog channel closest to the trace length of the first printed circuit board on the first functional component to build a differential signal pair. Then, build a differential signal pair on the SMA RF connector port of the plug lead assembly 1 as a signal input port. Lead out the differential signal pair on the SMA RF connector port of the socket lead assembly 2 through low-loss interconnect wires and connect it to the backplane expansion assembly. According to the backplane routing plan of the first functional component, select the backplane length on the backplane expansion assembly in a cascade manner to construct a routing method of corresponding length for the simulated differential signal, and lead out the terminal through low-loss interconnect wires. At this point, the model of the first functional component with simulated internal structure of the first functional component is completed.

[0059] Step 22: Using the same method as in Step 21, build a model of the second functional component to simulate the internal structure of the second functional component;

[0060] Step 23: According to the system design scheme, fabricate cables that meet the transmission distance requirements between components, and connect both ends of the cables to the cable adapter assembly to form a cable transmission model;

[0061] Step 24: Connect the first functional component model, the cable transmission model, and the second functional component model in sequence to form a high-speed serial interconnection channel model between the first functional component and the second functional component;

[0062] Step 25: Use an impedance analyzer to measure the impedance of the simulated link from the signal input port and signal output port respectively, and submit the results to the project team for analysis and adjustment; use a vector network analyzer to measure the simulation S-parameters of the simulated link through the signal input port and signal output port, simulate the target signal using simulation tools, and submit the results to the project team for analysis and adjustment; iterate the simulation model parameters by analyzing and adjusting the results, and repeatedly measure and simulate until the optimal effect is achieved.

[0063] Operating margin test method for high-speed serial signal channel of functional components: The main test content of high-speed serial channel operating margin test is to test the signal quality of the signal generated by the signal generator after transmission through the channel to the receiving end, and thereby determine the receiving end's ability to resolve the signal. According to the design scheme, following the simulation model construction method of high-speed serial interconnection channel between functional components described above, a high-speed serial channel operating margin test model is built. Through a signal generator, the test signal is injected through the input port of the first functional model, and the test instrument is used to measure it at the output port of the second functional model. The signal margin is analyzed by comparing it with the reference standard. The model construction parameters are iterated through analysis results, and repeated measurements are performed until the optimal effect is achieved.

[0064] High-speed serial signal bit error rate test method for functional components: The high-speed serial signal bit error rate test evaluates the overall performance of the high-speed signal receiving section, including the signal transmission process and the performance of the signal receiver. Please refer to [link / reference]. Figure 5 The diagram shown illustrates the setup of a high-speed serial signal bit error rate (BER) test model for the functional components of this invention. According to the design scheme, following the simulation model setup method for the high-speed serial interconnection channel between functional components described above, a high-speed serial channel operating margin test model is built. A test signal is injected into the input port of the first functional component model using a signal generator, and the test instrument measures the channel BER at the output port of the second functional component model. A functional component is then added to the channel, and the overall BER of the receiver is measured. The model setup parameters are iterated through analysis of the results, and measurements are repeated until the optimal effect is achieved.

[0065] It is understood that those skilled in the art can make equivalent substitutions or modifications to the technical solution and inventive concept of the present invention, and all such substitutions or modifications should fall within the protection scope of the appended claims.

Claims

1. An electrical signal integrity evaluation test fixture based on OpenVPX architecture, comprising a plug pin assembly, a socket pin assembly, a backplane expansion assembly, and low-loss interconnect wires, characterized in that The plug lead assembly and socket lead assembly each lead out several analog channels to build differential signal pairs according to the VITA46 standard. The analog channel differential signal pairs are built using tightly coupled traces, and the ends of the traces are terminated with SMA RF connectors. The trace lengths of each pair of analog channel differential signal pairs increase in a stepwise manner and are distributed in different trace layers. The plug lead assembly and socket lead assembly are tightly connected with fully differential VPX connectors according to the test requirements to realize the conduction of the analog channel differential signal pair transmission channels on the signal plug lead assembly and socket lead assembly, simulating the trace lengths and different residual stake lengths of different functional components or functional components under test. The backplane expansion assembly leads out several backplane length analog differential signal pairs. The backplane length analog differential signal pairs adopt tight-coupled traces and are terminated at the end with SMA RF connectors. The differential trace lengths of each backplane length analog differential signal pair increase in a stepwise manner. The backplane length analog differential signal pairs are cascaded through low-loss interconnect wires to simulate different backplane trace lengths.

2. The electrical signal integrity evaluation test fixture based on OpenVPX architecture according to claim 1, characterized in that The analog channel setup uses differential signals to control the trace impedance to no more than 5% of the target impedance, and the backplane length uses analog differential signals to control the trace impedance to no more than 5% of the target impedance.

3. The electrical signal integrity evaluation test fixture based on OpenVPX architecture according to claim 1, characterized in that The method for building a simulation model of a high-speed serial interconnection channel between the first functional component and the second functional component is as follows: Step 11: Construct a first functional component model simulating the first functional component using a plug lead assembly and a socket lead assembly: Insert the plug lead assembly into the socket lead assembly to establish a differential signal pair connection between the plug lead assembly and the analog channel on the plug lead assembly and the socket lead assembly. Based on the expected layout position of the high-speed serial signal generator of the first functional component, select the analog channel closest to the trace length of the first printed circuit board within the first functional component to establish a differential signal pair. At this point, the first functional component model is completed. Step 12: Use the same method as in Step 11 to build a model of the second functional component that simulates the second functional component; Step 13: The analog channel selected in the first functional component model is used to build a differential signal pair on the SMA RF connector port of the plug lead assembly as the signal input port. The differential signal pair built on the analog channel is led out through the SMA RF connector port on the socket lead assembly via a low-loss interconnect wire. Step 14: Select backplane length analog differential signal pairs on the backplane expansion assembly according to the trace length of the backplane printed circuit board and cascade them. Connect the low-loss interconnect wires led out from the first functional component model to one port of the cascaded backplane length analog differential signal pairs, and lead them out through the low-loss interconnect wires at the other port of the cascaded backplane length analog differential signal pairs. Step 15: Connect the low-loss interconnect wires led out from the backplane expansion assembly to the selected analog channel in the second functional component model to build a differential signal pair on the SMA RF connector port of the socket lead assembly, and use the SMA RF connector port of the plug lead assembly as the signal output terminal.

4. The electrical signal integrity evaluation test fixture based on the OpenVPX architecture according to claim 3, characterized in that... On the high-speed serial interconnection channel simulation model between the first and second functional components, an impedance analyzer was used to measure the impedance of the simulated link from the signal input port and the signal output port, respectively. A vector network analyzer was used to measure the simulated S-parameters of the simulated link through the signal input port and the signal output port.

5. The electrical signal integrity evaluation test fixture based on the OpenVPX architecture according to claim 3, characterized in that... On the high-speed serial interconnection channel simulation model between the first and second functional components, a test signal is injected into the input port of the first functional component model through a signal generator, and the test instrument measures the channel bit error rate at the output port of the second functional component model. A functional component is added to the channel, and the overall bit error rate of the receiver is measured.

6. The electrical signal integrity evaluation test fixture based on OpenVPX architecture of claim 1, wherein Several connector physical characteristic test differential signal pairs are also led out from the plug lead assembly and the socket lead assembly. The connector physical characteristic test differential signal pairs adopt tight-coupled traces, and the ends of the traces are terminated with SMA RF connectors. The plug lead assembly also features a calibration circuit for testing differential signal pairs to match the physical characteristics of the connector. This calibration circuit is used to connect to the vector network analyzer cable and eliminates measurement errors through testing and calibration.

7. The electrical signal integrity evaluation test fixture based on OpenVPX architecture according to claim 6, characterized in that For connector physical characteristic testing, the differential signal impedance of the trace should not exceed 5% of the target impedance, and the residual stubs in the trace path vias should not exceed 10% of the via depth.

8. The electrical signal integrity evaluation test fixture based on OpenVPX architecture according to claim 6, characterized in that The procedure for testing the physical characteristics of VPX connectors is as follows: First, connect the plug lead assembly and the socket lead assembly tightly using a VPX standard connector; then connect the calibration circuit on the plug lead assembly to the vector network analyzer cable to eliminate measurement errors through calibration testing; finally, connect the calibrated vector network analyzer to any set of differential signal pairs for connector physical characteristic testing to measure the connector's simulated S-parameters.

9. The electrical signal integrity evaluation test fixture based on OpenVPX architecture of claim 1, wherein It also includes a cable adapter assembly, which is made by soldering a single-core shielded wire to the tail of an SMA RF connector; The method for building a simulation model of a high-speed serial interconnection channel between the first functional component and the second functional component is as follows: Step 21: Select a set of plug lead assembly, socket lead assembly, and backplane expansion assembly to build the first functional component model: Insert the plug lead assembly into the socket lead assembly to establish a differential signal pair connection between the plug lead assembly and the analog channel on the plug lead assembly. Based on the expected layout position of the high-speed serial signal generator of the first functional component, select the analog channel closest to the trace length of the first printed circuit board on the first functional component to build a differential signal pair. Then, use the SMA RF connector port of the plug lead assembly as the signal input port for the differential signal pair built on the analog channel. Lead out the SMA RF connector port on the socket lead assembly through low-loss interconnect wires and connect it to the backplane expansion assembly. According to the backplane routing plan of the first functional component, select the backplane length on the backplane expansion assembly through cascading to construct the corresponding length of the differential signal routing pattern, and lead out the terminal through low-loss interconnect wires. At this point, the model of the first functional component with simulated internal structure of the first functional component is completed. Step 22: Using the same method as in Step 21, build a model of the second functional component to simulate the internal structure of the second functional component; Step 23: Fabricate a cable that meets the transmission distance requirements between functional components, and connect both ends of the cable to the cable adapter assembly to form a cable transmission model; Step 24: Connect the first functional component model, the cable transmission model, and the second functional component model in sequence to form a high-speed serial interconnection channel model between the first functional component and the second functional component.

10. The electrical signal integrity evaluation test fixture based on OpenVPX architecture according to claim 9, characterized in that On the high-speed serial interconnection channel model between the first and second functional components, an impedance analyzer was used to measure the impedance of the simulated link from the signal input port and the signal output port, respectively, and the results were submitted to the project team for analysis and adjustment. The simulated S-parameters of the analog link were measured using a vector network analyzer through the signal input and signal output ports.

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