An emulation debugging method, device, equipment and storage medium
Patent Information
- Application Number
- CN202310544602.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-05-12
- Publication Date
- 2026-09-22
- Estimated Expiration
- 2043-05-12
AI Technical Summary
虽然使用触发错误的随机种子可以重现测试失败的测试用例,但之后的调试修复过程依然需要人工手动检查仿真日志文件、查看仿真波形,以分析故障出现在哪里,整个过程会耗费大量的时间和精力
[0034]本申请中,获取回归测试中触发错误情况的目标随机种子,以及所述错误情况对应的第一仿真结果;利用所述目标随机种子通过分别修改每个功能块的随机状态并分别进行仿真,得到每个所述功能块在修改随机状态后对应的第二仿真结果;所述功能块为硬件设计及验证语言中的功能块;将所述第二仿真结果和所述第一仿真结果进行对比,根据对比结果筛选出引发错误的目标功能块。可见,通过保持回归测试中触发错误情况的目标随机种子不变,依次修改每个功能块的随机状态并依次进行仿真,得到第二仿真结果,然后将第二仿真结果与错误情况对应的第一仿真结果进行对比,由此通过单一变量的方式控制各个功能块的随机状态,能够利用随机状态实现快速调试,快速定位回归测试中出现测试失败的原因,节省回归测试中仿真调试的成本。
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Abstract
Description
Technical Field
[0001] This invention relates to the field of simulation technology, and in particular to a simulation debugging method, apparatus, device, and storage medium. Background Technology
[0002] In related technologies, stochastic stability can be used to reproduce failed test cases after regression testing using a random seed that triggers errors. While this method can reproduce failed test cases, the subsequent debugging and repair process still requires manual inspection of simulation log files and analysis of simulation waveforms to pinpoint the fault location, which is time-consuming and labor-intensive. Therefore, quickly locating the causes of test failures in regression testing and reducing the cost of simulation debugging during regression testing is a pressing issue that needs to be addressed. Summary of the Invention
[0003] In view of this, the purpose of this invention is to provide a simulation debugging method, apparatus, device, and medium that can quickly locate the cause of test failures in regression testing and save the cost of simulation debugging in regression testing. The specific solution is as follows:
[0004] Firstly, this application discloses a simulation debugging method, including:
[0005] Obtain the target random seed that triggers the error condition in the regression test, and the first simulation result corresponding to the error condition;
[0006] By using the target random seed, the random state of each functional block is modified and simulations are performed separately to obtain the second simulation result corresponding to each functional block after the random state is modified; the functional block is a functional block in a hardware design and verification language.
[0007] The second simulation result is compared with the first simulation result, and the target functional block that caused the error is selected based on the comparison result.
[0008] Optionally, the step of using the target random seed to modify the random state of each functional block and perform simulations separately includes:
[0009] Obtain the historical random state corresponding to the function block, and generate a new random state for the function block that is different from the historical random state.
[0010] The random state of each functional block is modified sequentially according to the new random state corresponding to each functional block, and the simulation is performed using the target random seed after the random state of each functional block is modified.
[0011] Optionally, obtaining the historical random state corresponding to the function block includes:
[0012] When a regression test triggers an error, the simulation environment is parsed, the names of all the functional blocks are captured, and the handle of the random number generator corresponding to each functional block is obtained based on the name.
[0013] The historical random state corresponding to each function block is obtained based on the handle.
[0014] Optionally, obtaining the handle of the random number generator corresponding to each function block based on the name, and obtaining the historical random state corresponding to each function block based on the handle, includes:
[0015] Based on the name, the handle of the random number generator corresponding to each functional block is obtained statically.
[0016] The random state acquisition function is invoked based on the handle to obtain the historical random state corresponding to each function block.
[0017] Optionally, after comparing the second simulation result with the first simulation result and filtering out the target functional block that caused the error based on the comparison result, the method further includes:
[0018] Based on the comparison results and all the target function blocks that caused the error, a debug report is generated so that the administrator can locate the error according to the debug report.
[0019] Optionally, comparing the second simulation result with the first simulation result and filtering out the target functional block causing the error based on the comparison result includes:
[0020] Each second simulation result is compared with the first simulation result.
[0021] If there is a discrepancy, the function block that modifies the random state corresponding to the second simulation result will be used as the target function block that triggers the error.
[0022] Optionally, the step of using the target random seed to modify the random state of each functional block and perform simulations separately to obtain the second simulation result corresponding to each functional block after modifying the random state includes:
[0023] Select any one function block from all function blocks whose random states have not been modified, modify the random state of the function block and perform simulation in combination with the target random seed to obtain the second simulation result of the function block after the random state has been modified.
[0024] Determine whether there is a function block whose random state has not been modified. If so, perform the operation of selecting any function block from all function blocks whose random state has not been modified, modifying the random state of the function block, and combining it with the target random seed for simulation.
[0025] If it does not exist, the simulation ends.
[0026] Secondly, this application discloses a simulation debugging device, comprising:
[0027] The simulation result acquisition module is used to acquire the target random seed that triggers the error condition in the regression test, and the first simulation result corresponding to the error condition;
[0028] The simulation module is used to obtain a second simulation result for each functional block after modifying its random state by using the target random seed and performing simulations separately; the functional block is a functional block in a hardware design and verification language.
[0029] The comparison module is used to compare the second simulation result with the first simulation result and filter out the target function block that caused the error based on the comparison result.
[0030] Thirdly, this application discloses an electronic device, comprising:
[0031] Memory, used to store computer programs;
[0032] A processor is used to execute the computer program to implement the aforementioned simulation debugging method.
[0033] Fourthly, this application discloses a computer-readable storage medium for storing a computer program; wherein the computer program, when executed by a processor, implements the aforementioned simulation debugging method.
[0034] In this application, a target random seed for triggering error conditions in regression testing is obtained, along with a first simulation result corresponding to the error condition. Using the target random seed, the random state of each functional block is modified and simulations are performed separately to obtain a second simulation result for each functional block after the random state modification. The functional block is a function block in a hardware design and verification language. The second simulation result is compared with the first simulation result, and the target functional block causing the error is selected based on the comparison result. It is evident that by keeping the target random seed for triggering error conditions in regression testing unchanged, modifying the random state of each functional block sequentially, and performing simulations sequentially to obtain a second simulation result, and then comparing the second simulation result with the first simulation result corresponding to the error condition, the random state of each functional block can be controlled using a single variable. This allows for rapid debugging using random states, quickly locating the cause of test failures in regression testing, and saving the cost of simulation debugging in regression testing. Attached Figure Description
[0035] To more clearly illustrate the technical solutions in the embodiments of the present invention or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0036] Figure 1 A flowchart of a simulation debugging method provided in this application;
[0037] Figure 2 This application provides a schematic diagram of a specific simulation and debugging system structure;
[0038] Figure 3 A flowchart of a specific simulation debugging method provided in this application;
[0039] Figure 4 A schematic diagram of a simulation debugging device provided in this application;
[0040] Figure 5 This application provides a structural diagram of an electronic device. Detailed Implementation
[0041] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0042] In related technologies, although using a random seed to trigger an error can reproduce failed test cases, the subsequent debugging and repair process still requires manual inspection of simulation log files and analysis of simulation waveforms to determine the location of the fault, which consumes a significant amount of time and effort. To overcome these technical problems, this application proposes a simulation debugging method that can quickly locate the cause of test failures in regression testing, saving the cost of simulation debugging in regression testing.
[0043] This application discloses a simulation debugging method. See [link to relevant documentation]. Figure 1 As shown, the method may include the following steps:
[0044] Step S11: Obtain the target random seed that triggers the error condition in the regression test, and the first simulation result corresponding to the error condition.
[0045] In this embodiment, the target random seed that triggers the error condition in the regression test is first queried, as well as the first simulation result corresponding to the error condition. The error conditions mentioned above include, but are not limited to, environmental errors, DUT (Design Under Test) errors, and program errors.
[0046] Regarding stochastic stability, it's understandable that the SystemVerilog (SV) language uses random number generators (RNGs) to produce random number sequences during randomization. Initializing the RNG is the starting point for random number generation, achieved by providing a random seed. In SystemVerilog, independent functional blocks such as programs, modules, interfaces, functions, and tasks are called Processes. Each Process has its own initialization RNG, and the default random seed is determined by the compiler if no random seed is specified. Furthermore, the same Process, with the same random seed, will generate the same random number sequence in multiple simulations; this is called stochastic stability. Stochastic stability can be used to reproduce failed test cases after regression testing using the random seed that triggered the error. Therefore, this embodiment needs to obtain the target random seed that triggers the error in the regression test.
[0047] Step S12: Using the target random seed, modify the random state of each functional block and perform simulations respectively to obtain the second simulation result corresponding to each functional block after modifying the random state; the functional block is a functional block in the hardware design and verification language.
[0048] In this embodiment, a target random seed is used to modify the random state of each functional block and perform simulations separately. Specifically, when a regression test error occurs, the random state of each functional block is modified without changing the target random seed, and the simulation results are compared with the previous erroneous results. For example, under the state that triggers a regression test error, the random state of functional block A is modified, resulting in a second simulation result for functional block A after the modification. Then, under the same state, the random state of functional block B is modified, resulting in a second simulation result for functional block B after the modification, and so on, until each functional block is traversed. In other words, the simulation under the modified random state of a functional block differs from the erroneous state only in the random state of that functional block; everything else remains the same. Therefore, the second simulation result obtained under a single variable is compared with the first simulation result under the erroneous state. If the erroneous state is the same, the functional block is likely the cause of the error; otherwise, the functional block is excluded.
[0049] In SystemVerilog, each Process's RNG has its own random state. The `get_randstate()` method can be used to retrieve the random state. Different simulation tools may return random state values in different ways, but they are generally a seemingly random string representing the next random value to be generated. Similarly, the `set_randstate()` method can be used to manually set the random state and change the next random value to be generated.
[0050] In this embodiment, the step of using the target random seed to modify the random state of each functional block and performing simulations separately may include: obtaining the historical random state corresponding to the functional block; generating a new random state for the functional block that is different from the historical random state; sequentially modifying the random state of each functional block according to the new random state corresponding to each functional block; and performing simulations using the target random seed after modifying the random state of each functional block. That is, obtaining the historical random state corresponding to the functional block under the trigger error condition, generating a new random state for the functional block that is different from the historical random state, and then using the new random state for simulation.
[0051] In this embodiment, obtaining the historical random state corresponding to the functional block may include: parsing the simulation environment when a regression test triggers an error, capturing the names of all functional blocks, and obtaining the handle of the random number generator corresponding to each functional block based on the name; and obtaining the historical random state corresponding to each functional block based on the handle. Specifically, the names of all functional blocks can be captured using a Python script, then the RNG handle of the corresponding functional block can be obtained based on the name, and then the random state can be obtained through the handle.
[0052] In this embodiment, obtaining the handle of the random number generator corresponding to each function block based on the name, and obtaining the historical random state corresponding to each function block based on the handle, may include: obtaining the handle of the random number generator corresponding to each function block statically based on the name; and calling a random state acquisition function based on the handle to obtain the historical random state corresponding to each function block. Specifically, the RNG handle of the corresponding function block is obtained through the static method of process::self(), and then the get_randstate() method is called through the handle to obtain the random state.
[0053] In this embodiment, the step of using the target random seed to modify the random state of each functional block and perform simulations to obtain the second simulation result corresponding to each functional block after modifying its random state can include: selecting any one functional block from all functional blocks whose random state has not been modified, modifying the random state of that functional block and performing simulations in conjunction with the target random seed to obtain the second simulation result corresponding to that functional block after modifying its random state; determining whether there are any functional blocks whose random state has not been modified, and if so, performing the operation of selecting any one functional block from all functional blocks whose random state has not been modified, modifying the random state of that functional block and performing simulations in conjunction with the target random seed; if not, ending the simulation. That is, the process of modifying the random state and performing simulations is a loop process. Each time, any one functional block is selected from all functional blocks whose random state has not been modified, the random state of that functional block is modified and simulations are performed in conjunction with the target random seed, and then the above steps are repeated until the random state of each functional block has been modified once and a simulation test has been performed.
[0054] Step S13: Compare the second simulation result with the first simulation result, and filter out the target function block that caused the error based on the comparison result.
[0055] In this embodiment, comparing the second simulation result with the first simulation result and filtering out the target functional block that causes the error based on the comparison result may include: comparing each second simulation result with the first simulation result respectively; if they are inconsistent, then the functional block that modifies the random state corresponding to the second simulation result is taken as the target functional block that causes the error.
[0056] In this embodiment, after comparing the second simulation result and the first simulation result, and filtering out the target functional blocks causing the error based on the comparison result, the process may further include: generating a debugging report based on the comparison result and all the filtered target functional blocks causing the error, so that the administrator can locate the error based on the debugging report. After traversing all functional blocks, the target functional blocks causing the error are filtered out based on the inconsistency of the comparison result, and a debugging report is output so that the administrator can locate the error based on the debugging report.
[0057] As can be seen from the above, this embodiment obtains the target random seed that triggers the error condition in the regression test, and the first simulation result corresponding to the error condition; using the target random seed, the random state of each functional block is modified and simulation is performed separately to obtain the second simulation result corresponding to each functional block after the random state is modified; the functional block is a functional block in the hardware design and verification language; the second simulation result and the first simulation result are compared, and the target functional block that causes the error is selected based on the comparison result. It can be seen that by keeping the target random seed that triggers the error condition in the regression test unchanged, modifying the random state of each functional block in turn and performing simulation in turn to obtain the second simulation result, and then comparing the second simulation result with the first simulation result corresponding to the error condition, the random state of each functional block can be controlled by a single variable, which can be used to achieve rapid debugging and quickly locate the cause of test failure in regression testing, saving the cost of simulation debugging in regression testing.
[0058] This application discloses a specific simulation debugging system structure diagram, see [link]. Figure 2 As shown, the dashed line represents the existing verification platform, which will remain unchanged. Based on the existing verification platform, a random state control module, a result comparison module, a function block control module, and a report output module will be added. The random state control module implements random state monitoring and configuration functions; the result comparison module compares simulation results; the function block control module allows selection of different function blocks; and the report output module is responsible for outputting debugging reports. See also... Figure 3 The diagram shown is a flowchart of a specific simulation debugging method. The process is as follows:
[0059] The random state control module parses the simulation environment and retrieves the names of all function blocks using a Python script. It then obtains the RNG handle of the corresponding function block using the static method `process::self()`, and subsequently calls the `get_randstate()` method to obtain the random state. Furthermore, after retrieving the name information of all function blocks, the random state control module passes this information to the function block control module, where all function blocks are recorded.
[0060] Subsequently, the function block control module selects a function block and passes the name of the selected function block back to the random state control module. The random state control module calls the set_randstate() method through the handle to configure a random state that is different from the previous one. After the configuration is completed, the simulation begins.
[0061] The simulation results are compared with the initial simulation results that showed errors using the result comparison module. If the simulation results do not match, it indicates that the function block may be the cause of the error; otherwise, the function block is excluded. The comparison results are sent to the function block control module. If the function block control module receives a matching result, it checks for unverified function blocks and starts the next round of simulation testing. If the function block control module receives a mismatch result, it also passes the current function block information to the report output module.
[0062] After traversing all function blocks, the function block control module issues a signal indicating the end of the debugging simulation, and the control report output module outputs a debugging report. Developers can accurately locate errors based on the output debugging report.
[0063] As can be seen from the above, in this embodiment, when a regression test error occurs, the random seed is not changed, but the random state of each functional block is modified separately, and the simulation results are compared with the previous erroneous results. If the error conditions are the same, it means that the functional block may be the cause of the error; otherwise, the functional block is excluded. After all functional blocks are compared, a debugging report is output. Developers can use the report to narrow down the debugging scope, quickly locate the error, and fix it.
[0064] Accordingly, this application also discloses a simulation debugging device, see [link to relevant documentation]. Figure 4 As shown, the device includes:
[0065] The simulation result acquisition module 11 is used to acquire the target random seed that triggers the error condition in the regression test, and the first simulation result corresponding to the error condition;
[0066] Simulation module 12 is used to obtain a second simulation result for each functional block after modifying its random state by using the target random seed to modify the random state of each functional block and perform simulations respectively; the functional block is a functional block in a hardware design and verification language.
[0067] The comparison module 13 is used to compare the second simulation result with the first simulation result and filter out the target function block that caused the error based on the comparison result.
[0068] As can be seen from the above, this embodiment obtains the target random seed that triggers the error condition in the regression test, and the first simulation result corresponding to the error condition; using the target random seed, the random state of each functional block is modified and simulation is performed separately to obtain the second simulation result corresponding to each functional block after the random state is modified; the functional block is a functional block in the hardware design and verification language; the second simulation result and the first simulation result are compared, and the target functional block that causes the error is selected based on the comparison result. It can be seen that by keeping the target random seed that triggers the error condition in the regression test unchanged, modifying the random state of each functional block in turn and performing simulation in turn to obtain the second simulation result, and then comparing the second simulation result with the first simulation result corresponding to the error condition, the random state of each functional block can be controlled by a single variable, which can be used to achieve rapid debugging and quickly locate the cause of test failure in regression testing, saving the cost of simulation debugging in regression testing.
[0069] In some specific embodiments, the simulation module 12 may specifically include:
[0070] The historical random state acquisition unit is used to acquire the historical random state corresponding to the function block and generate a new random state for the function block that is different from the historical random state.
[0071] The random state modification unit is used to sequentially modify the random state of each function block according to the new random state corresponding to each function block, and to perform simulation using the target random seed after the random state of each function block is modified.
[0072] In some specific embodiments, the historical random state acquisition unit may specifically include:
[0073] The environment parsing unit is used to parse the simulation environment when a regression test triggers an error, capture the names of all the functional blocks, and obtain the handle of the random number generator corresponding to each functional block based on the name.
[0074] The historical random state acquisition unit is used to acquire the historical random state corresponding to each of the functional blocks based on the handle.
[0075] In some specific embodiments, the historical random state acquisition unit may specifically include:
[0076] The handle acquisition unit is used to statically acquire the handle of the random number generator corresponding to each of the functional blocks according to the name.
[0077] The function call unit is used to call the random state acquisition function according to the handle to obtain the historical random state corresponding to each function block.
[0078] In some specific embodiments, the simulation debugging device may specifically include:
[0079] The debugging report generation unit is used to compare the second simulation result with the first simulation result, filter out the target function blocks that cause the error based on the comparison result, and generate a debugging report based on the comparison result and all the selected target function blocks that cause the error, so that the administrator can locate the error based on the debugging report.
[0080] In some specific embodiments, the comparison module 13 may specifically include:
[0081] A comparison unit is used to compare each of the second simulation results with the first simulation result;
[0082] The target function block determination unit is used to determine the function block that modifies the random state corresponding to the second simulation result as the target function block that causes the error if there is a discrepancy.
[0083] In some specific embodiments, the simulation module 12 may specifically include:
[0084] The simulation unit is used to select any one function block from all function blocks whose random states have not been modified, modify the random state of the function block and perform simulation in combination with the target random seed to obtain the second simulation result of the function block after the random state has been modified.
[0085] An execution unit is used to determine whether there is a function block whose random state has not been modified. If so, the unit executes the operation of selecting any one function block from all the function blocks whose random state has not been modified, modifying the random state of the function block, and performing simulation in combination with the target random seed.
[0086] Termination unit, used to end the simulation if it does not exist.
[0087] Furthermore, this application also discloses an electronic device, see [link to relevant documentation]. Figure 5 As shown, the content in the figure should not be considered as any limitation on the scope of use of this application.
[0088] Figure 5 This is a schematic diagram of the structure of an electronic device 20 provided in an embodiment of this application. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 stores a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the simulation debugging method disclosed in any of the foregoing embodiments.
[0089] In some specific embodiments, the computer program can perform the following steps during loading and execution: obtaining a target random seed that triggers an error condition in regression testing, and a first simulation result corresponding to the error condition; using the target random seed, modifying the random state of each functional block and performing simulations respectively to obtain a second simulation result corresponding to each functional block after modifying the random state; the functional block is a functional block in a hardware design and verification language; comparing the second simulation result with the first simulation result, and filtering out the target functional block that caused the error based on the comparison result.
[0090] As can be seen, by keeping the target random seed that triggers the error in the regression test unchanged, modifying the random state of each functional block in turn and performing simulations in turn, a second simulation result is obtained. Then, the second simulation result is compared with the first simulation result corresponding to the error. Thus, by controlling the random state of each functional block by a single variable, the random state can be used to achieve rapid debugging, quickly locate the cause of test failure in the regression test, and save the cost of simulation debugging in the regression test.
[0091] In some specific embodiments, the computer program can perform the following steps during loading and execution: obtaining the historical random state corresponding to the function block, generating a new random state for the function block that is different from the historical random state; sequentially modifying the random state of each function block according to the new random state corresponding to each function block, and performing simulation using the target random seed after modifying the random state of each function block.
[0092] In some specific embodiments, the computer program can perform the following steps during loading and execution: when a regression test triggers an error, the simulation environment is parsed, the names of all the functional blocks are captured, and the handle of the random number generator corresponding to each functional block is obtained according to the name; the historical random state corresponding to each functional block is obtained according to the handle.
[0093] In some specific embodiments, the computer program can perform the following steps during loading and execution: obtain the handle of the random number generator corresponding to each functional block in a static manner according to the name; and call the random state acquisition function according to the handle to obtain the historical random state corresponding to each functional block.
[0094] In some specific embodiments, the computer program can perform the following steps during loading and execution: generating a debugging report based on the comparison results and all the target function blocks that caused the error, so that the administrator can locate the error according to the debugging report.
[0095] In some specific embodiments, the computer program can perform the following steps during loading and execution: comparing each second simulation result with the first simulation result; if they are inconsistent, using the function block corresponding to the second simulation result that modifies the random state as the target function block that triggers the error.
[0096] In some specific embodiments, the computer program can perform the following steps during loading and execution: selecting any one function block from all function blocks whose random states have not been modified, modifying the random state of the function block and performing simulation in combination with the target random seed to obtain a second simulation result corresponding to the function block after the random state has been modified; determining whether there is a function block whose random state has not been modified, and if so, performing the operation of selecting any one function block from all function blocks whose random states have not been modified, modifying the random state of the function block and performing simulation in combination with the target random seed; if not, ending the simulation.
[0097] In this embodiment, the power supply 23 is used to provide operating voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 25 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.
[0098] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk or optical disk, etc. The resources stored thereon include operating system 221, computer program 222 and data 223 including target random seed, etc. The storage method can be temporary storage or permanent storage.
[0099] The operating system 221 manages and controls the various hardware devices on the electronic device 20 and the computer program 222 to enable the processor 21 to perform calculations and processing on the massive amounts of data 223 in the memory 22. The operating system 221 can be Windows Server, Netware, Unix, Linux, etc. In addition to including computer programs capable of performing the simulation debugging methods executed by the electronic device 20 as disclosed in any of the foregoing embodiments, the computer program 222 may further include computer programs capable of performing other specific tasks.
[0100] Furthermore, this application also discloses a computer storage medium storing computer-executable instructions. When the computer-executable instructions are loaded and executed by a processor, they implement the simulation debugging method steps disclosed in any of the foregoing embodiments.
[0101] In some specific embodiments, the computer program can perform the following steps during loading and execution: obtaining a target random seed that triggers an error condition in regression testing, and a first simulation result corresponding to the error condition; using the target random seed, modifying the random state of each functional block and performing simulations respectively to obtain a second simulation result corresponding to each functional block after modifying the random state; the functional block is a functional block in a hardware design and verification language; comparing the second simulation result with the first simulation result, and filtering out the target functional block that caused the error based on the comparison result. It can be seen that by keeping the target random seed that triggers the error condition in regression testing unchanged, modifying the random state of each functional block sequentially and performing simulations sequentially to obtain a second simulation result, and then comparing the second simulation result with the first simulation result corresponding to the error condition, the random state of each functional block can be controlled by a single variable. This allows for rapid debugging using random states, quickly locating the cause of test failures in regression testing, and saving the cost of simulation debugging in regression testing.
[0102] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.
[0103] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.
[0104] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0105] The above provides a detailed description of the simulation debugging method, apparatus, device, and medium provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be modifications in specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.
Claims
1. A simulation debugging method, characterized in that, include: Obtain the target random seed that triggers the error condition in the regression test, and the first simulation result corresponding to the error condition; By using the target random seed, the random state of each functional block is modified and simulations are performed separately to obtain the second simulation result corresponding to each functional block after the random state is modified. The function block is a function block in a hardware design and verification language; The second simulation result is compared with the first simulation result, and the target functional block that caused the error is selected based on the comparison result; The step of using the target random seed to modify the random state of each functional block and perform simulations separately includes: Obtain the historical random state corresponding to the function block, and generate a new random state for the function block that is different from the historical random state. The random state of each functional block is modified sequentially according to the new random state corresponding to each functional block, and the simulation is performed using the target random seed after the random state of each functional block is modified.
2. The simulation debugging method according to claim 1, characterized in that, The step of obtaining the historical random state corresponding to the function block includes: When a regression test triggers an error, the simulation environment is parsed, the names of all the functional blocks are captured, and the handle of the random number generator corresponding to each functional block is obtained based on the name. The historical random state corresponding to each function block is obtained based on the handle.
3. The simulation debugging method according to claim 2, characterized in that, The step of obtaining the handle of the random number generator corresponding to each function block according to the name, and the step of obtaining the historical random state corresponding to each function block according to the handle, includes: Based on the name, the handle of the random number generator corresponding to each functional block is obtained statically. The random state acquisition function is invoked based on the handle to obtain the historical random state corresponding to each function block.
4. The simulation debugging method according to claim 1, characterized in that, After comparing the second simulation result with the first simulation result and filtering out the target functional block that caused the error based on the comparison result, the method further includes: Based on the comparison results and all the target function blocks that caused the error, a debug report is generated so that the administrator can locate the error according to the debug report.
5. The simulation debugging method according to claim 1, characterized in that, The step of comparing the second simulation result with the first simulation result and filtering out the target functional block that caused the error based on the comparison result includes: Each second simulation result is compared with the first simulation result. If there is a discrepancy, the function block that modifies the random state corresponding to the second simulation result will be used as the target function block that triggers the error.
6. The simulation debugging method according to any one of claims 1 to 5, characterized in that, The process of using the target random seed to modify the random state of each functional block and performing simulations separately to obtain the second simulation result for each functional block after modifying its random state includes: Select any one function block from all function blocks whose random states have not been modified, modify the random state of the function block and perform simulation in combination with the target random seed to obtain the second simulation result of the function block after the random state has been modified. Determine whether there is a function block whose random state has not been modified. If so, perform the operation of selecting any function block from all function blocks whose random state has not been modified, modifying the random state of the function block, and combining it with the target random seed for simulation. If it does not exist, the simulation ends.
7. A simulation debugging device, characterized in that, include: The simulation result acquisition module is used to acquire the target random seed that triggers the error condition in the regression test, and the first simulation result corresponding to the error condition; The simulation module is used to obtain a second simulation result for each functional block after modifying its random state by using the target random seed to modify the random state of each functional block and perform simulations respectively. The function block is a function block in a hardware design and verification language; The comparison module is used to compare the second simulation result with the first simulation result and filter out the target functional block that caused the error based on the comparison result; The simulation module is configured to acquire the historical random states corresponding to the functional blocks, generate new random states for the functional blocks that are different from the historical random states, modify the random states of each functional block sequentially according to the new random states corresponding to each functional block, and perform simulation using the target random seed after modifying the random states of each functional block.
8. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the simulation debugging method as described in any one of claims 1 to 6.
9. A computer-readable storage medium, characterized in that, Used to store computer programs; wherein the computer programs, when executed by a processor, implement the simulation debugging method as described in any one of claims 1 to 6.
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