A transformer-based noise cancellation structure receiver front-end circuit

Abstract

This invention discloses a transformer-based noise cancellation receiver front-end circuit, including a low-noise transconductance amplifier circuit, a passive mixer, and a transimpedance amplifier. The low-noise transconductance amplifier circuit uses a cascode cascade structure, which not only achieves noise cancellation but also enables two differential current outputs. Transformer coupling at the input increases the equivalent transconductance, reducing power consumption. The baseband transimpedance amplifier uses a two-stage structure with feedforward compensation to achieve a large bandwidth. Furthermore, this receiver achieves a baseband bandwidth of 220MHz in the RF frequency range of 5.5-6.5GHz, with a noise figure below 2.45dB.

Description

Technical Field

[0001] This invention relates to the field of radio frequency integrated circuits, specifically to a receiver front-end circuit based on a transformer-based noise cancellation structure. Background Technology

[0002] With the continuous development of 5G high-speed mobile communication technology, the bandwidth coverage capability of radio frequency (RF) receivers is becoming increasingly important. In the 5G Sub-6GHz band, wide bandwidth coverage of the RF port is a crucial technical indicator. On the other hand, increasing the baseband channel bandwidth also has a significant effect, reducing the need for carrier aggregation and the corresponding number of receiving channels, thus saving hardware costs. Based on this, receiver circuit design generally focuses on multiple technical indicators such as gain, linearity, and noise. It's worth noting that the mixer-pre-converter architecture lacks gain before down-conversion, resulting in poor noise performance. In contrast, the low-noise amplifier (LNA) pre-converter architecture offers lower noise figures and greater technical appeal, making it the most widely used in practical applications.

[0003] Driven by the need for high-speed data transmission in 5G, we focus on the bandwidth coverage of receivers. The following is a brief review of existing reports on receiver technology achievements. For example... Figure 1 As shown in reference [1], its structure adopts an LNA front-end architecture, which includes a low-noise amplifier, mixer, 25% divider, transimpedance amplifier, etc. Its innovation lies in the fact that noise cancellation is achieved through the main path and auxiliary path in the whole architecture, resulting in a low noise figure. However, it is applied in the 4G LTE scenario and obtains a very narrow baseband bandwidth, which will lead to a low signal transmission rate. On the other hand, reference [2] adopts a combined structure: Mixer front-end architecture + LNA front-end architecture, with the Mixer front-end architecture as the main path and the LNA front-end architecture as the auxiliary path to achieve noise cancellation. However, it only supports the 4G frequency band range, and the clock signal input to the mixer uses a 12.5% ​​duty cycle square wave signal, which will consume a lot of power.

[0004] Based on the aforementioned existing technologies, their baseband channel bandwidth is 5-10MHz, which is very narrow; and the radio frequency bandwidth ranges of the two papers are 80-2800MHz and 100-2700MHz respectively, which cannot cover the frequency range on the sub-6GHz high-frequency side.

[0005] To address the aforementioned problems, we propose a transformer-based noise cancellation structure receiver front-end circuit. Summary of the Invention

[0006] The purpose of this invention is to provide a receiver front-end circuit based on a transformer noise cancellation structure, which solves the existing problems.

[0007] To achieve the above objectives, the present invention provides the following technical solution: a transformer-based noise cancellation receiver front-end circuit, comprising: a low-noise transconductance amplifier circuit, a passive mixer, and a transimpedance amplifier;

[0008] The low-noise transconductance amplifier circuit includes: NMOS transistors M1, M2, M3, M4, M5, M6, M7, M8, M9, and M1. 10 NMOS transistor M 11 NMOS transistor M 12 Capacitor C1, Capacitor C2, Variable Capacitor C3, Variable Capacitor C4, Variable Capacitor C5, Variable Capacitor C6, Variable Capacitor C7, Transformer T1, Transformer T2, Transformer T3, Resistor R1, Resistor R 2；

[0009] The transimpedance amplifier includes a first transimpedance amplifier and a second transimpedance amplifier, which have the same structure and both include: capacitor C TIA1 Capacitor C TIA2 Resistance R TIA2 Resistance R TIA1 Baseband TIA unit;

[0010] The passive mixer includes a first passive mixer and a second passive mixer. The first and second passive mixers are connected to input local oscillator signals LO0 and LO1. The first and second passive mixers have identical structures and both include an NMOS transistor M. 25 NMOS transistor M 26 NMOS transistor M 27 NMOS transistor M 28 Capacitor C 14 Capacitor C 15 Resistor R9, Resistor R 10 .

[0011] Preferably, one end of capacitor C1 is connected to one end of variable capacitor C3, terminal a of transformer T1, and the source terminal of NMOS transistor M1 as the positive input terminal V of the low-noise transconductance amplifier circuit. IN+ The other end of capacitor C1 is connected to the gate terminal of NMOS transistor M3 and connected to the bias voltage V through resistor R1. b1 The connections are as follows: the source terminal of NMOS transistor M3 is grounded; the drain terminal of NMOS transistor M3 is connected to the source terminals of NMOS transistors M5 and M9; the gate terminal of NMOS transistor M1 is connected to the f terminal of transformer T1; and the e terminal of transformer T1 is connected to the bias voltage V. BTThe d-terminal of transformer T1 is connected to the gate terminal of NMOS transistor M2, the b-terminal of transformer T1 is grounded, and the c-terminal of transformer T1 is connected to the other end of variable capacitor C3, the source terminal of NMOS transistor M2, and one end of capacitor C2, serving as the negative input terminal V of the low-noise transconductance amplifier circuit. IN- The other end of capacitor C2 is connected to the gate terminal of NMOS transistor M4 and connected to the bias voltage V through resistor R2. b2 Connections: The source of NMOS transistor M4 is grounded; the drain of NMOS transistor M4 is connected to the source of NMOS transistor M8; and the source of NMOS transistor M... 12 The source terminal is connected; the gate terminal of NMOS transistor M5 is connected to the bias circuit V. bc The drain terminal of NMOS transistor M5 is connected to one end of variable capacitor C5 and terminal a of transformer T2 as the first positive output terminal V of the low-noise transconductance amplifier circuit. O1+ The e-terminal and b-terminal of transformer T2 are connected to the power supply voltage V. DD The capacitor C2 is connected to the other end of the variable capacitor C5 and the drain of the NMOS transistor M8 to form the first negative output terminal V of the low-noise transconductance amplifier circuit. O1- The gate terminal of NMOS transistor M8 is connected to the bias circuit V. bc The f terminal of transformer T2 is connected to one end of variable capacitor C4 and the drain terminal of NMOS transistor M6. The d terminal of transformer T2 is connected to the other end of variable capacitor C4 and the drain terminal of NMOS transistor M7. The gate terminals of NMOS transistors M6 and M7 are connected to the bias circuit V. bc The source terminal of NMOS transistor M6 is connected to the drain terminal of NMOS transistor M1, and the drain terminal of NMOS transistor M... 10 Source-end connection: The source terminal of NMOS transistor M7 is connected to the drain terminal of NMOS transistor M2 and the drain terminal of NMOS transistor M... 11 Source connection; NMOS transistor M9 gate terminal connected to bias circuit V bc The drain terminal of NMOS transistor M9 is connected to one end of variable capacitor C7 and terminal a of transformer T3 as the second positive output terminal V of the low-noise transconductance amplifier circuit. O2+ The e-terminal and b-terminal of transformer T3 are connected to the power supply voltage V. DD The capacitor C terminal of transformer T3 is connected to the other end of capacitor C7 and NMOS transistor M. 12 The drain terminal is connected as the second negative output terminal V of the low-noise transconductance amplifier circuit. O1- NMOS transistor M 12 Gate terminal connected to bias circuit V bc The f terminal of transformer T3 is connected to one end of variable capacitor C6 and NMOS transistor M. 10 The drain terminal is connected, and the drain terminal of transformer T3 is connected to the other end of variable capacitor C6 and NMOS transistor M. 11 Drain connection, NMOS transistor M 10 Gate terminal and NMOS transistor M 11 Gate terminal connected to bias circuit V bc .

[0012] Preferably, the positive input terminal of the baseband TIA unit is connected to capacitor C. TIA2 one end and resistor R TIA2 One end and the output terminal V of the mixer out2 Connect it and use it as the input terminal V of the transimpedance amplifier. in3 The inverting input terminal of the baseband TIA unit is connected to capacitor C. TIA1 one end and resistor R TIA1 One end and the output terminal V of the mixer out2 Connect it and use it as the input terminal V of the transimpedance amplifier. in2 The positive output terminal of the baseband TIA unit is connected to capacitor C respectively. TIA1 The other end and resistor R TIA1 The other end is connected and serves as the output terminal V of the transimpedance amplifier. out3 The inverting output terminal of the baseband TIA unit is connected to capacitor C. TIA2 The other end and resistor R TIA2 The other end is connected and serves as the output terminal V of the transimpedance amplifier. out4 .

[0013] Preferably, the baseband TIA units have the same structure, all including: a PMOS transistor M 13 PMOS transistor M 14 PMOS transistor M 15 PMOS transistor M 18 PMOS transistor M 19 PMOS transistor M 20 PMOS transistor M 23 PMOS transistor M 24 NMOS transistor M 16 NMOS transistor M 17 NMOS transistor M 21 NMOS transistor M 22 Capacitor C8, Capacitor C9, Capacitor C 10 Capacitor C 11 Capacitor C 12 Capacitor C 13 Resistors R3, R4, R5, and R6, and the comparator Opamp.

[0014] Preferably, the PMOS transistor M 13 The source terminal is connected to the power supply voltage V. DD PMOS transistor M 13 The gate terminal is connected to a bias voltage V b3 PMOS transistor M 13 The drain terminal of the PMOS transistor M 14 The source and PMOS transistor M 15 The source terminal is connected to the PMOS transistor M.14 The gate terminal and PMOS transistor M 19 The gate terminal is connected as the input terminal V of the baseband TIA unit. in4 PMOS transistor M 14 The drain terminal is connected to one end of capacitor C8 and one end of resistor R3 and NMOS transistor M. 16 The drain terminal and NMOS transistor M 22 The gate connection of the NMOS transistor M 16 The gate terminal of the NMOS transistor M 17 The gate terminal of the NMOS transistor is connected to the other end of capacitor C8, the other end of resistor R3, one end of capacitor C9, and one end of resistor R4. 16 The source and NMOS transistor M 17 The source terminal is connected to ground, and the NMOS transistor M 17 The drain terminal is connected to the other end of capacitor C9 and the other end of resistor R4 and PMOS transistor M. 15 The drain terminal and NMOS transistor M 21 The gate connection of the PMOS transistor M 15 The gate terminal and PMOS transistor M 20 The gate terminal is connected as the input terminal V of the baseband TIA unit. in3 PMOS transistor M 20 The source terminal and PMOS transistor M 18 The drain terminal and PMOS transistor M 19 The source terminal is connected to the PMOS transistor M. 18 The drain terminal is connected to a bias voltage V b4 PMOS transistor M 18 The source terminal is connected to the power supply voltage V. DD PMOS transistor M 19 The drain terminal and capacitor C 10 One end of the resistor R5 and the NMOS transistor M 21 The drain terminal and capacitor C 13 One end and PMOS transistor M 24 The drain terminal is connected as the output terminal V of the baseband TIA unit. out3 NMOS transistor M 21 The source terminal and NMOS transistor M 22 The source terminal is connected to ground, and the NMOS transistor M 22 The drain terminal and capacitor C 11 One end of the resistor R6 and the PMOS transistor M 20 The drain terminal and capacitor C 12 One end and PMOS transistor M 23 The drain terminal is connected as the output terminal V of the baseband TIA unit. out4 Capacitor C 11 The other end is connected to capacitor C 10The other end of the resistor R6 and the other end of the resistor R5 are connected to the positive input terminal V of the comparator Opamp. CM The comparator Opamp's negative input terminal is connected to voltage V. ref The output of the comparator Opamp is connected to one end of resistor R7 and one end of resistor R8, and the PMOS transistor M. 23 The gate terminal and PMOS transistor M 24 The gate terminals are connected, and the other end of resistor R7 is connected to capacitor C. 12 The other end is connected, and the other end of resistor R8 is connected to capacitor C. 13 The other end is connected to the PMOS transistor M. 23 The source and PMOS transistor M 24 The source terminal is connected to the power supply voltage V. DD .

[0015] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0016] This invention adopts an LNA front-end architecture, which includes low-noise transconductance circuits, mixers, transimpedance amplifiers and other circuits, providing an operating frequency in the range of 5.5-6.5GHz and a baseband channel bandwidth of over 200MHz, significantly improving the data transmission rate of the signal.

[0017] The low-noise transconductance amplifier in this invention utilizes a transformer-coupled noise cancellation structure to achieve low noise performance. Furthermore, the transformer coupling method at the input end increases the equivalent transconductance and reduces the power consumption of the CG input tube. Through the tuning capacitors C3~7, the RF operating frequency can be maintained at 5.5-6.5GHz, effectively covering the sub-6GHz high-frequency band.

[0018] This invention increases the baseband channel bandwidth by designing a two-stage operational amplifier and using feedforward compensation technology to support high data transmission rates.

[0019] The mixer in this invention uses 50% of the clock signal, which differs from the common 25% clock signal circuit. This receiver structure reduces the technical requirements for the local oscillator frequency divider circuit and reduces power consumption.

[0020] The circuit of this invention covers the high-frequency band range of sub-6GHz: 5.5-6.5GHz, and supports a large channel bandwidth of 220MHz. The noise cancellation of the transformer and the transconductance boosting structure ensure low noise and low power consumption of the circuit. The receiver circuit adopts a 50% duty cycle local oscillator waveform, which also reduces the power consumption requirements of the frequency divider. Attached Figure Description

[0021] Figure 1 This is a diagram of the front-end structure of a low-noise blocking filter broadband receiver.

[0022] Figure 2Diagram of the front-end structure of a frequency conversion noise cancellation receiver;

[0023] Figure 3 This is an architecture diagram of the receiver front-end circuit of a transformer-based noise cancellation structure according to the present invention.

[0024] Figure 4 This invention relates to a low-noise transconductance amplifier circuit for a receiver front-end circuit based on a transformer-based noise cancellation structure.

[0025] Figure 5 This invention relates to a baseband TIA unit of a transimpedance amplifier in a receiver front-end circuit based on a transformer-based noise cancellation structure.

[0026] Figure 6 This invention relates to a passive mixer for a receiver front-end circuit based on a transformer-based noise cancellation structure.

[0027] Figure 7 S11 is the input matching characteristic of the front-end circuit of a transformer-based noise cancellation structure receiver according to the present invention;

[0028] Figure 8 The noise figure of the receiver front-end circuit of the transformer-based noise cancellation structure of the present invention;

[0029] Figure 9 This invention relates to the gain bandwidth of a receiver front-end circuit based on a transformer-based noise cancellation structure. Detailed Implementation

[0030] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0031] The low-noise transconductance amplifier circuit of this invention achieves a lower noise figure at the output by utilizing its own noise cancellation structure, and by employing a transformer-coupled input method, it reduces the common-gate current and lowers the noise of the common-gate transistor. Additionally, note the adjustment capacitor C... 3~7 The radio frequency bandwidth is designed within the frequency range of 5.5-6.5 GHz.

[0032] Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 and Figure 9 As shown, a transformer-based noise cancellation receiver front-end circuit includes: a low-noise transconductance amplifier circuit, a passive mixer, and a transimpedance amplifier.

[0033] The input radio frequency signal is from port V IN+ and port V IN- The receiver receives dual-ended inputs, which are converted into two differential current signals by a low-noise transconductance amplifier circuit. The first differential current signal is multiplied by the input local oscillator signals LO0 and LO1 at the input of a first passive mixer to obtain an intermediate frequency voltage signal, which is then passed through a transimpedance amplifier to obtain the first output voltage signal BB_I. Similarly, the second differential current signal is driven by a second passive mixer and a second transimpedance amplifier to obtain the second output voltage signal BB_Q. Notably, the low-noise transconductance amplifier circuit uses a cascaded structure of common-source and common-gate cascodes, achieving not only noise cancellation but also enabling the output of two differential currents through the cascaded cascodes. Furthermore, transformer coupling is used at the input to increase the equivalent transconductance at the input, achieving power saving. The baseband transimpedance amplifier uses a multi-stage high-gain amplifier, supporting a wider bandwidth. In addition, this receiver achieves a baseband bandwidth of 220MHz in the RF frequency range of 5.5-6.5GHz with a noise figure below 2.45dB.

[0034] The aforementioned transformer-based noise cancellation receiver front-end circuit is characterized in that the input terminals of the low-noise transconductance amplifier circuit Gm are respectively V IN+ and V IN- The first positive output terminal V of the low-noise transconductance amplifier circuit Gm. O1+ Through capacitor C DC1 With the input terminal V of the first passive mixer in1 Connection; the first negative output terminal V of the low-noise transconductance amplifier circuit Gm. O1- Through capacitor C DC2 With the input terminal V of the first passive mixer in2 Connection; similarly, the second positive output terminal V of the low-noise transconductance amplifier circuit Gm. O2+ and negative output terminal V O2- Through capacitor C respectively DC3 and capacitor C DC4 With the input terminal V of the second passive mixer in1 and V in2 connect.

[0035] The low-noise transconductance amplifier circuit includes: NMOS transistors M1, M2, M3, M4, M5, M6, M7, M8, M9, and M1. 10 NMOS transistor M 11 NMOS transistor M 12Capacitor C1, Capacitor C2, Variable Capacitor C3, Variable Capacitor C4, Variable Capacitor C5, Variable Capacitor C6, Variable Capacitor C7, Transformer T1, Transformer T2, Transformer T3, Resistor R1, Resistor R2.

[0036] One end of capacitor C1 is connected to one end of variable capacitor C3, terminal a of transformer T1, and the source terminal of NMOS transistor M1 as the positive input terminal V of the low-noise transconductance amplifier circuit. IN+ The other end of capacitor C1 is connected to the gate terminal of NMOS transistor M3 and connected to the bias voltage V through resistor R1. b1 The connections are as follows: the source terminal of NMOS transistor M3 is grounded; the drain terminal of NMOS transistor M3 is connected to the source terminals of NMOS transistors M5 and M9; the gate terminal of NMOS transistor M1 is connected to the f terminal of transformer T1; and the e terminal of transformer T1 is connected to the bias voltage V. BT The d-terminal of transformer T1 is connected to the gate terminal of NMOS transistor M2, the b-terminal of transformer T1 is grounded, and the c-terminal of transformer T1 is connected to the other end of variable capacitor C3, the source terminal of NMOS transistor M2, and one end of capacitor C2, serving as the negative input terminal V of the low-noise transconductance amplifier circuit. IN- The other end of capacitor C2 is connected to the gate terminal of NMOS transistor M4 and connected to the bias voltage V through resistor R2. b2 Connections: The source of NMOS transistor M4 is grounded; the drain of NMOS transistor M4 is connected to the source of NMOS transistor M8; and the source of NMOS transistor M... 12 The source terminal is connected; the gate terminal of NMOS transistor M5 is connected to the bias circuit V. bc The drain terminal of NMOS transistor M5 is connected to one end of variable capacitor C5 and terminal a of transformer T2 as the first positive output terminal V of the low-noise transconductance amplifier circuit. O1+ The e-terminal and b-terminal of transformer T2 are connected to the power supply voltage V. DD The capacitor C2 is connected to the other end of the variable capacitor C5 and the drain of the NMOS transistor M8 to form the first negative output terminal V of the low-noise transconductance amplifier circuit. O1- The gate terminal of NMOS transistor M8 is connected to the bias circuit V. bc The f terminal of transformer T2 is connected to one end of variable capacitor C4 and the drain terminal of NMOS transistor M6. The d terminal of transformer T2 is connected to the other end of variable capacitor C4 and the drain terminal of NMOS transistor M7. The gate terminals of NMOS transistors M6 and M7 are connected to the bias circuit V. bc The source terminal of NMOS transistor M6 is connected to the drain terminal of NMOS transistor M1, and the drain terminal of NMOS transistor M... 10 Source-end connection: The source terminal of NMOS transistor M7 is connected to the drain terminal of NMOS transistor M2 and the drain terminal of NMOS transistor M... 11 Source connection; NMOS transistor M9 gate terminal connected to bias circuit V bc The drain terminal of NMOS transistor M9 is connected to one end of variable capacitor C7 and terminal a of transformer T3 as the second positive output terminal V of the low-noise transconductance amplifier circuit.O2+ The e-terminal and b-terminal of transformer T3 are connected to the power supply voltage V. DD The capacitor C terminal of transformer T3 is connected to the other end of capacitor C7 and NMOS transistor M. 12 The drain terminal is connected as the second negative output terminal V of the low-noise transconductance amplifier circuit. O1- NMOS transistor M 12 Gate terminal connected to bias circuit V bc The f terminal of transformer T3 is connected to one end of variable capacitor C6 and NMOS transistor M. 10 The drain terminal is connected, and the drain terminal of transformer T3 is connected to the other end of variable capacitor C6 and NMOS transistor M. 11 Drain connection, NMOS transistor M 10 Gate terminal and NMOS transistor M 11 Gate terminal connected to bias circuit V bc .

[0037] The aforementioned transformer-based noise cancellation receiver front-end circuit is characterized in that the transimpedance amplifier includes a first transimpedance amplifier and a second transimpedance amplifier, which have identical structures and both include: a capacitor C. TIA1 Capacitor C TIA2 Resistance R TIA2 Resistance R TIA1 Baseband TIA unit.

[0038] The baseband TIA unit's positive input terminal and capacitor C TIA2 one end and resistor R TIA2 One end and the output terminal V of the mixer out2 Connect it and use it as the input terminal V of the transimpedance amplifier. in3 The inverting input terminal of the baseband TIA unit is connected to capacitor C. TIA1 one end and resistor R TIA1 One end and the output terminal V of the mixer out2 Connect it and use it as the input terminal V of the transimpedance amplifier. in2 The positive output terminal of the baseband TIA unit is connected to capacitor C respectively. TIA1 The other end and resistor R TIA1 The other end is connected and serves as the output terminal V of the transimpedance amplifier. out3 The inverting output terminal of the baseband TIA unit is connected to capacitor C. TIA2 The other end and resistor R TIA2 The other end is connected and serves as the output terminal V of the transimpedance amplifier. out4 .

[0039] The baseband TIA units have the same structure, all including: a PMOS transistor M 13 PMOS transistor M 14 PMOS transistor M 15 PMOS transistor M 18PMOS transistor M 19 PMOS transistor M 20 PMOS transistor M 23 PMOS transistor M 24 NMOS transistor M 16 NMOS transistor M 17 NMOS transistor M 21 NMOS transistor M 22 Capacitor C8, Capacitor C9, Capacitor C 10 Capacitor C 11 Capacitor C 12 Capacitor C 13 Resistors R3, R4, R5, and R6, and the comparator Opamp.

[0040] PMOS transistor M 13 The source terminal is connected to the power supply voltage V. DD PMOS transistor M 13 The gate terminal is connected to a bias voltage V b3 PMOS transistor M 13 The drain terminal of the PMOS transistor M 14 The source and PMOS transistor M 15 The source terminal is connected to the PMOS transistor M. 14 The gate terminal and PMOS transistor M 19 The gate terminal is connected as the input terminal V of the baseband TIA unit. in4 PMOS transistor M 14 The drain terminal is connected to one end of capacitor C8 and one end of resistor R3 and NMOS transistor M. 16 The drain terminal and NMOS transistor M 22 The gate connection of the NMOS transistor M 16 The gate terminal of the NMOS transistor M 17 The gate terminal of the NMOS transistor is connected to the other end of capacitor C8, the other end of resistor R3, one end of capacitor C9, and one end of resistor R4. 16 The source and NMOS transistor M 17 The source terminal is connected to ground, and the NMOS transistor M 17 The drain terminal is connected to the other end of capacitor C9 and the other end of resistor R4 and PMOS transistor M. 15 The drain terminal and NMOS transistor M 21 The gate connection of the PMOS transistor M 15 The gate terminal and PMOS transistor M 20 The gate terminal is connected as the input terminal V of the baseband TIA unit. in3 PMOS transistor M 20 The source terminal and PMOS transistor M 18 The drain terminal and PMOS transistor M 19 The source terminal is connected to the PMOS transistor M. 18The drain terminal is connected to a bias voltage V b4 PMOS transistor M 18 The source terminal is connected to the power supply voltage V. DD PMOS transistor M 19 The drain terminal and capacitor C 10 One end of the resistor R5 and the NMOS transistor M 21 The drain terminal and capacitor C 13 One end and PMOS transistor M 24 The drain terminal is connected as the output terminal V of the baseband TIA unit. out3 NMOS transistor M 21 The source terminal and NMOS transistor M 22 The source terminal is connected to ground, and the NMOS transistor M 22 The drain terminal and capacitor C 11 One end of the resistor R6 and the PMOS transistor M 20 The drain terminal and capacitor C 12 One end and PMOS transistor M 23 The drain terminal is connected as the output terminal V of the baseband TIA unit. out4 Capacitor C 11 The other end is connected to capacitor C 10 The other end of the resistor R6 and the other end of the resistor R5 are connected to the positive input terminal V of the comparator Opamp. CM The comparator Opamp's negative input terminal is connected to voltage V. ref The output of the comparator Opamp is connected to one end of resistor R7 and one end of resistor R8, and the PMOS transistor M. 23 The gate terminal and PMOS transistor M 24 The gate terminals are connected, and the other end of resistor R7 is connected to capacitor C. 12 The other end is connected, and the other end of resistor R8 is connected to capacitor C. 13 The other end is connected to the PMOS transistor M. 23 The source and PMOS transistor M 24 The source terminal is connected to the power supply voltage V. DD .

[0041] The aforementioned transformer-based noise cancellation receiver front-end circuit is characterized in that the passive mixer comprises a first passive mixer and a second passive mixer. The input local oscillator signals LO0 and LO1 are connected to the first and second passive mixers.

[0042] The passive mixers described above have the same structure, all including: an NMOS transistor M 25 NMOS transistor M 26 NMOS transistor M 27 NMOS transistor M 28 Capacitor C 14 Capacitor C 15 Capacitor C16 Capacitor C 17 Resistor R9, Resistor R 10 .

[0043] The passive mixers described above have the same structure, all including: an NMOS transistor M 25 NMOS transistor M 26 NMOS transistor M 27 NMOS transistor M 28 Capacitor C 14 Capacitor C 15 Resistor R9, Resistor R 10 .

[0044] NMOS transistor M 25 The source and NMOS transistor M 26 The source end is connected as the input V of the passive mixer. in1 , NMOS transistor M 25 The gate terminal and capacitor C 14 One end of the resistor R9 and the NMOS transistor M 28 The gate terminal is connected, and the capacitor C 14 The other end is connected to the local oscillator signal input LO1, and the other end of resistor R9 is connected to the bias voltage V. LODC1 NMOS transistor M 25 The drain terminal of the NMOS transistor M 27 The drain terminal is connected as the output terminal V of the mixer. out1 NMOS transistor M 26 The gate terminal and capacitor C 15 one end and resistor R 10 One end and NMOS transistor M 27 The gate terminal is connected, and the capacitor C 15 The other end is connected to the local oscillator signal input LO0, and resistor R 10 The other end is connected to the bias voltage V LODC2 NMOS transistor M 26 The drain terminal of the NMOS transistor M 28 The drain terminal is connected as the output terminal V of the mixer. out2 NMOS transistor M 27 The source terminal and NMOS transistor M 28 The source end is connected as the input V of the passive mixer. in2 .

[0045] like Figure 4The simplified structure diagram on the right shows a single-ended structure diagram (cascode stage omitted for simplicity). Noise cancellation based on the cascode structure utilizes transformer coupling, which is more advantageous at high frequencies. Specifically, the noise current at the source and drain of the cascode transistor flows through both the transformer and the common source stage. Since the two noise currents have opposite polarities, noise cancellation is achieved at the output. The noise cancellation conditions are as follows.

[0046]

[0047] Where R S It is the internal resistance of the signal source, g m2 It is the equivalent transconductance of the common-source stage. n is the transformer T at that location. 23 The turns ratio is optimized to 2:1, and the coupling coefficient k is approximately 0.8. If n is too large, it will lead to degradation of the inductor Q value and the coupling coefficient k, thus worsening the noise. Similarly, the turns ratio m of the input transformer T1 is also set to 2:1. Its equivalent input impedance R... in exist The text appears to be a mix of Chinese characters and symbols, making it difficult to translate accurately.

[0048]

[0049] g m1 This is the equivalent transconductance of the common-gate stage. From this equation, we can see that due to the presence of the transformer, the equivalent transconductance of the input common-gate stage is increased. This allows for a reduction in the size of the common-gate stage, which not only reduces noise but also lowers current, achieving power savings. Furthermore, digital switching bit tuning control is applied to capacitors C3-7 to obtain a wider RF frequency coverage. Given that the node Q values ​​at the locations of the two transformers are not high and the relative bandwidth is relatively large, this solution uses coarse tuning to meet the RF bandwidth coverage requirements.

[0050] The baseband transimpedance amplifier uses a two-stage structure. Avoiding the use of a sleeve structure reduces the bandwidth constraint imposed by high-frequency poles. The use of feedforward structures M19 and M20 aims to provide an additional zero to compensate for the poles of the two-stage structure, thereby improving bandwidth and stability. Specifically, the second stage uses a common-mode feedback structure to stabilize the output common-mode level, using R... 7，8 and C 12，13 A Miller compensation structure is constructed to ensure the stability of the common-mode feedback loop. Simulation results show that the baseband amplifier has an open-loop gain of 40dB and a unity-gain bandwidth of 1.2GHz. Figure 3As shown, the receiver circuit uses a 50% duty cycle local oscillator waveform. The noise up-conversion crosstalk between the baseband I and Q channels is isolated by a low-noise amplifier, which reduces the power consumption requirement of the frequency divider. Otherwise, if the classic 2-division structure is used to obtain a 6GHz 25% duty cycle signal as described in reference [1], the power consumption will be surprisingly high.

[0051] This embodiment provides a transformer-based noise cancellation receiver front-end circuit designed and implemented using a 65nm standard CMOS process. The transformer-based noise cancellation receiver front-end circuit proposed in this invention... Figure 3 Provide a simplified topology. The power supply voltage is 1.2V, and the current consumption is indicated below. Figure 4 , Figure 5 The performance metrics obtained are shown below. Figure 7 Simulation results for the input matching characteristic S11 of the circuit are presented. It can be seen that by using a two-bit digital switch to tune capacitor C3 within the range of 0.7~1pF, the desired S11 characteristic can be achieved in the 5.5-6.5GHz frequency band. 11 All less than -10dB Figure 8 Simulation results for the noise figure NF of the circuit are presented. It can be seen that the noise figure is below 2.45dB within the range of 1MHz to 220MHz. Figure 9 Simulation results for the circuit's gain and bandwidth are presented; the 3dB channel bandwidth is approximately 220MHz, and the gain reaches as high as 38dB at low frequencies. Similarly, capacitor C... 4，6 and C 5，7 Two-bit digital switching tuning control is implemented within the ranges of 50~150fF and 260~370fF to ensure optimized gain; graphs are not provided here. Furthermore, the in-band linearity IIP3 of the receiver front-end circuitry is -6dBm.

[0052] Literature [H. Hedayati, W.-FALau, N. Kim, V. Aparin and K. Entesari, "A1.8dBNFBlocker-FilteringNoise-CancelingWidebandReceiverWithSharedTIAin40nmCMOS," in IEEE Journal of Solid-State Circuits, vol.50, no.5, pp.1148-1164, May2015.].

[0053] Reference [D. Murphyetal.,

[0054] "Ablocker-tolerantwidebandnoise-cancellingreceiverwitha2dBnoisefigure,

[0055] "2012IEEEInternationalSolid-StateCircuitsConference,SanFrancisco,CA,USA,2012,pp.74-76.】。

Claims

1. A receiver front-end circuit based on a transformer-based noise cancellation structure, characterized in that, include: Low-noise transconductance amplifier circuit, passive mixer, transimpedance amplifier; The low-noise transconductance amplifier circuit includes: NMOS transistors M1, M2, M3, M4, M5, M6, M7, M8, M9, and M1. 10 NMOS transistor M 11 NMOS transistor M 12 Capacitor C1, Capacitor C2, Variable Capacitor C3, Variable Capacitor C4, Variable Capacitor C5, Variable Capacitor C6, Variable Capacitor C7, Transformer T1, Transformer T2, Transformer T3, Resistor R1, Resistor R2; The transimpedance amplifier includes a first transimpedance amplifier and a second transimpedance amplifier, which have the same structure and both include: capacitor C TIA1 Capacitor C TIA2 Resistance R TIA2 Resistance R TIA1 Baseband TIA unit; The baseband TIA unit's positive input terminal and capacitor C TIA2 one end and resistor R TIA2 One end and the output V of the mixer out2 Connect it and use it as the input terminal V of the transimpedance amplifier. in3 The inverting input terminal of the baseband TIA unit is connected to capacitor C. TIA1 one end and resistor R TIA1 One end and the output V of the mixer out2 Connect it and use it as the input terminal V of the transimpedance amplifier. in2 The positive output terminal of the baseband TIA unit is connected to capacitor C respectively. TIA1 The other end and resistor R TIA1 The other end is connected and serves as the output terminal V of the transimpedance amplifier. out3 The inverting output terminal of the baseband TIA unit is connected to capacitor C respectively. TIA2 The other end and resistor R TIA2 The other end is connected and serves as the output terminal V of the transimpedance amplifier. out4 ; The passive mixer includes a first passive mixer and a second passive mixer. The first and second passive mixers are connected to input local oscillator signals LO0 and LO1. The first and second passive mixers have identical structures and both include an NMOS transistor M. 25 NMOS transistor M 26 NMOS transistor M 27 NMOS transistor M 28 Capacitor C 14 Capacitor C 15 Resistor R9, Resistor R 10 ; NMOS transistor M 25 The source terminal and NMOS transistor M 26 The source end is connected as the input V of the passive mixer. in1 NMOS transistor M 25 The gate terminal and capacitor C 14 One end of the resistor R9 and the NMOS transistor M 28 The gate terminal is connected, and the capacitor C 14 The other end is connected to the local oscillator signal input LO1, and the other end of resistor R9 is connected to the bias voltage V. LODC1 NMOS transistor M 25 The drain terminal of the NMOS transistor M 27 The drain terminal is connected as the output terminal V of the mixer. out1 NMOS transistor M 26 The gate terminal and capacitor C 15 one end and resistor R 10 One end and NMOS transistor M 27 The gate terminal is connected, and the capacitor C 15 The other end is connected to the local oscillator signal input LO0, and resistor R 10 The other end is connected to the bias voltage V LODC2 NMOS transistor M 26 The drain terminal of the NMOS transistor M 28 The drain terminal is connected as the output terminal V of the mixer. out2 NMOS transistor M 27 The source terminal and NMOS transistor M 28 The source end is connected as the input V of the passive mixer. in2 ; One end of capacitor C1 is connected to one end of variable capacitor C3, terminal a of transformer T1, and the source terminal of NMOS transistor M1, serving as the positive input terminal V of the low-noise transconductance amplifier circuit. IN+ The other end of capacitor C1 is connected to the gate terminal of NMOS transistor M3 and connected to the bias voltage V through resistor R1. b1 The connections are as follows: the source terminal of NMOS transistor M3 is grounded; the drain terminal of NMOS transistor M3 is connected to the source terminals of NMOS transistors M5 and M9; the gate terminal of NMOS transistor M1 is connected to the f terminal of transformer T1; and the e terminal of transformer T1 is connected to the bias voltage V. BT The d-terminal of transformer T1 is connected to the gate terminal of NMOS transistor M2, the b-terminal of transformer T1 is grounded, and the c-terminal of transformer T1 is connected to the other end of variable capacitor C3, the source terminal of NMOS transistor M2, and one end of capacitor C2, serving as the negative input terminal V of the low-noise transconductance amplifier circuit. IN- The other end of capacitor C2 is connected to the gate terminal of NMOS transistor M4 and connected to the bias voltage V through resistor R2. b2 Connections: The source of NMOS transistor M4 is grounded; the drain of NMOS transistor M4 is connected to the source of NMOS transistor M8; and the source of NMOS transistor M... 12 The source terminal is connected; the gate terminal of NMOS transistor M5 is connected to the bias circuit V. bc The drain terminal of NMOS transistor M5 is connected to one end of variable capacitor C5 and terminal a of transformer T2 as the first positive output terminal V of the low-noise transconductance amplifier circuit. O1+ The e-terminal and b-terminal of transformer T2 are connected to the power supply voltage V. DD The capacitor C2 is connected to the other end of the variable capacitor C5 and the drain of the NMOS transistor M8 to form the first negative output terminal V of the low-noise transconductance amplifier circuit. O1- The gate terminal of NMOS transistor M8 is connected to the bias circuit V. bc The f terminal of transformer T2 is connected to one end of variable capacitor C4 and the drain terminal of NMOS transistor M6. The d terminal of transformer T2 is connected to the other end of variable capacitor C4 and the drain terminal of NMOS transistor M7. The gate terminals of NMOS transistors M6 and M7 are connected to the bias circuit V. bc The source terminal of NMOS transistor M6 is connected to the drain terminal of NMOS transistor M1, and the drain terminal of NMOS transistor M... 10 Source-end connection: the source of NMOS transistor M7 is connected to the drain of NMOS transistor M2 and the drain of NMOS transistor M... 11 Source connection; NMOS transistor M9 gate terminal connected to bias circuit V bc The drain terminal of NMOS transistor M9 is connected to one end of variable capacitor C7 and terminal a of transformer T3 as the second positive output terminal V of the low-noise transconductance amplifier circuit. O2+ The e-terminal and b-terminal of transformer T3 are connected to the power supply voltage V. DD The capacitor C terminal of transformer T3 is connected to the other end of capacitor C7 and NMOS transistor M. 12 The drain terminal is connected as the second negative output terminal V of the low-noise transconductance amplifier circuit. O1- NMOS transistor M 12 Gate terminal connected to bias circuit V bc The f terminal of transformer T3 is connected to one end of variable capacitor C6 and NMOS transistor M. 10 The drain terminal is connected, and the drain terminal of transformer T3 is connected to the other end of variable capacitor C6 and NMOS transistor M. 11 Drain connection, NMOS transistor M 10 Gate terminal and NMOS transistor M 11 Gate terminal connected to bias circuit V bc .

2. The receiver front-end circuit based on a transformer noise cancellation structure according to claim 1, characterized in that, The baseband TIA units have the same structure, all including: a PMOS transistor M 13 PMOS transistor M 14 PMOS transistor M 15 PMOS transistor M 18 PMOS transistor M 19 PMOS transistor M 20 PMOS transistor M 23 PMOS transistor M 24 NMOS transistor M 16 NMOS transistor M 17 NMOS transistor M 21 NMOS transistor M 22 Capacitor C8, Capacitor C9, Capacitor C 10 Capacitor C 11 Capacitor C 12 Capacitor C 13 Resistors R3, R4, R5, and R6, and the comparator Opamp; The PMOS transistor M 13 The source terminal is connected to the power supply voltage V. DD PMOS transistor M 13 The gate terminal is connected to a bias voltage V b3 PMOS transistor M 13 The drain terminal of the PMOS transistor M 14 The source and PMOS transistor M 15 The source terminal is connected to the PMOS transistor M. 14 The gate terminal and PMOS transistor M 19 The gate terminal is connected as the input terminal V of the baseband TIA unit. in4 PMOS transistor M 14 The drain terminal is connected to one end of capacitor C8 and one end of resistor R3 and NMOS transistor M. 16 The drain terminal and NMOS transistor M 22 The gate connection of the NMOS transistor M 16 The gate terminal of the NMOS transistor M 17 The gate terminal of the NMOS transistor is connected to the other end of capacitor C8, the other end of resistor R3, one end of capacitor C9, and one end of resistor R4. 16 The source terminal and NMOS transistor M 17 The source terminal is connected to ground, and the NMOS transistor M 17 The drain terminal is connected to the other end of capacitor C9 and the other end of resistor R4 and PMOS transistor M. 15 The drain terminal and NMOS transistor M 21 The gate connection of the PMOS transistor M 15 The gate terminal and PMOS transistor M 20 The gate terminal is connected as the input terminal V of the baseband TIA unit. in3 PMOS transistor M 20 The source terminal and PMOS transistor M 18 The drain terminal and PMOS transistor M 19 The source terminal is connected to the PMOS transistor M. 18 The drain terminal is connected to a bias voltage V b4 PMOS transistor M 18 The source terminal is connected to the power supply voltage V. DD PMOS transistor M 19 The drain terminal and capacitor C 10 One end of the resistor R5 and the NMOS transistor M 21 The drain terminal and capacitor C 13 One end and PMOS transistor M 24 The drain terminal is connected as the output terminal V of the baseband TIA unit. out3 NMOS transistor M 21 The source terminal and NMOS transistor M 22 The source terminal is connected to ground, and the NMOS transistor M 22 The drain terminal and capacitor C 11 One end of the resistor R6 and the PMOS transistor M 20 The drain terminal and capacitor C 12 One end and PMOS transistor M 23 The drain terminal is connected as the output terminal V of the baseband TIA unit. out4 Capacitor C 11 The other end is connected to capacitor C 10 The other end of the resistor R6 and the other end of the resistor R5 are connected to the positive input terminal V of the comparator Opamp. CM The comparator Opamp's negative input terminal is connected to voltage V. ref The output of the comparator Opamp is connected to one end of resistor R7 and one end of resistor R8, and the PMOS transistor M. 23 The gate terminal and PMOS transistor M 24 The gate terminals are connected, and the other end of resistor R7 is connected to capacitor C. 12 The other end is connected, and the other end of resistor R8 is connected to capacitor C. 13 The other end is connected to the PMOS transistor M. 23 The source and PMOS transistor M 24 The source terminal is connected to the power supply voltage V. DD .

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