A composite substrate containing a charge trapping layer, a composite thin film and a method for preparing the same
By introducing a charge trapping layer into the semiconductor device, the surface parasitic conductivity effect caused by carrier aggregation is resolved, the electrical performance stability of the device is improved, and the influence of carriers on the device is reduced.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- JINAN JINGZHENG ELECTRONICS
- Filing Date
- 2023-05-30
- Publication Date
- 2026-06-05
AI Technical Summary
In existing semiconductor devices, when the insulating dielectric layer comes into contact with the semiconductor material, there is a surface parasitic conductivity effect caused by the accumulation of charge carriers, which affects the stability of device performance, and the presence of free charges has an adverse effect on subsequent devices.
A charge trapping layer is introduced between the semiconductor substrate and the insulating layer. The charge trapping layer is formed by ion implantation doping and interfacial thermal diffusion doping to trap interfacial charges and suppress carrier aggregation.
It effectively reduces the impact of charge carriers on the device, suppresses surface parasitic conductivity effects, and improves the stability of the device's electrical performance.
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Figure CN116613059B_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of semiconductor technology, and specifically relates to a composite substrate containing a charge trapping layer, a composite thin film, and a method for preparing the same. Background Technology
[0002] With the rapid development of information technology and people's aspirations and pursuit of higher quality, thin film materials have become increasingly important materials in today's semiconductor industry because they meet the requirements of electronic components towards miniaturization, low power consumption, and high performance. Thin film materials mainly consist of an uppermost active layer, a middle insulating dielectric layer, and a semiconductor substrate.
[0003] When an insulating dielectric layer comes into contact with a semiconductor material, the presence of defect energy levels at the interface attracts charge carriers from the nearby semiconductor material to concentrate near the interface, resulting in parasitic surface conductance (PSC). This effect can have a detrimental impact on the final performance of some components, such as the electrical performance stability of metal-oxide-semiconductor (MOS) devices, and the RF losses of some radio frequency devices such as amplifiers, filters, and modulators.
[0004] The existing solution involves introducing a carrier-trap-rich film between the semiconductor substrate and the insulating layer to trap concentrated carriers and suppress the PSC effect. However, this approach has the following drawbacks: free charges also exist at the interface between the active layer and the intermediate insulating dielectric layer, and the presence of these charges can have adverse effects on subsequent devices. Summary of the Invention
[0005] In view of the above-mentioned problems in the prior art, the first technical problem to be solved by the present invention is to provide a composite substrate containing a charge trapping layer, and to prepare a composite thin film using the composite substrate; the second technical problem to be solved by the present invention is to provide a method for preparing the composite substrate and the composite thin film; the third technical problem to be solved by the present invention is to provide the application of the composite substrate and the composite thin film in the preparation of electronic components.
[0006] To address the above problems, the present invention provides the following technical solution:
[0007] In a first aspect, a composite substrate containing a charge trapping layer comprises, in sequence: a substrate, a defect layer, an isolation layer, and a charge trapping layer; wherein the charge trapping layer is prepared by ion implantation doping or interfacial thermal diffusion doping on the upper surface of the defect layer, followed by partial oxidation of the doped defect layer.
[0008] As a preferred embodiment of the present invention, after partial oxidation of the defect layer after doping treatment, the portion of the defect layer doped with ions is oxidized into a charge trapping layer, and the portion of the defect layer not doped with ions is oxidized into an isolation layer.
[0009] As a preferred embodiment of the present invention, the doping depth is controlled between 1 and 10 nm.
[0010] As a preferred embodiment of the present invention, the ion implantation doping method is as follows: using Ge + and / or P 5+ Ion implantation doping was performed; the ion implantation dose was ≤1×10⁻⁶. 14 ions / cm 2 The ion implantation energy is 20-30 keV. After ion implantation doping, RCA cleaning is used, followed by SCA1 cleaning solution.
[0011] As a preferred embodiment of the present invention, the interface thermal diffusion doping method is as follows: the upper surface of the defect layer is bonded to the Ge wafer, the bonding is achieved by interface thermal diffusion annealing under vacuum or inert atmosphere conditions, and the Ge wafer is cleaned, peeled off and dried after annealing.
[0012] As a preferred embodiment of the present invention, the upper surface of the defect layer is bonded to the Ge wafer, and under a He atmosphere (positive pressure 0.1 Pa), the positive pressure is 0.1 Pa. The wafer is then thermally diffused and annealed at 400-600°C for 10-14 hours in a discharge plasma sintering furnace. After annealing, the Ge wafer is removed by RCA cleaning, and the cleaning solution is finished by SCA1 cleaning solution. The wafer is then centrifuged and dried.
[0013] As a preferred embodiment of the present invention, the material is subjected to thermal diffusion annealing at 500°C for 12 hours in a discharge plasma sintering furnace.
[0014] In a second aspect, a composite thin film containing a charge trapping layer includes a composite substrate and a thin film layer composited on an isolation layer of the composite substrate.
[0015] As a preferred embodiment of the present invention, the charge trapping layer is used to trap the charge between the interface of the isolation layer and the thin film layer.
[0016] Thirdly, a method for preparing a composite thin film containing a charge trapping layer includes the following steps:
[0017] S1. Prepare the substrate and thin film substrate;
[0018] S2. A defect layer is prepared on a substrate. The defect layer is prepared by deposition on the substrate, etching the substrate, or implanting the substrate to generate implantation damage to form a defect layer. Ion implantation doping or interfacial thermal diffusion doping is performed on the upper surface of the defect layer. Then, the doped defect layer is partially oxidized. The part of the defect layer doped with ions is oxidized into a charge trapping layer, and the part of the defect layer not doped with ions is oxidized into an isolation layer to form a composite substrate.
[0019] S3. Ions are implanted into the process surface of the thin film substrate using the ion implantation method to obtain a thin film substrate implantation sheet, wherein the thin film substrate implantation sheet comprises a thin film layer, an implantation layer and a residual material layer in sequence.
[0020] S4. The thin film substrate is injected and the charge trapping layer of the composite substrate is bonded to form a bonded body. The bonded body is heat-treated to peel off the residual layer along the injection layer from the bonded body, and the thin film layer is transferred to the composite substrate to form a composite thin film.
[0021] In this example, the substrate material can be any material that can be used as a substrate in the prior art, without special limitation, and can be specifically selected according to actual needs. For example, it can be silicon, sapphire, quartz, silicon carbide, silicon nitride, lithium niobate, lithium tantalate, or quartz glass.
[0022] In this example, the thin film substrate refers to a base material with a certain thickness used to obtain the thin film layer. The material of the thin film substrate can be any material that can be used as a thin film substrate in the prior art, without special limitation, and can be specifically selected according to actual needs. For example, it can be lithium niobate crystal, lithium tantalate crystal, gallium arsenide, silicon, ceramic, lithium tetraborate, gallium arsenide, potassium titanium oxyphosphate, rubidium titanium oxyphosphate crystal, or quartz.
[0023] As a preferred embodiment of the present invention, the material of the defect layer is selected from at least one of polycrystalline or amorphous silicon carbide layer, silicon layer, silicon nitride layer or polycrystalline germanium.
[0024] As a preferred embodiment of the present invention, a defect layer material is deposited on the substrate by a deposition method, for example, by depositing polycrystalline silicon, polycrystalline silicon carbide, or polycrystalline germanium to form a polycrystalline defect layer.
[0025] As a preferred embodiment of the present invention, the substrate wafer is etched by etching or implanted by implantation to generate implantation damage, thereby forming an amorphous silicon defect layer.
[0026] Because of the presence of a certain density of lattice defects in the defect layer, it is able to capture charge carriers between the isolation layer and the substrate, preventing these charge carriers from causing charge carrier aggregation at the interface between the isolation layer and the substrate, thereby reducing the loss of the composite film.
[0027] As a preferred embodiment of the present invention, the thickness of the defect layer is 300 nm to 5000 nm.
[0028] As a preferred embodiment of the present invention, the method for preparing the isolation layer can be thermal oxidation. When the defect layer is a polycrystalline silicon layer, the isolation layer is silicon dioxide when the polycrystalline silicon layer is oxidized.
[0029] As a preferred embodiment of the present invention, the polycrystalline silicon layer is subjected to oxidation treatment, wherein the side of the polycrystalline silicon layer away from the substrate is oxidized to form a silicon dioxide layer, and the side of the polycrystalline silicon layer close to the substrate is not oxidized; the portion of the polycrystalline silicon layer doped with ions is oxidized to form a doped silicon dioxide layer, i.e., a charge trapping layer.
[0030] As a preferred embodiment of the present invention, the oxidation temperature is 900–1000°C.
[0031] As a preferred embodiment of the present invention, the thickness of the isolation layer is 200nm to 3000nm.
[0032] In this example, when ions are implanted into the process surface of the thin film substrate to obtain a thin film substrate implanted wafer based on the ion implantation method, there is no particular limitation on the ion implantation method, and any ion implantation method in the prior art can be used.
[0033] As a preferred embodiment of the present invention, the injected ions are ions that can generate gas through heat treatment.
[0034] As a preferred embodiment of the present invention, the implanted ions are selected from one of hydrogen ions, helium ions, nitrogen ions, oxygen ions, and argon ions, with hydrogen ions or helium ions being preferred.
[0035] As a preferred embodiment of the present invention, when the injected ion is a hydrogen ion, the injection dose is 3 × 10⁻⁶. 16 ions / cm 2 ~8×10 16 ions / cm 2 The injected energy is 100keV to 400keV.
[0036] As a preferred embodiment of the present invention, when the injected ion is a hydrogen ion, the injection dose is 4 × 10⁻⁶. 16 ions / cm 2 The injected energy is 180 keV.
[0037] As a preferred embodiment of the present invention, when the injected ion is helium ion, the injection dose is 1×10⁻⁶. 16 ions / cm 2 ~1×10 17 ions / cm 2The injected energy is 50keV to 1000keV.
[0038] As a preferred embodiment of the present invention, when the injected ion is helium ion, the injection dose is 4 × 10⁻⁶. 16 ions / cm 2 The injected energy is 200 keV.
[0039] As a preferred embodiment of the present invention, when the injected ion is a nitrogen ion, the injection dose is 2 × 10⁻⁶. 16 ions / cm 2 The injected energy is 200 keV.
[0040] As a preferred embodiment of the present invention, when the injected ion is an oxygen ion, the injection dose is 1×10⁻⁶. 16 ions / cm 2 The injected energy is 300 keV.
[0041] In this example, the thickness of the thin film is adjusted by changing the depth of ion implantation, and the depth of ion implantation is directly proportional to the thickness of the thin film.
[0042] In this example, the width of the implanted layer is adjusted by adjusting the ion implantation dose, which is directly proportional to the diffusion width of the implanted layer.
[0043] In this example, the bonding method for bonding the thin film layer of the thin film substrate implantation sheet to the charge trapping layer of the composite substrate to form a bond body is not particularly limited. Any bonding method in the prior art can be used. For example, the bonding surface of the thin film substrate implantation sheet can be surface activated, the bonding surface of the composite substrate can also be surface activated, and then the two activated surfaces can be bonded to obtain a bond body.
[0044] In this example, the method of surface activation of the bonding surface of the thin film substrate implantation sheet is not particularly limited. Any existing method of surface activation of the bonding surface of the thin film can be used, such as plasma activation or chemical solution activation.
[0045] In this example, the method of surface activation of the bonding surface of the composite substrate is not particularly limited. Any existing method that can be used to activate the bonding surface of the composite substrate can be adopted, such as plasma activation.
[0046] As a preferred embodiment of the present invention, the bonded body is placed in a heating device and subjected to annealing heat treatment at a preset temperature. During the annealing heat treatment, bubbles are formed in the injection layer and connect together, causing the injection layer to crack until the residual material layer is peeled off from the bonded body along the injection layer, leaving a thin film layer.
[0047] As a preferred embodiment of the present invention, the high-temperature annealing process is carried out in a vacuum environment or under a protective atmosphere formed by at least one inert gas.
[0048] As a preferred embodiment of the present invention, the annealing heat treatment includes a first annealing treatment and a second annealing treatment, wherein the temperature of the annealing heat treatment is 100-600°C.
[0049] As a preferred embodiment of the present invention, the temperature of the annealing treatment is 100-300°C, the purpose of which is to peel off the residual material layer and separate the film layer from the residual material layer.
[0050] As a preferred embodiment of the present invention, the temperature of the second annealing treatment is 300-600°C, the purpose of which is to restore the damage to the thin film layer caused by ion implantation, so that the properties of the thin film layer are close to the properties of the thin film substrate.
[0051] As a preferred embodiment of the present invention, the bonding body is subjected to annealing heat treatment to leave a thin film layer. After the thin film layer is transferred to the composite substrate, the thin film layer is further polished and thinned to 50-3000 nm, for example 400 nm, to form a composite film.
[0052] Fourthly, the application of the composite substrate containing the charge trapping layer or the composite thin film containing the charge trapping layer in the fabrication of electronic components is also within the scope of protection of this invention.
[0053] Compared with the prior art, the present invention has the following beneficial effects:
[0054] 1) The composite film of the present invention adds a charge trapping layer between the isolation layer and the film layer to trap the interface charge, which can reduce the impact of charge on subsequent devices.
[0055] 2) The composite substrate and / or composite film of this application have a defect layer rich in carrier traps to trap carriers and suppress the PSC effect. Attached Figure Description
[0056] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0057] Figure 1 This diagram illustrates the process for preparing a composite thin film containing a charge trapping layer according to the present invention.
[0058] Figure 2 This embodiment shows a schematic diagram of the layer structure of a composite substrate containing a charge trapping layer.
[0059] Figure 3 This diagram illustrates the layer structure of a composite thin film containing a charge trapping layer provided in this embodiment.
[0060] Explanation of reference numerals in the attached figures:
[0061] 100-Thin film substrate, 200-Composite substrate, 300-Bonding body, 110-Mass layer, 120-Implement layer, 130-Thin film layer, 210-Substrate, 220-Defect layer, 230-Isolation layer, 240-Charge trapping layer. Detailed Implementation
[0062] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0063] Example 1
[0064] See Figure 1 Embodiment 1 of this application provides a composite substrate containing a charge trapping layer, comprising the following steps:
[0065] S100: Prepare thin film substrate 100 and substrate 210 respectively;
[0066] S200. A defect layer 220 is prepared on a substrate 210. The defect layer 220 is prepared by deposition on the substrate 210, etching the substrate 210, or implanting the substrate 210 to generate implantation damage, thereby forming the defect layer 220. Ion implantation doping or interfacial thermal diffusion doping is performed on the upper surface of the defect layer 220. Then, the doped defect layer is partially oxidized. The part of the defect layer doped with ions is oxidized into a charge trapping layer 240, and the part of the defect layer not doped with ions is oxidized into an isolation layer 230, thereby forming a composite substrate 200.
[0067] The substrate can be a single-layer substrate or a composite substrate; this application does not limit its application in this regard. The materials of each layer in a composite substrate can be the same or different; this application also does not limit its application in this regard. The substrate material can be silicon, sapphire, quartz, silicon carbide, silicon nitride, lithium niobate, lithium tantalate, or quartz glass; this application does not limit its application in this regard.
[0068] A thin film substrate refers to a base material with a certain thickness used to obtain a thin film layer. The material of the thin film substrate can be any material that can be used as a thin film substrate in the prior art, without special limitation, and can be specifically selected according to actual needs. For example, it can be lithium niobate crystal, lithium tantalate crystal, gallium arsenide, silicon, ceramics, lithium tetraborate, gallium arsenide, potassium titanium oxyphosphate, rubidium titanium oxyphosphate crystal, or quartz.
[0069] Figure 2 A schematic diagram of the layer structure of a composite substrate is shown. The composite substrate 200 is a material including a substrate 210, a defect layer 220, an isolation layer 230 and a charge trapping layer 240, obtained by a series of processing of a substrate.
[0070] S300, Ions are implanted into the thin film substrate 100 by ion implantation, and the thin film substrate 100 is sequentially divided into a residual layer 110, an implantation layer 120 and a thin film layer 130.
[0071] Ions are implanted into the process surface of a thin film substrate using ion implantation to obtain a thin film substrate implanted wafer. There are no particular restrictions on the ion implantation method, and any existing ion implantation method can be used.
[0072] The injected ions are those that can generate gas through heat treatment. For example, the injected ions can be hydrogen ions, helium ions, nitrogen ions, oxygen ions, or argon ions.
[0073] S400, the ion-implanted thin film substrate 100, i.e., the thin film substrate implantation sheet, is bonded to the composite substrate 200 to obtain the bonded body 300.
[0074] This application does not impose any particular limitation on the bonding method. Any bonding method in the prior art can be used. For example, the bonding surface of the ion-implanted thin film substrate can be surface activated, the bonding surface of the composite substrate can also be surface activated, and then the two activated surfaces can be bonded to obtain a bonded body.
[0075] S500, the bonded body 300 is heat-treated to separate the residual layer 110 from the thin film layer 130, thus obtaining a composite film.
[0076] The bonded composite is subjected to annealing heat treatment at 180–600°C for 1–100 hours. During this heat treatment, bubbles form within the implanted layer; for example, hydrogen ions form hydrogen gas, and helium ions form helium gas. As the heat treatment progresses, the bubbles within the implanted layer merge together, eventually causing the implanted layer to crack and separate from the thin film layer. This allows the excess layer to be peeled off the bonded composite, forming a thin film layer on the top surface of the treated substrate. The thin film layer is then polished and thinned to 50–3000 nm, for example, 400 nm, to obtain the composite thin film.
[0077] Figure 3 A schematic diagram of the layer structure of a composite thin film is shown; it includes a composite substrate 200 and a thin film layer 130 composited on a charge trapping layer 240 on the composite substrate 200.
[0078] Example 2
[0079] A method for preparing a composite thin film containing a charge trapping layer includes the following steps:
[0080] Step 1: Prepare 6-inch silicon wafers and lithium tantalate wafers. Use the silicon wafer as the substrate and the lithium tantalate wafer as the thin film substrate. Fix the silicon wafer or the lithium tantalate wafer on the porous ceramic chuck of the polishing equipment and perform chemical mechanical polishing to obtain a smooth surface. Then, perform semiconductor RCA cleaning on both types of wafers to obtain a clean surface.
[0081] Step 2: Polycrystalline silicon is deposited on the cleaned silicon wafer using a low-pressure chemical vapor deposition (LPVCD) process. The deposition temperature is controlled at 580-650℃ and the deposition thickness is 300nm.
[0082] Step 3: Use Ge + P 5+ Ion implantation doping was performed on the surface of polysilicon (PolySi) with an implantation rate ≤ 1E14 ions / cm². 2 The ion implantation process is carried out at an energy of 20-30 keV. After ion implantation, the ion is cleaned with RCA (SC1 cleaning solution to finish), and then PolySi is grown using the PolySi preparation process with a thickness of ≤100 nm. After annealing in an atmosphere for more than 8 hours, the ion is etched for 10 μm with an etchant solution, and then cleaned with RCA (SC2 cleaning solution to finish).
[0083] Step 4: The polycrystalline silicon layer with ions implanted on the surface is partially oxidized using an oxidation method. The polycrystalline silicon with implanted ions is oxidized into a silicon dioxide layer with ions, which is the charge trapping layer. The polycrystalline silicon without implanted ions is oxidized into an isolation silicon dioxide layer, and finally a composite substrate is formed.
[0084] Step 5: Nitrogen ions are implanted into the treated lithium tantalate wafer using ion implantation, causing the lithium tantalate wafer to be sequentially divided into a residual layer, an implantation layer, and a lithium tantalate thin film layer starting from the implantation surface. The implanted nitrogen ions are distributed in the implantation layer, resulting in a lithium tantalate implanted wafer. The implantation parameters for nitrogen ion implantation are: implantation dose of 2 × 10⁻⁶. 16 ions / cm 2 The injected energy is 200 keV.
[0085] Step 6: Clean the thin film layer and charge trapping layer of the single-crystal lithium tantalate wafer implantation wafer. Use plasma bonding to bond the process surface of the cleaned lithium tantalate thin film layer to the charge trapping layer to form a bond. This application does not particularly limit the method of surface activation of the process surface of the lithium tantalate thin film. Any existing method for surface activation of the process surface of the thin film can be used, such as plasma activation and chemical solution activation. Similarly, this application does not particularly limit the method of surface activation of the bonding surface of the charge trapping layer. Any existing method for surface activation of the bonding surface of the charge trapping layer can be used, such as plasma activation.
[0086] Step 7: The bonded material is then placed in a heating device and annealed at a high temperature until the residual layer separates from the bonded material to form a lithium tantalate composite film. The high-temperature annealing process is carried out in a vacuum environment or under a protective atmosphere formed by at least one of nitrogen and other inert gases. The annealing temperature is 100–600°C, and the annealing time is 1 minute–48 hours. This includes a first anneal and a second anneal. The first anneal, with a temperature range of 100–300°C, aims to remove the residual layer, separating the film layer from the residual layer. The second anneal, with a temperature range of 300–600°C, aims to eliminate implantation damage. This step can increase the bonding force by more than 10 MPa and recover from the damage caused by ion implantation to the film layer, making the obtained lithium tantalate film layer closely resemble the properties of a lithium tantalate wafer. The bonded material is placed in a heating device and held at a predetermined temperature for a predetermined period of time. During this process, the ions in the implanted layer undergo a chemical reaction, transforming into gas molecules or atoms and generating tiny bubbles. As the heating time or temperature increases, the number of bubbles increases, and their volume gradually expands. When these bubbles coalesce, the residual mass layer separates from the implanted layer, allowing the thin film layer to transfer onto the isolation layer and form a composite structure. Next, the composite structure can be placed in a heating device and held at a predetermined temperature for a predetermined period to eliminate damage caused by the ion implantation process. Then, the thin film layer on the isolation layer can be ground and polished to a predetermined thickness to obtain the composite thin film.
[0087] Step 8: Fix the composite film onto the porous ceramic chuck of the polishing equipment, then perform chemical mechanical polishing to remove 80nm, and finally perform RCA cleaning to obtain the composite film.
[0088] Example 3
[0089] A method for preparing a composite thin film containing a charge trapping layer includes the following steps:
[0090] Step 1: Prepare 6-inch silicon wafers and lithium niobate wafers. Use the silicon wafer as the substrate and the lithium niobate wafer as the thin film substrate. Fix the silicon wafer or the lithium niobate wafer on the porous ceramic chuck of the polishing equipment and perform chemical mechanical polishing to obtain a smooth surface. Then, perform semiconductor RCA cleaning on both types of wafers to obtain a clean surface.
[0091] Step 2: Polycrystalline silicon is deposited on the cleaned silicon wafer using a low-pressure chemical vapor deposition (LPVCD) process. The deposition temperature is controlled at 580-650℃ and the deposition thickness is 300nm.
[0092] Step 3: Use Ge + P 5+ Ion implantation doping was performed on the surface of polysilicon (PolySi) with an implantation rate ≤ 1E14 ions / cm². 2 The ion implantation process is carried out at an energy of 20-30 keV. After ion implantation, the ion is cleaned with RCA (SC1 cleaning solution to finish), and then PolySi is grown using the PolySi preparation process with a thickness of ≤100 nm. After annealing in an atmosphere for more than 8 hours, the ion is etched for 10 μm with an etchant solution, and then cleaned with RCA (SC2 cleaning solution to finish).
[0093] Step 4: The polycrystalline silicon layer with ions implanted on the surface is partially oxidized using an oxidation method. The polycrystalline silicon with implanted ions is oxidized into a silicon dioxide layer with ions, which is the charge trapping layer. The polycrystalline silicon without implanted ions is oxidized into an isolation silicon dioxide layer, and finally a composite substrate is formed.
[0094] Step 5: The lithium niobate wafer processed in Step 1 is implanted with oxygen ions using a stripping ion implantation method. This process sequentially divides the lithium niobate wafer from the implantation surface into a residual mass layer, an implantation layer, and a thin film layer. The implanted oxygen ions are distributed in the implantation layer, resulting in a single-crystal lithium niobate wafer implantation sheet. The implantation parameters for the stripping ion implantation method are: an ion implantation depth of 440 nm, an implantation energy of 300 keV, and an implantation dose of 1 × 10⁻⁶. 16 ions / cm 2 .
[0095] Step 6: Clean the thin film layer and charge trapping layer of the single-crystal lithium niobate wafer implantation wafer. Use plasma bonding to bond the process surface of the cleaned lithium niobate thin film layer to the charge trapping layer to form a bond. This application does not particularly limit the method of surface activation of the process surface of the lithium niobate thin film. Any existing method for surface activation of the process surface of the thin film can be used, such as plasma activation and chemical solution activation. Similarly, this application does not particularly limit the method of surface activation of the bonding surface of the charge trapping layer. Any existing method for surface activation of the bonding surface of the charge trapping layer can be used, such as plasma activation.
[0096] Step 7: The bonded body is then placed in a heating device and annealed at a high temperature until the residual layer separates from the bonded body to form a lithium niobate composite film. The heat preservation process is carried out in a vacuum environment or in a protective atmosphere formed by at least one gas in nitrogen and an inert gas. The annealing temperature is 100-600°C, and the annealing time is 1 minute to 48 hours, including a first anneal and a second anneal. The first anneal, with a temperature range of 100-300°C, aims to peel off the residual layer, allowing the film layer to separate from the residual layer. The second anneal, with a temperature range of 300-600°C, aims to eliminate implantation damage. This step can increase the bonding force to greater than 10 MPa and can restore the film layer damaged by ion implantation, making the obtained lithium niobate film layer close to the properties of a lithium niobate wafer. The bonded body is placed in a heating device and held at a predetermined temperature for a predetermined time. During this process, the ions in the implanted layer undergo a chemical reaction to become gas molecules or atoms, generating tiny bubbles. As the heating time or temperature increases, the number of bubbles increases, and their volume gradually increases. When these bubbles coalesce, the residual mass layer separates from the implanted layer, allowing the thin film layer to transfer onto the isolation layer and form a composite structure. Next, the composite structure can be placed in a heating device and held at a predetermined temperature for a predetermined time to eliminate damage caused by the ion implantation process. Then, the thin film layer on the isolation layer can be ground and polished to a predetermined thickness to obtain the composite thin film.
[0097] Step 8: Fix the composite film onto the porous ceramic chuck of the polishing equipment, then perform chemical mechanical polishing to remove 20nm, and finally perform RCA cleaning to obtain the composite film.
[0098] Example 4
[0099] A method for preparing a composite thin film containing a charge trapping layer includes the following steps:
[0100] Step 1: Prepare 3-inch silicon wafers and lithium niobate wafers. Use the silicon wafer as the substrate and the lithium niobate wafer as the thin film substrate. Fix the silicon wafer or the lithium niobate wafer on the porous ceramic chuck of the polishing equipment and perform chemical mechanical polishing to obtain a smooth surface. Then, perform semiconductor RCA cleaning on both types of wafers to obtain a clean surface.
[0101] Step 2: A polycrystalline silicon layer is fabricated on the cleaned silicon wafer using PECVD (including but not limited to sputtering, evaporation, electroplating, etc.). The thickness of the polycrystalline silicon layer is 1 μm.
[0102] Step 3: Clean the PolySi wafer with RCA (DHF finish), dry with IPA, and bond the PolySi and Ge wafers together. Under a He (positive pressure 0.1 Pa) atmosphere, perform thermal diffusion annealing at 500℃ for 12 hours in a discharge plasma sintering furnace. After annealing, clean with RCA (SC1 finish) to remove the Ge wafer, centrifuge and dry. The doping concentration is controlled at about 1%, and the doping depth is controlled at 1-10 nm.
[0103] Step 4: The PolySi wafer with ion implantation on its surface is partially oxidized using an oxidation method. The ion-implanted PolySi wafer is oxidized into an ion-containing silicon dioxide layer, which is the charge trapping layer. The PolySi wafer without ion implantation is oxidized into an isolation silicon dioxide layer, ultimately forming a composite substrate.
[0104] Step 5: Implant He onto the lithium niobate wafer processed in Step 1 using the stripping ion implantation method. + This process divides the lithium niobate wafer sequentially from the implantation surface into a residual mass layer, an implantation layer, and a thin film layer. The implanted He... + Ions are distributed in the implantation layer to obtain a single-crystal lithium niobate wafer implantation sheet.
[0105] He was implanted using the stripping ion implantation method. + The implantation parameters were: ion implantation depth of 840 nm, implantation energy of 250 keV, and implantation dose of 2 × 10⁻⁶. 16 ions / cm 2 .
[0106] Step 6: Clean the thin film layer and charge trapping layer of the single-crystal lithium niobate wafer implantation wafer. Use plasma bonding to bond the process surface of the cleaned lithium niobate thin film layer to the charge trapping layer to form a bond. This application does not particularly limit the method of surface activation of the process surface of the lithium niobate thin film. Any existing method for surface activation of the process surface of the thin film can be used, such as plasma activation and chemical solution activation. Similarly, this application does not particularly limit the method of surface activation of the bonding surface of the charge trapping layer. Any existing method for surface activation of the bonding surface of the charge trapping layer can be used, such as plasma activation.
[0107] Step 7: The bonded body is then placed in a heating device and annealed at a high temperature until the residual layer separates from the bonded body to form a lithium niobate composite film. The heat preservation process is carried out in a vacuum environment or in a protective atmosphere formed by at least one gas in nitrogen and an inert gas. The annealing temperature is 100-600°C, and the annealing time is 1 minute to 48 hours, including a first anneal and a second anneal. The first anneal, with a temperature range of 100-300°C, aims to peel off the residual layer, allowing the film layer to separate from the residual layer. The second anneal, with a temperature range of 300-600°C, aims to eliminate implantation damage. This step can increase the bonding force to greater than 10 MPa and can restore the film layer damaged by ion implantation, making the obtained lithium niobate film layer close to the properties of a lithium niobate wafer. The bonded body is placed in a heating device and held at a predetermined temperature for a predetermined time. During this process, the ions in the implanted layer undergo a chemical reaction to become gas molecules or atoms, generating tiny bubbles. As the heating time or temperature increases, the number of bubbles increases, and their volume gradually increases. When these bubbles coalesce, the residual mass layer separates from the implanted layer, allowing the thin film layer to transfer onto the isolation layer and form a composite structure. Next, the composite structure can be placed in a heating device and held at a predetermined temperature for a predetermined time to eliminate damage caused by the ion implantation process. Then, the thin film layer on the isolation layer can be ground and polished to a predetermined thickness to obtain the composite thin film.
[0108] Step 8: Fix the composite film onto the porous ceramic chuck of the polishing equipment, then perform chemical mechanical polishing to remove 10nm, and finally perform RCA cleaning to obtain a clean composite film.
[0109] Example 5
[0110] A method for preparing a composite thin film containing a charge trapping layer includes the following steps:
[0111] Step 1: Prepare 4-inch silicon wafers and lithium niobate wafers. Use the silicon wafer as the substrate and the lithium niobate wafer as the thin film substrate. Fix the silicon wafer or the lithium niobate wafer on the porous ceramic chuck of the polishing equipment and perform chemical mechanical polishing to obtain a smooth surface. Then, perform semiconductor RCA cleaning on both types of wafers to obtain a clean surface.
[0112] Step 2: Argon ions are implanted into the cleaned silicon wafer using ion implantation to create a damaged layer of monocrystalline silicon. After damage, it becomes an amorphous silicon layer with a thickness of 5 μm.
[0113] Step 3: Clean the PolySi wafer with RCA (DHF finish), dry with IPA, and bond the PolySi and Ge wafers together. Under a He (positive pressure 0.1 Pa) atmosphere, perform thermal diffusion annealing at 500℃ for 12 hours in a discharge plasma sintering furnace. After annealing, clean with RCA (SC1 finish) to remove the Ge wafer, centrifuge and dry. The doping concentration is controlled at about 1%, and the doping depth is controlled at 1-10 nm.
[0114] Step 4: The amorphous silicon layer with ions implanted on the surface is partially oxidized by oxidation. The amorphous silicon with implanted ions is oxidized into a silicon dioxide layer with ions, which is the charge trapping layer. The amorphous silicon without implanted ions is oxidized into an isolation silicon dioxide layer.
[0115] Step 5: Implant He onto the lithium niobate wafer processed in Step 1 using the stripping ion implantation method. + This process divides the lithium niobate wafer sequentially from the implantation surface into a residual mass layer, an implantation layer, and a thin film layer. The implanted He... + Ions are distributed in the implantation layer to obtain a single-crystal lithium niobate wafer implantation sheet.
[0116] He was implanted using the stripping ion implantation method. + At that time, the implantation dose parameters were: ion implantation depth of 840 nm, implantation energy of 250 keV, and implantation dose of 2 × 10⁻⁶. 16 ions / cm 2 .
[0117] Step 6: Clean the thin film layer and charge trapping layer of the single-crystal lithium niobate wafer implantation wafer. Use plasma bonding to bond the process surface of the cleaned lithium niobate thin film layer to the charge trapping layer to form a bond. This application does not particularly limit the method of surface activation of the process surface of the lithium niobate thin film. Any existing method for surface activation of the process surface of the thin film can be used, such as plasma activation and chemical solution activation. Similarly, this application does not particularly limit the method of surface activation of the bonding surface of the charge trapping layer. Any existing method for surface activation of the bonding surface of the charge trapping layer can be used, such as plasma activation.
[0118] Step 7: The bonded body is then placed in a heating device and annealed at a high temperature until the residual layer separates from the bonded body to form a lithium niobate composite film. The heat preservation process is carried out in a vacuum environment or in a protective atmosphere formed by at least one gas in nitrogen and an inert gas. The annealing temperature is 100-600°C, and the annealing time is 1 minute to 48 hours, including a first anneal and a second anneal. The first anneal, with a temperature range of 100-300°C, aims to peel off the residual layer, allowing the film layer to separate from the residual layer. The second anneal, with a temperature range of 300-600°C, aims to eliminate implantation damage. This step can increase the bonding force to greater than 10 MPa and can restore the film layer damaged by ion implantation, making the obtained lithium niobate film layer close to the properties of a lithium niobate wafer. The bonded body is placed in a heating device and held at a predetermined temperature for a predetermined time. During this process, the ions in the implanted layer undergo a chemical reaction to become gas molecules or atoms, generating tiny bubbles. As the heating time or temperature increases, the number of bubbles increases, and their volume gradually increases. When these bubbles coalesce, the residual mass layer separates from the implanted layer, allowing the thin film layer to transfer onto the isolation layer and form a composite structure. Next, the composite structure can be placed in a heating device and held at a predetermined temperature for a predetermined time to eliminate damage caused by the ion implantation process. Then, the thin film layer on the isolation layer can be ground and polished to a predetermined thickness to obtain the composite thin film.
[0119] Step 8: Fix the composite film onto the porous ceramic chuck of the polishing equipment, then perform chemical mechanical polishing to remove 10nm, and finally perform RCA cleaning to obtain a clean composite film.
[0120] In some of the processes described in the specification, claims, and accompanying drawings of this invention, multiple operations are included in a specific order. However, it should be clearly understood that these operations may not be performed in the order they appear herein, or they may be performed in parallel. The operation numbers, such as S100, S200, etc., are merely used to distinguish different operations and do not themselves represent any execution order. Furthermore, these processes may include more or fewer operations, and these operations may be performed sequentially or in parallel.
[0121] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion.
[0122] The present application has been described in detail above with reference to specific embodiments and exemplary examples; however, these descriptions should not be construed as limiting the present application. Those skilled in the art will understand that various equivalent substitutions, modifications, or improvements can be made to the technical solutions and implementation methods of the present application without departing from the spirit and scope of the present application, and all such modifications and improvements fall within the scope of the present application. The scope of protection of the present application is determined by the appended claims.
Claims
1. A composite substrate containing a charge trapping layer, characterized in that, In order, they include: The substrate comprises a defect layer, an isolation layer, and a charge trapping layer. The charge trapping layer is prepared by ion implantation doping or interfacial thermal diffusion doping on the upper surface of the defect layer, followed by partial oxidation of the doped defect layer. The portion of the defect layer without ion doping is oxidized to form the isolation layer.
2. The composite substrate containing a charge trapping layer according to claim 1, characterized in that, The ion implantation doping method is as follows: using Ge + and / or P 5+ Ion implantation doping is performed; the dose of the ion implantation is ≤1×10⁻⁶. 14 ions / cm 2 The ion implantation energy is 20 ~ 30 keV.
3. The composite substrate containing a charge trapping layer according to claim 1, characterized in that, The interface thermal diffusion doping method is as follows: the upper surface of the defect layer is bonded to the Ge wafer, and the bonding is achieved by interface thermal diffusion annealing under vacuum or inert atmosphere conditions. After annealing, the Ge wafer is cleaned, peeled off, and dried.
4. A composite thin film containing a charge trapping layer, characterized in that, It includes the composite substrate as described in claim 1 and the thin film layer composited on the charge trapping layer of the substrate.
5. The composite thin film containing a charge trapping layer according to claim 4, characterized in that, The charge trapping layer is used to trap the charge at the interface between the isolation layer and the thin film layer.
6. A method for preparing the composite thin film containing a charge trapping layer as described in claim 4, characterized in that, Includes the following steps: S1. Prepare the substrate and thin film substrate; S2. A defect layer is prepared on a substrate. The defect layer is prepared by deposition on the substrate, etching the substrate, or implanting the substrate to generate implantation damage to form a defect layer. Ion implantation doping or interfacial thermal diffusion doping is performed on the upper surface of the defect layer. Then, the doped defect layer is partially oxidized. The part of the defect layer doped with ions is oxidized into a charge trapping layer, and the part of the defect layer not doped with ions is oxidized into an isolation layer to form a composite substrate. S3. Ions are implanted into the process surface of the thin film substrate using the ion implantation method to obtain a thin film substrate implantation sheet, wherein the thin film substrate implantation sheet comprises a thin film layer, an implantation layer and a residual material layer in sequence. S4. The thin film substrate is injected and the charge trapping layer of the composite substrate is bonded to form a bonded body. The bonded body is heat-treated to peel off the residual layer along the injection layer from the bonded body, and the thin film layer is transferred to the composite substrate to form a composite thin film.
7. The method for a composite thin film containing a charge trapping layer according to claim 6, characterized in that, In step S1, the substrate material is selected from at least one of silicon, sapphire, quartz, silicon carbide, silicon nitride, lithium niobate, lithium tantalate, and quartz glass; the thin film substrate material is selected from at least one of lithium niobate crystal, lithium tantalate crystal, gallium arsenide, silicon, ceramic, lithium tetraborate, potassium titanium oxyphosphate, rubidium titanium oxyphosphate crystal, or quartz.
8. The method for a composite thin film containing a charge trapping layer according to claim 6, characterized in that, In step S3, when ions are implanted onto the process surface of the thin film substrate to obtain the implanted thin film substrate sheet based on the ion implantation method, the implanted ions are selected from one of hydrogen ions, helium ions, nitrogen ions, oxygen ions, and argon ions; the thickness of the thin film layer and the diffusion width of the implanted layer are adjusted by adjusting the ion implantation depth and dose.
9. The application of the composite substrate containing the charge trapping layer according to claim 1 or the composite thin film containing the charge trapping layer according to claim 4 in the fabrication of electronic components.