A data frame monitoring method based on a flexible direct-current valve control system

Abstract

A kind of data frame monitoring method based on flexible DC valve control system, comprising: setting time counter register;According to the number of receiving port and sending port, establish the same number of receiving, sending time calibration module, frame filtering module, cache RAM, when receiving a frame data, the frame data is read from receiving port and written in receiving cache RAM, the frame data will pass through receiving time calibration module and receiving frame filtering module in turn;When receiving a frame data, the frame data is read from sending port and written in sending cache RAM, the frame data will pass through sending time calibration module and sending frame filtering module in turn;From all receiving cache RAM and sending cache RAM, select one from them, read data frame from the selected cache RAM and send to monitoring port, so repeat, until the data frame in all receiving cache RAM and sending cache RAM is all sent to monitoring port;The application reduces the range and quantity of data frame needing monitoring, improves monitoring efficiency.

Description

Technical Field

[0001] This invention belongs to the field of flexible DC power transmission and distribution modular multilevel converter valve control technology, specifically relating to a data frame monitoring method based on a flexible DC valve control system. Background Technology

[0002] In flexible DC power transmission and distribution valve control systems, various levels of node boards are required to jointly form the valve control system, such as... Figure 2 As shown, each node board has several receive and transmit ports to receive and transmit various data frames. Generally, node board reception and transmission are periodic, completing the reception or transmission of data frames at specific time points. However, the entire valve control system is very large, with numerous and diverse node boards at each level, and some transmit / receive ports may fail at any time. To promptly monitor the specific content of the transmitted and received data and the board's operational status, data monitoring of the node boards is necessary. Current valve control system monitoring has the following drawbacks: First, existing monitoring methods can only monitor a single receive or transmit port at a time, and cannot simultaneously monitor the frames transmitted through all receive and transmit ports. Second, existing monitoring methods can only monitor all data frames of the monitored port, and cannot perform differentiated filtering of data frames. Third, existing monitoring methods require monitoring each receive and transmit port individually at different time periods to understand the overall data frame transmission and reception status of the node board. Finally, existing monitoring methods cannot simultaneously monitor the transmit and receive frames of a specific monitored port, and cannot analyze the data parsing and transmission processes within the transmitted and received frames. Summary of the Invention

[0003] To overcome the shortcomings of the prior art, the present invention aims to provide a data frame monitoring method based on a flexible DC valve control system. This method allows simultaneous monitoring of data frames from all transceiver ports on all node boards using a single monitoring port. The time calibration module provided by this invention adds an extra timestamp field to the end of the data frame. When viewing the data frames output from the monitoring port, the chronological order of each frame can be clearly determined, providing an important basis for users to determine the transmission and reception times of data frames. Furthermore, by creating a frame filtering module to filter data frames that need to be monitored and those that do not, the scope and number of data frames requiring monitoring are greatly reduced, thus improving monitoring efficiency.

[0004] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0005] A data frame monitoring method based on a flexible DC valve control system, wherein any control board in the valve control system is a valve control node board, and the valve control node board has N transmit ports and N receive ports, includes the following steps:

[0006] Step 1: Set a time counting register with 64bit bit width, provide real time basis for sending time calibration module and receiving time calibration module of the whole monitoring system;

[0007] Step 2: According to the number of receiving ports, establish the same number of receiving time calibration modules, receiving frame filtering modules and receiving cache RAMs, when a frame data is received by a receiving port, the frame data is read out from the receiving port and written into the receiving cache RAM, in the writing process, the frame data will pass through the receiving time calibration module and the receiving frame filtering module in turn;

[0008] Step 3: According to the number of sending ports, establish the same number of sending time calibration modules, sending cache RAMs and sending frame filtering modules, when a frame data is received by a sending port, the frame data is read out from the sending port and written into the sending cache RAM, in the writing process, the frame data will pass through the sending time calibration module and the sending frame filtering module in turn;

[0009] Step 4: Use RoundRobin polling algorithm to select one cache RAM from all receiving cache RAMs and sending cache RAMs, then read the data frame from the selected cache RAM and send it to the monitoring port, repeat the operation until all data frames in all receiving cache RAMs and sending cache RAMs are sent to the monitoring port.

[0010] The specific method of step 1 is:

[0011] Set a time counting register sync_time with 64bit bit width, when the valve control system is reset, the time counting register sync_time starts counting from 0, when it counts to the maximum value, the register automatically restarts counting from 0, and repeats.

[0012] The specific method of step 2 is:

[0013] Step 2.1, create a receiving time calibration module for each receiving port;

[0014] Step 2.2, create a receiving frame filtering module for each receiving port;

[0015] Step 2.3, create a receiving cache RAM with a size greater than or equal to 2KB for each receiving port.

[0016] The specific method of step 2.1 is:

[0017] Step 2.1.1, set a 64bit latch register latch_time;

[0018] Step 2.1.2, when the data frame start header is received by the receiving time calibration module, the count value of the time count register sync_time is assigned to the latch register latch_time;

[0019] Step 2.1.3, the value of the latch register latch_time is supplemented as part of the frame tail of the data frame.

[0020] The specific method of the step 2.2 is:

[0021] Step 2.2.1, set a 32-bit pre-value register pre_value and a 1-bit reset register reset_reg;

[0022] Step 2.2.2, according to the screening of the specific field of the received frame, write the required value to the pre-value register pre_value in advance;

[0023] Step 2.2.3, write the value 0 to the reset register reset_reg in advance, when the data frame is received by the receiving frame filtering module, if the specific field in the data frame is equal to the value of the pre-value register pre_value, the reset register reset_reg is set to 0, otherwise the reset register reset_reg is set to 1;

[0024] Step 2.2.4, after the receiving data frame completely passes through the receiving frame filtering module, the reset register reset_reg is set to 0.

[0025] The specific method of the step 2.3 is:

[0026] Step 2.3.1, after the receiving data frame is completely written into the receiving buffer RAM, the value of the reset register reset_reg is judged, when the reset register reset_reg is 1, the receiving buffer RAM is cleared, which means that the receiving data frame is not the data frame to be monitored;

[0027] Step 2.3.2, the empty pin level of the receiving buffer RAM is judged, when the empty pin level is high, it means that there is a data frame to be monitored in the receiving buffer RAM which needs to be sent to the monitoring port, that is, the receiving buffer RAM has a sending request, otherwise it does not.

[0028] The specific method of the step 3 is:

[0029] Step 3.1, a sending time calibration module is created for each sending port;

[0030] Step 3.2, a sending frame filtering module is created for each sending port;

[0031] Step 3.3, create a sending buffer RAM with size equal or larger than 2KB for each sending port.

[0032] The specific method of step 3.1 is:

[0033] Step 3.1.1, set a 64bit latch register latch_time;

[0034] Step 3.1.2, when the start frame header of a sending data frame passes through the sending time calibration module, assign the count value of time count register sync_time to the latch register latch_time;

[0035] Step 3.1.3, use the value of latch register latch_time as a part of the supplement in the frame tail of the data frame.

[0036] The specific method of step 3.2 is:

[0037] Step 3.2.1, set a 32bit pre-value register pre_value and a 1bit reset register reset_reg;

[0038] Step 3.2.2, according to the specific field of the sending frame, write the value to be selected in advance to the pre-value register pre_value;

[0039] Step 3.2.3, write the value 0 to the reset register reset_reg in advance, when the sending data frame passes through the sending frame filtering module, if the specific field in the data frame is equal to the value of the pre-value register pre_value, set the reset register reset_reg to 0, otherwise set the reset register reset_reg to 1;

[0040] Step 3.2.4, wait for the sending data frame to completely pass through the sending frame filtering module, and then set the reset register reset_reg to 0;

[0041] The specific method of step 3.3 is:

[0042] Step 3.3.1, after the sending data frame is completely written into the sending buffer RAM, judge the value of the reset register reset_reg, when the reset register reset_reg is 1, clear the sending buffer RAM, which means that the sending data frame is not the data frame to be monitored;

[0043] Step 3.3.2, judge the empty pin level of the sending buffer RAM, when the empty pin level is high, it means that there is a data frame to be monitored in the sending buffer RAM, which needs to be sent to the monitoring port, that is, the sending buffer RAM has a sending request, otherwise it does not.

[0044] The specific method for step 4 is as follows:

[0045] Step 4.1: Select one RAM from all transmit buffer RAMs and receive buffer RAMs as the RAM to be read using the Round Robin polling algorithm;

[0046] Step 4.2: Read data frames from the RAM to be read as described in Step 4.1 and send them to the monitoring port;

[0047] Step 4.3: Repeat steps 4.1 and 4.2 to send all data frames to be monitored from the monitoring port.

[0048] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0049] 1. This invention uses only one monitoring port to simultaneously monitor the data frames of all transceiver ports on all node boards, making it simple in design and fully functional.

[0050] 2. The time calibration module provided by this invention adds an extra timestamp field to the end of the data frame. This allows users to clearly know the time sequence of each frame when viewing the data frames output from the monitoring port, providing an important basis for judging the data frame transmission and reception time.

[0051] 3. This invention creates a frame filtering module to filter data frames that need to be monitored and those that do not, which greatly reduces the scope and number of data frames that need to be monitored and improves monitoring efficiency. Attached Figure Description

[0052] Figure 1 This is a schematic diagram of the valve control node board monitoring of the present invention.

[0053] Figure 2 This is a schematic diagram of the monitoring of valve control node boards at various levels. Detailed Implementation

[0054] The technical solution of the present invention will be further described below with reference to the accompanying drawings.

[0055] like Figure 1 As shown, a data frame monitoring method based on a flexible DC valve control system is described, wherein any control board in the valve control system is a valve control node board, which has N transmit ports and N receive ports, and includes the following steps:

[0056] Step 1: Set up a 64-bit time counter register to provide real-time time information for the sending and receiving time calibration modules of the entire monitoring system;

[0057] The specific method for step 1 is as follows:

[0058] A time counting register sync_time with a bit width of 64 bits is set, when the valve control system is reset, the time counting register sync_time starts counting from 0, when counting to the maximum value, the register automatically restarts counting from 0, and so on;

[0059] Step 2: according to the number of receiving ports, the same number of receiving time calibration modules, receiving frame filtering modules and receiving cache RAMs are established, when a frame of data is received by the receiving port, the frame of data is read out from the receiving port and written into the receiving cache RAM, in the writing process, the frame of data will pass through the receiving time calibration module and the receiving frame filtering module in turn;

[0060] The specific method of step 2 is:

[0061] Step 2.1: a receiving time calibration module is created for each receiving port;

[0062] Step 2.2: a receiving frame filtering module is created for each receiving port;

[0063] Step 2.3: a receiving cache RAM greater than or equal to 2 KB is created for each receiving port;

[0064] The specific method of step 2.1 is:

[0065] Step 2.1.1: a 64-bit latch register latch_time is set;

[0066] Step 2.1.2: when the start frame header of the received data frame passes through the receiving time calibration module, the counting value of the time counting register sync_time is assigned to the latch register latch_time;

[0067] Step 2.1.3: the value of the latch register latch_time is supplemented as part of the frame tail of the data frame, thereby completing the function of the receiving time calibration module.

[0068] The specific method of step 2.2 is:

[0069] Step 2.2.1: a 32-bit pre-value register pre_value and a 1-bit reset register reset_reg are set;

[0070] Step 2.2.2: according to the specific field of the received frame, the value to be selected is written into the pre-value register pre_value in advance;

[0071] Step 2.2.3, write value 0 to reset register reset_reg in advance, when the received data frame passes through the received frame filter module, if the specific field in the data frame is equal to the value of pre-value register pre_value, set the reset register reset_reg to 0, otherwise set the reset register reset_reg to 1;

[0072] Step 2.2.4, set the reset register reset_reg to 0 after waiting for the received data frame to completely pass through the received frame filter module.

[0073] The specific method of the step 2.3 is:

[0074] Step 2.3.1, after the received data frame is completely written into the received cache RAM, judge the value of the reset register reset_reg, when the reset register reset_reg is 1, clear the received cache RAM, which means that the received data frame is not the data frame to be monitored;

[0075] Step 2.3.2, judge the level of the empty pin of the received cache RAM, when the level of the empty pin is high, it means that there is a data frame to be monitored in the received cache RAM, which needs to be sent to the monitoring port, that is, the received cache RAM has a sending request, otherwise it does not.

[0076] Step 3: establish the same number of sending time calibration modules, sending cache RAMs and sending frame filter modules according to the number of sending ports, when the sending port receives a frame of data, read the frame of data from the sending port and write it into the sending cache RAM, in the writing process, the frame of data will pass through the sending time calibration module and the sending frame filter module in turn;

[0077] The specific method of the step 3 is:

[0078] Step 3.1, create a sending time calibration module for each sending port;

[0079] Step 3.2, create a sending frame filter module for each sending port;

[0080] Step 3.3, create a sending cache RAM with a size greater than or equal to 2KB for each sending port.

[0081] The specific method of the step 3.1 is:

[0082] Step 3.1.1, set a 64-bit latch register latch_time;

[0083] Step 3.1.2, when the data frame start header is sent through the sending time calibration module, the count value of the time count register sync_time is assigned to the latch register latch_time;

[0084] Step 3.1.3, the value of the latch register latch_time is supplemented as part of the frame tail through the data frame, thereby completing the function of the sending time calibration module.

[0085] The specific method of the step 3.2 is:

[0086] Step 3.2.1, set a 32-bit pre-value register pre_value and a 1-bit reset register reset_reg;

[0087] Step 3.2.2, according to the screening of the specific field of the sending frame, write the required value to the pre-value register pre_value in advance;

[0088] Step 3.2.3, write the value 0 to the reset register reset_reg in advance, when the data frame passes through the sending frame filtering module, if the specific field in the data frame is equal to the value of the pre-value register pre_value, the reset register reset_reg is set to 0, otherwise, the reset register reset_reg is set to 1;

[0089] Step 3.2.4, after waiting for the sending data frame to pass through the sending frame filtering module completely, set the reset register reset_reg to 0.

[0090] The specific method of the step 3.3 is:

[0091] Step 3.3.1, after the sending data frame is completely written into the sending buffer RAM, judge the value of the reset register reset_reg, when the reset register reset_reg is 1, clear the sending buffer RAM, which means that the sending data frame is not the data frame to be monitored;

[0092] Step 3.3.2, judge the empty pin level of the sending buffer RAM, when the empty pin level is high, it means that there is a data frame to be monitored in the sending buffer RAM which needs to be sent to the monitoring port, that is, the sending buffer RAM has a sending request, otherwise it does not.

[0093] Step 4: use the RoundRobin polling algorithm to select one of all the receiving buffer RAMs and sending buffer RAMs, then read the data frame from the selected buffer RAM and send it to the monitoring port, repeat the operation until all the data frames in the receiving buffer RAMs and sending buffer RAMs are sent to the monitoring port.

[0094] The specific method of step 4 is:

[0095] Step 4.1, select one from all sending buffer RAM and receiving buffer RAM as the to-be-read RAM by RoundRobin polling algorithm;

[0096] Step 4.2, read the data frame from the to-be-read RAM in step 4.1 and send it to the monitoring port;

[0097] Step 4.3, repeat the operation of step 4.1 and step 4.2, and send all to-be-monitored data frames from the monitoring port, so as to realize the purpose of monitoring all data frames of the transceiver port by a single monitoring port.

[0098] The principle of the RoundRobin polling algorithm is as follows: each time, the sending request from N receiving buffer RAM and N sending buffer RAM is alternately allocated to the sending port, starting from 1, to 2N (the total number of N receiving buffer RAM and N sending buffer RAM), and then the cycle starts again.

Claims

1. A data frame monitoring method based on a flexible DC valve control system, any one control board card in the valve control system is a valve control node board card, the valve control node board card has N sending ports and N receiving ports, characterized in that: The method comprises the following steps: ​ Step 1: setting a time counting register with a bit width of 64 bits, providing real-time time basis for the sending time calibration module and the receiving time calibration module of the whole monitoring system; The specific method of step 1 is: setting a time counting register sync_time with a bit width of 64 bits, when the valve control system is reset, the time counting register sync_time starts counting from 0, when counting to the maximum value, the register automatically restarts counting from 0, and the process is repeated; Step 2: establishing the same number of receiving time calibration modules, receiving frame filtering modules and receiving cache RAMs according to the number of receiving ports, when a frame of data is received by the receiving port, the frame of data is read out from the receiving port and written into the receiving cache RAM, and in the writing process, the frame of data passes through the receiving time calibration module and the receiving frame filtering module in turn; The specific method of step 2 is: Step 2.1: creating a receiving time calibration module for each receiving port; The specific method of step 2.1 is: Step 2.1.1: setting a 64-bit latch register latch_time; Step 2.1.2: when the start frame header of the received data frame passes through the receiving time calibration module, the counting value of the time counting register sync_time is assigned to the latch register latch_time; Step 2.1.3: the value of the latch register latch_time is supplemented as part of the frame tail of the data frame; Step 2.2: creating a receiving frame filtering module for each receiving port; The specific method of step 2.2 is: Step 2.2.1: setting a 32-bit pre-value register pre_value and a 1-bit reset register reset_reg; Step 2.2.2: according to the specific field of the received frame, the value to be selected is written into the pre-value register pre_value in advance; Step 2.2.3: the value 0 is written into the reset register reset_reg in advance, when the received data frame passes through the receiving frame filtering module, if the specific field in the data frame is equal to the value of the pre-value register pre_value, the reset register reset_reg is set to 0, otherwise, the reset register reset_reg is set to 1; Step 2.2.4: after the received data frame completely passes through the receiving frame filtering module, the reset register reset_reg is set to 0; Step 2.3: creating a receiving cache RAM greater than or equal to 2 KB for each receiving port; The specific method of step 2.3 is: Step 2.3.1: after the received data frame is completely written into the receiving cache RAM, the value of the reset register reset_reg is judged, when the reset register reset_reg is 1, the receiving cache RAM is cleared, indicating that the received data frame is not the data frame to be monitored; Step 2.3.2, judging the level of the empty pin of the receiving buffer RAM, when the level of the empty pin is high, it means that there is a data frame in the receiving buffer RAM which needs to be sent to the monitoring port, namely, the receiving buffer RAM has a sending request, otherwise, it has no sending request; Step 3: establishing the same number of sending time calibration modules, sending buffer RAMs and sending frame filtering modules according to the number of sending ports, when a data frame is received by the sending port, the data frame is read out from the sending port and written into the sending buffer RAM, and the data frame passes through the sending time calibration module and the sending frame filtering module in turn during the writing process; Step 4: using the Round Robin polling algorithm to select one buffer RAM from all the receiving buffer RAMs and the sending buffer RAMs, and then reading the data frame from the selected buffer RAM and sending it to the monitoring port, repeating the operation until all the data frames in the receiving buffer RAMs and the sending buffer RAMs are sent to the monitoring port.

2. The data frame monitoring method based on the flexible DC valve control system according to claim 1, characterized in that: The specific method of step 3 is: Step 3.1, creating a sending time calibration module for each sending port; Step 3.2, creating a sending frame filtering module for each sending port; Step 3.3, creating a sending buffer RAM with a size greater than or equal to 2KB for each sending port.

3. The data frame monitoring method based on the flexible DC valve control system according to claim 2, characterized in that: The specific method of step 3.1 is: Step 3.1.1, setting a 64-bit latch register latch_time; Step 3.1.2, when the start frame header of the sending data frame passes through the sending time calibration module, assigning the count value of the time count register sync_time to the latch register latch_time; Step 3.1.3, using the value of the latch register latch_time as a part of the frame tail.

4. The data frame monitoring method based on the flexible DC valve control system according to claim 2, characterized in that: The specific method of step 3.2 is: Step 3.2.1, setting a 32-bit pre-value register pre_value and a 1-bit reset register reset_reg; Step 3.2.2, writing the required value in advance to the pre-value register pre_value according to the specific field of the sending frame; Step 3.2.3, writing the value 0 in advance to the reset register reset_reg, when the sending data frame passes through the sending frame filtering module, if the specific field in the data frame is equal to the value of the pre-value register pre_value, the reset register reset_reg is set to 0, otherwise, the reset register reset_reg is set to 1; Step 3.2.4, setting the reset register reset_reg to 0 after waiting for the sending data frame to completely pass through the sending frame filtering module; The specific method of step 3.3 is: Step 3.3.1, after the sending data frame is completely written into the sending buffer RAM, judging the value of the reset register reset_reg, when the reset register reset_reg is 1, clearing the sending buffer RAM, which means that the sending data frame is not the data frame that needs to be monitored. Step 3.3.2, judging the level of the empty pin of the sending buffer RAM. When the level of the empty pin is high, it means that there is a data frame to be monitored in the sending buffer RAM and the data frame needs to be sent to the monitoring port, i.e. the sending buffer RAM has a sending request, otherwise, it has no sending request.

5. The data frame monitoring method based on the flexible DC valve control system according to claim 1, characterized in that: The specific method of the step 4 is as follows: Step 4.1, selecting one from all the sending buffer RAMs and the receiving buffer RAMs as a to-be-read RAM through a Round Robin polling algorithm; Step 4.2, reading a data frame from the to-be-read RAM in step 4.1 and sending the data frame to the monitoring port; Step 4.3, repeating the operation of step 4.1 and step 4.2 to send all the data frames to be monitored from the monitoring port.

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