Edge computing processing system based on regional integrated energy station
By deploying an edge computing processing system at the regional integrated energy station and employing pipelined task allocation and neural network computing modules, the network pressure and latency issues caused by massive data processing were resolved, achieving low-cost and efficient energy data processing and scheduling.
Patent Information
- Application Number
- CN202310496273.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-04-27
- Publication Date
- 2026-02-17
- Estimated Expiration
- 2043-04-27
AI Technical Summary
In existing technologies, the processing of massive multi-source heterogeneous energy data in regional integrated energy stations leads to high network bandwidth pressure and long latency. Traditional centralized data processing methods cannot meet the time-sensitive energy dispatching needs, and traditional power grid architecture cannot meet the complex situation of multi-source and multi-load on the microgrid side.
An edge computing processing system based on a regional integrated energy station is adopted. By utilizing a pipelined task allocation optimization mechanism and a neural network operation module, combined with FPGA and GPU programmable soft cores, lightweight, modular, and low-cost data processing is achieved, reducing hardware overhead and improving system stability.
It enables plug-and-play, low-cost, and efficient data processing at the edge, reducing network latency and improving the real-time performance and system efficiency of energy dispatch.
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Figure CN116628072B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of regional integrated energy system data processing, and particularly relates to an edge computing processing system based on a regional integrated energy station BACKGROUND
[0002] With the large-scale construction of digital traction new power system, under the continuous penetration of renewable energy, the regional integrated energy system taking the integrated energy station as the main body has gradually become a main way of local energy consumption and regulation to solve the coordinated operation optimization of multiple energies in the edge area of the large power grid. However, the current problem of the regional integrated energy station is that with the operation of the integrated energy station on the distribution network side, a large amount of multi-source heterogeneous energy data will be generated, so that the scale of time series data increases exponentially. The current centralized data processing mode based on the distribution network center makes the massive data directly reported to the center through the network mode, and the center classifies and processes the data uniformly, which brings great load pressure to the network bandwidth and the distribution network data center, and also causes a large amount of time delay, which is unacceptable for time-sensitive energy scheduling, and gradually becomes one of the core problems hindering the development of new power systems. In recent years, the edge computing technology gradually applied highly meets the technical needs of the current regional integrated energy station, and can realize reasonable control of system equipment and efficient use of system data on the device side. As a product of the fifth generation communication technology, edge computing aims to process data on the edge of the network. With the advent of the Internet of Everything era, the massive terminal devices and explosive data growth accessing the network continuously consolidate the position of edge computing technology in the application field of the Internet of Things. Compared with traditional cloud computing, edge computing has obvious advantages in saving network bandwidth, reducing communication delay and protecting user privacy. Edge computing has the ability to call historical data and other types of information for day-ahead scheduling, and can also use the all-weather computing power provided by itself for real-time control, organically unifies the day-ahead scheduling and day-ahead control functions of the traditional integrated energy station, and improves the efficiency of the regional integrated energy station.
[0003] Therefore, in view of the massive data processing load pressure faced by the distribution network center, the distributed and decentralized edge computing data processing mode with the microgrid as the core processing unit will be the main solution for the future digital traction of new power systems. On the microgrid side, due to the proximity to user demand and the complex situation of multiple sources and loads, the current technical architecture for traditional power grid radial energy supply and demand response cannot meet the requirements, and it is urgent to propose a terminal hardware architecture for massive energy data on the edge side of the distribution network, data processing, storage, real-time communication algorithm protocol, to reduce the processing and storage pressure of edge data and reduce data delay. At the same time, on the network edge side, near the energy station, by deploying edge computing devices with a new architecture, and using data processing technology, load forecasting is realized on site, which can greatly reduce the load pressure of the distribution network center, improve the effectiveness of communication bandwidth, and effectively improve the ability of source network load storage collaboration optimization, laying an important technical support for subsequent multi-energy complementary energy dispatching. SUMMARY
[0004] In view of the technical problems existing in the prior art, the present application provides an edge computing processing system based on a regional comprehensive energy station and a data mining method. The edge computing processing system reduces hardware cost and improves the stability of the regional comprehensive energy station edge computing system. The task optimization method adopts a pipeline task allocation optimization mechanism. The task optimization method sends multiple tasks to a neural network processing unit one by one according to the calculation cost, cost, required resources, and maximum tolerable delay amount to establish a queue to be processed, thereby realizing processing under single-core hardware resources and improving data processing speed.
[0005] To solve the problems existing in the prior art, the present application adopts the following technical solutions:
[0006] An edge computing processing system based on a regional comprehensive energy station, comprising: a data input module, a data processing module, a storage module, a communication module, and a power conversion module.
[0007] The data input module converts analog flow from the regional comprehensive energy station into data information.
[0008] The data processing module performs task allocation and data mining according to the time sequence pipeline method.
[0009] The storage module stores and calls the task allocation.
[0010] The communication module transmits the task allocation to the server.
[0011] The power conversion module is used to supply power to the edge computing processing system; wherein:
[0012] The data processing module includes a processor, a neural network operation module, an AXI bus, an internal high-speed cache unit, and a 3-DMA controller; the neural network operation module comprises an input buffer unit, an intermediate computation buffer unit, an average pooling unit, a control unit, and a convolution operation unit; wherein:
[0013] The control unit is mainly responsible for the configuration before data processing, the interaction between various modules, and the control during the processing. The control module transmits the processing results from the convolution operation unit to the average pooling unit. The average pooling module contains 8 pooling units, each of which consists of a three-layer addition tree and a data buffer. After pooling, 1024 categories are obtained, which are stored in the output buffer and then transmitted to external memory via the AXI bus. Finally, the MaxSoft classifier is used to obtain the final result.
[0014] Furthermore, the convolution operation unit consists of a data buffer, a weighting register, an offset register, a convolutional layer, a feature buffer, and a logic controller; the convolutional layer includes four PE units, forming two sets of 8×8 parallel convolution acceleration arrays; the feature buffer consists of a first feature buffer and a second feature buffer; the first feature buffer stores the operation results of the previous layer, and the second feature buffer stores the operation results of the current layer; the logic controller is a time series processor.
[0015] Furthermore, the data input module consists of an analog signal acquisition unit, a data signal acquisition unit, an A / D conversion unit, and an electromagnetic isolation unit.
[0016] Furthermore, the neural network computing unit is a NEON GX680 architecture GPU programmable soft core.
[0017] Furthermore, the data processing module is constructed using an FPGA integrated circuit.
[0018] Furthermore, the power conversion module consists of AC / DC conversion, step-down and backup capacitor circuits.
[0019] Furthermore, the neural network computing module is a programmable soft core of NEON's GX680 architecture GPU.
[0020] This invention provides the following beneficial effects:
[0021] 1. The present invention relates to a lightweight, modular, low-cost, plug-and-play integrated circuit for edge computing systems. This system utilizes the discrete and coupled characteristics of energy data in time series and the parallel computing characteristics within the integrated circuit. The receiving data is divided into modules according to data processing tasks and designed in a pipeline manner. At the same time, the plug-and-play characteristics between hardware and software are fully considered. The present invention uses high-speed parallel communication between modules and asynchronous soft switching to control the modules, so that the addition and removal of new tasks will not affect the execution of other tasks.
[0022] 2. This invention employs a lightweight, pipelined, and modular FPGA-based edge computing system design, reducing hardware overhead costs while improving the operational stability of the regional integrated energy station edge computing system. It addresses the technical problem that most existing edge computing terminals utilize computer architectures with multiple GPU cores, resulting in complex hardware structures, non-plug-and-play functionality, and high hardware costs, hindering large-scale deployment. Furthermore, this invention solves the problem that traditional short-term electricity load forecasting algorithms are no longer directly applicable under limited hardware resources. It enables the implementation of a multi-task allocation mechanism based on multi-core GPU processors, meeting the high hardware resource requirements of edge computing and allowing for direct deployment on performance- and resource-constrained edge computing terminals.
[0023] 3. Based on the discrete coupling characteristics of energy data in the time series of regional integrated energy stations, this invention proposes a pipeline-based task allocation optimization mechanism. Multiple tasks are sent to the neural network processing unit one by one according to the computational overhead, cost, required resources and maximum tolerable delay, thereby realizing the rapid processing of data tasks of regional integrated energy stations.
[0024] 4. The neural network computing unit in this invention makes full use of the programmable characteristics of the GPU soft core, maximizes the use of internal resources, and fully considers the discrete time characteristics and coupling of power data. The single-core GPU operation is arranged in a pipelined manner to maximize the release of the GPU's internal computing power and improve work efficiency. Attached Figure Description
[0025] Figure 1 This is a schematic diagram of the edge computing processing system based on a regional integrated energy station according to the present invention;
[0026] Figure 2 This is a schematic diagram of the FPGA core processing module in the edge computing processing system based on a regional integrated energy station according to the present invention;
[0027] Figure 3 This is a schematic diagram of the neural network operation module in the edge computing processing system based on a regional integrated energy station according to the present invention;
[0028] Figure 4 This is a schematic diagram of the task optimization module in the edge computing processing system based on a regional integrated energy station according to the present invention;
[0029] Figure 5 This is a flowchart of the task optimization method in the edge computing processing system based on the regional integrated energy station of the present invention;
[0030] Figure 6 This is a flowchart of the data mining processing method in the edge computing system based on a regional integrated energy station, as described in this invention. Detailed Implementation
[0031] The following is in conjunction with the appendix Figures 1-6 The present invention will be described in detail as follows:
[0032] 1. Power Conversion Module: Composed of AC / DC conversion, step-down, and backup capacitor circuitry. The ADDC converter transforms 110-380V AC power into 48V DC output. The DCDC step-down circuit steps down the 48V DC power to eight voltages: 15V, 10V, 5V, 3.3V, 1.8V, 1.5V, 1.2V, and 1V, for use by various internal circuits of the terminal. The backup capacitor is a 0.5F supercapacitor, charged by a 5V power supply. In the event of an external power failure, the backup capacitor outputs current, allowing the terminal to continue operating for approximately 3 seconds. Simultaneously, an interrupt signal is output to the FPGA processor, alerting it to a fault state. Upon receiving the interrupt signal, the processor immediately enters low-power mode, saving all internal data and states.
[0033] 2. Data Input Module: This module consists of four parts: an analog signal acquisition unit, a digital signal acquisition unit, an A / D conversion unit, and an electromagnetic isolation unit. The analog signal acquisition unit can simultaneously acquire eight channels of 1-14 bit precision analog voltage and current signals. The digital signal acquisition unit offers six general-purpose industrial digital interfaces: RS485, RS232, USB, CAN, and I / O. The A / D conversion unit converts analog signals into digital signals. The electromagnetic isolation unit provides electrical isolation between external circuits and the internal FPGA core circuitry, ensuring that surges and pulses do not interfere with the normal operation of the internal core unit. The data input module adopts a plug-and-play modular design, and the data protocol uses a serial asynchronous transparent transmission mode, ensuring that the connection and removal of the data input module will not affect the FPGA core processor.
[0034] The FPGA core processing module is the heart of the entire architecture, responsible for control, computation, and processing. The internal architecture of the FPGA core module is as follows: Figure 2As shown. The FPGA core module is divided into five parts: processor, neural network operation module, AXI bus, internal cache unit, and DMA controller. The processor module is an ARM Cortex-A72 core, which mainly performs logic control on all units inside the FPGA, including data input, preprocessing, interrupts, task invocation and allocation, etc. The program running inside the Cortex-A72 core is a trimmed RT-Linux system. The neural network operation unit is a NEON GX680 architecture GPU programmable soft core. The maximum clock speed of the soft core is 1.5 GHz of the FPGA processor clock. The time-series processor is the core operation unit for implementing edge-side data processing. Considering the requirements of plug-and-play, modularity, and pipelined design, the design architecture of the soft core in this invention is as follows. Figure 3 As shown.
[0035] Figure 4 In this neural network, the convolutional operation unit (PE) is the core of the neural network operation module, consisting of N×M PE units and a feature value buffer. Since the FPGA has a total of 1800 PEs, each responsible for a 3×3 convolution operation, 128 PEs were ultimately designed, forming two groups of 8×8 parallel convolution acceleration arrays. The feature buffer has a double-buffered structure: one working buffer stores the operation results of the previous layer, and the other a result buffer stores the operation results of the current layer. Due to the limited on-chip storage resources of the FPGA, this invention includes 2 buffers shared by every 4 PEs, for a total of 32 feature value buffers. This double-buffered structure eliminates the need to transfer intermediate operation results to external memory, achieving inter-layer data reuse and greatly improving the overall neural network operation speed. The control unit is mainly responsible for configuration before data processing, interaction between units, and control during the operation process. The control unit transmits the computation results from the convolution module to the average pooling unit. The average pooling module contains eight pooling units, each consisting of a three-layer addition tree and a data buffer. After pooling, 1024 categories are obtained, stored in the output buffer, and then transmitted to external memory via the AXI bus. Finally, the MaxSoft classifier is used to obtain the final result. The entire neural network computation module fully utilizes the programmable characteristics of the GPU's soft core, maximizing the use of internal resources. It also fully considers the discrete-time characteristics and coupling of power data, arranging the single-core GPU computation in a pipelined manner to maximize the release of the GPU's internal computing power.
[0036] The 4 storage modules consist of an 8GB DDR4 memory module and a 128GB portable solid-state drive.
[0037] 5. Communication Module: Composed of a gigabit Ethernet port, a 5G mobile communication module, and a fiber optic communication port, enabling communication with the host server and the slave device.
[0038] like Figure 5 As shown, this invention employs a time-series pipeline-based task allocation optimization model process:
[0039] Step 1: Establish preset conditions
[0040] Condition 1: To ensure the reliability of data processing, the changes in the amount of data processed by each PE inside the neural network operation module can be measured in real time by reading from the register. Moreover, the fluctuations in the amount of data of the PEs satisfy a normal distribution, and they are independent of each other. The relative positions of the PEs can be known.
[0041] Condition 2: The computational load per unit of data for each data processing task is known, and the processing timing logic of the business is known.
[0042] Condition 3: The time spent by the controller on allocating computing resources for the data buffer within the arithmetic unit is negligible, and the creation and destruction of the buffer can be completed in real time.
[0043] Step 2: Characterize the types of different data processing tasks
[0044] Based on the differences in data sources from regional energy stations, tasks are abstracted into two main categories: time-sensitive data protocols (TSDP) and resource-demand protocols (NTSDP). All task requests are sent to the time-series processor. The processing method for TSDP is as follows: for TSDP, they are prioritized and sorted according to their time queue, while simultaneously calculating their maximum latency tolerance and resource load requirements. For time-insensitive requests, after calculating the task load requirements, they are sorted according to the size of the load requirements. The time queue processing flowchart for TSDP is as follows. Figure 5 As shown.
[0045] During the steady-state operation of the neural network convolutional computation unit, the data processing tasks input from the front end are periodic. The triggering period for one energy data management service is from T0 to T5, where T0 is the start time of the data processing task and T5 is the end time of the task. Due to the succession relationship in the processing of power data TSDP, at time t, there may be a single task request or multiple parallel task requests in the time sequence logic chain of tasks being processed at the same time.
[0046] When the data service requests of the neural network convolutional computation unit reach a steady state, there will be multiple task cycles at time t, i.e., a processing temporal logic chain under multi-cycle coupling. The computation unit allocates independent resource space to the tasks, while different tasks are decoupled and independent of each other, forming task queues under different resource load spaces according to the temporal logic chain. While characterizing different types of task processing by establishing the characteristics of various data processing tasks under different time requirements, it is also necessary to meet certain computing resources, latency tolerance, and objective function requirements.
[0047] Step 3: Establish the objective function of the optimization model
[0048] Data processing tasks require the computational and communication resources of neural network convolutional units, resulting in energy consumption. Since the computational load of different types of tasks varies with the amount of data being processed, and these variations differ significantly in both time and space dimensions, the computational and communication resources consumed during data processing and transmission also change accordingly.
[0049] Calculate delay constraints
[0050] Because much of the data in the power energy sector is time-sensitive, processing tasks have a maximum latency tolerance, meaning the sum of the latency of each receiving part in the sequential logic chain and the maximum latency of each parallel part does not exceed the latency tolerance. The service latency of a task is mainly divided into the transmission latency of data uplink and instruction downlink execution by the computing unit, and the computation latency incurred during data processing. For the priority processing task TSDP under a pipelined architecture, the latency constraint model is shown in the following equation.
[0051] 2d ie +d ae χ ie χ ae ≤T m1
[0052] For non-priority processing tasks in a pipelined architecture, such as NTSDP, the service latency is affected by the different positions in the processing timing logic chain compared to TSDP, resulting in different data transmission directions within the processing unit. The processing latency constraint model for NTSDP-type tasks is shown in the following formula:
[0053]
[0054]
[0055] In the above formula: T max Tolerance for latency in data processing operations.
[0056] Step 3: Construct the objective function of the optimization model, as shown in the following equation:
[0057]
[0058] In the formula: C(t) is the total cost of task processing by the computing unit at time t; e is the PE number within the computing unit; C 1 e (t), C 2 e (t), C 3 e (t) represents the computation, latency, and communication costs incurred by the PE within the computing unit when processing tasks.
[0059] Step 4: Calculate the load
[0060] The demand for computing resources in a processing unit is represented as the computational load of a task. The magnitude of the computational load is related to the task type and the amount of data being processed, and the calculation formula is as follows:
[0061] θ a =[p a ,w a (t),T a ], a∈[1,m]
[0062] w a (t)=q a u a (t)
[0063] W = [w1(t), w2(t), ..., w m (t)]
[0064] In the formula: θ a For the feature model of task a; p a Let be the type of task a; wa(t) be the computational load of task a at time t; T a Delay constraints for task a; q a To process p a Computational load per unit of data for similar tasks; u a (t) represents the amount of data for task a at time t; W is a vector composed of m tasks. The m tasks are divided into m1 TSDPs and m2 NTSDPs, then m1 + m2 = m. After satisfying the processing requirements of the TSDPs, the remaining resources of the computing unit are called surplus resources. The amount of surplus resources affects the computational latency of the computing unit when processing TSDPs.
[0065] Step 5: Calculate the cost
[0066] In neural network convolutional computation units, different types of TSDP and NTSDP tasks are placed in different computation buffers. A certain amount of computation and communication resources are allocated to each buffer based on task attributes, ensuring that more resources are available for NTSDP tasks while prioritizing the latency constraints of TSDP tasks. In practical applications, since the computational load varies with data type, the expression for computational cost is...
[0067]
[0068]
[0069]
[0070] In the formula: d ae (t) represents the time required for the processing unit to process task a; f ae (t) represents the computing resources allocated by the computation unit to the buffer belonging to task a, C 1 e (t) represents the cost required to occupy a unit of computing resources; F e is the total computing resources of the computing unit; ∝ is the proportional sign; Equation (1) is the computing resource constraint condition that the computing unit should satisfy when allocating task a.
[0071] like Figure 6 As shown, the present invention employs an edge computing processing system for deep data processing of regional integrated energy stations.
[0072] This invention discloses an energy data mining and deduplication method based on Euclidean distance weighting. The method includes two algorithms: a time similarity calculation algorithm (Algorithm 1) and a data optimization processing algorithm based on Euclidean distance weighting (Algorithm 2).
[0073] To address the shortcomings of traditional K-means clustering algorithms in meeting the time-dimensional mining needs of heterogeneous energy data from various energy stations, this invention first proposes a corrected time similarity calculation algorithm (Algorithm 1). Algorithm 1 corrects the time-dimensional similarity of different types of multi-source heterogeneous energy data. Then, it integrates and weights the similarity calculation method in the spatial dimension using this algorithm and the traditional Euclidean distance method. The integration and weighting process is defined as a Euclidean distance weighted data optimization processing algorithm (Algorithm 2).
[0074] A corrected time similarity calculation algorithm (Algorithm 1) principle:
[0075] Step 1: First, construct an n×m joint matrix L, and let W represent the normalization path corresponding to each data point in the joint matrix L, as shown below.
[0076]
[0077] Step 2: For the above equation W, set three constraints: ① Boundary condition. The regularized path W must start at w. 0,0 , terminated at w n-1,m-1 ② Decreasing property. If the current normalized path is w′ i,j = (i′,j′), then the next position (i,j) must satisfy (ii′)≤1, (jj′)≤1, thus ensuring that each coordinate in the two different data sequences can be labeled on the regularized path; ③ Monotonicity. If the current regularized path position is w′ i,j = (i′, j′), then the next position w i,j = (i,j) must satisfy (ii′)≥0, (jj′)≥0, so as to ensure that the two sequences will not cross-match.
[0078] Step 3: Assume D i,j Let (a0, b0) and (a0, b0) be the two distinct alignment endpoints of the joint matrix L. i ,b j The shortest Euclidean distance between two different time series that satisfies the corresponding regular path is the optimal temporal similarity between them. This represents two different time points a in the same sequence. i and b j Euclidean distance. Combining the above three constraints and the Euclidean shortest distance calculation formula, we can obtain the adjusted formula for calculating the temporal similarity of different discrete sequences, as shown below:
[0079]
[0080] The principle of a Euclidean distance-weighted data optimization processing algorithm (Algorithm 2):
[0081] Step 1: By using weighting factors, the similarity calculations in the time dimension and the spatial dimension are weighted and integrated. Based on different weight coefficients, an optimized Euclidean distance weighted algorithm is obtained, as shown in the following formula:
[0082]
[0083] Step 2: In the above formula, λ and η are the assigned weight coefficients, and they satisfy λ + η = 1. Using Euclidean distance weighting to calculate the similarity of data sequences of different time and spatial types, replacing the traditional K-means clustering algorithm's direct use of Euclidean distance, yields a refined K-means clustering method optimized for multi-source heterogeneous time series.
[0084] Combining Algorithm 1 and Algorithm 2, a method for energy data mining and deduplication based on Euclidean distance weighting is developed.
[0085] The steps are as follows:
[0086] Step 1: Set two constraints for the clustering algorithm: the number of iterations and the threshold range for the shortest distance between data points;
[0087] Step 2: Assume the input is a discrete time series:
[0088] x i i = 1, 2, ..., m
[0089] x i = [x1,x2,…x m ]
[0090] Step 3: Initialize the cluster center point: at x i Randomly select k data points c j j = 1, 2, ..., k, are taken as the initial center points;
[0091]
[0092] Step 4: Initialize the cluster class: For x i The data points in i = 1, 2, ..., m, excluding the k data points, are traversed. The distance from each data point to each center point is calculated. An initial cluster set is constructed from all data points that satisfy the shortest distance threshold. The formula for calculating the shortest distance is shown below.
[0093]
[0094] Step 5: Normalize the data in different cluster sets, call the adjusted time similarity calculation algorithm, and obtain the shortest distance D between the two adjusted sequences of different cluster sets. i,j ;
[0095] Step Six: Calculate the weighted Euclidean distance by weighting the distances obtained in Steps Four and Five, i.e.:
[0096]
[0097] Step 7: Update Cluster Centroids: Calculate the average value of all data points in each cluster and use it as the new cluster centroid. The calculation formula is shown below:
[0098]
[0099] In the above formula, x i,j It is the i-th data point in the j-th cluster, and n is the number of data points in the j-th cluster.
[0100] Step 8: Repeat steps 4 to 7 until the range of change of the center point of each cluster meets the set threshold or the number of iterations in steps 4 to 7 reaches the constraint condition.
[0101] The above embodiments are only for illustrating the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the content of the present invention and implement it accordingly. They should not be construed as limiting the scope of protection of the present invention. All equivalent changes or modifications made in accordance with the spirit and essence of the present invention should be covered within the scope of protection of the present invention.
Claims
1. An edge computing processing system based on a regional integrated energy station, the edge computing processing system comprising: a data input module, a data processing module, a storage module, a communication module, and a power conversion module; characterized in that: The data input module converts the analog stream from the regional integrated energy station into data information. Specifically, the data input module comprises four parts: an analog quantity acquisition unit, a digital quantity acquisition unit, an A / D conversion unit, and an electromagnetic isolation unit. The analog quantity acquisition unit can simultaneously acquire eight channels of 1-14 bit precision analog voltage and current quantities. The digital quantity acquisition unit includes industrial digital interfaces such as RS485, RS232, USB, CAN, and I / O. The A / D conversion unit converts analog quantities into digital quantities, and the electromagnetic isolation unit provides electrical isolation between the external circuitry and the internal FPGA core circuitry. The data input module adopts a plug-and-play modular design, and the data protocol uses a serial asynchronous transparent transmission mode. The data processing module performs task allocation and data mining of data information in a time-series pipeline manner; The storage module stores and retrieves task assignments; The communication module transmits task assignments to the server. The power conversion module is used to supply power to the edge computing processing system; wherein: The data processing module includes a processor, a neural network operation module, an AXI bus, an internal high-speed cache unit, and a 3-DMA controller; the neural network operation module comprises an input buffer unit, an intermediate computation buffer unit, an average pooling unit, a control unit, and a convolution operation unit; wherein: The control unit is mainly responsible for the configuration before data processing, the interaction between various modules, and the control during the processing. The control unit transmits the processing results from the convolution operation unit to the average pooling unit. The average pooling unit contains 8 pooling units, each of which consists of a three-layer addition tree and a data buffer. After pooling, 1024 categories are obtained, which are stored in the output buffer and then transmitted to external memory via the AXI bus. Finally, the MaxSoft classifier is used to obtain the final result.
2. The edge computing processing system based on a regional integrated energy station according to claim 1, characterized in that: The convolution operation unit consists of a data buffer, a weighting register, an offset register, a convolutional layer, a feature buffer, and a logic controller. The convolutional layer includes four PE units, forming two 8×8 parallel convolution acceleration arrays. The feature buffer consists of a first feature buffer and a second feature buffer. The first feature buffer stores the operation results of the previous layer, and the second feature buffer stores the operation results of the current layer. The logic controller has a 1.5 GHz processor clock speed.
3. The edge computing processing system based on a regional integrated energy station according to claim 1, characterized in that: The neural network computing unit is a NEON GX680 architecture GPU programmable soft core.
4. The edge computing processing system based on a regional integrated energy station according to claim 1, characterized in that: The data processing module is composed of FPGA integrated circuits.
5. The edge computing processing system based on a regional integrated energy station according to claim 1, characterized in that: The power conversion module consists of AC / DC conversion, step-down and backup capacitor circuits.
6. The edge computing processing system based on a regional integrated energy station according to claim 1, characterized in that: The neural network computing module uses NEON's GX680 architecture GPU.
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