A method for improving the number of NAND read times based on wordline distribution
By analyzing the wordline distribution of NAND Flash, wordlines with inconsistent behavior were filtered out and regrouped, which solved the performance degradation problem caused by read interference, improved the number of reads and device performance, and the effect was more obvious in high-frequency read scenarios.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-20
- Publication Date
- 2026-04-07
AI Technical Summary
NAND Flash memory is prone to read disturb during the reading process, which leads to performance degradation. Existing technology avoids this problem by limiting the number of reads, but this method results in performance degradation.
By analyzing the distribution of failed bits in wordlines, wordlines with consistency deviations were identified and reclassified into Normal and Bad groups. The write strategy was then adjusted to reduce the impact of read counts on these wordlines, thereby improving the read count and performance of NAND.
By adjusting the wordline distribution and writing strategy, the read count and performance of NAND Flash were improved, especially in cases of frequent reads, while reducing the number of data transfers at the cost of a small amount of storage space.
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Figure CN116661700B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of memory, in particular to a method for improving the number of NAND read based on wordline distribution. BACKGROUND
[0002] NAND Flash is a memory based on floating gate transistor design, and stores charge through floating gate. Each floating gate transistor corresponds to a storage cell, the drain of each cell corresponds to a bit line, the gate corresponds to a word line (WL for short), and the source is connected to each other. Each page corresponds to a word line, and multiple word lines form a block. Due to the difference in the topological structure of the block, the characteristics of the word line at different positions under the same environmental conditions are different.
[0003] NAND Flash will produce a read disturb phenomenon during use, which will cause the performance of NAND Flash to decrease. In order to avoid the generation of read disturb phenomenon, currently, data transfer and other operations are usually carried out before the threshold value of read disturb (page read, PR for short) or block disturb (block read, BR for short) provided by NAND manufacturers is reached. However, in order to avoid the performance of NAND Flash from decreasing, the BR or PR threshold value provided by the manufacturer is usually conservative, which leads to the decrease of the use performance of NAND Flash. Moreover, when both BR and PR operations are carried out on a block, the storage performance will also decrease due to the fact that the manufacturer cannot provide a clear conversion coefficient. SUMMARY
[0004] The present application provides a method for improving the number of page read and block read of NAND based on wordline distribution, which solves the problem of performance decrease of NAND due to low read disturb threshold value.
[0005] The technical solution of the present application is: a method for improving the number of NAND read based on wordline distribution, comprising the following steps:
[0006] S1) Taking a plurality of NANDs as samples, obtaining the number of failed bits of the block according to the read limit value under different life cycles and different data retention time conditions;
[0007] S2) Comparing the number of failed bits of each word line, and determining the part of the word line that produces consistency deviation in the process of increasing the number of reads;
[0008] S3) Obtain poor wordlines from all wordlines according to the distribution of failed bits and the consistency deviation of read times;
[0009] S4) Determine whether the obtained poor wordlines use wordline grouping;
[0010] S5) If yes, re-group the distribution of wordlines using wordline grouping according to the characteristics;
[0011] The grouping includes a Normal group and a Bad group;
[0012] If no, no operation is needed;
[0013] S6) Perform random data write NAND on the wordlines in the Bad group, perform user data sequential write NAND on the wordlines in the Normal group, and perform sequential write NAND on the wordlines not using wordline grouping.
[0014] Further, the read times are page read or block read.
[0015] Further, the step S1) further includes the following steps:
[0016] S11) Determine whether the erase-write temperature is met;
[0017] S12) If yes, perform erase-write; if no, adjust the temperature and continue to perform step S11);
[0018] S13) Determine whether the erase-write is completed;
[0019] S14) If yes, determine whether the data retention temperature is met; if no, adjust the temperature and continue to perform S13);
[0020] S15) After the data retention time is reached, read the block with the increased read times;
[0021] S16) Read the failed bits of the block.
[0022] Further, the step S3) graphically presents the poor wordlines, with the horizontal coordinate of the graph being the wordline and the vertical coordinate being the failed bits.
[0023] Further, the step S5) re-distributes the wordlines according to the error correction capability of the low-density parity-check code.
[0024] Further, the error correction capability of the low-density parity-check code is 55 bit / kb or 70 bit / kb.
[0025] Further, in the step S6), when performing the user data sequential writing NAND on the Normal group, the bad group is automatically sequentially skipped.
[0026] The beneficial effects of the present application are:
[0027] According to the wordline distribution characteristics, the present application screens out the wordline with a significant increase in the number of failed bits due to the increase in PR, and reconstructs the wordline distribution of the Block, so as to eliminate the errors caused by the difference of the NAND wordline, thereby improving the PR and BR times, and further improving the performance of the NAND.
[0028] The present application sacrifices a small part of storage space to improve the read times, reduces the data transfer times, and thus improves the performance of the entire storage device, especially for the storage device with frequent reading, the improvement effect is more obvious. BRIEF DESCRIPTION OF DRAWINGS
[0029] The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the present application and serve to explain the present application, and do not limit the present application in any manner. In the drawings:
[0030] Figure 1 is a flowchart of the present method;
[0031] Figure 2 is a poor wordline analysis diagram under one specific embodiment of the present application;
[0032] Figure 3 is a flowchart of the method for obtaining the number of failed bits of the present application. DETAILED DESCRIPTION
[0033] Embodiment 1:
[0034] As shown in the accompanying drawings Figure 1 and the accompanying drawings Figure 3 , a method for improving the read times of NAND based on wordline distribution, in the present embodiment, the read times are PR, including the following steps:
[0035] S1) According to the PR limit value under different life cycles and different data retention time conditions, the number of failed bits of the block is obtained by taking a number of NAND as samples. In this embodiment, 42 NANDs are taken as samples, and after being evenly divided into 6 groups, they are respectively programmed and erased 1000, 2000, 3000, 5000, 7000 and 10000 times, and stored at 40℃ for 0 days, 9 days, 27 days, 45 days, 81 days and 90 days; according to the PR number of 3000000 times given by the NAND manufacturer, the number of failed bits of the block is obtained;
[0036] S11) judging whether the programming and erasing temperature is met;
[0037] S12) if yes, programming and erasing is performed; if no, temperature adjustment is performed and step S11) is continued to be executed;
[0038] S13) judging whether the programming and erasing is completed;
[0039] S14) if yes, judging whether the data retention temperature is met; if no, temperature adjustment is performed and step S13) is continued to be executed;
[0040] S15) after the data retention time is reached, the block with the increasing PR number is read;
[0041] S16) the number of failed bits of the block is read.
[0042] S2) comparing the number of failed bits of each wordline, and determining the wordline part that produces consistency deviation in the PR increasing process;
[0043] In order to facilitate observation, analysis and calculation of data, the data is visualized, as shown in the accompanying drawings Figure 2 of this embodiment, the poor wordline is graphically presented. In this example, whether the wordline produces consistency deviation with PR is determined according to the error correction ability of the low-density parity-check code. In the accompanying drawings Figure 2 , the wordline in the box is more prominent, because it breaks through the limitation of the error correction ability of the low-density parity-check code, and cannot be corrected, and the wordline outside the box is more moderate. Therefore, the wordline in the box is considered to produce consistency deviation with PR in the PR increasing process.
[0044] S3) obtaining the poor wordline that produces consistency deviation with PR according to the distribution of the number of failed bits of all wordlines;
[0045] S4) judging whether the obtained poor wordline uses wordline grouping;
[0046] S5) Yes, then re-group the wordline distribution according to the characteristics of using wordline grouping;
[0047] The grouping includes Normal group and Bad group;
[0048] No, then no operation is needed;
[0049] As shown in the accompanying Figure 2 The embodiment re-groups the wordline distribution according to the error correction capability of the low-density parity-check code, and the error correction capability of the low-density parity-check code in the embodiment is 70 bit / kb, and the wordline distribution after re-grouping is shown in Table 1.
[0050] Table 1. Wordline distribution after re-grouping
[0051]
[0052] S6) Random data is written to the NAND for the wordline of the Bad group, User data is sequentially written to the NAND for the Normal group, and the wordline of the unused wordline group is sequentially written to the NAND. In the embodiment, the reconstruction writing of the wordline distribution of the NAND is shown in Table 2.
[0053] Table 2. Wordline distribution reconstruction writing
[0054]
[0055] When writing, the Normal group is sequentially written to the NAND with User data, and the Bad group is automatically skipped in sequence.
[0056] The embodiment screens out part of the wordlines with inconsistent characteristics, so that the consistency of the remaining wordlines in the block is significantly enhanced, thereby ensuring the success rate of the reading process in the process of increasing PR through the difference between the wordlines. The embodiment sacrifices a small part of storage space to exchange for the increase of PR and BR threshold number, reduces the number of data transfer, and thus improves the performance of the entire storage device. Obviously, when the storage device is read more frequently, the improvement degree is more obvious.
[0057] Embodiment 2:
[0058] The difference between the embodiment and the embodiment 1 is that the embodiment uses the BR number instead of the PR number in S1)~S6).
[0059] The BR number threshold value provided by the manufacturer can also be used to screen out some wordlines with inconsistent characteristics, thereby enhancing the consistency of the remaining wordlines in the block, improving the PR and BR threshold number, and achieving the same effect of improving the performance of the storage device as in Embodiment 1.
[0060] The above description is only the basic principles and preferred embodiments of the present application, and improvements and substitutions made by those skilled in the art based on the present application are within the protection scope of the present application.
Claims
1. A method for increasing NAND read counts based on wordline distribution, characterized in that, Includes the following steps: S1) Using several NAND flash units as samples, obtain the number of failed bits of a block based on the maximum number of reads under different lifecycles and data retention time conditions; the number of reads refers to the number of page reads or the number of block reads. Step S1) also Includes the following steps, S11) Determine if the erase / write temperature is met; S12) If yes, then erase / write; if no, then adjust the temperature and continue with step S11). S13) Determine whether the erasure / writing process is complete; S14) If yes, determine whether the data holding temperature is met; if no, adjust the temperature and determine whether the data holding temperature is met. S15) After the data retention time expires, read the block whose read count increments; S16) The number of failed bits to read the block; S2) Compare the number of failed bits for each wordline and identify the parts of the wordline that have caused consistency deviations as the number of reads increases; S3) Based on the distribution of the number of failed bits of all wordlines, obtain the poor wordlines that deviate from the consistency of the number of reads; S4) Determine whether the obtained poor wordline should be grouped using wordline; S5) If so, then the wordline distributions in the wordline groupings are regrouped according to their characteristics; The grouping includes the Normal group and the Bad group; If not, no action is required; The characteristic on which the wordline is redistributed in step S5) is the error correction capability of the low-density parity-check code; S6) Write random data to NAND for the wordline of the Bad group, write user data sequentially to NAND for the Normal group, and write sequentially to NAND for the wordline that is not grouped by wordline.
2. The method for increasing NAND read count based on wordline distribution as described in claim 1, characterized in that, Step S3) presents the poor wordline graphically, with the horizontal axis representing the wordline and the vertical axis representing the number of failed bits.
3. The method for increasing NAND read count based on wordline distribution as described in claim 1, characterized in that, The error correction capability of the low-density parity-check code is 55 bits / kb or 70 bits / kb.
4. The method for increasing NAND read count based on wordline distribution as described in claim 1, characterized in that, In step S6), when writing user data sequentially to the NAND of the Normal group, the Bad group is automatically skipped sequentially.
Citation Information
Patent Citations
Method for dividing NANDFlash Wordline group
CN111081306A
Memory management method and storage controller
US20190129776A1