Voltage tracking system with long-term hold characteristics

Abstract

The present application belongs to the field of electronic circuit technology, and more particularly relates to a voltage tracking system and method with a long-term holding characteristic, comprising: a holding output module, comprising a constant current source, a potentiometer, and an output drive circuit electrically connected in sequence, the constant current source outputting a constant current to the potentiometer, the potentiometer generating a holding voltage based on the constant current, and the output drive circuit outputting the holding voltage; a comparison module for comparing the amplitude between the holding voltage and the voltage to be tracked and outputting a logic signal; a control module for generating a controllable resistor network direction signal based on the logic signal and a manual reset signal, the controllable resistor network direction signal including an upward tracking signal and a downward tracking signal; the potentiometer being configured to adjust its own resistance value based on the upward tracking signal or the downward tracking signal. This voltage tracking system can automatically adjust the holding voltage, ensuring that the output voltage of the system is not easily degraded and unstable over time.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a voltage tracking system with a long-term holding characteristic. Background Art

[0002] In related technologies, when a system needs to maintain output, as time goes by, the output voltage of the system tends to decline over time, and thus cannot maintain output, affecting the normal use of the system.

[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute prior art known to ordinary technicians in this field. Summary of the Invention

[0004] In view of at least one of the above technical problems, the present application provides a voltage tracking system with a long-term maintenance characteristic, which solves the problem that when the system needs to maintain output, the output voltage of the system output tends to decline over time as time goes by, and thus cannot maintain output, affecting the normal use of the system.

[0005] According to a first aspect of an embodiment of the present application, a voltage tracking system with a long-term holding characteristic is provided, comprising:

[0006] A holding output module includes a constant current source, a potentiometer, and an output drive circuit electrically connected in sequence. The constant current source outputs a constant current to the potentiometer, and the potentiometer generates a holding voltage according to the constant current. The output drive circuit then outputs the holding voltage. The potentiometer is configured to have a variable resistance value.

[0007] The comparison module is used to compare the amplitude between the hold voltage and the voltage to be tracked and output a logic signal. The voltage to be tracked is configured as an external sampling input.

[0008] A control module, configured to generate a controllable resistor network direction signal according to a logic signal and a manual reset signal, wherein the controllable resistor network direction signal includes an upward tracking signal and a downward tracking signal;

[0009] The potentiometer is configured to adjust its own resistance according to the upward tracking signal or the downward tracking signal so that the holding voltage gradually becomes consistent with the voltage to be tracked.

[0010] The present application has the following technical effects: the voltage tracking system has a simple and reliable circuit structure and is easy to operate. It can automatically adjust the holding voltage so that the holding voltage is consistent with the voltage to be tracked, thereby ensuring that the output voltage of the system is not easily degraded and unstable over time.

[0011] In some possible implementations, the potentiometer is configured to gradually increase its resistance according to the upward tracking signal, thereby increasing the holding voltage.

[0012] In some possible implementations, the potentiometer is configured to gradually reduce its resistance according to the downward tracking signal, thereby decreasing the holding voltage.

[0013] In some possible implementations, the output drive circuit includes a first buffer amplifier, a low-pass filter, and a second buffer amplifier connected in sequence, the first buffer amplifier is electrically connected to the potentiometer, the second buffer amplifier is electrically connected to the comparison module, and the second buffer amplifier is configured to output a holding voltage.

[0014] In some possible implementations, the voltage tracking system further includes a clock module, which is configured to obtain an enable signal output by the control module. The clock module is further configured to output a clock signal according to the enable signal, and the clock signal is used to provide a tracking beat for the potentiometer.

[0015] In some possible implementations, the control module includes a D flip-flop, a two-input AND gate, a first NOT gate, a second NOT gate, a first buffer, a second buffer, a first node, a second node and a third node, the input of the first NOT gate is coupled to the comparison module, the output of the first NOT gate is coupled to the first node, the input of the second buffer is coupled to the first node, the output of the second buffer is coupled to the potentiometer, the first end of the D flip-flop is coupled to the first node, the second end of the D flip-flop is coupled to the second node, the third end of the D flip-flop is coupled to the third node, the input of the second NOT gate is coupled to the third node, the output of the second NOT gate is coupled to the clock module, the input of the first buffer is coupled to the manual input, the output of the first buffer is coupled to the second node, the first end of the two-input AND gate is coupled to the second node, the second end of the two-input AND gate is coupled to the third node, and the third end of the two-input AND gate is used to output a lock signal.

[0016] In some possible implementations, the clock module includes a two-input NAND gate, a first resistor, a first capacitor, a fourth node and a fifth node, the first end of the two-input NAND gate is coupled to the second NAND gate, the second end of the two-input NAND gate is coupled to the fourth node, the third end of the two-input NAND gate is coupled to the fifth node, the two ends of the first resistor are coupled to the fourth node and the fifth node respectively; one end of the first capacitor is coupled to the fourth node, the other end of the first capacitor is grounded, and the fifth node is used to output a clock signal.

[0017] According to a second aspect of an embodiment of the present application, a voltage tracking method is provided. The method includes a holding output module and a comparison module. The holding output module includes a constant current source, a potentiometer, and an output drive circuit electrically connected in sequence. The constant current source outputs a constant current to the potentiometer. The potentiometer generates a holding voltage based on the constant current. The output drive circuit then outputs the holding voltage. The potentiometer is configured to have a variable resistance. The comparison module is configured to compare the amplitude of the holding voltage with the voltage to be tracked and output a logic signal.

[0018] The method also includes:

[0019] Generate a controllable resistor network direction signal according to the logic signal and the manual reset signal, the controllable resistor network direction signal including an upward tracking signal and a downward tracking signal;

[0020] The potentiometer is configured to adjust its own resistance according to the upward tracking signal or the downward tracking signal so that the holding voltage gradually becomes consistent with the voltage to be tracked.

[0021] In some possible implementations, the potentiometer is configured to gradually increase its resistance according to the upward tracking signal, thereby increasing the holding voltage.

[0022] In some possible implementations, the potentiometer is configured to gradually reduce its resistance according to the downward tracking signal, thereby decreasing the holding voltage.

[0023] The present application is further described below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0025] Figure 1 is a schematic structural diagram of a voltage tracking system shown in an embodiment of the present application;

[0026] Figure 2 Schematic diagram of the circuit structure of the control module shown in the embodiment of the present application;

[0027] Figure 3 Schematic diagram of the circuit structure of the clock module shown in the embodiment of the present application;

[0028] Figure 4 is a working state transition diagram of the control module shown in the embodiment of the present application; DETAILED DESCRIPTION

[0029] To make the above-mentioned objects, features, and advantages of the present application more clearly understood, the specific embodiments of the present application are described in detail below with reference to the accompanying drawings. The following description sets forth many specific details to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways than those described herein, and those skilled in the art can make similar improvements without violating the scope of the present application. Therefore, the present application is not limited to the specific embodiments disclosed below.

[0030] In related technologies, when a system needs to maintain output, the output voltage of the system tends to decline over time, and thus cannot maintain output, affecting the normal use of the system. This voltage tracking system has a simple and reliable circuit structure and is easy to operate. It can automatically adjust the holding voltage to ensure that the holding voltage is consistent with the voltage to be tracked, thereby ensuring that the output voltage of the system is not easily degraded and unstable over time.

[0031] See also Figure 1 、 Figure 2 、 Figure 3 and Figure 4 ,in, Figure 1 is a schematic structural diagram of a voltage tracking system shown in an embodiment of the present application; Figure 2 Schematic diagram of the circuit structure of the control module shown in the embodiment of the present application; Figure 3 Schematic diagram of the circuit structure of the clock module shown in the embodiment of the present application; Figure 4 It is a working state transition diagram of the control module shown in the embodiment of the present application; the first aspect of the embodiment of the present application provides a voltage tracking system with long-term holding characteristics, including a holding output module 100, a comparison module 200, a control module 300 and a clock module 400.

[0032] See Figure 1 ,The specific structure and principle of the voltage tracking system are introduced in detail below.

[0033] The holding output module 100 includes a constant current source 110, a potentiometer 120, and an output drive circuit 130 electrically connected in sequence. The constant current source 110 outputs a constant current to the potentiometer 120. The potentiometer 120 generates a holding voltage based on the constant current. The output drive circuit 130 then outputs the holding voltage. The potentiometer 120 is configured to have a variable resistance.

[0034] The comparison module 200 is used to compare the amplitudes of the hold voltage and the voltage to be tracked and output a logic signal. The voltage to be tracked is configured as an external sampling input.

[0035] The control module 300 is used to generate a controllable resistor network direction signal according to the logic signal and the manual reset signal. The controllable resistor network direction signal includes an upward tracking signal and a downward tracking signal.

[0036] The potentiometer 120 is configured to adjust its own resistance according to the upward tracking signal or the downward tracking signal so that the holding voltage gradually becomes consistent with the voltage to be tracked.

[0037] In the embodiment of the present application, the constant current source 110 is used to provide a low-noise reference current. The circuit structure and principle of the constant current source 110 are well known to those skilled in the art and will not be described in detail here.

[0038] In the embodiment of the present application, the potentiometer 120 is used to achieve linear resistance increase or decrease. The structure and principle of the potentiometer 120 are well known to those skilled in the art and will not be described in detail here.

[0039] In the embodiment of the present application, the comparison module 200 is used to compare the amplitudes of the held voltage and the voltage to be tracked, and output a logic signal. The comparison module 200 may include a comparator composed of an operational amplifier. The circuit structure and principles of the comparator are well known to those skilled in the art and are not described in detail here. The logic signal may include a high-level signal and a low-level signal.

[0040] When the holding voltage is greater than the voltage to be tracked, a high level signal is output, and when the holding voltage is less than the voltage to be tracked, a low level signal is output.

[0041] In this embodiment of the present application, the control module 300 can generate a controllable resistor network direction signal based on a logic signal and a manual reset signal. This controllable resistor network direction signal is used to cause the potentiometer 120 to adjust its resistance so that the holding voltage gradually becomes consistent with the voltage to be tracked. When the holding voltage and the voltage to be tracked are consistent, the control module 300 issues a lock signal to lock the holding voltage and maintain the holding voltage constant.

[0042] The manual reset signal is a manually operated input signal, and may include a high-level signal and a low-level signal. Furthermore, the specific input signal operation mode of the manual reset signal is not specifically limited, and may be a button input structure. For example, when the button is pressed, the input signal remains high, and when the button is pressed again to reset, the input signal becomes low.

[0043] In other embodiments, the specific input signal operation mode of the manual reset signal can be a knob input structure. For example, when the knob is rotated to the high-level signal position, the input high-level signal is maintained; when the knob is rotated to the low-level signal position, the input low-level signal is maintained.

[0044] It is worth noting that the controllable resistor network direction signal includes an upward tracking signal and a downward tracking signal. Specifically, when the controllable resistor network direction signal is an upward tracking signal, the potentiometer 120 gradually increases the resistance value, causing the holding voltage to rise. When the controllable resistor network direction signal is a downward tracking signal, the potentiometer 120 gradually decreases the resistance value, causing the holding voltage to fall.

[0045] In some possible implementations, the output drive circuit 130 includes a first buffer amplifier, a low-pass filter, and a second buffer amplifier connected in sequence, the first buffer amplifier is electrically connected to the potentiometer 120, the second buffer amplifier is electrically connected to the comparison module 200, and the second buffer amplifier is configured to output a holding voltage.

[0046] In the embodiment of the present application, the first buffer amplifier and the second buffer amplifier are used to isolate the potentiometer 120 from the terminal load to prevent the potentiometer 120 from output pulling due to changes in the terminal load.

[0047] In some possible implementations, the voltage tracking system further includes a clock module 400 , which is configured to obtain an enable signal output by the control module 300 . The clock module 400 is further configured to output a clock signal according to the enable signal, which is used to provide a tracking rhythm for the potentiometer 120 .

[0048] In the embodiment of the present application, a clock signal is used to generate a target frequency. In actual applications, the potentiometer 120 changes its resistance based on the clock signal and the direction signal of the controllable resistor network. That is, the clock signal provides a periodic beat for the potentiometer 120. For example, at each beat, the potentiometer 120 adjusts its resistance based on the direction signal of the controllable resistor network. This ensures that the resistance changes are not chaotic and that the control module 300 has sufficient time to perform logical processing.

[0049] For some possible implementations, see Figure 2The control module 300 includes a D flip-flop 310, a two-input AND gate 320, a first NOT gate 330, a second NOT gate 340, a first buffer 350, a second buffer 360, a first node N10, a second node N20, and a third node N30. The input terminal of the first NOT gate 330 is coupled to the comparison module 200, the output terminal of the first NOT gate 330 is coupled to the first node N10, the input terminal of the second buffer 360 is coupled to the first node N10, the output terminal of the second buffer 360 is coupled to the potentiometer 120, the first terminal of the D flip-flop 310 is coupled to the first node N10, and the D The second end of the trigger 310 is coupled to the second node N20, the third end of the D trigger 310 is coupled to the third node N30, the input end of the second NOT gate 340 is coupled to the third node N30, the output end of the second NOT gate 340 is coupled to the clock module 400, the input end of the first buffer 350 is coupled to the manual input end, the output end of the first buffer 350 is coupled to the second node N20, the first end of the two-input AND gate 320 is coupled to the second node N20, the second end of the two-input AND gate 320 is coupled to the third node N30, and the third end of the two-input AND gate 320 is used to output a lock signal.

[0050] In the embodiment of the present application, the D flip-flop 310 is designed as a latch structure. For example, when the comparison module 200 outputs a low-level signal, it is processed into a high-level signal by the first NOT gate 330 and triggers the latch function of the D flip-flop 310 .

[0051] When the D flip-flop 310 triggers the latch state and the manual reset signal is invalid, the lock signal outputs a logic high level, indicating that the voltage to be tracked has been tracked. Otherwise, the lock signal outputs a logic low level, indicating that the voltage to be tracked is being tracked.

[0052] In addition, Table 1 is a truth table of the control module 300, as follows:

[0053]

[0054] Table 1

[0055] In Table 1, x represents no input, 0 represents a low-level signal, 1 represents a high-level signal, and ↓ represents a transition from a high-level signal to a low-level signal.

[0056] See Figure 2 As shown in Table 1, in order to improve the stability of the input signal at the manual input terminal, a first buffer 350 is provided. When the manual reset signal is low, the D flip-flop 310 will be reset and the lock signal will output a logic low; when the manual reset signal is high, the D flip-flop 310 will be released from reset.

[0057] See Figure 4 , Figure 43 is a working state transition diagram of the control module 300, wherein S0 represents the system reset state, S1 represents the upward tracking state, S2 represents the downward tracking state, and S3 represents the tracking lock state.

[0058] In some possible implementations, the clock module 400 includes a two-input NAND gate 410, a first resistor, a first capacitor C1, a fourth node N40 and a fifth node N50, the first end of the two-input NAND gate 410 is coupled to the second NOT gate 340, the second end of the two-input NAND gate 410 is coupled to the fourth node N40, the third end of the two-input NAND gate 410 is coupled to the fifth node N50, the two ends of the first resistor R1 are coupled to the fourth node N40 and the fifth node N50, respectively; one end of the first capacitor C1 is coupled to the fourth node N40, the other end of the first capacitor C1 is grounded, and the fifth node N50 is used to output a clock signal.

[0059] According to a second aspect of the present application, a voltage tracking method is provided. The method includes a holding output module 100 and a comparison module 200. The holding output module 100 includes a constant current source 110, a potentiometer 120, and an output drive circuit 130 electrically connected in sequence. The constant current source 110 outputs a constant current to the potentiometer 120. The potentiometer 120 generates a holding voltage based on the constant current. The output drive circuit 130 then outputs the holding voltage. The potentiometer 120 is configured to have a variable resistance. The comparison module 200 is configured to compare the amplitude of the holding voltage with the voltage to be tracked and output a logic signal.

[0060] The method also includes:

[0061] Generate a controllable resistor network direction signal according to the logic signal and the manual reset signal, the controllable resistor network direction signal including an upward tracking signal and a downward tracking signal;

[0062] The potentiometer 120 is configured to adjust its own resistance according to the upward tracking signal or the downward tracking signal so that the holding voltage gradually becomes consistent with the voltage to be tracked.

[0063] In some possible implementations, the potentiometer 120 is configured to gradually increase its resistance according to the upward tracking signal, thereby increasing the holding voltage.

[0064] In some possible implementations, the potentiometer 120 is configured to gradually reduce the resistance value according to the downward tracking signal to reduce the holding voltage.

[0065] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0066] It should also be understood that in the embodiments of this application, the term "and / or" is merely a description of the relationship between associated objects, indicating that three possible relationships exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, or B exists alone. Furthermore, the character " / " in this document generally indicates that the associated objects are in an "or" relationship.

[0067] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0068] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0069] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, or can be electrical, mechanical or other forms of connection.

[0070] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiments of the present application.

[0071] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0072] The above are merely preferred embodiments of the present application and do not constitute any form of limitation to the present application. Any person skilled in the art can, without departing from the scope of the technical solution of the present application, use the methods and technical contents disclosed above to make many possible changes and modifications to the technical solution of the present application, or modify it into an equivalent embodiment with equivalent changes. Therefore, all equivalent changes made based on the shape, structure and principle of the present application without departing from the content of the technical solution of the present application should be included in the scope of protection of the present application.

Claims

1. A voltage tracking system with long-term holding characteristics, characterized in that: include: A holding output module includes a constant current source, a potentiometer, and an output drive circuit electrically connected in sequence, wherein the constant current source outputs a constant current to the potentiometer, the potentiometer generates a holding voltage according to the constant current, and the output drive circuit outputs the holding voltage, and the potentiometer is configured to have a variable resistance; The comparison module is used to compare the amplitude between the hold voltage and the voltage to be tracked and output a logic signal. The voltage to be tracked is configured as an external sampling input. A control module, configured to generate a controllable resistor network direction signal according to a logic signal and a manual reset signal, wherein the controllable resistor network direction signal includes an upward tracking signal and a downward tracking signal; The potentiometer is configured to adjust its own resistance according to the upward tracking signal or the downward tracking signal, so that the holding voltage gradually becomes consistent with the voltage to be tracked; The voltage tracking system further includes a clock module, wherein the clock module is configured to obtain an enable signal output by the control module, and the clock module is further configured to output a clock signal according to the enable signal, wherein the clock signal is used to provide a tracking beat for the potentiometer; The control module includes a D flip-flop, a two-input AND gate, a first NOT gate, a second NOT gate, a first buffer, a second buffer, a first node, a second node, and a third node. The input of the first NOT gate is coupled to the comparison module, the output of the first NOT gate is coupled to the first node, the input of the second buffer is coupled to the first node, the output of the second buffer is coupled to the potentiometer, the first terminal of the D flip-flop is coupled to the first node, the second terminal of the D flip-flop is coupled to the second node, the third terminal of the D flip-flop is coupled to the third node, the input of the second NOT gate is coupled to the third node, the output of the second NOT gate is coupled to the clock module, the input of the first buffer is coupled to the manual input terminal, the output of the first buffer is coupled to the second node, the first terminal of the two-input AND gate is coupled to the second node, the second terminal of the two-input AND gate is coupled to the third node, and the third terminal of the two-input AND gate is used to output a lock signal.

2. The voltage tracking system with long-term holding characteristics according to claim 1, characterized in that: The potentiometer is configured to gradually increase resistance according to the upward tracking signal to increase the holding voltage.

3. The voltage tracking system with long-term holding characteristics according to claim 1, characterized in that: The potentiometer is configured to gradually reduce a resistance value according to the downward tracking signal, thereby decreasing the holding voltage.

4. The voltage tracking system with long-term holding characteristics according to claim 1, characterized in that: The output driving circuit includes a first buffer amplifier, a low-pass filter, and a second buffer amplifier connected in sequence. The first buffer amplifier is electrically connected to the potentiometer. The second buffer amplifier is electrically connected to the comparison module. The second buffer amplifier is configured to output a holding voltage.

5. The voltage tracking system with long-term holding characteristics according to claim 1, characterized in that: The clock module includes a two-input NAND gate, a first resistor, a first capacitor, a fourth node and a fifth node. The first end of the two-input NAND gate is coupled to the second NAND gate, the second end of the two-input NAND gate is coupled to the fourth node, the third end of the two-input NAND gate is coupled to the fifth node, the two ends of the first resistor are coupled to the fourth node and the fifth node respectively; one end of the first capacitor is coupled to the fourth node, the other end of the first capacitor is grounded, and the fifth node is used to output the clock signal.

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