Method, system, and storage medium for re-mastering low dynamic range content for high dynamic range display
By using machine learning models to generate extended graphs and combining local and global operators, the problems of computational resource consumption and visual artifacts when extending low dynamic range images to high dynamic range images are solved, achieving a more natural and efficient image extension effect.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- NVIDIA CORP
- Filing Date
- 2022-08-10
- Publication Date
- 2026-04-17
AI Technical Summary
Existing technologies often result in overly bright image content and visual artifacts when extending low dynamic range images to high dynamic range images. Furthermore, traditional inversion tone mapping techniques consume significant computational resources and are not easily modified.
By employing machine learning models, particularly convolutional neural networks, to generate extended graphs and combine local and global operators, the dynamic range expansion process of images is optimized, reducing computational resource consumption and improving image quality.
It achieves a more natural high dynamic range image extension, reduces computational resource consumption, and provides faster processing speed, while allowing manual optimization of image quality.
Smart Images

Figure CN116757937B_ABST
Abstract
Description
Technical Field
[0001] The embodiments disclosed herein are generally related to image processing, and more specifically, to extending the dynamic range of image content. Background Technology
[0002] Image content is typically generated with a specific display resolution and dynamic range. Display resolution corresponds to the number of pixels in the image, and dynamic range indicates the range of permissible values for each pixel. For example, image content might have high-definition (HD) resolution and standard dynamic range (SDR). High-definition resolution might indicate a width of 1920 pixels and a height of 1080 pixels, while SDR might indicate that each pixel has a value in the range of 0-255 (e.g., 8-bit value) or 0-1023 (e.g., 10-bit value), with a peak display brightness of approximately 100 cd / m². 2 The black level is approximately 0.1 cd / m². 2 And Rec.709 or sRGB color gamut. Attached Figure Description
[0003] The contents of this disclosure will be more fully understood from the following detailed description and the accompanying drawings of various embodiments thereof. However, the drawings should not be construed as limiting the contents of this disclosure to the specific embodiments, but are merely for explanation and understanding.
[0004] Figure 1 An example computing environment is shown, which includes images and techniques for extending the dynamic range of one or more images, according to some embodiments of this disclosure.
[0005] Figure 2 This is a detailed block diagram of a processing apparatus including techniques for extending the dynamic range of one or more images, according to some embodiments of the present disclosure.
[0006] Figure 3 This is a flowchart of a method for extending the dynamic range of one or more images according to some embodiments of this disclosure.
[0007] Figure 4 This is a block diagram of an example computer system in which embodiments of the present disclosure may operate.
[0008] Figure 5A The inference and / or training logic according to at least one embodiment is illustrated.
[0009] Figure 5B The inference and / or training logic according to at least one embodiment is illustrated.
[0010] Figure 6 An example data center system according to at least one embodiment is shown.
[0011] Figure 7 A computer system according to at least one embodiment is shown.
[0012] Figure 8 A computer system according to at least one embodiment is shown.
[0013] Figure 9 At least a portion of a graphics processor according to one or more embodiments is shown.
[0014] Figure 10 At least a portion of a graphics processor according to one or more embodiments is shown.
[0015] Figure 11 This is an example data flow diagram for an advanced computing pipeline according to at least one embodiment.
[0016] Figure 12 This is a system diagram of an example system for training, adapting, instantiating, and deploying machine learning models in an advanced computing pipeline, according to at least one embodiment.
[0017] Figure 13A and 13B A data flow diagram of the process for training a machine learning model according to at least one embodiment is shown, as well as a client-server architecture for enhancing annotation tools with a pre-trained annotation model. Detailed Implementation
[0018] Image content typically includes dynamic range and color gamut, which are much lower than what many modern display devices support. For example, a typical game engine can generate content with standard dynamic range (SDR), but most recent TVs and monitors are capable of supporting high dynamic range (HDR) content. The dynamic range of content can be correlated with the range of luminance or brightness displayed without perceptible errors, and can be expressed as the ratio between the maximum and minimum tonal values of an image. Extending SDR content to HDR content traditionally involves using inverse tone mapping to expand the luminance range, and often results in overly bright parts of the image content and visual artifacts (e.g., halos, banding), making the HDR content look less natural.
[0019] Various aspects of this disclosure address the aforementioned and other shortcomings by providing techniques for an expansion process that uses a machine learning model (e.g., a convolutional neural network (CNN)) to expand the dynamic range of image content and is an enhancement of conventional inversion mapping techniques. In one or more embodiments, a machine learning model is implemented that takes an image with a low dynamic range (e.g., 8-bit RGB with low contrast) as input and can output one or more expansion maps for updating the image content. The expansion maps may include expansion maps that identify the locations of one or more overexposed regions in the image. Overexposed regions may correspond to specular highlights, user interface elements (e.g., head-up displays), other attributes, or combinations thereof. Another expansion map may correspond to regions with banding or regions where banding may occur during expansion and may indicate values for performing debanding. These values can be used to minimize banding and may have one value for each region of the image (e.g., each pixel location), and may be larger for locations along the banding (e.g., the outline of a halo).
[0020] This technique uses the output of a machine learning model as input to one or more image operators. Image operators may include one or more global operators, one or more local operators, or a combination thereof. Global operators (e.g., clamped bilateral filters) may use one or more extended maps to update image data and smooth contours in striped regions without smoothing all contours in the image. Local operators (e.g., 0.5 multipliers) may use one or more extended maps to identify and reduce corresponding overexposed areas. The updated image data may be in bitmap form and can be used as input to an HDR transfer function that encodes the image data to produce the final format of the HDR image (e.g., 10-bit encoding conforming to Rec.2020 or Rec.2100). The formatted HDR image can then be provided to a display device for display to the user.
[0021] The machine learning model can provide multi-channel output, and some of these output channels can be used as feedback for subsequent image processing. The output channels can include expansion maps, and each expansion map can correspond to one or more output channels (e.g., layers of the output matrix). The machine learning model can include feedback loops, where one or more output channels from the processed frame can be used as input to the machine learning model to process one or more subsequent frames. This feedback can enable the machine learning model to provide a temporal aspect (e.g., temporal stability) that takes into account motion between frames. This may allow the machine learning model to use motion between frames to enhance the expansion. For example, it can make stationary regions of an image easier to distinguish from non-stationary content (e.g., heads-up display versus scene movement).
[0022] The techniques disclosed herein can replace or complement inversion mapping techniques used to extend low dynamic range content (e.g., SDR) to high dynamic range content (e.g., HDR). Inversion mapping is typically performed without a machine learning model, while less accurate inversion mapping using a machine learning model allows the model to perform the entire conversion and output the final HDR image. Allowing a machine learning model to perform the entire conversion can result in a very large machine learning model, which can consume significant computational resources and time to convert low dynamic range content, making it less transparent and less easily modified by the end user. The techniques disclosed in the embodiments herein use a much smaller machine learning model that consumes fewer computational resources and can run much faster (e.g., in real-time), while still providing more natural HDR content than inversion mapping techniques that use a machine learning model to perform the entire conversion. The smaller model can also generate an extension map that can be examined and manually modified to further optimize the extension of the image's dynamic range.
[0023] The various aspects of the above-described techniques are described in detail below by way of example rather than limitation. The examples provided below discuss techniques incorporated into pipelines of one or more image signal processors, and which can be applied after an image is received from an image sensor and before it is persistently stored. In other examples, the technique can be used to update an image after the image data has been persistently stored.
[0024] Figure 1 An example computing environment 100 is shown, illustrating a technique for performing dynamic range expansion 101 on one or more images according to some embodiments of the present disclosure. The computing environment 100 may include images 110A-B, an image expander 120, a machine learning model 130, expanded images 135A-B, and operators 140A-B.
[0025] Images 110A-B may include image content and represent the image content using image values. Image values may correspond to pixel values derived from or from an image sensor having a pixel sensor. Each image may be a color image or a monochrome image and may correspond to images in a still image (e.g., a photograph), an image sequence (e.g., frames of a video), or a combination thereof. Images may also be synthetic images not generated by an image sensor (e.g., frames of a game). Image 110A may be an input image of Dynamic Range Extension 101, and image 110B may be an output image of Dynamic Range Extension 101. Each of images 110A-B may correspond to a set of values, and this set may have a size (e.g., set size), and each value may have a size (e.g., pixel size). The set size may be referred to as resolution and may be measured in the number of pixels; it may be 720x480 (e.g., Standard Definition (SD)), 1920x1800 (High Definition (HD)), 3840x2160 (Ultra High Definition (4K UHD)), 7680x4320 (8K UHD), or other sizes or scales. The value size can be referred to as the pixel size and can have a range based on the number of bits (e.g., pixel value range). For example, the value size can be 8 bits (e.g., range 0-255), 10 bits (e.g., range 0-1023), 12 bits (e.g., range 0-4K), other bit sizes, or combinations thereof. The value size (e.g., pixel size) can be related to the dynamic range of the corresponding image.
[0026] The dynamic range of each image in images 110A-B is the range of brightness between the bright areas (e.g., the brightest areas) and the dark areas (e.g., the darkest areas) of the image. In one example, dynamic range may be expressed as the ratio between one or more brightest pixels (e.g., the maximum brightness value) and one or more darkest pixels (e.g., the minimum brightness value). In another example, dynamic range may be expressed as bit depth (e.g., 8-bit), color gamut (e.g., Rec 709 or sRGB), other digital or non-digital values, or combinations thereof. Because of dynamic range extension 101, the dynamic range of input image 110A may be smaller than the dynamic range of output image 110B. For example, input image 110A may be a standard dynamic range (SDR) image, a low dynamic range (LDR) image, or other terms, while output image 110B may be a high dynamic range (HDR) image, a wide dynamic range, extended dynamic range, extended dynamic range, or other terms. The term dynamic range may be the same as or similar to brightness range, illuminance range, luminance range, intensity range, other ranges, or combinations thereof.
[0027] The dynamic range of image 110A can be expanded as represented by dynamic range expansion 101 to produce output image 110B. In one example, dynamic range expansion 101 may be part of or supplement to an inversion tone mapping procedure. In another example, dynamic range expansion 101 may replace or supersede an inversion tone mapping procedure. In either example, dynamic range expansion 101 may be a technique performed by one or more processing devices using one or more image expanders 120, machine learning models 130, and image operators 140.
[0028] Image expander 120 can receive image 110A as input and can expand the image to produce image data 122. Expanding the image may involve changing the value size, the value itself, the set size, or a combination thereof. For example, image 110A may have a set of values with a specific size (e.g., 8 bits) and a specific range (e.g., 0-255), and image expander 120 can generate an updated set that includes values with a larger size (e.g., 12 bits) and a larger range (e.g., 0-4,095). Image expander 120 can also expand these values based on the size of the expanded values. Value expansion may involve one or more mathematical operations and can be linear, non-linear, or a combination thereof. Image expander 120 can avoid changing the set size (e.g., the same resolution), expand the set size (e.g., increase the resolution), or reduce the set size (e.g., decrease the resolution). Image expander 120 can expand image 110A before, during, or after machine learning model 130 is used to process image 110A.
[0029] Machine learning model 130 can be any model that takes image 110A as input and can output one or more extended images 135A-B. Machine learning model 130 can be or includes one or more mathematical models, statistical models, other models, or combinations thereof. Machine learning model 130 can be a deep neural network (DNN) with multiple layers (e.g., 3+ layers). At least one of the multiple layers can include convolutional operations (e.g., convolutional layers), and machine learning model 130 can be referred to as a convolutional neural network (CNN).
[0030] Machine learning model 130 may also or alternatively include one or more layers that perform upsampling, and are identical or similar to an autoencoder with one or more decoding layers, a u-net with one or more deconvolutional layers (e.g., upconvolutional layers), other deep neural networks, or combinations thereof. Upsampling (e.g., upsampling layers) may receive data in the form of graphs (e.g., activation maps, feature maps, expansion maps) and may increase the dimension or resolution of the received data. Upsampling may counteract the downsampling done by pooling operations and output an image that is closer to the dimension or resolution of the input image (e.g., the input image and the output expansion map have the same or similar dimension / resolution).
[0031] One type of machine learning model that can be used to perform some or all of the tasks described above is an artificial neural network, such as a deep neural network. Artificial neural networks typically include feature representation components with classifier or regression layers that map features to the desired output space. For example, a convolutional neural network (CNN) carries multiple layers of convolutional filters. Pooling and non-linear processing are performed at lower layers, and multiple perceptrons are typically added on top of these lower layers to map the top-level features extracted by the convolutional layers to a decision (e.g., classification output). Deep learning is a class of machine learning algorithms that use a cascade of multiple layers of non-linear processing units for feature extraction and transformation. Each successive layer uses the output of the previous layer as its input. Deep neural networks can learn in a supervised (e.g., classification) and / or unsupervised (e.g., pattern analysis) manner. Deep neural networks consist of a hierarchical structure of layers, where different layers learn different levels of representations corresponding to different levels of abstraction. In deep learning, each level learns to transform its input data into a slightly more abstract and complex representation. For example, in image recognition applications, the raw input might be a pixel matrix; the first representation layer can abstract the pixels and encode edges; the second layer can synthesize and encode the arrangement of edges; the third layer can encode higher-level shapes (e.g., teeth, lips, gums, etc.); and the fourth layer can identify the scanned role. It's worth noting that the deep learning process can learn on its own which features should be optimally placed at which level. The "depth" in "deep learning" refers to the number of layers through which data is transformed. More precisely, deep learning systems have a considerable Credit Assignment Path (CAP) depth. CAP stands for the chain of transformations from input to output. CAP describes the underlying causal relationship between the input and output. For feedforward neural networks, the CAP depth might be the network depth itself, perhaps the number of hidden layers plus one. For recurrent neural networks, where signals can propagate through layers more than once, the CAP depth could be infinite.
[0032] In one embodiment, the U-net architecture is used for one or more machine learning models. U-net is a deep neural network that combines an encoder and a decoder, with appropriate concatenation between them to capture both local and global features. The encoder is a series of convolutional layers that, during input-to-output processing, increase the number of channels while decreasing the height and width, while the decoder increases the height and width and decreases the number of channels. Layers from the encoder with the same image height and width can be concatenated with the output of the decoder. Any or all convolutional layers from the encoder and decoder can use conventional or depthwise separable convolutions.
[0033] In one embodiment, one or more machine learning models are recurrent neural networks (RNNs). An RNN is a class of neural networks that includes memory to enable the neural network to capture temporal dependencies. An RNN is able to learn an input-output mapping that depends on the current input and past inputs. An RNN can be trained using a training dataset to generate a fixed number of outputs (e.g., classifying time-varying data, such as video data, into a fixed number of categories). One type of RNN that can be used is a Long Short-Term Memory (LSTM) neural network.
[0034] A common architecture for RNNs is LSTM (Long Short-Term Memory). Unfortunately, LSTM is not well-suited for images because it cannot capture spatial information like convolutional networks. For this reason, a variant of LSTM—containing convolutional operations within LSTM units—can be utilized. ConvLSTM replaces matrix multiplication with convolutional operations at each gate within an LSTM unit. By doing so, it captures latent spatial features by performing convolutional operations on multidimensional data. The main difference between ConvLSTM and LSTM is the number of input dimensions. Since LSTM input data is one-dimensional, it is not suitable for spatial sequence data such as video, satellite, and radar image datasets. ConvLSTM is designed for three-dimensional data as its input. In one embodiment, a CNN-LSTM machine learning model is used. CNN-LSTM is an integration of CNN (convolutional layers) and LSTM. First, the CNN part of the model processes the data, and the one-dimensional result is fed back to the LSTM model.
[0035] Machine learning model 130 can be a trained machine learning model trained using a set of annotated images. This image set can be referred to as the training set and can include augmented images, synthetic images, composite images, simulated images, other images, or combinations thereof. Images can be still images (such as photographs), moving images (such as video frames), other images, or combinations thereof. Images can be associated with annotations embedded in or separate from the images (e.g., in a separate annotation file). Annotations can be part of the original image or can be subsequently added to the original image by a person, program, processing device, or a combination thereof.
[0036] Annotations associated with the training image set can indicate portions of the image corresponding to banded regions, overexposed regions, other regions, or combinations thereof. Annotations can indicate a region by identifying specific pixel values or specific pixel locations within the region, outside the region, on the contour of the region, or combinations thereof. Banded regions can include portions of the image with bands (e.g., color bands). Banding can be an image artifact that occurs when digitally quantizing portions of the image representing a natural gradient (e.g., sunset). A natural gradient should be represented as a gradual change in shadow, but is often represented as bands with less gradual shadow change (e.g., abrupt contours). The contours of the bands differ from other contours in the image (e.g., from object boundaries).
[0037] Overexposed areas may correspond to overexposed pixels in an image, or may become overexposed upon expansion. In one example, an overexposed area may correspond to a highly reflective region or specular reflection in an image. Specular reflection can be or includes specular highlights (e.g., bright spots) that appear on a reflective object when illuminated. Overexposed areas may also, or alternatively, correspond to user interface elements (UIs) that are overlaid on other content in an image. UI elements can be graphical user interface (GUI) elements that are used as user input elements (e.g., control elements, buttons, knobs), user output elements (e.g., display elements, maps, compasses, speedometers, boundaries, lists, tables, guides), or combinations thereof. In one example, the image may be for a game engine, and the overexposed area may include user interface elements for a head-up display (HUD). In another example, the image may be from a media player, and the overexposed area may include user interface elements for navigating content (e.g., play, pause, remaining time, content guide, captions, or closet captions).
[0038] The training framework can analyze annotated images and generate or update the machine learning model 130. The training framework can identify patterns in the training image set and adjust the weights, biases, filters, kernels, and other parts of the machine learning model 130 to indicate the mapping between the input images and the model output, which includes extended graphs 135A-B. In one example, the machine learning model 130 may be a single model that generates two extended graphs 135A-B. In another example, the machine learning model 130 may include multiple models, and at least one of the models may be used to generate extended graph 135A, and at least one of the models may be used to generate extended graph 135B.
[0039] Training a neural network can be done in a supervised learning manner. This involves feeding the network a training dataset consisting of labeled inputs, observing its outputs, defining the error (by measuring the difference between the output and the label values), and using techniques such as deep gradient descent and backpropagation to adjust the network's weights across all its layers and nodes to minimize the error. In many applications, repeating this process with numerous labeled inputs from the training dataset produces a network that can produce the correct output when given inputs different from those in the training dataset. In high-dimensional settings, such as large images, this generalization can be achieved when sufficiently large and diverse training datasets are available.
[0040] To perform training, the processing logic inputs one or more training datasets into one or more untrained machine learning models. The machine learning models can be initialized before the first input is fed into them. The processing logic trains the untrained machine learning models based on the training datasets to generate one or more trained machine learning models that perform the various operations described herein.
[0041] Training can be performed by feeding one or more images into a machine learning model at a time. The data input to the machine learning model can include a single layer or multiple layers. The machine learning model processes the input to generate an output. An artificial neural network includes an input layer, which consists of values from data points (e.g., intensity values and / or height values of pixels in a height map). The next layer is called a hidden layer, and nodes in the hidden layer each receive one or more input values. Each node contains parameters (e.g., weights) applied to the input values. Thus, each node essentially feeds the input values into a multivariable function (e.g., a nonlinear mathematical transformation) to produce an output value. The next layer can be another hidden layer or an output layer. In either case, nodes in the next layer receive output values from nodes in the previous layer, and each node applies weights to those values and then generates its own output value. This can be done at every layer. The final layer is the output layer, where a node is used for each category, prediction, and / or output that the machine learning model can produce. For example, for an artificial neural network trained to identify or predict overexposed areas, a first category might correspond to overexposed areas, and a second category might correspond to non-overexposed areas. In an embodiment, a category, prediction, etc., can be determined for each pixel in the image. For pixel-level segmentation, for each pixel in the image, the last layer can apply the probability that the pixel belongs to the first class, the probability that the pixel belongs to the second class, and the probability that the optional pixel belongs to one or more other classes.
[0042] Accordingly, the output may include one or more predictions and / or one or more probability maps. For example, for each pixel in the input image, the output probability map may include a first probability that the pixel belongs to a first class, a second probability that it belongs to a second class, and so on.
[0043] The processing logic can then compare the generated probability map and / or other outputs with known probability maps and / or labels included in the training data items. The processing logic determines an error (i.e., classification error) based on the difference between the output probability map and / or labels and the provided probability map and / or labels. The processing logic adjusts the weights of one or more nodes in the machine learning model based on the error. An error term, or delta, can be determined for each node in the artificial neural network. Based on this error, the artificial neural network adjusts one or more of its parameters (weights of one or more inputs to the node) for one or more of its nodes. Parameters can be updated in a backpropagation manner, such that nodes at the highest layer are updated first, then nodes in the next layer, and so on. An artificial neural network contains multiple layers of "neurons," where each layer receives input values from neurons in the layer above. The parameters of each neuron include weights associated with the values received from each neuron in the layer above. Therefore, adjusting the parameters can include adjusting the weights assigned to each input of one or more neurons in one or more layers of the artificial neural network.
[0044] Once the model parameters are optimized, model validation can be performed to determine if the model has improved and to determine the current accuracy of the deep learning model. After one or more rounds of training, the processing logic can determine if a stopping criterion has been met. The stopping criterion can be a target level of accuracy, a target number of processed images from the training dataset, a target amount of parameter variation for one or more previous data points, a combination thereof, and / or other criteria. In one embodiment, the stopping criterion is met when at least a minimum number of data points have been processed and at least a threshold accuracy has been achieved. The threshold accuracy can be, for example, 70%, 80%, or 90% accuracy. In one embodiment, the stopping criterion is met if the accuracy of the machine learning model has stopped improving. If the stopping criterion is not met, further training is performed. If the stopping criterion has been met, training can be completed. Once the machine learning model is trained, a reserved portion of the training dataset can be used to test the model.
[0045] Extended graphs 135A-B may include data used by operator 140 to update image data 122 as part of dynamic range extension 101. Extended graphs 135A-B may each be represented as an n-dimensional matrix of elements, and each element may include a value corresponding to a specific region of the image. This region may correspond to a single pixel location or a set of multiple pixel locations. For example, the n-dimensional matrix may be a two-dimensional table, and each element may include a numerical value for a specific pixel location in the input image. In one example, extended graphs 135A-B generated using machine learning model 130 may be referred to as feature maps, activation maps, classification maps, segmentation maps, distance maps, masks, other terms, or combinations thereof.
[0046] Extended graph 135A may be the same as or similar to the classification graph and may include values classifying one or more overexposed regions in the image. In one example, each value in extended graph 135A may indicate whether the corresponding pixel location in the image is part of an overexposed region. When extended graph 135A corresponds to two classifications, it may be called a mask (e.g., a binary mask, an overexposed mask) and may mask all pixels of a portion of the region or all pixels of a portion that is not a region. Extended graph 135A may be useful because the pixel location corresponding to the region may be treated differently when expanding the image. For example, an overexposed region may have high brightness and may be updated using a different technique than other regions in the image, as discussed below with respect to operator 140. Extended graph 135B may include values corresponding to a portion of the image that is a result of banding (e.g., the outline of the banding). In one example, each value in extended graph 135B may indicate the amount of debanding applied to the corresponding pixel location in the image, as discussed in more detail below with respect to the debanding operator and debanding module 224.
[0047] Operator 140 can use extended graph 135 to update image data 122 and may include one or more local operators, global operators, or combinations thereof. Local operators may be the same as or similar to spatial variation operators and can change the values of a region (e.g., pixel values) based on the values of the surrounding region (e.g., neighboring pixel values). Global operators may be the same as or similar to spatial uniformity operators, changing most or all values in the same way and independent of the values of the surrounding region (e.g., neighboring pixel values). Local and global operators may use one or more linear functions, nonlinear functions, or combinations thereof. In one example, operator 140 may include a brightness modification operator and a descaling operator.
[0048] A brightness modification operator can use extended graph 135A to update image data 122 to modify the brightness of a specific region. The brightness modification operator can be an example of a global operator that updates pixel positions regardless of the values of neighboring pixel positions (e.g., neighbor-independent). The updated pixel positions can be determined using extended graph 135A. For example, as described above, extended graph 135A can identify pixel positions corresponding to regions of interest, and the brightness modification operator can modify these pixels to decrease brightness values (e.g., darken overexposed pixels), increase brightness values (e.g., brighten highly reflective pixels), or combinations thereof. See below regarding... Figure 2 The discussion suggests that the brightness modification operator can be a global multiplier (e.g., a 0.5 multiplier or a 2.0 multiplier).
[0049] A banding removal operator can be used with extended graph 135B to update image data 122 to reduce banding (e.g., minimize color banding). The banding removal operator can be an example of a local operator, and pixel locations can be evaluated based on values of neighboring pixel locations (e.g., neighbor correlation). The number of neighboring pixels used for each pixel location can be based on the corresponding element values in extended graph 135B. Each element value in extended graph 135B can indicate pixel distance, number of pixels, other values, or combinations thereof. Extended graph 135B can have element values for each pixel location, and element values along the banding contour can have element values greater than element values corresponding to other regions of the image (e.g., other contours). As discussed below... Figure 2 The debanding operator discussed can be a blurring operator or a smoothing operator (e.g., a clamped bilateral filter).
[0050] The process of analyzing and updating data for image 110A can occur in any order, depending on a specific data stream (e.g., an image pipeline). This order may include one or more updates occurring consecutively or in parallel, or a combination thereof. Figure 1 In the example shown, data from image 110A can be provided to image expander 120 and machine learning model 130, and the output of each can be provided to operator 140. Operator 140 can be applied serially to image data 122, and a brightness modification operator can be applied before a debanding operator, or other sequences thereof.
[0051] Figure 2 A block diagram illustrating an exemplary processing device 200 is depicted, which implements techniques for extending the dynamic range of one or more images according to one or more aspects of this disclosure. The processing device 200 can be configured to receive image 110A and perform dynamic range extension 101 to produce image 110B, as described above regarding... Figure 1 The discussion. In Figure 2 In the example shown, processing device 200 may include machine learning model component 210, image update component 220, and may be associated with data storage 230. One or more blocks may be logical blocks and may be implemented as hardware (e.g., integrated circuits (ICs) or other circuits), computer code (e.g., firmware, software, or other programs), or a combination thereof. Without loss of generality, more or fewer components or modules may be included. For example, two or more components may be combined into a single component, or the features of a component may be divided into two or more components.
[0052] Processing device 200 can be one or more devices capable of processing data of one or more images. Processing device 200 can be referred to as an image processor and can be or include one or more image signal processors (ISP), digital signal processors (DSP), graphics processing units (GPU), central processing units (CPU), data processing units (DPU), field-programmable gate arrays (FPGA), application-specific integrated circuits (ASIC), other integrated circuits, or combinations thereof.
[0053] Processing device 200 can receive one or more images from another device as analog signals, digital signals, or a combination thereof. The other device can be the source of one or more images and can be a game engine (e.g., a game console or program), a media player (e.g., a set-top box, DVD player, streaming application), a host processor (e.g., a CPU), an image sensor (e.g., a camera), a storage device (e.g., main memory), other sources, or a combination thereof. Images can be image sequences, each image in the sequence being a video frame. Processing device 200 can receive images as encoded images, raw images, or a combination thereof. Received images can have a range of pixel values smaller than the range of pixel values supported by the display device. The concept of pixel value range may be the same as or similar to bit depth. For example, a received image may have a low dynamic range pixel value range (e.g., a bit depth of 10), while the pixel value range supported by the display device may be high dynamic range (HDR) (e.g., a bit depth greater than 10). Processing device 200 can store the received images as image 110A in data storage 230 (e.g., processor memory or main memory).
[0054] Machine learning model component 210 can process one or more images and generate extended graphs 135A-B. In one example, machine learning model component 210 may include processing module 212, extended graph module 214, and time feedback module 216.
[0055] Processing module 212 enables processing device 200 to process one or more images using a trained machine learning model. Processing module 212 can act as an inference engine or an interface to an inference engine, and can load some or all of machine learning model 130 from data storage 230. As described above, machine learning model 130 can be a convolutional neural network (CNN) and can include weight values, bias values, filter values, other values, or combinations thereof. Processing module 212 can access images from data storage 230 and provide each image as input to one or more channels (e.g., red channel, blue channel, green channel (RBG)). Processing module 212 can then process the input channels with respect to machine learning model 130 to produce one or more outputs. In one example, machine learning model 130 can be a single model for processing images and outputting multiple channels with different outputs (e.g., different extended maps). In another example, machine learning model 130 can include multiple models, with at least one model capable of generating a first output and at least one model capable of generating a second output. Multiple models can be arranged in a model pipeline and executed in cascade, parallel, or a combination thereof.
[0056] The extended graph module 214 allows the processing device 200 to access the output data of the processing module 212 and store it in the data storage 230 as one or more extended graphs 135A-B. In one example, the output data may include multiple channels, and one channel may include a first output, while another channel may include a second output. The first output may include an extended graph that includes the value of each pixel in the input image, and this value may indicate the distance to each pixel location (e.g., smoothing distance, blur distance, filter width). The second output may include an extended graph that includes the value of each pixel in the image, and these values may indicate the classification of the pixel location. Pixels with a specific classification (e.g., true / 1 or false / 0) may correspond to regions of the image for which brightness is modified. In one example, this classification may correspond to a user interface classification and may indicate that a pixel corresponds to one or more user interface elements.
[0057] The timing feedback module 216 enables the processing device 200 to introduce a feedback loop that uses the output of the machine learning model 130 as input for a subsequent round of processing. This feedback loop can include external, internal, or combined feedback loops of one or more machine learning models. External feedback loops of the machine learning model 130 can take data from the output layer of the machine learning model 130 and provide it to the input layer of the machine learning model 130 (e.g., feed it into one or more nodes of the input layer). Internal feedback loops of the machine learning model 130 can take data from the hidden layers of the machine learning model 130 and feed it into the same or earlier layers. For example, a feedback loop can feed data from a node in one hidden layer to a node in another hidden layer (e.g., a recurrent neural network (RNN), a transformer).
[0058] As described above, there may be multiple images, which constitute an ordered sequence of images (e.g., ordered video frames in chronological order), and processing module 212 can process the images in this sequence, then use the output from the processed images as input to process one or more subsequent images in the sequence. In one example, machine learning model 130 may have multiple output channels (e.g., 12 or 16 output channels), some of which may include an extended graph, and the remaining channels may serve as feedback for subsequent processing. Channels that are part of the feedback loop may include accumulated temporal information and model history. Feeding information back to machine learning model 130 may be advantageous because it may enable machine learning model 130 to provide temporal aspects (e.g., temporal stability) that take into account motion between images (e.g., differences between adjacent video frames). To make previous outputs consistent with current inputs, the accumulated temporal information and model history may be transformed by velocity or motion vectors from the input sequence before being input into the model. This allows machine learning model 130 to use motion between frames to better distinguish static regions of an image from non-static content (e.g., head-up display versus scene movement contrast).
[0059] Image update component 220 enables processing device 200 to update data of input image 110A to expand dynamic range and generate output image 110B. For example... Figure 2 In the example shown, the image update component 220 may include an image expansion module 222, a de-banding module 224, a brightness modification module 226, and an output module 228.
[0060] Image expansion module 222 enables the processing device to expand the data of image 110A to generate expanded image data 122. The data of image 110A may have a small range of pixel values (e.g., 0-1023), and it can be used to generate image data 122 with a larger range of pixel values (e.g., 0-65,535). Image expansion module 222 can be used with... Figure 1 The image expander 120 is the same as or similar to this one. In one example, the image expansion module 222 may perform dequantization to expand the set of values of image 110A within a specific range (e.g., a 10-bit range of 1024) to a larger range (e.g., a 16-bit range of 65,536). This may involve updating the values of the low, medium, and high portions of the smaller range to the corresponding low, medium, and high portions of the larger range (e.g., 0 stays at 0 and 1023 becomes 65,535).
[0061] Brightness modification module 226 enables the processing device to update image data 122 to modify the brightness of a specific area identified by extended figure 135A. Brightness modification module 226 can use the brightness modification operators discussed above to modify the intensity of one or more specific pixels (e.g., darkening overexposed pixels or brightening underexposed pixels). The modified pixels can be identified using extended figure 135A. The modification can involve one or more linear or non-linear operations, including multiplying, dividing, subtracting, or adding one or more global values to the pixel value of the identified area. The global values can be predetermined values that remain unchanged across one or more images and can be determined before the processing device receives the image. For example, global values can be provided by a device (e.g., processing device, host, graphics card, image sensor), program (e.g., game engine, media player, device driver, firmware, operating system), user (e.g., game designer, content creator, viewer, technician, administrator), other entity, or a combination thereof. In one example, the brightness modification operator can be a brightness multiplier that multiplies the intensity of a specific pixel by a global value. The brightness multiplier can be calculated using multiplication (e.g., multiply by 0.5), division (e.g., divide by 2), bit shifting (e.g., shift right by 1 bit), other operations, or combinations thereof.
[0062] Debanding module 224 enables the processing device to update image data 122 using a debanding operator that reduces banding (e.g., minimizing color banding). As described above, the debanding operator can use the output of machine learning model 130 (e.g., extended graph 135B) to determine the number of neighboring pixels for each pixel location. In one example, the debanding operator can be a blurring operator, and the element values in extended graph 135B can be blur distances. In another example, the debanding operator can be a smoothing operator, and the element values in extended graph 135B can be smoothing distances. The smoothing operator can be the same as or similar to a bilateral filter (e.g., a clamped bilateral filter).
[0063] A bilateral filter can be a non-linear, edge-preserving, and / or noise-reducing smoothing filter. A bilateral filter can determine an alternative value for the intensity of each pixel based on a weighted average of the intensity values from neighboring pixels. This weighting can be based on a Gaussian distribution and can be referred to as Gaussian blur or selective Gaussian blur. A bilateral filter can also, or alternatively, depend on pixel distance values (e.g., Euclidean distance), radiometric differences (e.g., difference ranges, such as color intensity, depth distance), other values, or combinations thereof. In one example, a bilateral filter can be a clamped bilateral filter.
[0064] Clamped bilateral filters preserve sharp edges by excluding replacement values or one or more nearby pixels used to calculate replacement values when the corresponding values exceed a threshold difference. The threshold difference can be a predetermined value based on any numerical value, and this value can be based on the number of bits (1-bit difference, 2-bit difference, etc.). For example, if the difference threshold is 1 bit, then any value exceeding twice the intensity (e.g., twice the brightness) or less than half the intensity (e.g., half the brightness) can be excluded. If the difference threshold is 2 bits, then any value exceeding four times the intensity (e.g., four times the brightness) or less than a quarter the intensity (e.g., 25% brightness) may be excluded. Clamped bilateral filters can reduce the impact of nearby pixels being brighter or darker on smoothing operators. This allows smoothing operators to alter unnatural contours (e.g., banding) and reduce changes to natural contours (e.g., object contours).
[0065] Output module 228 enables processing device 200 to output extended image data 122 to one or more devices. These devices may include display devices, data storage devices, data transmission devices, another processing device, other devices, or combinations thereof. Outputting image data to a display device (e.g., a television, monitor, projector) can be the same as or similar to displaying or playing image data. Outputting image data to a data storage device (e.g., a memory, hard disk, solid-state drive) may be the same as or similar to storing image data. Outputting image data to a data transmission device (e.g., a network, bus, interconnect) can be the same as or similar to streaming image data.
[0066] Processing device 200 can encode image data 122 before, during, or after outputting data to one or more devices. The process of encoding the image data may involve encoding image content into an HDR video format, an HDR still image format, or a combination thereof using a transfer function. The transfer function can be based on human visual perception of banding and can further minimize perceived banding. The transfer function can encode image data 122 into HDR content by replacing the gamma curve used in SDR. The perceptual quantizer can use any number of bits (e.g., 12-bit values) and is capable of representing up to 10,000 cd / m². 2 The luminance range (in nits) and down to 0.0001 nits (e.g., pixel value range, dynamic range). The transfer function can be a nonlinear function, a linear transfer function, or a combination thereof (e.g., an initial linear part followed by a nonlinear part). In one example, the transfer function can be a perceptual quantizer (PQ), an optoelectronic transfer function (OETF), an electro-optical transfer function (EOTF), an opto-optical transfer function (OOTF), other transfer functions, or combinations thereof. The encoded image can conform to the recommended coding of the International Telecommunication Union Radiocommunication Sector (ITU-R), such as Rec.709, Rec.2020, Rec.2100, other standardized or proprietary coding, or combinations thereof. The recommended coding can define various aspects of Ultra High Definition Television (UHDTV) with High Dynamic Range (HDR) and Wide Color Gamut (WCG), including image resolution, progressive scan frame rate, bit depth, color source, RGB and luminance-chrominance color representation, chrominance subsampling, and transfer function.
[0067] Figure 3 A flowchart illustrating an illustrative example of a method 300 for extending the dynamic range of one or more images according to one or more aspects of this disclosure is provided. Method 300 and each of its individual functions, routines, subroutines, or operations may be executed by one or more processing devices. In some implementations, method 300 may be executed by the processing device of a single computing device (e.g., a game console, media player, or display device). Alternatively, method 300 may be executed by the processing devices of two or more computing devices, each computing device executing one or more individual functions, routines, subroutines, or operations of the method.
[0068] For simplicity, the methods of this disclosure are described and depicted as a series of actions. However, actions according to this disclosure may occur in different orders and / or simultaneously, and may occur alongside other actions not presented or described herein. Furthermore, not all described actions require implementation of the methods according to the disclosed subject matter. Moreover, those skilled in the art will understand and recognize that these methods may alternatively be represented as a series of interrelated states via state diagrams or events. Furthermore, it should be understood that the methods disclosed in this specification can be stored on an article of art for transporting and transferring these methods to a computing device. The term "article of art" as used herein is intended to encompass any computer program accessible from any computer-readable device or storage medium. In one embodiment, method 300 may be performed using machine learning model component 210 and image update component 220, such as Figure 2 As shown.
[0069] Method 300 can be executed by processing logic of a processing device (e.g., processing device 200) and can begin at operation 310. In operation 310, the processing logic can receive an image including a first pixel value range. This image can be a color image or a monochrome image and can correspond to a still image (e.g., a photograph), an image sequence (e.g., a video frame), or a combination thereof. The first pixel value range (e.g., first bit depth) can correspond to the size of the pixel values (e.g., 8-bit, 10-bit), having a range of 0-255 for 8-bit pixel values and a range of 0-1023 for 10-bit pixel values. The pixel value range can be related to the dynamic range of the image, which is the range of brightness between the brightest region (e.g., the brightest pixel) and the darkest region (e.g., the darkest pixel) of the image.
[0070] In operation 320, the processing logic can use a trained machine learning model to process the input, including the image, to generate a first output and a second output. In one example, the first output could be a first extended map indicating the distance to pixels considered by the first operator for each pixel in the image. The second output could be a second extended map indicating the classification of each pixel in the image. Pixels with the first classification can be included in the region of the extended image whose brightness is subsequently modified.
[0071] The trained machine learning model can be or includes a convolutional neural network (CNN). A CNN can take an image as input and output a first output and a second output in different channels. The different channels can include a first channel and a second channel, where the first channel includes a first extended map and the second channel includes a second extended map. In one example, the trained machine learning model can take one or more previous outputs of the trained machine learning model (e.g., output channels from processing earlier images) as input.
[0072] In operation 330, the processing logic may expand the image to generate image data that includes a second range of pixel values (e.g., a second bit depth). The second range of pixel values may be larger than the first range of pixel values. The expansion and processing of the input may be part of an inversion tone mapping procedure. In one example, expanding the image might involve dequantizing an 8-bit input image to generate 10-bit, 12-bit, 16-bit, or 32-bit image data. The input image may be or include a low dynamic range (e.g., SDR) image, while the output image data may be or include a high dynamic range (e.g., HDR) image.
[0073] In operation 340, the processing logic can update the image data using a first operator. This first operator can be a local or global operator. The first operator can apply a filter based on the first output to reduce stripe artifacts in the image data. In one example, the first operator can be a local operator that includes a clamped bilateral filter.
[0074] In operation 350, the processing logic can update the image data using a second operator. The second operator can be a local or global operator. The second operator can modify the brightness of a region of the expanded image based on the second output. In one example, the region can be classified as a user interface category, and the second operator can reduce at least one brightness value corresponding to that region (e.g., by multiplying by a value or fraction less than 1). In another example, the region can be classified as a high reflectivity category, and the second operator can increase at least one brightness value corresponding to that region (e.g., by multiplying by a value or fraction greater than 1).
[0075] In operation 360, the processing logic can output image data. In one example, the input image includes frames of a video, which comprises a sequence of frames, and the output may involve outputting extended image data of each frame of that sequence to a display device, storage device, transmission device, other device, or a combination thereof. The method can terminate in response to completion of the operation of reference block 360 as described herein.
[0076] Figure 4 An example machine of computer system 400 is shown, within which a set of instructions can be executed to cause the machine to perform any or more of the methods discussed herein. In some embodiments, computer system 400 may be a computing device including a processor, a memory controller, or a combination thereof with a cache controller. In alternative embodiments, the machine may be connected (e.g., networked) to other machines in a local area network, intranet, extranet, and / or the Internet. The machine may operate as a server or client in a client-server network environment, as a peer in a peer-to-peer (or distributed) network environment, or as a server or client in a cloud computing infrastructure or environment.
[0077] A machine can be a personal computer (PC), tablet computer, set-top box (STB), personal digital assistant (PDA), mobile phone, network device, server, network router, switch, or bridge, or any machine capable of executing a set of instructions (sequential or otherwise) specifying actions to be taken by that machine. Furthermore, while a single machine is shown, the term "machine" should also be considered as a collection of any machines that individually or jointly execute a set (or more) of instructions to perform any or more of the methods discussed herein.
[0078] Example computer system 400 includes processing device 402 (e.g., processor 200), main memory 404 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM), etc.), static memory 406 (e.g., flash memory, static random access memory (SRAM), etc.) and data storage system 418, which communicate with each other via bus 430.
[0079] Processing device 402 represents one or more general-purpose processing devices, such as microprocessors, central processing units, or similar devices. More specifically, the processing device may be a Complex Instruction Set Computing (CISC) microprocessor, a Reduced Instruction Set Computing (RISC) microprocessor, a Very Long Instruction Word (VLIW) microprocessor, or a processor implementing other instruction sets, or a processor implementing combinations of instruction sets. Processing device 402 may also be one or more special-purpose processing devices, such as a data processing unit (DPU), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a digital signal processor (DSP), a network processor, or similar devices. Processing device 402 is configured to execute instructions 426 for performing the operations and steps discussed herein. Computer system 400 may further include a network interface device 408 for communication via network 420.
[0080] Data storage system 418 may include machine-readable storage medium 424 (also referred to as non-transitory computer-readable medium) on which one or more sets of instructions 426 or software embodying any or more methods or functions described herein are stored. Instructions 426 may also reside wholly or at least partially in main memory 404 and / or in processing device 402 during execution of computer system 400, and main memory 404 and processing device 402 also constitute machine-readable storage media. Machine-readable storage medium 424, data storage system 418, and / or main memory 404 may correspond to... Figure 1 Data storage 230.
[0081] In one embodiment, instruction 426 includes methods for implementing the corresponding Figure 2 Instructions for the function of the image update component 220. Although the machine-readable storage medium 424 is shown as a single medium in the exemplary embodiment, the term "non-transitory machine-readable storage medium" should be understood to include a single medium or multiple media storing one or more sets of instructions. The term "machine-readable storage medium" should also be understood to include any medium capable of storing or encoding a set of instructions for machine execution and causing the machine to perform any or more methods of this disclosure. The term "machine-readable storage medium" should accordingly include, but is not limited to, solid-state memory, optical media, and magnetic media.
[0082] Reasoning and training logic
[0083] Figure 5A An inference and / or training logic (hardware architecture) 515 for performing inference and / or training operations associated with one or more embodiments is shown. The following is in conjunction with... Figure 5A and / or Figure 5B Provide details about reasoning and / or training logic 515.
[0084] In at least one embodiment, inference and / or training logic 515 may include, but is not limited to, code and / or data storage 501 for storing forward and / or output weights and / or input / output data, and / or other parameters configuring neurons or layers of a neural network trained for and / or used for inference in one or more embodiments. In at least one embodiment, training logic 515 may include or be coupled to code and / or data storage 501 for storing graph code or other software to control timing and / or sequence, wherein weight and / or other parameter information is loaded to configure logic, including integer and / or floating-point units (collectively, arithmetic logic units (ALUs)). In at least one embodiment, code (such as graph code) loads weight or other parameter information into the processor ALU based on the architecture of the neural network to which the code corresponds. In at least one embodiment, code and / or data storage 501 stores weight parameters and / or input / output data of each layer of a neural network trained or used in one or more embodiments during forward propagation of input / output data and / or weight parameters during training and / or inference using one or more embodiments. In at least one embodiment, any portion of the code and / or data storage 501 may be included within other on-chip or off-chip data storage, including the processor's L1, L2, or L3 cache or system memory.
[0085] In at least one embodiment, any portion of the code and / or data storage 501 may be internal or external to one or more processors or other hardware logic devices or circuits. In at least one embodiment, the code and / or data storage 501 may be a cache memory, dynamic random access memory (“DRAM”), static random access memory (“SRAM”), non-volatile memory (e.g., flash memory), or other storage. In at least one embodiment, the choice of whether the code and / or data storage 501 is internal or external to the processor, for example, or composed of DRAM, SRAM, flash memory, or some other storage type, may depend on the available on-chip or off-chip storage space, the latency requirements of the training and / or inference functions being performed, the batch size of the data used in the inference and / or training of the neural network, or some combination of these factors.
[0086] In at least one embodiment, inference and / or training logic 515 may include, but is not limited to, code and / or data storage 505 for storing backpropagation and / or output weights and / or input / output data corresponding to neurons or layers of a neural network trained and / or used for inference in one or more embodiments. In at least one embodiment, during training and / or inference using one or more embodiments, code and / or data storage 505 stores weight parameters and / or input / output data for each layer of a neural network trained or used in one or more embodiments during backpropagation of input / output data and / or weight parameters. In at least one embodiment, training logic 515 may include or be coupled to code and / or data storage 505 for storing graph code or other software to control timing and / or sequence, wherein weight and / or other parameter information is loaded to configure logic including integer and / or floating-point units (collectively referred to as Arithmetic Logic Units (ALUs)). In at least one embodiment, code (such as graph code) loads weight or other parameter information into the processor ALU based on the architecture of the neural network to which the code corresponds. In at least one embodiment, any portion of the code and / or data storage 505 may be included together with other on-chip or off-chip data storage, including the processor's L1, L2, or L3 cache or system memory. In at least one embodiment, any portion of the code and / or data storage 505 may be internal or external to one or more processors or other hardware logic devices or circuits. In at least one embodiment, the code and / or data storage 505 may be cache memory, DRAM, SRAM, non-volatile memory (e.g., flash memory), or other storage. In at least one embodiment, the choice between the code and / or data storage 505 being internal or external to the processor, for example, whether it consists of DRAM, SRAM, flash memory, or some other type of storage, depends on whether the available storage is on-chip or off-chip, the latency requirements of the training and / or inference functions being performed, the data batch size used in the inference and / or training of the neural network, or some combination of these factors.
[0087] In at least one embodiment, code and / or data storage 501 and code and / or data storage 505 may be separate storage structures. In at least one embodiment, code and / or data storage 501 and code and / or data storage 505 may be the same storage structure. In at least one embodiment, code and / or data storage 501 and code and / or data storage 505 may be partially identical and partially separate storage structures. In at least one embodiment, any portion of code and / or data storage 501 and code and / or data storage 505 may be included with other on-chip or off-chip data storage, including the processor's L1, L2, or L3 cache or system memory.
[0088] In at least one embodiment, the inference and / or training logic 515 may include, but is not limited to, one or more arithmetic logic units (“ALUs”) 510 (including integer and / or floating-point units) for performing logical and / or mathematical operations at least in part based on or instructed by training and / or inference code (e.g., graph code), the results of which may produce activations (e.g., output values from layers or neurons within a neural network) stored in activation storage 520, which are functions of input / output and / or weight parameter data stored in code and / or data storage 501 and / or code and / or data storage 505. In at least one embodiment, activation is activated in response to execution instructions or other code, and linear algebraic and / or matrix-based mathematical generation performed by ALU 510 is stored in activation storage 520, wherein weight values stored in code and / or data storage 505 and / or code and / or data storage 501 are used as operands with other values, such as bias values, gradient information, momentum values, or other parameters or hyperparameters, and any or all of these can be stored in code and / or data storage 505 or code and / or data storage 501 or other on-chip or off-chip storage.
[0089] In at least one embodiment, one or more ALUs 510 are included in one or more processors or other hardware logic devices or circuits, while in another embodiment, one or more ALUs 510 may be located outside the processor or other hardware logic device or the circuitry that uses them (e.g., a coprocessor). In at least one embodiment, one or more ALUs 510 may be included within an execution unit of a processor, or otherwise included in a group of ALUs accessible by the execution unit of the processor, which may be within the same processor or distributed among different processors of different types (e.g., a central processing unit, a graphics processing unit, a fixed-function unit, etc.). In at least one embodiment, code and / or data storage 501, code and / or data storage 505, and activation storage 520 may be on the same processor or other hardware logic device or circuitry, while in another embodiment, they may be in different processors or other hardware logic devices or circuitries, or in some combination of the same and different processors or other hardware logic devices or circuitries. In at least one embodiment, any portion of activation storage 520 may be included together with other on-chip or off-chip data storage, including the processor's L1, L2, or L3 cache or system memory. Furthermore, inference and / or training code may be stored together with other code accessible to the processor or other hardware logic or circuitry, and may be retrieved and / or processed using the processor’s fetch, decode, schedule, execute, exit, and / or other logic circuitry.
[0090] In at least one embodiment, the active memory 520 may be a cache memory, DRAM, SRAM, non-volatile memory (e.g., flash memory), or other memory. In at least one embodiment, the active memory 520 may be wholly or partially located inside or outside one or more processors or other logic circuits. In at least one embodiment, the choice of whether the active memory 520 is internal to or external to the processor may depend on the available on-chip or off-chip storage, the latency requirements for training and / or inference functions, the batch size of data used in inference and / or training the neural network, or some combination of these factors. For example, it may include DRAM, SRAM, flash memory, or other memory types. In at least one embodiment, Figure 5A The inference and / or training logic 515 shown can be used in conjunction with an application-specific integrated circuit (“ASIC”), such as those from Google. Processing unit, from Graphcore TM Inference processing units (IPUs) or from Intel Corp. (e.g., "Lake Crest") processor. In at least one embodiment, Figure 5A The inference and / or training logic 515 shown can be used in conjunction with central processing unit (“CPU”) hardware, graphics processing unit (“GPU”) hardware, or other hardware such as field programmable gate array (“FPGA”)
[0091] Figure 5B Inference and / or training logic 515 according to at least one or more embodiments is illustrated. In at least one embodiment, the inference and / or training logic 515 may include, but is not limited to, hardware logic, wherein computational resources are dedicated or otherwise uniquely used in conjunction with weight values or other information corresponding to one or more layers of neurons within a neural network. In at least one embodiment, Figure 5B The inference and / or training logic 515 shown can be used in conjunction with an application-specific integrated circuit (ASIC), such as those from Google. Processing unit, from Graphcore TM Inference processing units (IPUs) or from Intel Corp. (e.g., "Lake Crest") processor. In at least one embodiment, Figure 5BThe inference and / or training logic 515 shown can be used in conjunction with central processing unit (CPU) hardware, graphics processing unit (GPU) hardware, or other hardware (e.g., field-programmable gate array (FPGA)). In at least one embodiment, the inference and / or training logic 515 includes, but is not limited to, code and / or data storage 501 and code and / or data storage 505, which can be used to store code (e.g., graph code), weight values, and / or other information, including bias values, gradient information, momentum values, and / or other parameter or hyperparameter information. Figure 5B In at least one embodiment shown, each of code and / or data storage 501 and code and / or data storage 505 is associated with dedicated computing resources (e.g., computing hardware 502 and computing hardware 506). In at least one embodiment, each of computing hardware 502 and computing hardware 506 includes one or more ALUs that perform mathematical functions (e.g., linear algebraic functions) only on the information stored in code and / or data storage 501 and code and / or data storage 505, respectively, and the results of the function execution are stored in activation storage 520.
[0092] In at least one embodiment, each of the code and / or data storage 501 and 505 and the corresponding computing hardware 502 and 506 corresponds to a different layer of the neural network, such that activation obtained from one “store / computation pair 501 / 502” of the code and / or data storage 501 and computing hardware 502 provides input as input to the next “store / computation pair 505 / 506” of the code and / or data storage 505 and computing hardware 506, in order to reflect the conceptual organization of the neural network. In at least one embodiment, each store / computation pair 501 / 502 and 505 / 506 may correspond to more than one neural network layer. In at least one embodiment, additional store / computation pairs (not shown) may be included in the inference and / or training logic 515 after or in parallel with the store / computation pairs 501 / 502 and 505 / 506.
[0093] Data Center
[0094] Figure 6 An example data center 600 that can be used with at least one embodiment is shown. In at least one embodiment, the data center 600 includes a data center infrastructure layer 610, a framework layer 620, a software layer 630, and an application layer 640.
[0095] In at least one embodiment, such as Figure 6As shown, the data center infrastructure layer 610 may include a resource coordinator 612, grouped computing resources 614, and node computing resources (“nodes CR”) 616(1)-616(N), where “N” represents any positive integer. In at least one embodiment, nodes CR 616(1)-616(N) may include, but are not limited to, any number of central processing units (“CPUs”) or other processors (including accelerators, field-programmable gate arrays (FPGAs), graphics processors, etc.), memory devices (e.g., dynamic read-only memory), storage devices (e.g., solid-state drives or disk drives), network input / output (“NW I / O”) devices, network switches, virtual machines (“VMs”), power modules, and cooling modules, etc. In at least one embodiment, one or more nodes CR 616(1)-616(N) may be servers having one or more of the aforementioned computing resources.
[0096] In at least one embodiment, the grouped computing resources 614 may include individual groups (not shown) of node CRs housed within one or more racks, or numerous racks (also not shown) housed within data centers in various geographical locations. The individual groups of node CRs within the grouped computing resources 614 may include computing, networking, memory, or storage resources that can be configured or allocated to support groups of one or more workloads. In at least one embodiment, several node CRs, including CPUs or processors, may be grouped within one or more racks to provide computing resources to support one or more workloads. In at least one embodiment, the one or more racks may also include any number of power modules, cooling modules, and network switches, in any combination.
[0097] In at least one embodiment, resource coordinator 612 may configure or otherwise control one or more nodes CR616(1)-616(N) and / or grouped computing resources 614. In at least one embodiment, resource coordinator 612 may include a software design infrastructure (“SDI”) management entity for data center 600. In at least one embodiment, resource coordinator may include hardware, software, or some combination thereof.
[0098] In at least one embodiment, such as Figure 6As shown, framework layer 620 includes a job scheduler 622, a configuration manager 624, a resource manager 626, and a distributed file system 626. In at least one embodiment, framework layer 620 may include a framework of software 632 supporting software layer 630 and / or one or more applications 642 supporting application layer 640. In at least one embodiment, software 632 or application 642 may respectively include web-based service software or applications, such as services or applications provided by Amazon Web Services, Google Cloud, and Microsoft Azure. In at least one embodiment, framework layer 620 may be, but is not limited to, a free and open-source software web application framework, such as Apache Spark, which can utilize distributed file system 628 for large-scale data processing (e.g., "big data"). TM (Hereinafter referred to as "Spark"). In at least one embodiment, the job scheduler 622 may include a Spark driver to facilitate the scheduling of workloads supported by various layers of the data center 600. In at least one embodiment, the configuration manager 624 may be able to configure different layers, such as the software layer 630 and the framework layer 620, which includes Spark and a distributed file system 628 for supporting large-scale data processing. In at least one embodiment, the resource manager 626 is able to manage cluster or group computing resources mapped to or allocated to support the distributed file system 628 and the job scheduler 622. In at least one embodiment, the cluster or group computing resources may include group computing resources 614 on the data center infrastructure layer 610. In at least one embodiment, the resource manager 626 may coordinate with the resource coordinator 612 to manage these mapped or allocated computing resources.
[0099] In at least one embodiment, the software 632 included in the software layer 630 may include software used by at least a portion of the nodes CR616(1)-616(N), the grouped computing resources 614, and / or the distributed file system 628 of the framework layer 620. One or more types of software may include, but are not limited to, Internet web page search software, email virus scanning software, database software, and streaming video content software.
[0100] In at least one embodiment, one or more applications 642 included in application layer 640 may include one or more types of applications used by at least a portion of nodes CR616(1)-616(N), grouped computing resources 614, and / or the distributed file system 628 of framework layer 620. One or more types of applications may include, but are not limited to, any number of genomics applications, cognitive computing and machine learning applications, including training or inference software, machine learning framework software (e.g., PyTorch, TensorFlow, Caffe, etc.), or other machine learning applications used in conjunction with one or more embodiments.
[0101] In at least one embodiment, any of the configuration manager 624, resource manager 626, and resource coordinator 612 can implement any number and type of self-modification actions based on any amount and type of data acquired in any technically feasible manner. In at least one embodiment, self-modification actions can mitigate potentially poor configuration decisions by data center operators of data center 600 and can prevent underutilization and / or poor performance of the data center.
[0102] In at least one embodiment, data center 600 may include tools, services, software, or other resources to train one or more machine learning models or to use one or more machine learning models to predict or infer information according to one or more embodiments described herein. For example, in at least one embodiment, a machine learning model can be trained by calculating weight parameters based on a neural network architecture using the software and computing resources described above with respect to data center 600. In at least one embodiment, information can be inferred or predicted using trained machine learning models corresponding to one or more neural networks using the resources described above with respect to data center 600 by using weight parameters calculated through one or more training techniques described herein.
[0103] In at least one embodiment, the data center may use a CPU, application-specific integrated circuit (ASIC), GPU, FPGA, or other hardware to utilize the aforementioned resources to perform training and / or inference. Furthermore, one or more of the aforementioned software and / or hardware resources may be configured as a service to allow a user to train or perform information inference, such as image recognition, speech recognition, or other artificial intelligence services.
[0104] Inference and / or training logic 515 is used to perform inference and / or training operations associated with one or more embodiments. This document combines... Figure 5A and / or Figure 5BDetails are provided regarding the inference and / or training logic 515. In at least one embodiment, the inference and / or training logic 515 can be implemented in the system. Figure 6 Used in systems for reasoning or predicting operations based at least in part on weight parameters calculated using neural network training operations, neural network functions and / or architectures or neural network use cases described herein.
[0105] Such components can be used to generate synthetic data that mimics failure cases during network training, which can help improve network performance while limiting the amount of synthetic data to avoid overfitting.
[0106] Computer System
[0107] Figure 7 This is a block diagram illustrating an exemplary computer system according to at least one embodiment. The exemplary computer system may be a system of interconnected devices and components, a system-on-a-chip (SoC), or some combination thereof formed with a processor, which may include an execution unit to execute instructions. In at least one embodiment, according to this disclosure, such as the embodiments described herein, computer system 700 may include, but is not limited to, components such as processor 702, whose execution unit includes logic to execute algorithms for process data. In at least one embodiment, computer system 700 may include a processor, such as one available from Intel Corporation of Santa Clara, California. Processor family, Xeon TM , XScale TM and / or StrongARM TM , Core TM or Nervana TM A microprocessor may be used, although other systems (including PCs, engineering workstations, set-top boxes, etc.) with other microprocessors may also be used. In at least one embodiment, computer system 700 may execute a version of the Windows operating system available from Microsoft Corporation of Redmond, Washington, although other operating systems (such as UNIX and Linux), embedded software, and / or graphical user interfaces may also be used.
[0108] The embodiments can be used in other devices, such as handheld devices and embedded applications. Some examples of handheld devices include cellular phones, Internet Protocol (IP) devices, digital cameras, personal digital assistants (“PDAs”), and handheld PCs. In at least one embodiment, the embedded application may include a microcontroller, a digital signal processor (“DSP”), a system-on-a-chip (SoC), a network computer (“NetPC”), a set-top box, a network hub, a wide area network (“WAN”) switch, or any other system that can execute one or more instructions according to at least one embodiment.
[0109] In at least one embodiment, the computer system 700 may include, but is not limited to, a processor 702, which may include, but is not limited to, one or more execution units 708, to perform machine learning model training and / or inference according to the techniques described herein. In at least one embodiment, the computer system 700 is a single-processor desktop or server system, but in another embodiment, the computer system 700 may be a multiprocessor system. In at least one embodiment, the processor 702 may include, but is not limited to, a Complex Instruction Set Computer (“CISC”) microprocessor, a Reduced Instruction Set Computing (“RISC”) microprocessor, a Very Long Instruction Word (“VLIW”) microprocessor, a processor implementing instruction set combination, or any other processor device, such as a digital signal processor. In at least one embodiment, the processor 702 may be coupled to a processor bus 710, which can transmit data signals between the processor 702 and other components in the computer system 700.
[0110] In at least one embodiment, processor 702 may include, but is not limited to, a Level 1 (“L1”) internal cache memory (“cache”) 704. In at least one embodiment, processor 702 may have a single internal cache or multiple levels of internal cache. In at least one embodiment, the cache memory may reside external to processor 702. Depending on specific implementation and requirements, other embodiments may also include a combination of internal and external caches. In at least one embodiment, register file 706 may store different types of data in various registers, including but not limited to integer registers, floating-point registers, status registers, and instruction pointer registers.
[0111] In at least one embodiment, a logic execution unit 708, including but not limited to performing integer and floating-point operations, is also located within the processor 702. In at least one embodiment, the processor 702 may further include a microcode (“ucode”) read-only memory (“ROM”) for storing microcode of certain macro instructions. In at least one embodiment, the execution unit 708 may include logic for processing a packaged instruction set 709. In at least one embodiment, by including the packaged instruction set 709 in the instruction set of a general-purpose processor, along with the associated circuitry for executing the instructions, the packaged data in the processor 702 can be used to perform operations used by numerous multimedia applications. In one or more embodiments, the execution of numerous multimedia applications can be accelerated and performed more efficiently by using the full width of the processor’s data bus to perform operations on the packaged data, which may eliminate the need to transfer smaller data units on the processor’s data bus to perform one or more operations on one data element at a time.
[0112] In at least one embodiment, execution unit 708 may also be used in a microcontroller, embedded processor, graphics device, DSP, and other types of logic circuitry. In at least one embodiment, computer system 700 may include, but is not limited to, memory 720. In at least one embodiment, memory 720 may be implemented as a dynamic random access memory (“DRAM”) device, a static random access memory (“SRAM”) device, a flash memory device, or other storage device. In at least one embodiment, memory 720 may store instructions 719 and / or data 721 represented by data signals that can be executed by processor 702.
[0113] In at least one embodiment, the system logic chip may be coupled to the processor bus 710 and the memory 720. In at least one embodiment, the system logic chip may include, but is not limited to, a memory controller hub (“MCH”) 716, and the processor 702 may communicate with the MCH 716 via the processor bus 710. In at least one embodiment, the MCH 716 may provide a high-bandwidth memory path 718 to the memory 720 for instruction and data storage, as well as for storage of graphics commands, data, and textures. In at least one embodiment, the MCH 716 may initiate data signals between the processor 702, the memory 720, and other components in the computer system 700, and bridge data signals between the processor bus 710, the memory 720, and the system I / O 722. In at least one embodiment, the system logic chip may provide a graphics port for coupling to a graphics controller. In at least one embodiment, the MCH 716 may be coupled to the memory 720 via the high-bandwidth memory path 718, and the graphics / video card 712 may be coupled to the MCH 716 via an Accelerated Graphics Port (“AGP”) interconnect 714.
[0114] In at least one embodiment, computer system 700 may use system I / O 722, which is a proprietary hub interface bus, to couple MCH 716 to I / O controller hub (“ICH”) 730. In at least one embodiment, ICH 730 may provide direct connectivity to certain I / O devices via a local I / O bus. In at least one embodiment, the local I / O bus may include, but is not limited to, a high-speed I / O bus for connecting peripheral devices to memory 720, chipset, and processor 702. Examples may include, but are not limited to, an audio controller 729, a firmware hub (“FlashBIOS”) 728, a wireless transceiver 726, a data storage 724, a conventional I / O controller 725 including a user input and keyboard interface, a serial expansion port 727 (e.g., a Universal Serial Bus (USB) port), and a network controller 734. Data storage 724 may include a hard disk drive, floppy disk drive, CD-ROM device, flash memory device, or other mass storage device.
[0115] In at least one embodiment, Figure 7 A system including interconnected hardware devices or "chips" is shown, while in other embodiments, Figure 7An exemplary system-on-a-chip (SoC) may be illustrated. In at least one embodiment, the device may be interconnected with a proprietary interconnect, a standardized interconnect (e.g., PCIe), or some combination thereof. In at least one embodiment, one or more components of the computer system 700 are interconnected using a compute fast link (CXL) interconnect.
[0116] Inference and / or training logic 515 is used to perform inference and / or training operations related to one or more embodiments. (The following is in conjunction with...) Figure 5A and / or Figure 5B Details are provided regarding the inference and / or training logic 515. In at least one embodiment, the inference and / or training logic 515 can be... Figure 7 Used in systems for reasoning or predicting operations based at least in part on weight parameters calculated using neural network training operations, neural network functions and / or architectures or neural network use cases described herein.
[0117] Such components can be used to generate synthetic data that mimics failure cases during network training, which can help improve network performance while limiting the amount of synthetic data to avoid overfitting.
[0118] Figure 8 This is a block diagram illustrating an electronic device 800 for utilizing a processor 810 according to at least one embodiment. In at least one embodiment, the electronic device 800 may be, for example, but not limited to, a laptop computer, tower server, rack server, blade server, laptop computer, desktop computer, tablet computer, mobile device, telephone, embedded computer, or any other suitable electronic device.
[0119] In at least one embodiment, system 800 may include, but is not limited to, processor 810 communicatively coupled to any suitable number or type of components, peripherals, modules, or devices. In at least one embodiment, processor 810 uses a bus or interface coupling, such as an I2C bus, system management bus (“SMBus”), low pin count (LPC) bus, serial peripheral interface (“SPI”), high-definition audio (“HDA”) bus, serial advanced technology accessory (“SATA”) bus, universal serial bus (“USB”) (versions 1, 2, and 3), or universal asynchronous receiver / transmitter (“UART”) bus. In at least one embodiment, Figure 8 The system shown includes interconnected hardware devices or "chips," while in other embodiments, Figure 8 An exemplary system-on-a-chip (SoC) can be illustrated. In at least one embodiment, Figure 8 The device shown can be interconnected with proprietary interconnects, standardized interconnects (e.g., PCIe), or some combination thereof. In at least one embodiment, Figure 8One or more components are interconnected using Computational Fast Link (CXL) interconnects.
[0120] In at least one embodiment, Figure 8 This may include a display 824, a touchscreen 825, a touchpad 830, a near-field communication unit (“NFC”) 845, a sensor hub 840, a thermal sensor 846, a fast chipset (“EC”) 835, a trusted platform module (“TPM”) 838, a BIOS / firmware / flash (“BIOS, FWFlash”) 822, a DSP 860, a drive 820 (e.g., a solid-state drive (“SSD”) or a hard disk drive (“HDD”)), a wireless local area network unit (“WLAN”) 850, a Bluetooth unit 852, a wireless wide area network unit (“WWAN”) 856, a global positioning system (GPS) 855, a camera (“USB 3.0 camera”) 854 (e.g., a USB 3.0 camera), and / or a low-power double data rate (“LPDDR”) memory unit (“LPDDR3”) 815 implemented in, for example, the LPDDR3 standard. These components may each be implemented in any suitable manner.
[0121] In at least one embodiment, other components may be communicatively coupled to processor 810 via the components described above. In at least one embodiment, accelerometer 841, ambient light sensor (“ALS”) 842, compass 843, and gyroscope 844 may be communicatively coupled to sensor hub 840. In at least one embodiment, thermal sensor 839, fan 837, keyboard 846, and touchpad 830 may be communicatively coupled to EC 835. In at least one embodiment, speaker 863, earphone 864, and microphone (“mic”) 865 may be communicatively coupled to audio unit (“audio codec and Class D amplifier”) 862, which in turn may be communicatively coupled to DSP 860. In at least one embodiment, audio unit 864 may include, for example, but not limited to, audio encoder / decoder (“codec”) and Class D amplifier. In at least one embodiment, SIM card (“SIM”) 857 may be communicatively coupled to WWAN unit 856. In at least one embodiment, components such as WLAN unit 850, Bluetooth unit 852, and WWAN unit 856 can be implemented as next-generation form factor (NGFF).
[0122] Inference and / or training logic 515 is used to perform inference and / or training operations associated with one or more embodiments. (The following is in conjunction with...) Figure 5A and / or Figure 5B Details are provided regarding the inference and / or training logic 515. In at least one embodiment, the inference and / or training logic 515 can be... Figure 8The system is used to infer or predict operations based at least in part on weight parameters calculated using neural network training operations, neural network functions and / or architectures or neural network use cases described herein.
[0123] Such components can be used to generate synthetic data that mimics failure cases during network training, which can help improve network performance while limiting the amount of synthetic data to avoid overfitting.
[0124] Figure 9 This is a block diagram of a processing system according to at least one embodiment. In at least one embodiment, system 900 includes one or more processors 902 and one or more graphics processors 908, and may be a single-processor desktop system, a multi-processor workstation system, or a server system having a large number of processors 902 or processor cores 907. In at least one embodiment, system 900 is a processing platform incorporated within a system-on-a-chip (SoC) integrated circuit for use in mobile, handheld, or embedded devices.
[0125] In at least one embodiment, system 900 may include or be integrated into a server-based gaming platform, including a game console, mobile game console, handheld game console, or online game console, which are game and media consoles. In at least one embodiment, system 900 is a mobile phone, smartphone, tablet computing device, or mobile internet device. In at least one embodiment, processing system 900 may also include components coupled to or integrated into a wearable device, such as a smartwatch, smart glasses, augmented reality, or virtual reality device. In at least one embodiment, processing system 900 is a television or set-top box device having one or more processors 902 and a graphical interface generated by one or more graphics processors 908.
[0126] In at least one embodiment, one or more processors 902 each include one or more processor cores 907 for processing instructions that, when executed, perform operations against the system and user software. In at least one embodiment, each of the one or more processor cores 907 is configured to process a specific instruction set 909. In at least one embodiment, the instruction set 909 may facilitate Complex Instruction Set Computing (CISC), Reduced Instruction Set Computing (RISC), or computation via Very Long Instruction Word (VLIW). In at least one embodiment, the processor cores 907 may each process different instruction sets 909, which may include instructions that facilitate the emulation of other instruction sets. In at least one embodiment, the processor cores 907 may also include other processing devices, such as digital signal processors (DSPs).
[0127] In at least one embodiment, processor 902 includes cache memory 904. In at least one embodiment, processor 902 may have a single internal cache or multiple levels of internal caches. In at least one embodiment, the cache memory is shared among various components of processor 902. In at least one embodiment, processor 902 also uses an external cache (e.g., a Level 3 (L3) cache or a last-level cache (LLC)) (not shown), which can be shared among processor cores 907 using known cache coherence techniques. In at least one embodiment, processor 902 further includes a register file 906, which may include different types of registers (e.g., integer registers, floating-point registers, status registers, and instruction pointer registers) for storing different types of data. In at least one embodiment, register file 906 may include general-purpose registers or other registers.
[0128] In at least one embodiment, one or more processors 902 are coupled to one or more interface buses 910 to transmit communication signals, such as address, data, or control signals, between the processor 902 and other components in the system 900. In at least one embodiment, the interface bus 910 may be a processor bus, such as a version of the Direct Media Interface (DMI) bus. In at least one embodiment, the interface bus 910 is not limited to the DMI bus and may include one or more peripheral component interconnect buses (e.g., PCI, PCI Express), memory buses, or other types of interface buses. In at least one embodiment, the processor 902 includes an integrated memory controller 916 and a platform controller hub 930. In at least one embodiment, the memory controller 916 facilitates communication between memory devices and other components of the processing system 900, while the platform controller hub (PCH) 930 provides connectivity to I / O devices via a local I / O bus.
[0129] In at least one embodiment, memory device 920 may be a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, a flash memory device, a phase-change memory device, or a device with suitable performance for use as processor memory. In at least one embodiment, memory device 920 may be used as system memory of processing system 900 to store data 922 and instructions 921 for use when one or more processors 902 execute an application or process. In at least one embodiment, memory controller 916 is also coupled to an optional external graphics processor 912, which may communicate with one or more graphics processors 908 of processor 902 to perform graphics and media operations. In at least one embodiment, display device 911 may be connected to processor 902. In at least one embodiment, display device 911 may include one or more internal display devices, such as in mobile electronic devices or laptop devices, or external display devices connected via a display interface (e.g., DisplayPort). In at least one embodiment, display device 911 may include a head-mounted display (HMD), such as a stereoscopic display device for virtual reality (VR) or augmented reality (AR) applications.
[0130] In at least one embodiment, the platform controller hub 930 enables peripheral devices to connect to the memory device 920 and the processor 902 via a high-speed I / O bus. In at least one embodiment, the I / O peripheral devices include, but are not limited to, an audio controller 946, a network controller 934, a firmware interface 928, a wireless transceiver 926, a touch sensor 925, and a data storage device 924 (e.g., a hard disk drive, flash memory, etc.). In at least one embodiment, the data storage device 924 may be connected via a storage interface (e.g., SATA) or via a peripheral bus, such as a peripheral component interconnect bus (e.g., PCI, PCIe). In at least one embodiment, the touch sensor 925 may include a touchscreen sensor, a pressure sensor, or a fingerprint sensor. In at least one embodiment, the wireless transceiver 926 may be a Wi-Fi transceiver, a Bluetooth transceiver, or a mobile network transceiver, such as a 3G, 4G, or LTE transceiver. In at least one embodiment, the firmware interface 928 enables communication with the system firmware and may be, for example, a Unified Extensible Firmware Interface (UEFI). In at least one embodiment, the network controller 934 may enable network connectivity to a wired network. In at least one embodiment, a high-performance network controller (not shown) is coupled to an interface bus 910. In at least one embodiment, the audio controller 946 is a multi-channel high-definition audio controller. In at least one embodiment, the processing system 900 includes an optional legacy I / O controller 940 for coupling legacy (e.g., Personal System 2 (PS / 2)) devices to the system 900. In at least one embodiment, the platform controller hub 930 may also be connected to one or more Universal Serial Bus (USB) controllers 942 that connect input devices, such as a keyboard and mouse combination 943, a camera 944, or other USB input devices.
[0131] In at least one embodiment, instances of the memory controller 916 and platform controller hub 930 may be integrated into a discrete external graphics processor, such as external graphics processor 912. In at least one embodiment, the platform controller hub 930 and / or the memory controller 916 may be external to one or more processors 902. For example, in at least one embodiment, system 900 may include an external memory controller 916 and platform controller hub 930, which may be configured as a memory controller hub and peripheral controller hub in a system chipset communicating with processor 902.
[0132] Inference and / or training logic 515 is used to perform inference and / or training operations associated with one or more embodiments. (The following is in conjunction with...) Figure 5A and / or Figure 5BDetails regarding inference and / or training logic 515 are provided. In at least one embodiment, some or all of the inference and / or training logic 515 may be incorporated into the graphics processor 912. For example, in at least one embodiment, the training and / or inference techniques described herein may use one or more ALUs embodied in the graphics processor. Furthermore, in at least one embodiment, the inference and / or training operations described herein may use, in addition to Figure 5A or Figure 5B The logic is performed using logic other than that shown. In at least one embodiment, the weight parameters may be stored in on-chip or off-chip memory and / or registers (shown or not shown), which configure the ALU of the graphics processor to execute one or more machine learning algorithms, neural network architectures, use cases, or training techniques described herein.
[0133] Such components can be used to generate synthetic data that mimics failure cases during network training, which can help improve network performance while limiting the amount of synthetic data to avoid overfitting.
[0134] Figure 10 This is a block diagram of a processor 1000 having one or more processor cores 1002A-1202N, an integrated memory controller 1014, and an integrated graphics processor 1008 according to at least one embodiment. In at least one embodiment, the processor 1000 may include additional cores, up to and including additional cores 1002N indicated by dashed boxes. In at least one embodiment, each processor core 1002A-1002N includes one or more internal cache units 1004A-1004N. In at least one embodiment, each processor core may also access one or more shared cache units 1006.
[0135] In at least one embodiment, internal cache units 1004A-1004N and shared cache unit 1006 represent a cache memory hierarchy within processor 1000. In at least one embodiment, cache memory units 1004A-1004N may include at least one level of instruction and data cache within each processor core and one or more levels of cache in a shared intermediate cache, such as Level 2 (L2), Level 3 (L3), Level 4 (L4), or other levels of cache, wherein the highest level of cache preceding external memory is classified as LLC. In at least one embodiment, cache coherence logic maintains coherence between the various cache units 1006 and 1004A-1004N.
[0136] In at least one embodiment, the processor 1000 may further include a group of one or more bus controller units 1016 and a system agent core 1010. In at least one embodiment, the one or more bus controller units 1016 manage a group of peripheral buses, such as one or more PCI or PCIe buses. In at least one embodiment, the system agent core 1010 provides management functions for various processor components. In at least one embodiment, the system agent core 1010 includes one or more integrated memory controllers 1014 to manage access to various external memory devices (not shown).
[0137] In at least one embodiment, one or more processor cores 1002A-1002N include support for multi-threaded concurrent processing. In at least one embodiment, system agent core 1010 includes components for coordinating and operating cores 1002A-1002N during multi-threaded processing. In at least one embodiment, system agent core 1010 may additionally include a power control unit (PCU) including logic and components for regulating one or more power states of processor cores 1002A-1002N and graphics processor 1008.
[0138] In at least one embodiment, the processor 1000 further includes a graphics processor 1008 for performing graph processing operations. In at least one embodiment, the graphics processor 1008 is coupled to a shared cache unit 1006 and a system proxy core 1010 including one or more integrated memory controllers 1014. In at least one embodiment, the system proxy core 1010 further includes a display controller 1011 for driving graphics processor outputs to one or more coupled displays. In at least one embodiment, the display controller 1011 may also be a separate module coupled to the graphics processor 1008 via at least one interconnect, or it may be integrated within the graphics processor 1008.
[0139] In at least one embodiment, ring-based interconnect unit 1012 is used to couple internal components of processor 1000. In at least one embodiment, alternative interconnect units, such as point-to-point interconnects, switched interconnects, or other technologies, may be used. In at least one embodiment, graphics processor 1008 is coupled to ring interconnect 1012 via I / O link 1013.
[0140] In at least one embodiment, I / O link 1013 represents at least one of a variety of I / O interconnects, including packaged I / O interconnects that facilitate communication between various processor components and a high-performance embedded memory module 1018 (e.g., an eDRAM module). In at least one embodiment, each of the processor cores 1002A-1002N and the graphics processor 1008 uses the embedded memory module 1018 as a shared last-level cache.
[0141] In at least one embodiment, processor cores 1002A-1002N are homogeneous cores executing a common instruction set architecture. In at least one embodiment, processor cores 1002A-1002N are heterogeneous in terms of instruction set architecture (ISA), with one or more processor cores 1002A-1002N executing a common instruction set, while one or more other processor cores 1002A-1002N execute a subset of the common instruction set or a different instruction set. In at least one embodiment, processor cores 1002A-1002N are heterogeneous in terms of microarchitecture, with one or more cores having relatively high power consumption coupled to one or more power cores having lower power consumption. In at least one embodiment, processor 1000 may be implemented on one or more chips or implemented as a SoC integrated circuit.
[0142] Inference and / or training logic 515 is used to perform inference and / or training operations associated with one or more embodiments. (The following is in conjunction with...) Figure 5A and / or Figure 5B Details regarding the inference and / or training logic 515 are provided. In at least one embodiment, some or all of the inference and / or training logic 515 may be incorporated into the processor 1000. For example, in at least one embodiment, the training and / or inference techniques described herein may use one or more ALUs embodied in... Figure 10 The graphics processor 712, graphics core 1002A-1002N, or other components are used. Furthermore, in at least one embodiment, the inference and / or training operations described herein can use, except... Figure 5A or Figure 5B The logic is performed using logic other than that shown. In at least one embodiment, the weight parameters may be stored in on-chip or off-chip memory and / or registers (shown or not shown), which configure the ALU of the graphics processor 1000 to execute one or more machine learning algorithms, neural network architectures, use cases, or training techniques described herein.
[0143] Such components can be used to generate synthetic data that mimics failure cases during network training, which can help improve network performance while limiting the amount of synthetic data to avoid overfitting.
[0144] Virtualization computing platform
[0145] Figure 11 This is an example data flow diagram of a process 1100 for generating and deploying an image processing and inference pipeline according to at least one embodiment. In at least one embodiment, process 1100 may be deployed for use with imaging devices, processing devices, and / or other device types at one or more facilities 1102. Process 1100 may be executed within a training system 1104 and / or a deployment system 1106. In at least one embodiment, training system 1104 may be used to train, deploy, and implement machine learning models (e.g., neural networks, object detection algorithms, computer vision algorithms, etc.) for use with deployment system 1106. In at least one embodiment, deployment system 1106 may be configured to offload processing and computing resources in a distributed computing environment to reduce the infrastructure requirements of facility 1102. In at least one embodiment, one or more applications in the pipeline may use or invoke services of deployment system 1106 (e.g., inference, visualization, computation, AI, etc.) during application execution.
[0146] In at least one embodiment, some applications used in the advanced processing and inference pipeline may use machine learning models or other AI to perform one or more processing steps. In at least one embodiment, machine learning models may be trained at facility 1102 using data 1108 (e.g., imaging data) generated at facility 1102 (and stored on one or more Picture Archiving and Communication System (PACS) servers at facility 1102), imaging or sequencing data 1108 from another or more facilities, or a combination thereof. In at least one embodiment, training system 1104 may be used to provide applications, services, and / or other resources to generate deployable machine learning models for the work of deploying system 1106.
[0147] In at least one embodiment, the model registry 1124 may be supported by an object storage system that supports version control and object metadata. In at least one embodiment, it may be available from within a cloud platform via, for example, cloud storage (e.g., Figure 12 The system uses a cloud-compatible application programming interface (API) to access object storage. In at least one embodiment, machine learning models within the model registry 1124 can be uploaded, listed, modified, or deleted by the developer or partner of the system interacting with the API. In at least one embodiment, the API can provide access to methods that allow users with appropriate credentials to associate models with applications, enabling the models to be executed as part of the containerized instantiation of the application.
[0148] In at least one embodiment, training pipeline 1204 ( Figure 12 This can include situations where facility 1102 is training its own machine learning model or has an existing machine learning model that needs optimization or updating. In at least one embodiment, imaging data 1108 generated by imaging devices, sequencing devices, and / or other types of devices can be received. In at least one embodiment, once the imaging data 1108 is received, AI-assisted annotation 1110 can be used to help generate annotations corresponding to the imaging data 1108 for use as ground-based data for the machine learning model. In at least one embodiment, AI-assisted annotation 1110 can include one or more machine learning models (e.g., convolutional neural networks (CNNs)) that can be trained to generate annotations corresponding to certain types of imaging data 1108 (e.g., from certain devices). In at least one embodiment, AI-assisted annotation 1110 can then be used directly or adjusted or fine-tuned using annotation tools to generate ground-based data. In at least one embodiment, AI-assisted annotation 1110, labeled clinical data 1112, or a combination thereof can be used as ground-based data for training the machine learning model. In at least one embodiment, the trained machine learning model may be referred to as output model 1116 and may be used by deployment system 1106 as described herein.
[0149] In at least one embodiment, training pipeline 1204 ( Figure 12This can include situations where facility 1102 requires a machine learning model to perform one or more processing tasks for deploying one or more applications in system 1106, but facility 1102 may not currently have such a machine learning model (or may not have an optimized, efficient, or effective model for this purpose). In at least one embodiment, an existing machine learning model can be selected from model registry 1124. In at least one embodiment, model registry 1124 can include machine learning models trained to perform various inference tasks on imaging data. In at least one embodiment, the machine learning model in model registry 1124 can be trained on imaging data from a different facility (e.g., a remote facility) instead of facility 1102. In at least one embodiment, the machine learning model may have already been trained on imaging data from one location, two locations, or any number of locations. In at least one embodiment, when training on imaging data from a specific location, training can be performed at that location, or at least in a manner that protects the confidentiality of the imaging data or restricts the transfer of the imaging data from off-site locations. In at least one embodiment, once a model has been trained or partially trained at a location, a machine learning model can be added to model registry 1124. In at least one embodiment, the machine learning model can then be retrained or updated at any number of other facilities, and the retrained or updated model can be used in model registry 1124. In at least one embodiment, a machine learning model (and referred to as output model 1116) can then be selected from model registry 1124, and can be executed in deployment system 1106 for one or more processing tasks for one or more applications of the deployment system.
[0150] In at least one embodiment, in training pipeline 1204 ( Figure 12In this scenario, the scenario may include facility 1102, which requires a machine learning model to perform one or more processing tasks for deploying one or more applications in system 1106, but facility 1102 may not currently have such a machine learning model (or may not have an optimized, efficient, or effective model). In at least one embodiment, the machine learning model selected from model registry 1124 may not be fine-tuned or optimized for the imaging data 1108 generated at facility 1102 due to population variability, robustness, anomalous diversity of training data, and / or other problems with the training data used to train the machine learning model. In at least one embodiment, AI-assisted annotation 1110 may be used to help generate annotations corresponding to the imaging data 1108 for use as ground-based data for training or updating the machine learning model. In at least one embodiment, labeled clinical data 1112 may be used as ground-based data for training the machine learning model. In at least one embodiment, retraining or updating the machine learning model may be referred to as model training 1114. In at least one embodiment, model training 1114 (e.g., AI-assisted annotation 1110, labeled clinical data 1112, or a combination thereof) can be used as ground-based data to retrain or update the machine learning model. In at least one embodiment, the trained machine learning model can be referred to as output model 1116 and can be used by deployment system 1106, as described herein.
[0151] In at least one embodiment, deployment system 1106 may include software 1118, service 1120, hardware 1122, and / or other components, features, and functions. In at least one embodiment, deployment system 1106 may include a software "stack" such that software 1118 can be built on top of service 1120 and can be used to perform some or all of the processing tasks, and service 1120 and software 1118 can be built on top of hardware 1122 and the hardware 1122 can be used to perform the deployment system's processing, storage, and / or other computational tasks. In at least one embodiment, software 1118 may include any number of different containers, each of which can perform an instantiation of an application. In at least one embodiment, each application can perform one or more processing tasks (e.g., inference, object detection, feature detection, segmentation, image enhancement, calibration, etc.) in a high-level processing and inference pipeline. In at least one embodiment, in addition to receiving and configuring imaging data for use by each container and / or for use by facility 1102 after processing through the pipeline, advanced processing and inference pipelines (e.g., to convert output back to available data types) can be defined based on the selection of different containers desired or required for processing imaging data 1108. In at least one embodiment, a combination of containers within software 1118 (e.g., constituting a pipeline) may be referred to as a virtual instrument (as described in more detail herein), and the virtual instrument may utilize service 1120 and hardware 1122 to perform some or all of the processing tasks of an application instantiated within the container.
[0152] In at least one embodiment, the data processing pipeline may receive input data (e.g., imaging data 1108) in a specific format in response to an inference request (e.g., a request from a user of deployment system 1106). In at least one embodiment, the input data may represent one or more images, videos, and / or other data representations generated by one or more imaging devices. In at least one embodiment, the data may be preprocessed as part of the data processing pipeline to prepare it for processing by one or more applications. In at least one embodiment, post-processing may be performed on the output of one or more inference tasks or other processing tasks of the pipeline to prepare output data for the next application and / or to prepare output data for user transmission and / or use (e.g., as a response to an inference request). In at least one embodiment, the inference task may be performed by one or more machine learning models, such as trained or deployed neural networks, which may include the output model 1116 of training system 1104.
[0153] In at least one embodiment, the tasks of the data processing pipeline can be encapsulated in containers, each container representing a discrete, fully functional instantiation of an application and a virtualized computing environment capable of referencing a machine learning model. In at least one embodiment, containers or applications can be published to a private (e.g., limited access) area of a container registry (described in more detail herein), and trained or deployed models can be stored in model registry 1124 and associated with one or more applications. In at least one embodiment, an image of an application (e.g., a container image) can be used in the container registry, and once a user selects an image from the container registry for deployment in the pipeline, that image can be used to generate containers for instantiation of the application for use by the user's system.
[0154] In at least one embodiment, a developer (e.g., a software developer, clinician, physician, etc.) can develop, publish, and store an application (e.g., as a container) for performing image processing and / or inference on provided data. In at least one embodiment, a software development kit (SDK) associated with the system can be used to perform development, publication, and / or storage (e.g., to ensure that the developed application and / or container conforms to or is compatible with the system). In at least one embodiment, the developed application can be tested locally using the SDK (e.g., at a first facility, testing data from a first facility), the SDK serving as a system (e.g.,...). Figure 12 System 1200 may support at least some services 1120. In at least one embodiment, since DICOM objects may contain one to hundreds of images or other data types, and due to variations in the data, the developer may be responsible for managing (e.g., setting up constructs for preprocessing built into the application, etc.) the extraction and preparation of incoming data. In at least one embodiment, once verified by system 1200 (e.g., for accuracy), the application becomes available in the container registry for user selection and / or implementation to perform one or more processing tasks on data at the user's facility (e.g., a second facility).
[0155] In at least one embodiment, the developer can then share the application or container over a network for the system (e.g., Figure 12The system 1200 allows for user access and use. In at least one embodiment, completed and validated applications or containers may be stored in a container registry, and associated machine learning models may be stored in a model registry 1124. In at least one embodiment, a requesting entity (which provides an inference or image processing request) may browse the container registry and / or model registry 1124 to obtain applications, containers, datasets, machine learning models, etc., select desired combinations of elements to include in the data processing pipeline, and submit an image processing request. In at least one embodiment, the request may include input data necessary to execute the request (and, in some examples, patient-related data), and / or may include selections of applications and / or machine learning models to be executed when processing the request. In at least one embodiment, the request may then be passed to one or more components of the deployment system 1106 (e.g., the cloud) to perform processing in the data processing pipeline. In at least one embodiment, processing performed by the deployment system 1106 may include referencing elements (e.g., applications, containers, models, etc.) selected from the container registry and / or model registry 1124. In at least one embodiment, once the results are generated through the pipeline, the results can be returned to the user for reference (e.g., for viewing in a suite of viewing applications executed locally, on a local workstation, or on a terminal).
[0156] In at least one embodiment, service 1120 may be utilized to assist in processing or executing applications or containers in the pipeline. In at least one embodiment, service 1120 may include computing services, artificial intelligence (AI) services, visualization services, and / or other service types. In at least one embodiment, service 1120 may provide functionality common to one or more applications in software 1118, thus abstracting functionality into services that can be invoked or utilized by applications. In at least one embodiment, the functionality provided by service 1120 can operate dynamically and more efficiently, while also allowing applications to process data in parallel (e.g., using...). Figure 12The parallel computing platform 1230 in the system can be scaled well. In at least one embodiment, it is not required that each application providing the same functionality as the shared service 1120 must have a corresponding instance of the service 1120, but the service 1120 can be shared between and among various applications. In at least one embodiment, as a non-limiting example, the service may include an inference server or engine that can be used to perform detection or segmentation tasks. In at least one embodiment, a model training service may be included, which can provide the ability to train and / or retrain machine learning models. In at least one embodiment, a data augmentation service may be further included, which can provide GPU-accelerated data (e.g., DICOM, RIS, CIS, conforming to REST, RPC, raw, etc.) extraction, resizing, scaling, and / or other enhancements. In at least one embodiment, a visualization service may be used, which can add image rendering effects (e.g., ray tracing, rasterization, denoising, sharpening, etc.) to add realism to two-dimensional (2D) and / or three-dimensional (3D) models. In at least one embodiment, a virtual instrument service may be included, which provides beamforming, segmentation, inference, imaging, and / or support for other applications within the virtual instrument pipeline.
[0157] In at least one embodiment, where service 1120 includes an AI service (e.g., an inference service), as part of application execution, one or more machine learning models can be executed by invoking (e.g., as an API call) the inference service (e.g., an inference server) to execute one or more machine learning models or their processing. In at least one embodiment, where another application includes one or more machine learning models for a segmentation task, the application can invoke the inference service to execute the machine learning models for performing one or more processing operations associated with the segmentation task. In at least one embodiment, software 1118 implementing advanced processing and inference pipelines, including a segmentation application and an anomaly detection application, can be pipelined because each application can invoke the same inference service to execute one or more inference tasks.
[0158] In at least one embodiment, hardware 1122 may include a GPU, CPU, graphics card, AI / deep learning system (e.g., an AI supercomputer, such as NVIDIA's DGX), cloud platform, or a combination thereof. In at least one embodiment, different types of hardware 1122 may be used to provide efficient, specially built support for software 1118 and services 1120 in deployment system 1106. In at least one embodiment, GPU processing may be used to perform local processing (e.g., at facility 1102) within the AI / deep learning system, in the cloud system, and / or other processing components of deployment system 1106 to improve the efficiency, accuracy, and performance of image processing and generation. In at least one embodiment, as a non-limiting example, software 1118 and / or services 1120 may be optimized for GPU processing in relation to deep learning, machine learning, and / or high-performance computing. In at least one embodiment, at least some of the computing environment of deployment system 1106 and / or training system 1104 may be executed in a data center, one or more supercomputers, or high-performance computing systems with GPU-optimized software (e.g., a hardware and software combination of an NVIDIA DGX system). In at least one embodiment, as described herein, hardware 1122 may include any number of GPUs that can be invoked to perform data processing in parallel. In at least one embodiment, the cloud platform may also include GPU-optimized execution for deep learning tasks, GPU processing for machine learning tasks, or other computational tasks. In at least one embodiment, an AI / deep learning supercomputer and / or GPU-optimized software (e.g., as provided on NVIDIA's DGX systems) may be used as a hardware abstraction and scaling platform to execute the cloud platform (e.g., NVIDIA's NGC). In at least one embodiment, the cloud platform may integrate application container cluster systems or coordination systems (e.g., Kubernetes) across multiple GPUs to achieve seamless scaling and load balancing.
[0159] Figure 12 This is a system diagram of an example system 1200 for generating and deploying an imaging deployment pipeline according to at least one embodiment. In at least one embodiment, system 1200 can be used to implement Figure 11 The process 1100 and / or other processes include advanced processing and inference pipelines. In at least one embodiment, system 1200 may include training system 1104 and deployment system 1106. In at least one embodiment, training system 1104 and deployment system 1106 may be implemented using software 1118, service 1120 and / or hardware 1122, as described herein.
[0160] In at least one embodiment, system 1200 (e.g., training system 1104 and / or deployment system 1106) may be implemented in a cloud computing environment (e.g., using cloud 1226). In at least one embodiment, system 1100 may be implemented locally (in relation to a healthcare facility) or as a combination of cloud computing resources and local computing resources. In at least one embodiment, access to the API in cloud 1226 may be restricted to authorized users by establishing security measures or protocols. In at least one embodiment, the security protocol may include a network token, which may be signed by an authentication service (e.g., AuthN, AuthZ, Gluecon, etc.) and may carry appropriate authorization. In at least one embodiment, the API of the virtual instrument (described herein) or other instances of system 1200 may be restricted to a set of public IPs that have been audited or authorized for interaction.
[0161] In at least one embodiment, the various components of system 1200 may communicate with each other using any of a variety of different network types, including but not limited to local area networks (LANs) and / or wide area networks (WANs) via wired and / or wireless communication protocols. In at least one embodiment, communication between facilities and components of system 1200 (e.g., for sending inference requests, for receiving the results of inference requests, etc.) may be transmitted via one or more data buses, wireless data protocols (Wi-Fi), wired data protocols (e.g., Ethernet), etc.
[0162] In at least one embodiment, similar to the description herein. Figure 11 As described, training system 1104 can execute training pipeline 1204. In at least one embodiment, where deployment system 1106 uses one or more machine learning models in deployment pipeline 1210, training pipeline 1204 can be used to train or retrain one or more (e.g., pre-trained) models, and / or implement one or more pre-trained models 1206 (e.g., without retraining or updating). In at least one embodiment, as a result of training pipeline 1204, output model 1116 can be generated. In at least one embodiment, training pipeline 1204 can include any number of processing steps, such as, but not limited to, transformation or adaptation of imaging data (or other input data). In at least one embodiment, different training pipelines 1204 can be used for different machine learning models used by deployment system 1106. In at least one embodiment, similar to the description of... Figure 11 The training pipeline 1204 described in the first example can be used for the first machine learning model, similar to the one described above. Figure 11 The training pipeline 1204 described in the second example can be used for a second machine learning model, similar to that described above. Figure 11The training pipeline 1204 of the third example described can be used for a third machine learning model. In at least one embodiment, any combination of tasks within the training system 1104 can be used according to the requirements of each corresponding machine learning model. In at least one embodiment, one or more machine learning models may have already been trained and are ready for deployment, so the training system 1104 may not perform any processing on the machine learning models, and one or more machine learning models may be implemented by the deployment system 1106.
[0163] In at least one embodiment, depending on the implementation or embodiment, the output model 1116 and / or the pre-trained model 1206 may include any type of machine learning model. In at least one embodiment, and not limited thereto, the machine learning model used by system 1200 may include models using linear regression, logistic regression, decision trees, support vector machines (SVM), Naive Bayes, k-nearest neighbors (Knn), k-means clustering, random forests, dimensionality reduction algorithms, gradient boosting algorithms, neural networks (e.g., autoencoders, convolutions, recursion, perceptrons, long / short-term memory (LSTM), Hopfield, Boltzmann, deep belief, deconvolution, generative adversarial, liquid state machines, etc.), and / or other types of machine learning models.
[0164] In at least one embodiment, the training pipeline 1204 may include AI-assisted annotations, as described herein regarding at least Figure 13BMore specifically, in at least one embodiment, labeled clinical data 1112 can be generated using any number of techniques (e.g., conventional annotation). In at least one embodiment, in some examples, labels or other annotations can be generated by drawing programs (e.g., annotation programs), computer-aided design (CAD) programs, tagging programs, another type of application suitable for generating annotations or labels for ground reality, and / or can be hand-drawn. In at least one embodiment, ground reality data can be synthetically generated (e.g., generated from computer models or renderings), realistically generated (e.g., designed and generated from real-world data), automatically generated by machines (e.g., extracting features from data using feature analysis and learning, and then generating labels), manually annotated (e.g., taggers or annotation experts, defining the placement of labels), and / or combinations thereof. In at least one embodiment, for each instance of imaging data 1108 (or other data types used by machine learning models), there may be corresponding ground reality data generated by training system 1104. In at least one embodiment, AI-assisted annotation can be performed as part of deployment pipeline 1210; supplementing or replacing AI-assisted annotation included in training pipeline 1204. In at least one embodiment, system 1200 may include a multi-layer platform, which may include a software layer (e.g., software 1118) of a diagnostic application (or other application type) capable of performing one or more medical imaging and diagnostic functions. In at least one embodiment, system 1200 may be communicatively coupled (e.g., via an encrypted link) to a network of PACS servers in one or more facilities. In at least one embodiment, system 1200 may be configured to access and reference data from PACS servers to perform operations such as training machine learning models, deploying machine learning models, image processing, inference, and / or other operations.
[0165] In at least one embodiment, the software layer may be implemented as a secure, encrypted, and / or certified API that can invoke (e.g., call) an application or container from an external environment (e.g., facility 1102). In at least one embodiment, the application may then invoke or execute one or more services 1120 to perform computational, AI, or visualization tasks associated with their respective applications, and the software 1118 and / or services 1120 may utilize the hardware 1122 to perform processing tasks efficiently and effectively.
[0166] In at least one embodiment, deployment system 1106 may execute deployment pipeline 1210. In at least one embodiment, deployment pipeline 1210 may include any number of applications, which may be sequential, non-sequential, or otherwise applied to imaging data (and / or other data types) – including AI-assisted annotation, the imaging data being generated by imaging devices, sequencing devices, genomics devices, etc., as described above. In at least one embodiment, as described herein, deployment pipeline 1210 for an individual device may be referred to as a virtual instrument for the device (e.g., a virtual ultrasound instrument, a virtual CT scanner, a virtual sequencing instrument, etc.). In at least one embodiment, for a single device, more than one deployment pipeline 1210 may exist, depending on the desired information from the data generated from the device. In at least one embodiment, a first deployment pipeline 1210 may exist if it is desired to detect an anomaly from an MRI machine, and a second deployment pipeline 1210 may exist if it is desired to perform image enhancement from the output of the MRI machine.
[0167] In at least one embodiment, the image generation application may include processing tasks that utilize machine learning models. In at least one embodiment, a user may wish to use their own machine learning model or select a machine learning model from the model registry 1124. In at least one embodiment, a user may implement their own machine learning model or select a machine learning model to be included in the application performing the processing tasks. In at least one embodiment, the application may be optional and customizable, and by defining the application's construction, the deployment and implementation of the application for a specific user is presented as a more seamless user experience. In at least one embodiment, by leveraging other features of system 1200 (e.g., service 1120 and hardware 1122), the deployment pipeline 1210 can be more user-friendly, provide easier integration, and produce more accurate, efficient, and timely results.
[0168] In at least one embodiment, deployment system 1106 may include user interface 1214 (e.g., graphical user interface, web interface, etc.) which may be used to select applications to be included in deployment pipeline 1210, deploy applications, modify or change applications or their parameters or configurations, use and interact with deployment pipeline 1210 during setup and / or deployment, and / or otherwise interact with deployment system 1106. In at least one embodiment, although not shown with respect to training system 1104, user interface 1214 (or different user interfaces) may be used to select models to be used in deployment system 1106, to select models to be trained or retrained in training system 1104, and / or to otherwise interact with training system 1104.
[0169] In at least one embodiment, in addition to the application coordination system 1228, a pipeline manager 1212 may be used to manage interactions between applications or containers deployed through the pipeline 1210 and services 1120 and / or hardware 1122. In at least one embodiment, the pipeline manager 1212 may be configured to facilitate interactions from application to application, from application to service 1120, and / or from application or service to hardware 1122. In at least one embodiment, although shown as included in software 1118, this is not intended to be limiting, and in some examples, the pipeline manager 1212 may be included within service 1120. In at least one embodiment, the application coordination system 1228 (e.g., Kubernetes, DOCKER, etc.) may include a container coordination system that can group applications into containers as logical units for coordination, management, scaling, and deployment. In at least one embodiment, by associating applications from the deployment pipeline 1210 (e.g., rebuilding applications, splitting applications, etc.) with individual containers, each application can execute in a self-contained environment (e.g., at the kernel level) to improve speed and efficiency.
[0170] In at least one embodiment, each application and / or container (or its image) can be developed, modified, and deployed independently (e.g., a first user or developer can develop, modify, and deploy a first application, and a second user or developer can develop, modify, and deploy a second application separate from the first user or developer). This allows focus on the tasks of a single application and / or container without being hindered by the tasks of another application or container. In at least one embodiment, the pipeline manager 1212 and the application coordination system 1228 can facilitate communication and collaboration between different containers or applications. In at least one embodiment, the application coordination system 1228 and / or the pipeline manager 1212 can facilitate communication and resource sharing between and within each application or container, provided that the expected inputs and / or outputs of each container or application are known to the system (e.g., based on the application or container's architecture). In at least one embodiment, since one or more applications or containers in the deployment pipeline 1210 can share the same services and resources, the application coordination system 1228 can coordinate, load balance, and determine the sharing of services or resources between and within the various applications or containers. In at least one embodiment, the scheduler can be used to track the resource requirements of applications or containers, the current or planned use of these resources, and resource availability. Therefore, in at least one embodiment, taking into account the system's needs and availability, the scheduler can allocate resources to different applications and distribute resources between and among applications. In some examples, the scheduler (and / or other components of the application coordination system 1228) can determine resource availability and distribution based on constraints imposed on the system (e.g., user constraints), such as Quality of Service (QoS), the urgency of data output (e.g., to determine whether to perform real-time processing or delayed processing), etc.
[0171] In at least one embodiment, service 1120, utilized and shared by applications or containers in deployment system 1106, may include computing service 1216, AI service 1218, visualization service 1220, and / or other service types. In at least one embodiment, an application may invoke (e.g., execute) one or more services 1120 to perform processing operations for the application. In at least one embodiment, an application may utilize computing service 1216 to perform supercomputing or other high-performance computing (HPC) tasks. In at least one embodiment, one or more computing services 1216 may be utilized to perform parallel processing (e.g., using parallel computing platform 1230) to process data substantially simultaneously through one or more applications and / or one or more tasks of a single application. In at least one embodiment, parallel computing platform 1230 (e.g., NVIDIA's CUDA) may implement general-purpose computing on a GPU (GPGPU) (e.g., GPU 1222). In at least one embodiment, the software layer of parallel computing platform 1230 may provide access to the GPU's virtual instruction set and parallel computing elements to execute computing kernels. In at least one embodiment, the parallel computing platform 1230 may include memory, and in some embodiments, memory may be shared between and within multiple containers, and / or between and within different processing tasks within a single container. In at least one embodiment, inter-process communication (IPC) calls may be generated for multiple containers and / or multiple processes within containers to enable the use of the same data (e.g., multiple different stages of one or more applications processing the same information) from a shared memory segment of the parallel computing platform 1230. In at least one embodiment, instead of copying data and moving it to different locations in memory (e.g., read / write operations), the same data in the same memory location can be used for any number of processing tasks (e.g., at the same time, at different times, etc.). In at least one embodiment, this information about the new location of the data can be stored and shared between applications because the resulting data from processing is used to generate new data. In at least one embodiment, the location of the data, and the location of the updated or modified data, may be part of the definition of how the payload in the container is understood.
[0172] In at least one embodiment, AI service 1218 may be used to perform an inference service for executing a machine learning model associated with the application (e.g., a task to perform one or more processing tasks of the application). In at least one embodiment, AI service 1218 may utilize AI system 1224 to execute a machine learning model (e.g., a neural network such as a CNN) for segmentation, reconstruction, object detection, feature detection, classification, and / or other inference tasks. In at least one embodiment, the application deploying pipeline 1210 may use one or more output models 1116 of self-training system 1104 and / or other models of the application to perform inference on imaging data. In at least one embodiment, two or more examples of using application coordination system 1228 (e.g., a scheduler) for inference may be available. In at least one embodiment, a first category may include a high-priority / low-latency path that can implement a higher service level protocol, such as for performing inference on urgent requests in emergency situations or for radiologists during diagnostic procedures. In at least one embodiment, a second category may include a standard priority path that can be used for requests that may not be urgent or for situations where analysis can be performed at a later time. In at least one embodiment, the application coordination system 1228 may allocate resources (e.g., services 1120 and / or hardware 1122) based on priority paths for different inference tasks of the AI service 1218.
[0173] In at least one embodiment, shared memory may be installed into AI service 1218 in system 1200. In at least one embodiment, shared memory may operate as a cache (or other storage device type) and may be used to process inference requests from applications. In at least one embodiment, when an inference request is submitted, a set of API instances of deployment system 1106 may receive the request and may select one or more instances (e.g., for best fit, for load balancing, etc.) to process the request. In at least one embodiment, to process the request, the request may be fed into a database, and if not already in the cache, a machine learning model may be located from model registry 1124. A verification step may ensure that an appropriate machine learning model is loaded into the cache (e.g., shared memory), and / or a copy of the model may be saved to the cache. In at least one embodiment, if the application is not already running or there are not enough instances of the application, a scheduler (e.g., the scheduler of pipeline manager 1212) may be used to start the application referenced in the request. In at least one embodiment, if an inference server has not yet been started to execute the model, an inference server may be started. Any number of inference servers may be started for each model. In at least one embodiment, in a pull model that clusters inference servers, the model can be cached whenever load balancing is favorable. In at least one embodiment, the inference servers can be statically loaded into the corresponding distributed servers.
[0174] In at least one embodiment, an inference server running in a container can be used to perform inference. In at least one embodiment, an instance of the inference server can be associated with a model (and optionally multiple versions of the model). In at least one embodiment, if an instance of the inference server does not exist when a request to perform inference on the model is received, a new instance can be loaded. In at least one embodiment, when the inference server is started, a model can be passed to the inference server, allowing the same container to be used to serve different models, as long as the inference server runs as different instances.
[0175] In at least one embodiment, during application execution, an inference request for a given application can be received, and a container (e.g., an instance of a hosted inference server) can be loaded (if not already loaded), and a launcher can be invoked. In at least one embodiment, preprocessing logic within the container can (e.g., using a CPU and / or GPU) load, decode, and / or perform any additional preprocessing on the incoming data. In at least one embodiment, once the data is ready for inference, the container can infer the data as needed. In at least one embodiment, this can include a single inference call for an image (e.g., a hand X-ray) or can request inference for hundreds of images (e.g., a chest CT scan). In at least one embodiment, the application can summarize the results before completion, which may include, but is not limited to, a single confidence score, pixel-level segmentation, voxel-level segmentation, generating visualizations, or generating text to summarize the results. In at least one embodiment, different priorities can be assigned to different models or applications. For example, some models may have a real-time (TAT less than 1 minute) priority, while other models may have a lower priority (e.g., TAT less than 10 minutes). In at least one embodiment, model execution time can be measured from the requesting agency or entity, and may include cooperative network traversal time and inference service execution time.
[0176] In at least one embodiment, the transfer of requests between service 1120 and the inference application can be hidden behind a software development kit (SDK) and robust transfer can be provided via queues. In at least one embodiment, requests are placed in queues via an API for individual application / tenant ID combinations, and the SDK pulls requests from the queues and provides them to the application. In at least one embodiment, the name of the queue can be provided in the environment where the SDK picks up the queue. In at least one embodiment, asynchronous communication via queues may be useful because it allows any instance of the application to pick up work when it becomes available. Results can be sent back via queues to ensure no data loss. In at least one embodiment, queues can also provide the ability to partition work, as the highest priority work can go into a queue connected to a majority of instances of the application, while the lowest priority work can go into a queue connected to a single instance that processes tasks in the order they are received. In at least one embodiment, the application can run on a GPU-accelerated instance generated in cloud 1226, and the inference service can perform inference on the GPU.
[0177] In at least one embodiment, visualization service 1220 can be used to generate visualizations for viewing the output of application and / or deployment pipeline 1210. In at least one embodiment, visualization service 1220 can utilize GPU 1222 to generate visualizations. In at least one embodiment, visualization service 1220 can implement rendering effects such as ray tracing to generate higher quality visualizations. In at least one embodiment, visualizations can include, but are not limited to, 2D image rendering, 3D volume rendering, 3D volume reconstruction, 2D tomographic slicing, virtual reality display, augmented reality display, etc. In at least one embodiment, a virtualized environment can be used to generate virtual interactive displays or environments (e.g., virtual environments) for system users (e.g., doctors, nurses, radiologists, etc.) to interact with. In at least one embodiment, visualization service 1220 can include an internal visualizer, cinematic and / or other rendering or image processing capabilities or functions (e.g., ray tracing, rasterization, internal optics, etc.).
[0178] In at least one embodiment, hardware 1122 may include GPU 1222, AI system 1224, cloud 1226, and / or any other hardware for performing training system 1104 and / or deployment system 1106. In at least one embodiment, GPU 1222 (e.g., NVIDIA's TESLA and / or QUADRO GPUs) may include any number of GPUs that can be used to perform processing tasks of any feature or function of computing service 1216, AI service 1218, visualization service 1220, other services, and / or software 1118. For example, for AI service 1218, GPU 1222 may be used to perform preprocessing on imaging data (or other data types used by machine learning models), postprocessing on the output of machine learning models, and / or perform inference (e.g., to execute machine learning models). In at least one embodiment, cloud 1226, AI system 1224, and / or other components of system 1200 may use GPU 1222. In at least one embodiment, cloud 1226 may include a GPU-optimized platform for deep learning tasks. In at least one embodiment, AI system 1224 may use a GPU, and one or more AI systems 1224 may be used to perform cloud 1226 (or at least part of a task for deep learning or inference). Similarly, although hardware 1122 is shown as a discrete component, this is not intended to be limiting, and any component of hardware 1122 may be combined with or utilized by any other component of hardware 1122.
[0179] In at least one embodiment, AI system 1224 may include a specially built computing system (e.g., a supercomputer or HPC) configured for inference, deep learning, machine learning, and / or other artificial intelligence tasks. In at least one embodiment, in addition to CPU, RAM, memory, and / or other components, features, or functions, AI system 1224 (e.g., NVIDIA's DGX) may also include GPU-optimized software (e.g., a software stack) that can be executed using multiple GPUs 1222. In at least one embodiment, one or more AI systems 1224 may be implemented in a cloud 1226 (e.g., in a data center) to perform some or all of the AI-based processing tasks of system 1200.
[0180] In at least one embodiment, cloud 1226 may include GPU-accelerated infrastructure (e.g., NVIDIA's NGC) that can provide a GPU-optimized platform for performing processing tasks of system 1200. In at least one embodiment, cloud 1226 may include AI system 1224 for performing one or more AI-based tasks of system 1200 (e.g., as a hardware abstraction and scaling platform). In at least one embodiment, cloud 1226 may be integrated with application coordination system 1228 utilizing multiple GPUs to achieve seamless scaling and load balancing between and within applications and services 1120. In at least one embodiment, as described herein, cloud 1226 may be responsible for performing at least some of the services 1120 of system 1200, including computing service 1216, AI service 1218, and / or visualization service 1220. In at least one embodiment, cloud 1226 may perform large and small batch inference (e.g., perform NVIDIA's TENSORRT), provide accelerated parallel computing APIs and platform 1230 (e.g., NVIDIA's CUDA), perform application coordination system 1228 (e.g., KUBERNETES), provide graphics rendering APIs and platform (e.g., for ray tracing, 2D graphics, 3D graphics and / or other rendering techniques to produce higher quality cinematic effects), and / or provide other functionalities for system 1200.
[0181] Figure 13A A data flow diagram of a process 1300 for training, retraining, or updating a machine learning model according to at least one embodiment is shown. In at least one embodiment, a non-limiting example can be used. Figure 12System 1200 executes process 1300. In at least one embodiment, process 1300 may utilize services 1120 and / or hardware 1122 of system 1200, as described herein. In at least one embodiment, the refined model 1312 generated by process 1300 may be executed by deployment system 1106 for one or more containerized applications in deployment pipeline 1210.
[0182] In at least one embodiment, model training 1114 may include retraining or updating the initial model 1304 (e.g., a pre-trained model) using new training data (e.g., new input data, such as customer dataset 1306, and / or new ground reality data associated with the input data). In at least one embodiment, to retrain or update the initial model 1304, the output or loss layer of the initial model 1304 may be reset or deleted, and / or replaced with an updated or new output or loss layer. In at least one embodiment, the initial model 1304 may have previously fine-tuned parameters (e.g., weights and / or biases) retained from previous training, so training or retraining 1114 may not require as much time or processing as training the model from scratch. In at least one embodiment, during model training 1114, by resetting or replacing the output or loss layer of the initial model 1304, on a new customer dataset 1306 (e.g., new input data, such as customer dataset 1306, and / or new ground reality data associated with the input data), the initial model 1304 may be retrained or updated. Figure 11 When generating predictions on image data (1108), the parameters of the new dataset can be updated and readjusted based on the loss calculation associated with the accuracy of the output or loss layer.
[0183] In at least one embodiment, the pre-trained model 1206 may be stored in a data storage or registry (e.g., Figure 11(Model registry 1124). In at least one embodiment, the pre-trained model 1206 may have been trained at least partially at one or more facilities other than the facility executing process 1300. In at least one embodiment, to protect the privacy and rights of patients, subjects, or customers at different facilities, the pre-trained model 1206 may have been trained locally using locally generated customer or patient data. In at least one embodiment, the pre-trained model 1206 may be trained using cloud 1226 and / or other hardware 1122, but confidential, privacy-protected patient data may not be transferred to, used by, or accessed by any component of cloud 1226 (or other non-local hardware). In at least one embodiment, if the pre-trained model 1206 is trained using patient data from more than one facility, the pre-trained model 1206 may have been trained separately for each facility before training on patient or customer data from another facility. In at least one embodiment, such as when customer or patient data has been published for privacy reasons (e.g., by abandonment, for experimental purposes, etc.), or where customer or patient data is included in a public dataset, customer or patient data from any number of facilities can be used to train a pre-trained model 1206 locally and / or externally, such as in a data center or other cloud computing infrastructure.
[0184] In at least one embodiment, when selecting an application for use in deployment pipeline 1210, the user may also select a machine learning model for a specific application. In at least one embodiment, the user may not have a model available, so the user may select a pre-trained model 1206 to use with the application. In at least one embodiment, the pre-trained model 1206 may not be optimized to generate accurate results on the user facility's customer dataset 1306 (e.g., based on patient diversity, demographics, type of medical imaging equipment used, etc.). In at least one embodiment, the pre-trained model 1206 may be updated, retrained, and / or fine-tuned for use at various facilities before being deployed to deployment pipeline 1210 for use with one or more applications.
[0185] In at least one embodiment, a user may select a pre-trained model 1206 to be updated, retrained, and / or fine-tuned, and the pre-trained model 1206 may be referred to as the initial model 1304 of the training system 1104 in process 1300. In at least one embodiment, a client dataset 1306 (e.g., imaging data, genomic data, sequencing data, or other data types generated by equipment at the facility) may be used to perform model training 1114 (which may include, but is not limited to, transfer learning) on the initial model 1304 to generate a refined model 1312. In at least one embodiment, ground-based data corresponding to the client dataset 1306 may be generated by the training system 1104. In at least one embodiment, ground-based data (e.g., such as...) may be generated at the facility at least in part by clinicians, scientists, physicians, practitioners, etc. Figure 11 Clinical data marked in 1112).
[0186] In at least one embodiment, AI-assisted annotation 1110 may be used in some examples to generate ground reality data. In at least one embodiment, AI-assisted annotation 1110 (e.g., implemented using an AI-assisted annotation SDK) may leverage machine learning models (e.g., neural networks) to generate ground reality data for suggestions or predictions for a customer dataset. In at least one embodiment, user 1310 may use the annotation tool within a user interface (graphical user interface (GUI)) on computing device 1308.
[0187] In at least one embodiment, user 1310 can interact with the GUI via computing device 1308 to edit or fine-tune annotations or automatic annotations. In at least one embodiment, polygon editing features can be used to move the vertices of a polygon to more precise or fine-tuned positions.
[0188] In at least one embodiment, once the customer dataset 1306 has associated ground-based data, the ground-based data (e.g., from AI-assisted annotations, manual labeling, etc.) can be used to generate a refined model 1312 during model training 1114. In at least one embodiment, the customer dataset 1306 can be applied to the initial model 1304 an arbitrary number of times, and the ground-based data can be used to update the parameters of the initial model 1304 until an acceptable level of accuracy is achieved for the refined model 1312. In at least one embodiment, once the refined model 1312 is generated, it can be deployed within one or more deployment pipelines 1210 at the facility to perform one or more processing tasks related to medical imaging data.
[0189] In at least one embodiment, the refined model 1312 can be uploaded to the pre-trained model 1206 in the model registry 1124 for selection by another facility. In at least one embodiment, this process can be completed at any number of facilities, allowing the refined model 1312 to be further refined any number of times on a new dataset to generate a more general model.
[0190] Figure 13B This is an example illustration of a client-server architecture 1332 for enhancing an annotation tool using a pre-trained annotation model, according to at least one embodiment. In at least one embodiment, an AI-assisted annotation tool 1336 may be instantiated based on the client-server architecture 1332. In at least one embodiment, the annotation tool 1336 in an imaging application can assist ray surgeons, for example, in identifying organs and abnormalities. In at least one embodiment, the imaging application may include software tools, as a non-limiting example, that help user 1310 identify several extreme points on a specific organ of interest in a raw image 1334 (e.g., in a 3D MRI or CT scan) and receive automatic annotation results for all 2D slices of that specific organ. In at least one embodiment, the results may be stored in a data store as training data 1338 and used as (e.g., but not limited to) ground-based real-world data for training. In at least one embodiment, when computing device 1308 sends extreme points for AI-assisted annotation 1310, for example, a deep learning model may receive this data as input and return inference results for segmenting organs or abnormalities. In at least one embodiment, a pre-instantiated annotation tool (e.g., Figure 13B The AI-assisted annotation tool 1336B can be enhanced by making API calls (e.g., API call 1344) to a server (such as annotation assistant server 1340), which may include a set of pre-trained models 1342 stored, for example, in an annotation model registry. In at least one embodiment, the annotation model registry may store pre-trained models 1342 (e.g., machine learning models, such as deep learning models) that have been pre-trained to perform AI-assisted annotation on specific organs or abnormalities. In at least one embodiment, these models can be further updated using a training pipeline 1204. In at least one embodiment, the pre-installed annotation tool can be improved over time as newly labeled clinical data 1112 is added.
[0191] Other variations are within the spirit of this disclosure. Therefore, although the disclosed technology is readily adaptable to various modifications and alternative constructions, certain embodiments thereof are illustrated in the accompanying drawings and have been described in detail above. However, it should be understood that the disclosure is not intended to be limited to one or more specific forms disclosed, but rather, it is intended to cover all modifications, alternative constructions, and equivalents falling within the spirit and scope of this disclosure as defined in the appended claims.
[0192] Unless otherwise stated or obviously contradicted by the context, the terms “a,” “an,” and “the,” and similar references, used in the context of describing the disclosed embodiments (particularly in the context of the appended claims), should be interpreted as encompassing both singular and plural forms, rather than as definitions of the terms. Unless otherwise stated, the terms “comprising,” “having,” “including,” and “containing” should be interpreted as open-ended terms (meaning “including, but not limited to”). The term “connection” (referring to a physical connection where not modified) should be interpreted as partially or wholly contained, attached to, or joined together, even with some intervention. Unless otherwise indicated herein, references to numerical ranges herein are intended only as a way of abbreviating each individual value falling within that range, and each individual value is incorporated into the specification as if it were separately described herein. Unless otherwise indicated or contradicted by the context, the use of the terms “set” (e.g., “item set”) or “subset” should be interpreted as a non-empty set comprising one or more members. Furthermore, unless otherwise indicated or contradicted by the context, the term "subset" of a corresponding set does not necessarily refer to an appropriate subset of the corresponding set, but rather the subset and the corresponding set can be equal.
[0193] Unless otherwise explicitly stated or clearly contradicted by the context, connective phrases such as “at least one of A, B, and C” or “at least one of A, B, and C” are understood in the context to generally refer to items, terms, etc., which can be A or B or C, or any non-empty subset of the set A, B, and C. For example, in an illustrative example of a set with three members, the connective phrases “at least one of A, B, and C” and “at least one of A, B, and C” refer to any of the following sets: {A}, {B}, {C}, {A, B}, {A, C}, {B, C}, {A, B, C}. Therefore, such connective language is generally not intended to imply that some embodiments require the presence of at least one of A, at least one of B, and at least one of C. Additionally, unless otherwise stated or contradicted by the context, the term “multiple” indicates a plural state (e.g., “multiple items” means multiple items). The number of items in a multiple item is at least two, but may be more if explicitly indicated or indicated by the context. Furthermore, unless otherwise stated or clearly understood from the context, the phrase “based on” means “at least partially based on” rather than “based on only”.
[0194] Unless otherwise indicated herein or clearly contradicted by the context, the operations of the processes described herein may be performed in any suitable order. In at least one embodiment, processes such as those described herein (or variations thereof and / or combinations thereof) are executed under the control of one or more computer systems configured with executable instructions and are implemented as code (e.g., executable instructions, one or more computer programs, or one or more application programs) that is executed jointly on one or more processors via hardware or a combination thereof. In at least one embodiment, the code is stored on a computer-readable storage medium, for example, in the form of a computer program comprising a plurality of instructions executable by one or more processors. In at least one embodiment, the computer-readable storage medium is a non-transitory computer-readable storage medium that excludes transient signals (e.g., propagating transient electrical or electromagnetic transmissions) but includes non-transitory data storage circuitry (e.g., buffers, caches, and queues). In at least one embodiment, code (e.g., executable code or source code) is stored on one or more non-transitory computer-readable storage media (or other memory for storing executable instructions) on which executable instructions are stored, which, when executed by one or more processors of a computer system (i.e., as a result of execution), cause the computer system to perform the operations described herein. In at least one embodiment, the set of non-transitory computer-readable storage media comprises multiple non-transitory computer-readable storage media, and one or more of the individual non-transitory storage media lack all the code, but the multiple non-transitory computer-readable storage media collectively store all the code. In at least one embodiment, the executable instructions are executed such that different instructions are executed by different processors; for example, the non-transitory computer-readable storage media store the instructions, and the main central processing unit (“CPU”) executes some instructions while the graphics processing unit (“GPU”) executes other instructions. In at least one embodiment, different components of the computer system have separate processors, and the different processors execute different subsets of the instructions.
[0195] Therefore, in at least one embodiment, the computer system is configured to implement one or more services that perform the operations of the processes described herein, either individually or collectively, and such a computer system is configured with suitable hardware and / or software to enable the implementation of the operations. Furthermore, the computer system implementing at least one embodiment of this disclosure is a single device, and in another embodiment it is a distributed computer system comprising multiple devices operating in different ways, such that the distributed computer system performs the operations described herein, and that a single device does not perform all the operations.
[0196] The use of any and all examples or exemplary language (e.g., “such as”) provided herein is intended only to better illustrate embodiments of this disclosure and does not constitute a limitation on the scope of the disclosure unless otherwise required. No language in the specification should be construed as indicating that any unclaimed element is essential to the practice of the disclosure.
[0197] All references cited in this article, including publications, patent applications and patents, are incorporated herein by reference as if each reference were individually and specifically indicated to be incorporated herein by reference and the entire contents of which are described herein.
[0198] The terms “coupled” and “connected”, and their derivatives, may be used in the specification and claims. It should be understood that these terms may not be intended to be synonyms with each other. Rather, in certain examples, “connected” or “coupled” may be used to indicate that two or more elements are in direct or indirect physical or electrical contact with each other. “Coupled” may also mean that two or more elements are not in direct contact with each other, but still cooperate or interact with each other.
[0199] Unless otherwise expressly stated, it will be understood that throughout this specification, terms such as “processing,” “computing,” “determining,” etc., refer to the actions and / or processes of a computer or computing system or similar electronic computing device that process and / or convert data represented as physical quantities (e.g., electrons) in the registers and / or memory of the computing system into other data represented as physical quantities in the memory, registers, or other such information storage, transmission, or display devices of the computing system.
[0200] In a similar manner, the term "processor" can refer to any device or part of memory that processes electronic data from registers and / or memory and converts that electronic data into other electronic data that can be stored in registers and / or memory. As a non-limiting example, a "processor" can be a CPU or a GPU. A "computing platform" can include one or more processors. As used herein, a "software" process can include, for example, software and / or hardware entities that perform work over time, such as tasks, threads, and intelligent agents. Similarly, each process can refer to multiple processes that execute instructions sequentially or intermittently, sequentially, or in parallel. The terms "system" and "method" are used interchangeably herein, provided that a system can embody one or more methods, and a method can be considered a system.
[0201] This document refers to the process of acquiring, obtaining, receiving, or inputting analog or digital data into a subsystem, computer system, or computer-implemented machine. Analog and digital data can be acquired, obtained, received, or input in various ways, such as by receiving data as a parameter to a function call or a call to an application programming interface (API). In some implementations, the process of acquiring, obtaining, receiving, or inputting analog or digital data can be accomplished by transmitting data via a serial or parallel interface. In another implementation, the process of acquiring, obtaining, receiving, or inputting analog or digital data can be accomplished by transmitting data from a providing entity to an acquiring entity via a computer network. Reference can also be made to providing, outputting, transmitting, sending, or presenting analog or digital data. In various examples, the process of providing, outputting, transmitting, sending, or presenting analog or digital data can be implemented by transmitting data as an input or output parameter to a function call, an API, or an inter-process communication mechanism.
[0202] While the discussion above illustrates example implementations of the described technologies, other architectures can be used to implement the described functionality and are intended to fall within the scope of this disclosure. Furthermore, although specific assignments of responsibilities have been defined above for discussion purposes, various functions and responsibilities can be assigned and divided in different ways depending on the circumstances.
[0203] Furthermore, although the subject matter has been described in language specific to structural features and / or methodological actions, it should be understood that the subject matter claimed in the appended claims is not necessarily limited to the specific features or actions described. Rather, specific features and actions are disclosed as exemplary forms for implementing the claims.
[0204] Some parts of the preceding detailed description have been presented in the form of notational representations of algorithms and operations on data bits within computer memory. These algorithmic descriptions and representations are the methods used by those skilled in the art of data processing to most effectively communicate the substance of their work to others in the field. Here, generally speaking, an algorithm is considered a self-consistent sequence of operations that leads to a desired result. These operations are those that require physical manipulation of physical quantities. Typically, though not always, these quantities take the form of electrical or magnetic signals that can be stored, combined, compared, and otherwise manipulated. It turns out that these signals are sometimes referred to as bits, values, elements, symbols, characters, terms, numbers, or similar things, primarily for common usage.
[0205] However, it should be remembered that all these and similar terms will be associated with appropriate physical quantities and are merely convenient labels applied to those quantities. This disclosure may refer to the actions and processes of a computer system or similar electronic computing device that manipulate and convert data represented as physical (electronic) quantities within the registers and memories of the computer system into other data similarly represented as physical quantities within the computer system's memory or registers or other such information storage systems.
[0206] This disclosure also relates to an apparatus for performing the operations described herein. The apparatus may be specifically constructed for the intended purpose, or it may comprise a general-purpose computer selectively activated or reconfigured by a computer program stored in a computer. Such a computer program may be stored in a computer-readable storage medium, such as, but not limited to, any type of disk, including floppy disks, optical disks, CD-ROMs and magneto-optical disks, read-only memory (ROM), random access memory (RAM), EPROM, EEPROM, magnetic cards or optical cards, or any type of medium suitable for storing electronic instructions, each coupled to a computer system bus.
[0207] The algorithms and displays presented herein are not inherently linked to any particular computer or other device. Various general-purpose systems can be used with programs conforming to the teachings of this document, or it can be demonstrated that it is convenient to construct a more specialized device to perform the method. The architectures of various such systems will appear in the description below. Furthermore, this disclosure is not described with reference to any particular programming language. It is understood that the teachings of this disclosure described herein can be implemented using various programming languages.
[0208] This disclosure may be provided as a computer program product or software, which may include a machine-readable medium having instructions stored thereon that can be used to program a computer system (or other electronic device) to perform processes according to this disclosure. Machine-readable media includes any mechanism for storing information in a machine-readable (e.g., computer-readable) form. In some embodiments, machine-readable (e.g., non-transitory computer-readable) media includes machine-readable storage media such as read-only memory (“ROM”), random access memory (“RAM”), magnetic disk storage media, optical storage media, flash memory components, etc.
[0209] In the foregoing specification, embodiments of the present disclosure have been described with reference to specific exemplary embodiments. It will be apparent that various modifications may be made thereto without departing from the broader spirit and scope of the embodiments of the present disclosure as set forth in the following claims. Therefore, this specification and the accompanying drawings should be considered illustrative rather than restrictive.
Claims
1. A system for extending the dynamic range of an image, comprising: Memory; A processing device operatively coupled to the memory, the processing device being used for: Receive the image corresponding to the first pixel value range; The input corresponding to the image is processed using a trained machine learning model to generate a first output and a second output, wherein the second output includes an extended map indicating pixel classifications of pixels in the image, wherein one or more pixels with the first classification are included in the region of the image where the brightness is to be modified. The image is expanded to generate image data corresponding to a second pixel value range, wherein the second pixel value range is greater than the first pixel value range; The image data is updated using a first operator, wherein, based on the first output, the first operator applies a filter to reduce one or more stripe artifacts in the image data; The image data is updated using a second operator, wherein the second operator modifies the brightness of the region of the expanded image based on the second output; as well as The image data is output to one or more devices.
2. The system of claim 1, wherein the image comprises a standard dynamic range (SDR) image, and the output image data comprises a high dynamic range (HDR) image.
3. The system of claim 1, wherein the first operator is a local operator comprising a clamped bilateral filter with a variable width, and the second operator is a global operator comprising a luminance multiplier.
4. The system according to claim 1, wherein: The first output includes a first extended map, which indicates the distance to each pixel in the image from the pixel considered by the first operator.
5. The system of claim 4, wherein the first classification includes a user interface classification, and wherein the second operator reduces at least one brightness value corresponding to the region.
6. The system of claim 4, wherein the first classification includes a high reflectivity classification, and wherein the second operator adds at least one brightness value corresponding to the region.
7. The system of claim 1, wherein the trained machine learning model comprises a deep neural network (DNN), the DNN using the image as input and outputting the first output and the second output in two or more different channels, wherein the two or more different channels include at least a first channel and a second channel, the first channel including a first extended graph and the second channel including a second extended graph.
8. The system of claim 1, wherein the input further comprises one or more previous outputs of the trained machine learning model.
9. The system of claim 1, wherein, in order to expand the image, the processing device is used to dequantize the 8-bit input image to generate at least one of the following: 10-bit image data, 12-bit image data, 16-bit image data, or 32-bit image data.
10. The system of claim 1, wherein the image comprises: The processing device comprises frames of a video sequence, and the processing device is used to output extended image data of at least one frame of the sequence to a display device.
11. A method for extending the dynamic range of an image, comprising: The processing device receives an image corresponding to the first pixel value range; The processing device processes the input corresponding to the image using a trained machine learning model to generate a first output and a second output, wherein the second output includes an extended map indicating pixel classifications of pixels in the image, wherein one or more pixels with the first classification are included in the region of the image where the brightness is to be modified. The image is expanded to generate image data corresponding to a second pixel value range, wherein the second pixel value range is greater than the first pixel value range; The image data is updated using a first operator, wherein, based on the first output, the first operator applies a filter to reduce one or more stripe artifacts in the image data; The image data is updated using a second operator, wherein the second operator modifies the brightness of the region of the expanded image based on the second output; as well as The image data is output by the processing device.
12. The method of claim 11, wherein the image comprises a standard dynamic range (SDR) image, and the output image data comprises a high dynamic range (HDR) image.
13. The method of claim 11, wherein the first operator is a local operator comprising a clamped bilateral filter with a variable width, and the second operator is a global operator comprising a luminance multiplier.
14. The method of claim 11, wherein: The first output includes a first extended map, which indicates the distance to at least one pixel in the image from the pixel considered by the first operator.
15. The method of claim 14, wherein the first classification includes a user interface classification, and wherein the second operator reduces at least one brightness value corresponding to the region.
16. The method of claim 14, wherein the first classification includes a high reflectivity classification, and wherein the second operator increases at least one brightness value corresponding to the region.
17. A non-transitory machine-readable storage medium storing instructions that, when executed, cause a processing device to perform the following operations: Receive the image corresponding to the first pixel value range; The input corresponding to the image is processed using a trained machine learning model to generate a first output and a second output, wherein the second output includes an expanded map indicating pixel classifications of pixels in the image, wherein one or more pixels with the first classification are included in the region of the image where the brightness is to be modified. The image is expanded to generate image data corresponding to a second pixel value range, wherein the second pixel value range is greater than the first pixel value range; The image data is updated using a first operator, wherein, based on the first output, the first operator applies a filter to reduce one or more stripe artifacts in the image data; The image data is updated using a second operator, wherein the second operator modifies the brightness of the region of the expanded image based on the second output; as well as The image data is output to one or more devices.
18. The non-transitory machine-readable storage medium of claim 17, wherein the image comprises a standard dynamic range (SDR) image, and the output image data comprises a high dynamic range (HDR) image.
19. The non-transitory machine-readable storage medium of claim 17, wherein the first operator is a local operator comprising a clamped bilateral filter of variable width, and the second operator is a global operator comprising a luminance multiplier.
20. The non-transitory machine-readable storage medium of claim 17, wherein the trained machine learning model comprises a convolutional neural network (CNN), the CNN using the image as input and outputting the first output and the second output in two or more distinct channels, wherein the two or more distinct channels comprise at least a first channel and a second channel, the first channel comprising a first extended graph and the second channel comprising a second extended graph.