Pixel circuit, pixel circuit driving method and display panel

Abstract

The pixel circuit, pixel circuit driving method, and display panel provided by the embodiments of the present application relate to the field of display technology. In the pixel circuit, a first reset module and a reset signal compensation module are connected in series between the control end of the driving module and the reset signal line. The reset signal after compensation, voltage division, or current limiting by the reset signal compensation module is greater than the reset signal originally provided by the reset signal line. In this way, when the branch where the first power signal line, the driving module, and the first reset module are located is turned on, the current flowing through the branch is reduced, thereby reducing the current flowing into the reset signal line and reducing the voltage drop on the reset signal line caused by the large current flowing into the reset signal line. This makes the reset signals provided to the pixel circuit at different positions on the reset signal line substantially consistent, thereby solving the problem of uneven display of the display panel due to excessive differences in the reset signals provided at different positions on the reset signal line, and improving the display effect of the display panel.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a pixel circuit, a driving method for a pixel circuit, and a display panel. Background Art

[0002] In AMOLED (Active-Matrix Organic Light-Emitting Diode) display technology, pixels are driven and illuminated using pixel circuits, of which coupled pixel circuits are a common type. Display panels that use coupled pixel circuits to illuminate pixels suffer from uneven display quality, which can severely impact the display quality. Summary of the Invention

[0003] In order to overcome the technical problems mentioned in the above technical background, embodiments of the present application provide a pixel circuit, a driving method of the pixel circuit, and a display panel.

[0004] In a first aspect of the present application, a pixel circuit is provided, the pixel circuit comprising: a first reset module, a data writing module, a storage module, a threshold compensation module, a driving module, a light emitting module and a reset signal compensation module;

[0005] The storage module is connected between the control end of the driving module and the data writing module;

[0006] The first reset module and the reset signal compensation module are connected in series between the control terminal of the driving module and the reset signal line; the first reset module is used to reset the control terminal of the driving module;

[0007] The threshold compensation module is connected between the control terminal of the driving module and the first terminal of the driving module, and is used to perform threshold compensation on the driving module;

[0008] The light emitting module and the driving module are connected in series between the first power signal line and the second power signal line.

[0009] In the pixel circuit provided above, the first reset module and the reset signal compensation module are connected in series between the control end of the driving module and the reset signal line. The reset signal after compensation by the reset signal compensation module will be greater than the reset signal originally provided by the reset signal line. In this way, when the branch where the driving module and the first reset module are located is turned on, the current flowing through the branch can be reduced, thereby reducing the current flowing into the reset signal line, reducing the voltage drop on the reset signal line caused by the large current flowing into the reset signal line, so that the reset signals provided to the pixel circuit at different positions on the reset signal line are basically consistent, so as to solve the problem of uneven display of the display panel due to excessive differences in the reset signals provided at different positions on the reset signal line, thereby improving the display effect of the display panel.

[0010] In some possible embodiments of the present application, the pixel circuit further includes a second reset module, a first end of the second reset module is connected to an end of the data writing module connected to the storage module,

[0011] The second end of the second reset module is electrically connected to the reset signal line, and the first reset module is connected between the control end of the driving module and the reset signal compensation module;

[0012] Alternatively, the second end of the second reset module is electrically connected to the reset signal line, and the reset signal compensation module is connected between the control end of the driving module and the first reset module;

[0013] Alternatively, the first reset module is connected between the control terminal of the driving module and the reset signal compensation module, and the second terminal of the second reset module is electrically connected to one terminal electrically connected to the reset signal compensation module.

[0014] In some possible embodiments of the present application, the reset signal compensation module is used to reduce the current flowing through the branch where the first reset module is located when the first reset module resets the control terminal of the driving module;

[0015] Optionally, the reset signal compensation module includes a diode, and the first reset module and the diode are connected in series between the control terminal of the driving module and the reset signal line; the diode is turned on when the first reset module resets the control terminal of the driving module;

[0016] Optionally, the reset signal compensation module includes an eighth transistor, and the control end of the eighth transistor is electrically connected to the first end to form a diode;

[0017] Optionally, the reset signal compensation module includes a resistor, and the first reset module and the resistor are connected in series between the control terminal of the driving module and the reset signal line.

[0018] In some possible embodiments of the present application, the threshold compensation module includes a first threshold compensation unit and a second threshold compensation unit, the first threshold compensation unit and the second threshold compensation unit are connected in series between the control terminal of the driving module and the first terminal of the driving module, and the first reset module and the reset signal compensation module are connected in series between one terminal electrically connected to the first threshold compensation unit and the second threshold compensation unit and the reset signal line;

[0019] Optionally, the first threshold compensation unit includes a first sub-transistor, the second threshold compensation unit includes a second sub-transistor, the second end of the first sub-transistor is connected to the first end of the second sub-transistor, the first end of the first sub-transistor is connected to the control end of the driving module, and the second end of the second sub-transistor is connected to the first end of the driving module; the first reset module and the reset signal compensation module are connected in series between the second end of the first sub-transistor and the reset signal line.

[0020] Optionally, the data writing module, the first threshold compensation unit and the second threshold compensation unit are electrically connected to the first scan signal line.

[0021] In some possible embodiments of the present application, the data writing module and the threshold compensation module are electrically connected to the first scan signal line;

[0022] Optionally, the driving module includes a first transistor, the second end of the first transistor is connected to the first power signal line, the control end of the first transistor is connected to the second end of the storage module, and the first end of the first transistor is connected to the light emitting module;

[0023] The data writing module includes a second transistor, a second end of the second transistor is connected to the data line, a control end of the second transistor is connected to the first scan signal line, and a first end of the second transistor is connected to the first end of the storage module;

[0024] The threshold compensation module includes a third transistor, a first end of the third transistor is connected to the control end of the first transistor, the control end of the third transistor is connected to the first scan signal line, and a second end of the third transistor is connected to the first end of the first transistor.

[0025] In some possible embodiments of the present application, the light emitting module includes a light emitting control unit and a light emitting element.

[0026] The second end of the driving module is electrically connected to the first power signal line, the light emitting control unit is connected between the first end of the driving module and the first end of the light emitting element, and the second end of the light emitting element is electrically connected to the second power signal line;

[0027] Optionally, the second reset module and the light emitting control unit are electrically connected to the light emitting control signal line;

[0028] The second reset module includes a fifth transistor, a second end of the fifth transistor is connected to one end of the storage module connected to the data writing module, a control end of the fifth transistor is connected to the light emitting control signal line, and a first end of the fifth transistor is connected to one end of the reset signal compensation module connected to the first reset module or the reset signal line;

[0029] The light emitting control unit includes a sixth transistor, a second end of the sixth transistor is connected to the first end of the driving module, a control end of the sixth transistor is connected to the light emitting control signal line, and a first end of the sixth transistor is connected to the first end of the light emitting element.

[0030] In some possible embodiments of the present application, the pixel circuit further includes a third reset module, the third reset module being electrically connected to the first end of the light emitting element; the third reset module being configured to reset the first end of the light emitting element;

[0031] Optionally, the third reset module is connected between the first end of the light emitting element and the reset signal line;

[0032] Optionally, the third reset module includes: a seventh transistor, the control end of the seventh transistor is connected to the third scan signal line, the second end of the seventh transistor is connected to the reset signal line or the third scan signal line, and the first end of the seventh transistor is connected to the first end of the light-emitting element.

[0033] In some possible embodiments of the present application, there are one or more reset signal compensation modules, at least one reset signal compensation module is connected between the control end of the driving module and the first reset module, and / or at least one reset signal compensation module is connected between the first reset module and the reset signal line;

[0034] Optionally, the storage module includes a storage capacitor, the data writing module is connected between the data line and a first end of the storage capacitor, and the second end of the storage capacitor is electrically connected to the control end of the driving module;

[0035] Optionally, the first reset module includes a fourth transistor, the control end of the fourth transistor is connected to the second scanning signal line, the first end of the fourth transistor, the second end of the fourth transistor, and the reset signal compensation module are connected in series between the control end of the driving module and the reset signal line.

[0036] A second aspect of the present application further provides a method for driving a pixel circuit, which is applied to the pixel circuit in any possible embodiment of the first aspect, and the method includes:

[0037] In the first reset phase, the reset signal on the reset signal line resets the control end of the driving module after passing through the first reset module and the reset signal compensation module.

[0038] According to a third aspect of the present application, a display panel is provided, which includes the pixel circuit provided by any possible embodiment of the first aspect.

[0039] Compared to the prior art, the pixel circuit, pixel circuit driving method, and display panel provided in the embodiments of the present application include a first reset module and a reset signal compensation module connected in series between the control terminal of the driver module and the reset signal line. The reset signal compensated by the reset signal compensation module is greater than the reset signal originally provided by the reset signal line. In this way, when the branch where the driver module and the first reset module are located is turned on, the current flowing through the branch is reduced, thereby reducing the current flowing into the reset signal line and reducing the voltage drop on the reset signal line caused by the large current flowing into the reset signal line. This ensures that the reset signals provided to the pixel circuit at different positions on the reset signal line are substantially consistent, thereby resolving the problem of uneven display of the display panel caused by excessive differences in the reset signals provided at different positions on the reset signal line, and improving the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0041] Figure 1 A schematic diagram showing the connection between the pixel circuit and the signal lines in the display panel provided in an embodiment of the present application;

[0042] Figure 2 This is one of the structural diagrams of the pixel circuit provided in an embodiment of the present application;

[0043] Figure 3 The second structural diagram of the pixel circuit provided in the embodiment of the present application;

[0044] Figure 4 The third structural diagram of the pixel circuit provided in the embodiment of the present application;

[0045] Figure 5 This is a fourth structural diagram of a pixel circuit provided in an embodiment of the present application;

[0046] Figure 6 The fifth structural diagram of the pixel circuit provided in the embodiment of the present application;

[0047] Figure 7 The sixth structural diagram of the pixel circuit provided in the embodiment of the present application;

[0048] Figure 8 The seventh structural diagram of the pixel circuit provided in the embodiment of the present application;

[0049] Figure 9 The eighth structural diagram of the pixel circuit provided in the embodiment of the present application;

[0050] Figure 10 Schematic diagrams of some possible circuit structures of pixel circuits provided in embodiments of the present application;

[0051] Figure 11 Schematic diagrams of other possible circuit structures of pixel circuits provided in embodiments of the present application;

[0052] Figure 12 A timing diagram of a pixel circuit provided in an embodiment of the present application;

[0053] Figure 13 A schematic diagram of the current flow direction of the conducting branch of the pixel circuit provided by an embodiment of the present application during the time period t1;

[0054] Figure 14 is a schematic diagram of the current flow direction of the conducting branch of the relevant pixel circuit in the time period t1;

[0055] Figure 15 for Figure 13 and Figure 14 Simulation diagram of the voltage at point B;

[0056] Figure 16 A schematic diagram comparing brightness curves of a related pixel circuit and a pixel circuit provided in this application;

[0057] Figure 17 A partial flow chart of a driving method for a pixel circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0058] To make the objectives, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Generally, the components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.

[0059] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for protection, but merely represents selected embodiments of the present application. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments in the present application without creative work are within the scope of protection of the present application.

[0060] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0061] In the description of this application, it should be noted that the terms "upper" and "lower" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, or the orientations or positional relationships in which the product of this application is typically placed when in use. These terms are intended solely to facilitate the description of this application and simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," "third," and "fourth," etc., are used solely to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0062] It should be noted that, in the absence of conflict, different features in the embodiments of the present application can be combined with each other.

[0063] After analyzing the technical problem of uneven display in the background technology, the inventor found that the uneven display is mainly manifested in the presence of a bright line of a certain width (for example, 2mm) on one side of the display panel, and this defect is particularly obvious when displaying a dark picture. After disassembling and electrically analyzing a large number of display panels with this display problem, the inventor found that the main cause of the display problem is that the reset signal line provides different reset signals to different pixel columns. Please refer to Figure 1 , combined with Figure 1 A detailed analysis of the above issues is conducted. Figure 1 In the figure, the pixel circuits are arranged in an array, the row scanning signal line Scan and the light emitting control signal line EM provide signals for the pixel circuits arranged in each row respectively, and the first voltage signal line VDD, the second voltage signal line VSS, the reset signal line Vref and the data line Vdata provide signals for the pixel circuits arranged in columns respectively.

[0064] In the pixel circuit, the light emitting diode is driven by current, and the driving current is related to the difference between Vdata and Vref. Figure 1 After testing the voltage of the reset signal line Vref in the reset signal line Vref, it was found that the voltage of the reset signal line Vref in the reset signal line Vref was quite different. Figure 1 Taking the reset signal provided by the A1 end as an example, the reset signal will gradually decrease from the A1 end to the A2 end. This will cause the reset signal line Vref to provide large differences in the reset signals of the pixel circuits arranged in different columns, resulting in a bright line of a certain width appearing near the A1 end, affecting the display effect.

[0065] The inventors further discovered that the main reason for the large difference in voltage at different locations on the reset signal line Vref is that there is a large current on the reset signal line Vref, and the large current on the reset signal line Vref is caused by the signal lines connected to the reset signal line Vref in the pixel circuits arranged in different columns (along the Figure 1 The dashed line) is merged into the result.

[0066] In order to reduce the current flowing into the reset signal line Vref, the inventors have innovatively designed the following technical solution. The specific implementation of the present application will be described in detail below with reference to the accompanying drawings.

[0067] Please refer to Figure 2 , Figure 2 The pixel circuit 10 may include a first reset module 1101 , a data writing module 120 , a storage module 130 , a threshold compensation module 140 , a driving module 150 , a light emitting module 160 , and a reset signal compensation module 170 .

[0068] The working cycle of the pixel circuit may include a first reset phase, a compensation phase, a second reset phase and a light emitting phase. The pixel circuit is described below in conjunction with the different phases of the working cycle and the connection relationship between the various modules.

[0069] The storage module 130 is connected between the control terminal of the driver module 150 and the data writing module 120. The first reset module 1101 and the reset signal compensation module 170 are connected in series between the control terminal of the driver module 150 and the reset signal line Vref. The first reset module 1101 is used to reset the control terminal of the driver module 150. For example, the reset signal compensated by the reset signal compensation module 170 can be greater than the reset signal provided by the reset signal line Vref.

[0070] The threshold compensation module 140 is connected between the control terminal of the driver module 150 and the first terminal of the driver module 150. The threshold compensation module 140 is used to perform threshold compensation for the driver module. The light-emitting module 160 and the driver module 150 are connected in series between a first power signal line VDD and a second power signal line VSS. Optionally, one of the voltage on the first power signal line VDD and the voltage on the second power signal line VSS is a high voltage, and the other is a low voltage.

[0071] In the above circuit structure, the first reset module 1101 and the reset signal compensation module 170 are connected in series between the control end of the driving module 150 and the reset signal line Vref. The reset signal after compensation (or voltage division or current limiting) by the reset signal compensation module 170 will be greater than the reset signal originally provided by the reset signal line. In this way, when the branch where the first power signal line VDD, the driving module 150 and the first reset module 1101 are located is turned on, the current flowing through the branch can be reduced, thereby reducing the current flowing into the reset signal line Vref, and reducing the voltage drop on the reset signal line Vref caused by the large current flowing into the reset signal line Vref, so that the reset signals provided to the pixel circuit at different positions on the reset signal line Vref are basically consistent, so as to solve the problem of uneven display of the display panel due to excessive differences in the reset signals provided at different positions on the reset signal line Vref, thereby improving the display effect of the display panel.

[0072] Alternatively, see Figure 3 and Figure 4 In this embodiment, the pixel circuit 10 may further include a second reset module 1102 , wherein a first end of the second reset module 1102 is connected to one end of the data writing module 120 connected to the storage module 130 .

[0073] In some possible implementation modes of this embodiment, please refer to Figure 3The second end of the second reset module 1102 is electrically connected to the reset signal line Vref, and the first reset module 1101 can be connected between the control end of the driving module 150 and the reset signal compensation module 170. In other possible embodiments of this embodiment, please refer to Figure 4 The second end of the second reset module 1102 is electrically connected to the reset signal line Vref, and the reset signal compensation module 170 is connected between the control end of the driving module 150 and the first reset module 1101. In some other possible implementations of this embodiment, please refer to Figure 5 The first reset module 1101 is connected between the control end of the driving module 150 and the reset signal compensation module 170 , and the second end of the second reset module 1102 is electrically connected to one end electrically connected to the first reset module 1101 and the reset signal compensation module 170 .

[0074] In this embodiment, the reset signal compensation module 170 is used to reduce the current flowing through the branch where the first reset module 1101 is located when the first reset module 1101 resets the control end of the driver module 150. Optionally, the reset signal compensation module 170 may include a diode and / or a resistor. In some possible implementations of this embodiment, the reset signal compensation module 170 can be implemented using a diode. Specifically, the first reset module 1101 and the diode are connected in series between the control end of the driver module 150 and the reset signal line Vref, and the diode is turned on when the first reset module 1101 resets the control end of the driver module 150. Please refer to Figure 6 The reset signal compensation module 170 may include an eighth transistor T8, and a diode is formed by electrically connecting the control terminal of the eighth transistor T8 to the first terminal. The diode is turned on when the first reset module 1101 resets the control terminal of the driver module 150. In other possible implementations of this embodiment, the reset signal compensation module 170 may also be implemented using a resistor, with the first reset module 1101 and the resistor connected in series between the control terminal of the driver module 150 and the reset signal line Vref.

[0075] Alternatively, see Figure 7 In some possible implementations of this embodiment, the threshold compensation module 140 may include a first threshold compensation unit 1401 and a second threshold compensation unit 1402, the first threshold compensation unit 1401 and the second threshold compensation unit 1402 are connected in series between the control end of the driving module 150 and the first end of the driving module 150, and the first reset module 1101 and the reset signal compensation module 170 are connected in series between one end where the first threshold compensation unit 1401 and the second threshold compensation unit 1402 are electrically connected and the reset signal line Vref.

[0076] Optionally, the second end of the second reset module 1102 is electrically connected to the reset signal line Vref, and the first reset module 1101 can be connected between one end electrically connected to the first threshold compensation unit 1401 and the second threshold compensation unit 1402 and the reset signal compensation module 170 .

[0077] Optionally, a second end of the second reset module 1102 is electrically connected to the reset signal line Vref, and the reset signal compensation module 170 is connected between one end of the first threshold compensation unit 1401 and the second threshold compensation unit 1402 electrically connected and the first reset module 1101 .

[0078] Optionally, the first reset module 1101 is connected between one end where the first threshold compensation unit 1401 and the second threshold compensation unit 1402 are electrically connected and the reset signal compensation module 170, and the second end of the second reset module 1102 is electrically connected to one end where the first reset module 1101 and the reset signal compensation module 170 are electrically connected.

[0079] Optionally, the first threshold compensation unit 1401 includes a first sub-transistor T3-1, and the second threshold compensation unit 1402 includes a second sub-transistor T3-2. The second end of the first sub-transistor T3-1 is connected to the first end of the second sub-transistor T3-2. The first end of the first sub-transistor T3-1 is connected to the control end of the driving module 150, and the second end of the second sub-transistor T3-2 is connected to the first end of the driving module 150. Optionally, in this embodiment, the control end of the first sub-transistor T3-1 and the control end of the second sub-transistor T3-2 are both connected to the first scan signal line S1. The first reset module 1101 and the reset signal compensation module 170 are connected in series between the second end of the first sub-transistor T3-1 and the reset signal line Vref.

[0080] Alternatively, see Figure 8 The data writing module 120 and the threshold compensation module 140 are electrically connected to the first scanning signal line S1. Under the action of the first scanning signal on the first scanning signal line S1, the data writing module 120 and the threshold compensation module 140 are controlled to be turned on or off. Optionally, the data writing module 120, the first threshold compensation unit 1401, and the second threshold compensation unit 1402 are electrically connected to the first scanning signal line S1. Under the action of the first scanning signal on the first scanning signal line S1, the first threshold compensation unit 1401 and the second threshold compensation unit 1402 are controlled to be turned on or off.

[0081] Optionally, the driving module 150 includes a first transistor T1, the second end of the first transistor T1 is connected to the first power signal line VDD, and the control end of the first transistor T1 is electrically connected to the data writing module 120 via the storage module 130. For example, the control end of the first transistor T1 is connected to the second end of the storage module 130, and the first end of the first transistor T1 is connected to the light-emitting module 160.

[0082] Optionally, the data writing module 120 includes a second transistor T2, the second end of the second transistor T2 is connected to the data line Vdata, the control end of the second transistor T2 is connected to the first scan signal line S1, and the first end of the second transistor T2 is electrically connected to the control end of the driving module 150 via the storage module 130, for example, the first end of the second transistor T2 is connected to the first end of the storage module 130.

[0083] Optionally, the threshold compensation module 140 includes a third transistor T3, wherein a first end of the third transistor T3 is connected to the control end of the driving module 150, for example, the first end of the third transistor T3 is connected to the control end of the first transistor T1, and the control end of the third transistor T3 is connected to the first scan signal line S1, and a second end of the third transistor T3 is connected to the first end of the driving module 150, for example, the second end of the third transistor T3 is connected to the first end of the first transistor T1. In this embodiment, the third transistor T3 can be formed by connecting two sub-transistors in series, for example, the first sub-transistor T3-1 and the second sub-transistor T3-2 are connected in series, wherein the first sub-transistor T3-1 and the second sub-transistor T3-2 are connected with a common gate. The third transistor T3 can also be implemented as a single transistor.

[0084] Please refer to Figure 6 and Figure 9 The light-emitting module 160 includes a light-emitting control unit 1601 and a light-emitting element 1602. The second end of the driver module 150 is electrically connected to the first power signal line VDD. The light-emitting control unit 1601 is connected between the first end of the driver module 150 and the first end of the light-emitting element 1602. The second end of the light-emitting element 1602 is electrically connected to the second power signal line VSS. Optionally, the voltage signal provided by the first power signal line VDD is greater than the voltage signal provided by the second power signal line VSS. The light-emitting element 1602 may be a light-emitting diode. The first end of the light-emitting element 1602 may be the anode of the light-emitting diode, and the second end of the light-emitting element 1602 may be the cathode of the light-emitting diode.

[0085] Optionally, the second reset module 1102 and the light control unit 1601 are electrically connected to the light control signal line EM. Under the action of the light control signal on the light control signal line EM, the second reset module 1102 and the light control unit 1601 are controlled to be turned on or off.

[0086] Optionally, the second reset module 1102 includes a fifth transistor T5, the second end of the fifth transistor T5 is connected to one end of the storage module 130 connected to the data writing module 120, the control end of the fifth transistor T5 is connected to the light-emitting control signal line EM, and the first end of the fifth transistor T5 is connected to one end of the reset signal compensation module 170 connected to the first reset module 1101 or the reset signal line Vref.

[0087] Optionally, the light-emitting control unit 1601 includes a sixth transistor T6, the second end of the sixth transistor T6 is connected to the first end of the driving module 150, the control end of the sixth transistor T6 is connected to the light-emitting control signal line EM, and the first end of the sixth transistor T6 is connected to the first end of the light-emitting element 1602.

[0088] Alternatively, see Figure 10 and Figure 11 In this embodiment, the pixel circuit 10 further includes a third reset module 1103 . The third reset module 1103 is electrically connected to the first end of the light emitting element 1602 . The third reset module 1103 is used to reset the first end of the light emitting element 1602 .

[0089] Optionally, the third reset module 1103 is connected between the first end of the light emitting element 1602 and the reset signal line Vref.

[0090] Optionally, the third reset module 1103 includes a seventh transistor T7, a control end of the seventh transistor T7 is connected to the third scan line S3, and a second end of the seventh transistor T7 is connected to the reset signal line Vref (eg, Figure 10 ) or the third scan line S3 (such as Figure 11 ), the first end of the seventh transistor T6 is connected to the first end of the light emitting element 1602.

[0091] In this embodiment, the seventh transistor T7 may also be formed by two transistors with a common gate connected in series.

[0092] Optionally, in this embodiment, the reset signal compensation module 170 can be one or more, at least one reset signal compensation module 170 is connected between the control end of the driving module 150 and the first reset module 1101, and / or, at least one reset signal compensation module 170 is connected between the first reset module 1101 and the reset signal line Vref.

[0093] Optionally, there are multiple reset signal compensation modules 170, such as two or three. Optionally, the second end of the second reset module 1102 is electrically connected to the reset signal line Vref, or the second end of the second reset module 1102 is connected to one end of the first reset module 1101 connected to one reset signal compensation module 170, or the second end of the second reset module 1102 is connected to one end of one reset signal compensation module 170 connected to another reset signal compensation module 170.

[0094] Optionally, the storage module 130 includes a storage capacitor C, the data writing module 120 is connected between the data line Vdata and a first end of the storage capacitor C, and a second end of the storage capacitor C is electrically connected to a control end of the driving module 150 .

[0095] Optionally, the first reset module 1101 includes a fourth transistor T4, a control end of the fourth transistor T4 is connected to the second scan signal line S2, and a first end of the fourth transistor T4, a second end of the fourth transistor T4, and a reset signal compensation module 170 are connected in series between the control end of the driving module 150 and the reset signal line Vref. For example, the second end of the fourth transistor T4 is connected between the second end of the storage capacitor C and the control end of the driving module 150, and the first end of the fourth transistor T4 is connected to the reset signal compensation module 170. Under the action of the second scan signal of the second scan signal line S2, the first reset module 1101 is controlled to be turned on or off.

[0096] In the above circuit structure, transistors T1 to T8 can be transistors of the same channel type or transistors of different channel types. Optionally, transistors T1 to T8 are transistors of the same channel type. When transistors T1 to T8 are all PMOS transistors, the control end corresponds to the gate of the PMOS transistor, the first end corresponds to the drain of the PMOS transistor, and the second end corresponds to the source of the PMOS transistor. Optionally, the transistors in the pixel circuit are all NMOS transistors, the control end corresponds to the gate of the NMOS transistor, the first end corresponds to the source of the NMOS transistor, and the second end corresponds to the drain of the NMOS transistor.

[0097] Please refer again Figure 10 and Figure 11In the embodiment of the present application, the third transistor T3 and the seventh transistor T7 can also be replaced by two transistors with a common gate. When the third transistor T3 is replaced by a common-gate transistor, the second end of the fourth transistor T4 can be connected between the two common-gate transistors. Using two common-gate transistors instead of a single transistor can reduce the impact of leakage current of the third transistor T3 on the stored voltage on the storage capacitor C when it is turned off, thereby facilitating better maintenance of the stored voltage on the storage capacitor C. Similarly, replacing the seventh transistor T7 with a common-gate transistor can avoid the impact of leakage current on the light-emitting diode D when the seventh transistor T7 is turned off.

[0098] Below is Figure 11 The transistor in the example is a PMOS transistor, combined with Figure 12 The signal timing diagram shown introduces the working principle of the pixel circuit provided by this embodiment.

[0099] During the first reset phase t1, the first scan signal on the first scan signal line S1 is at an on-level (e.g., a low level), the second scan signal on the second scan signal line S2 is at an on-level (e.g., a low level), the third scan signal on the third scan signal line S3 is at an off-level (e.g., a high level), and the light-emission control signal on the light-emission control signal line EM is at an off-level (e.g., a high level). At this point, the first reset module 1101, threshold compensation module 140, reset signal compensation module 170, driver module 150, and data write module 120 are turned on, while the third reset module 1103, second reset module 1102, and light-emission control unit 1601 are turned off. The reset signal on the reset signal line Vref, after passing through the first reset module 1101 and reset signal compensation module 170, resets the control terminal of the driver module 150. Specifically, the second transistor T2, the third transistor T3, the fourth transistor T4, and the eighth transistor T8 are turned on, and the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are turned off. The reset signal on the compensated reset signal line Vref resets the control terminal of the first transistor T1 and the second terminal of the storage capacitor, and the data voltage on the data line Vdata provides a voltage to the first terminal of the storage capacitor through the second transistor T2. At this time, the gate-source voltage Vgs of the first transistor T1 is less than the threshold voltage Vth, and the first transistor T1 is also turned on. The first transistor T1, the third transistor T3, and the fourth transistor T4 form a power-on branch, please refer to Figure 13 、 Figure 14 and Figure 15 , Figure 13 and Figure 14 illustratively illustrate a pixel circuit that compensates for a reset signal and a pixel circuit that does not compensate for a reset signal. Figure 15 Example Figure 13 and Figure 14The simulation diagram of the voltage curve at point B in the figure is as follows. Assuming that the reset signal line Vref provides a reset signal of about -0.5V, in the reset phase t1, Figure 13 In the circuit shown, at the moment the fourth transistor T4 is turned on, the voltage at point B is instantly pulled down. After the fourth transistor T4 is turned on, since the gate of the first transistor T1 still retains the gate voltage of the previous cycle, the voltage at point B is instantly pulled up. After the second end of the storage capacitor C is reset, the voltage at point B is approximately equal to the original reset signal Vref1 provided by the reset signal line Vref minus the threshold voltage Vth of the eighth transistor T8 (approximately -1.5V). The voltage at point B can reach about 1V, and Figure 14 In the pixel circuit shown, the voltage at point B is always maintained at about -0.5V because the reset signal is not compensated. Figure 13 In the branch shown by the dotted line, the voltage difference between point A and point B is smaller than the voltage difference between the two points before compensation, the current generated in the corresponding branch is also smaller, and the current flowing into the reset signal line Vref will also become smaller.

[0100] During compensation phase t2, the first scan signal on the first scan signal line S1 is at an on-level (e.g., a low level), the second scan signal on the second scan signal line S2 is at an off-level (e.g., a high level), the third scan signal on the third scan signal line S3 is at an off-level (e.g., a high level), and the light control signal on the light control signal line EM is at an off-level (e.g., a high level). The threshold compensation module 140, data write module 120, and reset signal compensation module 170 are turned on, while the first reset module 1101, third reset module 1103, second reset module 1102, and light control unit 1601 are turned off. The voltage on the first power supply signal line VDD is transmitted through the on-level threshold compensation module 140 and driver module 150 to perform threshold compensation on the control terminal of the driver module 150. The data voltage on the data line Vdata is transmitted through the on-level data write module 120 to the first terminal of the storage module 130 for threshold compensation. Afterward, the driver module 150 is turned off. Specifically, the second transistor T2, the third transistor T3, and the eighth transistor T8 are turned on, and the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are turned off. Specifically, the fourth transistor T4 is turned off, and the voltage on the first power signal line VDD begins to compensate the gate of the first transistor T1 through the first transistor T1 and the third transistor T3. When the gate voltage Vg of the first transistor T1 is VDD+Vth, the first transistor T1 is turned off, the voltage compensation of the first transistor T1 is completed, and the first transistor T1 is turned off.

[0101] During the second reset phase t3, the first scan signal on the first scan signal line S1 is at an off-level (e.g., a high level), the second scan signal on the second scan signal line S2 is at an off-level (e.g., a high level), the third scan signal on the third scan signal line S3 is at an on-level (e.g., a low level), and the light control signal on the light control signal line EM is at an off-level (e.g., a high level). At this point, the third reset module 1103 is turned on, while the first reset module 1101, threshold compensation module 140, reset signal compensation module 170, data writing module 120, second reset module 1102, and light control unit 1601 are turned off. The reset signal on the reset signal line Vref is transmitted to the first end of the light-emitting element 1602 via the turned-on third reset module 1103 to initialize the first end of the light-emitting element 1602. Specifically, the seventh transistor T7 is turned on, while the other transistors are turned off, resetting the anode of the light-emitting diode D. Exemplarily, the voltage of the anode of the light emitting diode D may be reset by using the low level signal VGL connected to the gate of the seventh transistor T7 or by using the original reset signal provided by the reset signal line Vref.

[0102] In light-emitting phase t4, the first scan signal on the first scan signal line S1 is at an off-level, such as a high level; the second scan signal on the second scan signal line S2 is at an off-level, such as a high level; the third scan signal on the third scan signal line S3 is at an off-level, such as a high level; and the light-emitting control signal on the light-emitting control signal line EM is at an on-level, such as a low level. At this time, the second reset module 1102, the reset signal compensation module 170, and the light-emitting control unit 1601 are turned on, while the first reset module 1101, the threshold compensation module 140, the data writing module 120, and the third reset module 1103 are turned off. The driver module 150 generates a drive current based on the voltage difference between its control terminal and the second terminal to drive the light-emitting element 1602 to emit light. Specifically, the fifth transistor T5, the sixth transistor T6, and the eighth transistor T8 are turned on, while the second transistor T2, the third transistor T3, the fourth transistor T4, and the seventh transistor T7 are turned off. The compensated reset signal Vref2 is given to the first end of the storage capacitor C, and the voltage on the first end of the storage capacitor C changes from Vdata to Vref2. According to the capacitive coupling effect, the voltage on the second end of the storage capacitor C (the gate-source voltage of the first transistor T1) changes from VDD+Vth to (VDD+Vth)+(Vref2-Vdata). At this time, the gate-source voltage of the first transistor T1 is Vgs=Vg-Vs=(VDD+Vth)+(Vref2-Vdata)-VDD=Vth+Vref2-Vdata, and Vgs-Vth=Vref2-Vdata<0. At this time, the first transistor T1 is turned on, and the first transistor T1 generates a driving current according to the gate-source voltage difference. The driving current flows to the light-emitting diode D through the turned-on sixth transistor T6. At this time, the light-emitting diode D is lit and emits light.

[0103] In the above-mentioned light-emitting process, the formula of the driving current I flowing through the light-emitting diode D is:

[0104] I=k*(Vdata-Vref2) 2

[0105] Where k is a determinable coefficient, that is, the driving current I is only related to the data voltage Vdata and the compensated reset signal Vref2. Figure 16 Compared with the pixel circuit without compensating the reset signal, the pixel circuit provided by this embodiment can also make the display panel present a better black state effect when the data voltage Vdata is small, thereby improving the technical problem of poor bright line when displaying (especially when displaying dark images). Figure 16The reasons for the difference shown are analyzed. Since brightness is positively correlated with driving current I, the greater the brightness, the greater the driving current. Conversely, the smaller the brightness, the smaller the driving current. Taking the display of a dark picture as an example, the Vdata data is small. Since the reset signal line is provided by the integrated circuit IC to provide the reset signal, the original reset signal Vref1 is limited by the integrated circuit IC and can only be a negative value, that is, a negative voltage. At this time, Vdata-Vref1 will be larger than Vdata, and the driving current will also become larger, which is not easy to present a black state effect. In addition, when the reset electrical signals provided at different positions on the reset signal line are greatly different, it is easier to Figure 1 A bright line defect is formed near the A1 terminal. In contrast, the solution provided by this embodiment compensates the reset signal, and the compensated reset signal Vref2 can be a positive value, that is, a positive voltage. In this way, the value of Vdata-Vref2 is smaller than Vdata, and the driving current is also reduced, making it easier to present a black state effect. At the same time, the reset signals provided at different positions on the reset signal line are not much different, which can ensure the uniformity of the screen display.

[0106] If adopted Figure 3 and Figure 4 In the corresponding technical solution, in the light emitting stage t4, the diode in the reset signal compensation module 170 can be turned off. Figure 5 Correspondingly, in the light emitting stage t4 , the diode in the reset signal compensation module 170 may be turned on.

[0107] Based on the same invention concept, please refer to Figure 17 The embodiment of the present application further provides a method for driving a pixel circuit. The method for driving a pixel circuit can be used to drive the pixel circuit described in the previous embodiment. The method for driving a pixel circuit provided in this embodiment includes:

[0108] Step S11 , in the first reset stage, the reset signal on the reset signal line resets the control end of the driving module after passing through the first reset module and the reset signal compensation module.

[0109] During the first reset stage, the current of the branch where the first power signal line VDD, the driving module 150 and the first reset module 1101 are located is reduced, which can reduce the current flowing into the reset signal line Vref and reduce the voltage drop on the reset signal line caused by the large current flowing into the reset signal line, so that the reset signals provided to the pixel circuit at different positions on the reset signal line are basically consistent, thereby solving the problem of uneven display of the display panel due to excessive differences in the reset signals provided at different positions on the reset signal line.

[0110] Optionally, during the first reset phase, the first reset module 1101, the threshold compensation module 140, the diode in the reset signal compensation module 170, the driver module 150, and the data writing module 120 are turned on. Optionally, during the first reset phase, the third reset module 1103, the second reset module 1102, and the light-emitting control unit 1601 are turned off. The reset signal on the reset signal line Vref resets the control terminal of the driver module 150 after passing through the first reset module 1101 and the reset signal compensation module 170.

[0111] Optionally, the pixel circuit driving method further includes: during a compensation phase, the threshold compensation module 140 and the data writing module 120 are turned on. The voltage on the first power signal line VDD is transmitted through the threshold compensation module 140 and the driving module 150, thereby performing threshold compensation on the control terminal of the driving module 150. The data voltage on the data line Vdata is transmitted to the first terminal of the storage module 130 through the data writing module 120. Optionally, during the compensation phase, the diodes in the first reset module 1101 and the reset signal compensation module 170 are turned off. Optionally, during the compensation phase, the third reset module 1103, the second reset module 1102, and the light emitting control unit 1601 are turned off.

[0112] Optionally, the pixel circuit driving method further includes: during a second reset phase, turning on the third reset module 1103. The reset signal on the reset signal line Vref is transmitted to the first end of the light-emitting element 1602 via the turned-on third reset module 1103 to initialize the first end of the light-emitting element 1602. Optionally, during the second reset phase, the first reset module 1101, the threshold compensation module 140, the diode in the reset signal compensation module 170, the data writing module 120, the second reset module 1102, and the light-emitting control unit 1601 are turned off.

[0113] Optionally, the driving method of the pixel circuit further includes: in the light-emitting stage, the second reset module 1102 and the light-emitting control unit 1601 are turned on. The driving module 150 generates a driving current according to the voltage difference between its control terminal and the second terminal to drive the light-emitting element 1602 to emit light. Optionally, in the light-emitting stage, the first reset module 1101, the threshold compensation module 140, the data writing module 120 and the third reset module 1103 are turned off. If Figure 3 and Figure 4 In the corresponding technical solution, in the light emitting stage t4, the diode in the reset signal compensation module 170 can be turned off. Figure 5 Correspondingly, in the light emitting stage t4 , the diode in the reset signal compensation module 170 may be turned on.

[0114] Based on the same inventive concept, an embodiment of the present application further provides a display panel, which includes the pixel circuit described in the previous embodiment. The use of the above pixel circuit can improve the display uniformity of the display panel and enhance the display effect.

[0115] The pixel circuit, pixel circuit driving method, and display panel provided by the embodiments of the present application. In the pixel circuit, a first reset module and a reset signal compensation module are connected in series between the control terminal of the driving module and the reset signal line. After compensation, voltage division, or current limiting by the reset signal compensation module, when the branch where the first power signal line, the driving module, and the first reset module are located is turned on, the current flowing through the branch is reduced, thereby reducing the current flowing into the reset signal line and reducing the voltage drop on the reset signal line caused by the large current flowing into the reset signal line, so that the reset signals provided to the pixel circuit at different positions on the reset signal line are basically consistent, thereby solving the problem of uneven display of the display panel due to excessive differences in the reset signals provided at different positions on the reset signal line, and improving the display effect of the display panel.

[0116] The above description is merely an optional embodiment of the present application and is not intended to limit the present application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included within the scope of protection of the present application.

Claims

1. A pixel circuit, characterized in that: The pixel circuit includes: a first reset module, a data writing module, a storage module, a threshold compensation module, a driving module, a light emitting module and a reset signal compensation module; The storage module is connected between the control end of the driving module and the data writing module; The first reset module and the reset signal compensation module are connected in series between the control terminal of the driving module and the reset signal line; the first reset module is used to reset the control terminal of the driving module; The threshold compensation module is connected between the control terminal of the driving module and the first terminal of the driving module, and is used to perform threshold compensation on the driving module; The light emitting module and the driving module are connected in series between a first power signal line and a second power signal line; The pixel circuit further includes a second reset module, a first end of which is connected to an end of the data writing module connected to the storage module. The second end of the second reset module is electrically connected to the reset signal line, and the first reset module is connected between the control end of the driving module and the reset signal compensation module; or, the second end of the second reset module is electrically connected to the reset signal line, and the reset signal compensation module is connected between the control end of the driving module and the first reset module; or, the first reset module is connected between the control end of the driving module and the reset signal compensation module, and the second end of the second reset module is electrically connected to one end of the first reset module electrically connected to the reset signal compensation module; The reset signal compensation module is used to reduce the current flowing through the branch where the first reset module is located when the first reset module resets the control terminal of the driving module. The reset signal compensation module includes a diode or a resistor. The first reset module and the reset signal compensation module are connected in series between the control terminal of the driving module and the reset signal line; The second reset module includes a fifth transistor, the second end of the fifth transistor is connected to one end of the storage module connected to the data writing module, the control end of the fifth transistor is connected to the light-emitting control signal line, and the first end of the fifth transistor is connected to one end of the reset signal compensation module connected to the first reset module or the reset signal line.

2. The pixel circuit according to claim 1, wherein: The reset signal compensation module includes an eighth transistor, the control end of the eighth transistor is electrically connected to the first end to form the diode; the diode is turned on when the first reset module resets the control end of the driving module.

3. The pixel circuit according to claim 1, wherein: The threshold compensation module includes a first threshold compensation unit and a second threshold compensation unit, the first threshold compensation unit and the second threshold compensation unit are connected in series between the control end of the driving module and the first end of the driving module, and the first reset module and the reset signal compensation module are connected in series between one end where the first threshold compensation unit and the second threshold compensation unit are electrically connected and a reset signal line.

4. The pixel circuit according to claim 3, wherein: The first threshold compensation unit includes a first sub-transistor, the second threshold compensation unit includes a second sub-transistor, the second end of the first sub-transistor is connected to the first end of the second sub-transistor, the first end of the first sub-transistor is connected to the control end of the driving module, and the second end of the second sub-transistor is connected to the first end of the driving module; the first reset module and the reset signal compensation module are connected in series between the second end of the first sub-transistor and the reset signal line.

5. The pixel circuit according to claim 4, wherein: The data writing module, the first threshold compensation unit, and the second threshold compensation unit are electrically connected to a first scan signal line.

6. The pixel circuit according to claim 1, wherein: The data writing module and the threshold compensation module are electrically connected to a first scan signal line.

7. The pixel circuit according to claim 6, wherein: The driving module includes a first transistor, a second end of the first transistor is connected to the first power signal line, a control end of the first transistor is connected to the second end of the storage module, and a first end of the first transistor is connected to the light emitting module; The data writing module includes a second transistor, wherein the second end of the second transistor is connected to the data line, the control end of the second transistor is connected to the first scan signal line, and the first end of the second transistor is connected to the first end of the storage module; The threshold compensation module includes a third transistor, a first end of the third transistor is connected to the control end of the driving module, the control end of the third transistor is connected to the first scanning signal line, and a second end of the third transistor is connected to the first end of the driving module.

8. The pixel circuit according to claim 1, wherein: The light emitting module includes a light emitting control unit and a light emitting element. The second end of the driving module is electrically connected to the first power signal line, the light emitting control unit is connected between the first end of the driving module and the first end of the light emitting element, and the second end of the light emitting element is electrically connected to the second power signal line.

9. The pixel circuit according to claim 8, wherein: The second reset module and the light emitting control unit are electrically connected to a light emitting control signal line.

10. The pixel circuit according to claim 8, wherein: The light emitting control unit includes a sixth transistor, a second end of the sixth transistor is connected to the first end of the driving module, a control end of the sixth transistor is connected to the light emitting control signal line, and a first end of the sixth transistor is connected to the first end of the light emitting element.

11. The pixel circuit according to claim 8, wherein: The pixel circuit further includes a third reset module, the third reset module being electrically connected to the first end of the light emitting element; the third reset module being configured to reset the first end of the light emitting element; The third reset module is connected between the first end of the light emitting element and the reset signal line.

12. The pixel circuit according to claim 11, wherein: The third reset module includes: a seventh transistor, a control end of the seventh transistor is connected to the third scan signal line, a second end of the seventh transistor is connected to the reset signal line or the third scan signal line, and a first end of the seventh transistor is connected to the first end of the light-emitting element.

13. The pixel circuit according to claim 8, wherein: There are one or more reset signal compensation modules, at least one of which is connected between the control end of the driving module and the first reset module, and / or at least one of which is connected between the first reset module and the reset signal line.

14. The pixel circuit according to claim 13, wherein: The storage module includes a storage capacitor, the data writing module is connected between a data line and a first end of the storage capacitor, and the second end of the storage capacitor is electrically connected to the control end of the driving module.

15. The pixel circuit according to claim 13, wherein: The first reset module includes a fourth transistor, the control end of the fourth transistor is connected to the second scan signal line, the first end of the fourth transistor, the second end of the fourth transistor, and the reset signal compensation module are connected in series between the control end of the driving module and the reset signal line.

16. A method for driving a pixel circuit, characterized in that: Applied to the pixel circuit according to any one of claims 1 to 15, the method comprising: In the first reset stage, the reset signal on the reset signal line resets the control end of the driving module after passing through the first reset module and the reset signal compensation module.

17. A display panel, characterized in that: The pixel circuit comprises the pixel circuit according to any one of claims 1 to 15.

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