Pixel circuit and driving method thereof, and display panel

Abstract

The present invention discloses a pixel circuit, a driving method thereof, and a display panel. The pixel circuit includes a driving module, a first voltage writing module, a storage module, a precharging module, a second voltage writing module, and a light-emitting module. The precharging module is used to transmit the data voltage on the data line to the first end of the storage module and the first power supply voltage transmitted on the first power line to the second end of the storage module during the precharging phase. The second voltage writing module is used to connect the second end of the storage module to the first end of the driving module and the first end of the storage module to the control end of the driving module during the first initialization phase. This solution can ensure that the voltage difference between the first end and the control end of the driving module is close to or remains constant during the first initialization phase and the light-emitting phase, reduce the drift of the threshold voltage of the driving transistor included in the driving module, and thus reduce the hysteresis effect of the driving transistor, which is conducive to improving the screen flicker phenomenon.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a pixel circuit and a driving method thereof, and a display panel. Background Art

[0002] With the continuous development of display technology, organic light emitting diode (OLED) display panels have been widely used in the field of optoelectronic display due to their excellent characteristics such as self-luminescence, high brightness and wide viewing angle.

[0003] A display panel typically includes multiple pixel circuits, each of which includes a driver transistor. The driver transistor generates a drive signal to drive the light-emitting element to produce light. In existing OLED display panels, light is generated by current. Therefore, the characteristics of the driver transistor affect the grayscale brightness of the display, thereby reducing display quality. Summary of the Invention

[0004] The present invention provides a pixel circuit and a driving method thereof, and a display panel, so as to improve the brightness difference of the display panel during the display process, thereby improving the display quality.

[0005] According to one aspect of the present invention, there is provided a pixel circuit, comprising: a driving module, a first voltage writing module, a storage module, a pre-charging module, a second voltage writing module and a light emitting module;

[0006] The pre-charging module is connected to at least the data line and the storage module, and is used to transmit the data voltage on the data line to the first end of the storage module and transmit the first power supply voltage transmitted on the first power supply line to the second end of the storage module during the pre-charging phase;

[0007] The second voltage writing module is connected to at least the first terminal of the driving module and the storage module, and the second voltage writing module is used to connect the second terminal of the storage module with the first terminal of the driving module, and connect the first terminal of the storage module with the control terminal of the driving module in the first initialization phase;

[0008] The first voltage writing module is used for transmitting the data voltage to the driving module during the data writing phase;

[0009] The driving module and the light-emitting module are connected between the first power line and the second power line, and the driving module is used to drive the light-emitting module to emit light in the light-emitting phase;

[0010] The pre-charging stage is located before the first initialization stage.

[0011] The pre-charging module includes a first charging unit and a second charging unit; a control end of the first charging unit is connected to the first scan line, a first end of the first charging unit is connected to the data line, a second end of the first charging unit is connected to the first end of the storage module, a first end of the second charging unit is connected to the first power line, a second end of the second charging unit is connected to the second end of the storage module, and a control end of the second charging unit is connected to the second scan line;

[0012] Optionally, the first charging unit includes a first transistor, the gate of the first transistor is the control terminal of the first charging unit, the first pole of the first transistor is the first terminal of the first charging unit, and the second pole of the first transistor is the second terminal of the first charging unit;

[0013] The second charging unit includes a second transistor, the gate of the second transistor is the control terminal of the second charging unit, the first pole of the second transistor is the first terminal of the second charging unit, and the second pole of the second transistor is the second terminal of the second charging unit;

[0014] Optionally, a voltage divider module is further included in the connection path between the first charging unit and the data line, and the voltage divider module includes at least one diode; the on-state voltage drop of the voltage divider module is greater than the absolute value of the threshold voltage of the driving module; the voltage divider module is turned on in the pre-charging stage;

[0015] Optionally, the diode comprises a transistor with a gate and a first electrode short-circuited.

[0016] Optionally, the second voltage writing module includes a first voltage writing unit; a first end of the first voltage writing unit is connected to the second end of the storage module, a second end of the first voltage writing unit is connected to the first end of the driving module, and a control end of the first voltage writing unit is connected to the third scan line;

[0017] The first end of the storage module is connected to the control end of the driving module, or the second voltage writing module further includes a second voltage writing unit, the first end of the second voltage writing unit is connected to the first end of the storage module, the second end of the second voltage writing unit is connected to the control end of the driving module, and the control end of the second voltage writing unit is connected to the fourth scan line;

[0018] Optionally, the first voltage writing unit includes a third transistor, the gate of the third transistor is the control terminal of the first voltage writing unit, the first pole of the third transistor is the first terminal of the first voltage writing unit, and the second pole of the third transistor is the second terminal of the first voltage writing unit;

[0019] The second voltage writing unit includes a fourth transistor, the gate of the fourth transistor is the control terminal of the second voltage writing unit, the first terminal of the fourth transistor is the first terminal of the second voltage writing unit, and the second terminal of the fourth transistor is the second terminal of the second voltage writing unit;

[0020] The storage module includes a capacitor, a first pole of the capacitor is a first end of the storage module, and a second pole of the capacitor is a second end of the storage module.

[0021] Optionally, the first scan line, the second scan line, the third scan line and the fourth scan line are used to transmit scan signals.

[0022] In the pre-charging stage, the first charging unit and the second charging unit are turned on, the first voltage writing unit is turned off, and the second voltage writing unit is turned off;

[0023] In the first initialization stage, the first voltage writing unit is turned on, the second voltage writing unit is turned on; the first charging unit and the second charging unit are both turned off;

[0024] In the data writing phase and the light emitting phase, the first charging unit is turned off, the second charging unit is turned on, the first voltage writing unit is turned off, and the second voltage writing unit is turned on;

[0025] Optionally, when the display brightness value of the display panel is less than a preset value, at least one first display period includes a pre-charging stage, a first initialization stage, a data writing stage and a light emitting stage.

[0026] The pixel circuit further includes a first initialization module connected to the driving module, the first initialization module being configured to transmit a first initialization voltage to the control terminal of the driving module during a first initialization phase when the display brightness value of the display panel is less than a preset value;

[0027] And / or, the first initialization module is configured to transmit the first initialization voltage to the control terminal of the driving module during a second initialization phase when the display brightness value of the display panel is greater than a preset value;

[0028] Optionally, when the display brightness value of the display panel is greater than a preset value, the at least one second display period includes a second initialization phase, a data writing phase and a light emitting phase;

[0029] Optionally, in a second initialization phase when the display brightness value of the display panel is greater than a preset value, the first charging unit is turned off, the second charging unit is turned on, the first voltage writing unit is turned off, and the second voltage writing unit is turned on;

[0030] Optionally, the control end of the first initialization module is connected to the seventh scan line, the first end of the first initialization module is connected to the first initialization signal line, and the second end of the first initialization module is connected to the control end of the driving module.

[0031] Optionally, the pixel circuit further includes a compensation module, the compensation module is connected between the second end and the control end of the driving module, the control end of the compensation module is connected to the fifth scan line; the control end of the first voltage writing module is connected to the sixth scan line, the first end of the first voltage writing module is connected to the data line, and the second end of the first voltage writing module is connected to the first end of the driving module;

[0032] Optionally, the pixel circuit further includes a first light emitting control unit and a second light emitting control unit;

[0033] The first light-emitting control unit is connected between the first power line and the first end of the driving module, the second light-emitting control unit is connected between the second end of the driving module and the first end of the light-emitting module, the second end of the light-emitting module is connected to the second power line, and the control end of the first light-emitting control unit and the control end of the second light-emitting control unit are both connected to the light-emitting control signal line;

[0034] Optionally, the pixel circuit further includes a second initialization module, a control end of the second initialization module is connected to the eighth scan line, a first end of the second initialization module is connected to the second initialization signal line, and a second end of the second initialization module is connected to the first end of the light emitting module.

[0035] According to another aspect of the present invention, a method for driving a pixel circuit is provided, wherein the pixel circuit includes a driving module, a first voltage writing module, a storage module, a precharging module, a second voltage writing module, a first initialization module, and a light-emitting module, wherein a first end of the precharging module is connected to a data line, a second end of the precharging module is connected to a first power line, a third end of the precharging module is connected to a first end of the storage module, a fourth end of the precharging module is connected to a second end of the storage module, a first end of the second voltage writing module is connected to a first end of the storage module, a second end of the second voltage writing module is connected to a second end of the storage module, a third end of the second voltage writing module is connected to a control end of the driving module, a fourth end of the second voltage writing module is connected to a first end of the driving module, and the driving module and the light-emitting module are connected between the first power line and the second power line;

[0036] The driving method of the pixel circuit includes:

[0037] In the pre-charging stage, the pre-charging module is controlled to transmit the data voltage on the data line to the first end of the storage module, and to transmit the first power supply voltage transmitted on the first power supply line to the second end of the storage module;

[0038] In a first initialization phase, the second end of the storage module is connected to the first end of the driving module, and the first end of the storage module is connected to the control end of the driving module;

[0039] In the data writing phase, the first voltage writing module is controlled to transmit the data voltage transmitted on the data line to the driving module, so that the data voltage is written to the control terminal of the driving module;

[0040] In the light-emitting stage, the control driving module drives the light-emitting module to emit light.

[0041] Optionally, the pre-charging module includes a first charging unit and a second charging unit, the control end of the first charging unit is connected to the first scan line, the first end of the first charging unit is connected to the data line, the second end of the first charging unit is connected to the first end of the storage module, the first end of the second charging unit is connected to the first power line, the second end of the second charging unit is connected to the second end of the storage module, and the control end of the second charging unit is connected to the second scan line; the second voltage writing module includes a first voltage writing unit and a second voltage writing unit, the first end of the first voltage writing unit is connected to the second end of the storage module, the second end of the first voltage writing unit is connected to the first end of the driving module, and the control end of the first voltage writing unit is connected to the third scan line; the first end of the second voltage writing unit is connected to the first end of the storage module, the second end of the second voltage writing unit is connected to the control end of the driving module, and the control end of the second voltage writing unit is connected to the fourth scan line;

[0042] In the pre-charging stage, the steps of controlling the pre-charging module to transmit the data voltage on the data line to the first end of the storage module and transmitting the first power voltage transmitted on the first power line to the second end of the storage module include:

[0043] In the pre-charging stage, the first charging unit is controlled to be turned on in response to a first scan signal on the first scan line so as to transmit the data voltage on the data line to the first end of the storage module, and the second charging unit is controlled to be turned on in response to a second scan signal on the second scan line so as to transmit the first power supply voltage transmitted from the first power supply line to the second end of the storage module;

[0044] In the first initialization phase, the steps of connecting the second end of the storage module to the first end of the driving module and connecting the first end of the storage module to the control end of the driving module include:

[0045] In the first initialization phase, the second voltage writing unit is controlled to be turned on in response to a fourth scan signal on the fourth scan line, so as to transmit the data voltage to the first end of the storage module; and the first voltage writing unit is controlled to be turned on in response to a third scan signal on the third scan line, so as to write the voltage at the second end of the storage module to the first end of the driving module.

[0046] Optionally, the pixel circuit further includes a compensation module, the compensation module is connected between the second terminal and the control terminal of the driving module, and the control terminal of the compensation module is connected to the fifth scan line; a voltage divider module is further included in the connection path between the first charging unit and the data line, the voltage divider module includes at least one diode; the on-state voltage drop of the voltage divider module is greater than the absolute value of the threshold voltage of the driving module;

[0047] The pixel circuit further includes a first initialization module connected to the driving module; when the display brightness value of the display panel is less than a preset value, in a pre-charging stage, the steps of controlling the pre-charging module to transmit the data voltage on the data line to the first end of the storage module and transmitting the first power supply voltage transmitted on the first power line to the second end of the storage module include:

[0048] In the pre-charging stage, the first charging unit is controlled to be turned on in response to a first scanning signal on the first scanning line, so as to transmit the data voltage on the data line to the first end of the storage module via the voltage divider module, and the second charging unit is controlled to be turned on in response to a second scanning signal on the second scanning line, so as to transmit the first power supply voltage transmitted from the first power supply line to the second end of the storage module;

[0049] In the first initialization phase, the steps of connecting the second end of the storage module to the first end of the driving module and connecting the first end of the storage module to the control end of the driving module include:

[0050] In a first initialization stage, the first initialization module is controlled to transmit the first initialization voltage to the control terminal of the driving module, and the second voltage writing unit is controlled to be turned on in response to a fourth scan signal on the fourth scan line to transmit the first initialization voltage to the first terminal of the storage module; and the first voltage writing unit is controlled to be turned on in response to a third scan signal on the third scan line to write the voltage at the second terminal of the storage module into the first terminal of the driving module.

[0051] In the data writing phase, the step of controlling the first voltage writing module to transmit the data voltage transmitted on the data line to the driving module so that the data voltage is written to the control terminal of the driving module includes:

[0052] In the data writing phase, the first voltage writing module is controlled to transmit the data voltage transmitted on the data line to the control end of the driving module via the compensation module.

[0053] According to another aspect of the present invention, a display panel is provided. The display panel includes the pixel circuit provided by any embodiment of the present invention.

[0054] The technical solution provided by the embodiment of the present invention is to set a pre-charging module and a second voltage writing module. In the pre-charging stage before the first initialization stage, the pre-charging module is controlled to turn on and write the data voltage to the first end of the storage module, and the first power supply voltage is written to the second end of the storage module at the same time, so that the voltage difference between the two ends of the storage module is the difference between the first power supply voltage and the data voltage; and the driving module is reset with this voltage difference in the first initialization stage, so that the voltage difference between the first end and the control end of the driving module can be close to or maintained constant in the first initialization stage and the light-emitting stage, thereby reducing the drift degree of the threshold voltage of the driving transistor included in the driving module, thereby reducing the hysteresis effect of the driving transistor, so that the display panel using the pixel circuit maintains consistent brightness when switching pictures, which is beneficial to improving the picture flickering phenomenon and thus improving the display quality.

[0055] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0057] Figure 1 is a schematic diagram of a characteristic curve of the hysteresis effect of a driving transistor in the prior art;

[0058] Figure 2 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0059] Figure 3 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0060] Figure 4 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0061] Figure 5 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0062] Figure 6 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0063] Figure 7 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0064] Figure 8 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0065] Figure 9 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0066] Figure 10 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0067] Figure 11 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0068] Figure 12 A driving timing diagram of a pixel circuit provided by an embodiment of the present invention;

[0069] Figure 13 A driving timing diagram of another pixel circuit provided by an embodiment of the present invention;

[0070] Figure 14 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

[0071] Figure 15 A driving timing diagram of another pixel circuit provided by an embodiment of the present invention;

[0072] Figure 16 A driving timing diagram of another pixel circuit provided by an embodiment of the present invention;

[0073] Figure 17 A flowchart of a driving method for a pixel circuit provided by an embodiment of the present invention;

[0074] Figure 18 A schematic structural diagram of a display panel provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0075] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0076] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0077] As described in the background, the characteristics of the drive transistor in the prior art can affect the displayed grayscale brightness. In different stages, the characteristics of the drive transistor are inconsistent, resulting in brightness differences between different frames and reduced display quality. The inventors have discovered that the cause of this problem is related to the hysteresis effect of the drive transistor. In existing pixel circuits, the gate-source voltage difference of the drive transistor varies between the initialization phase and the light-emitting phase during operation, causing the characteristics of the drive transistor to drift and generating a hysteresis effect. Figure 1 Schematic diagram of characteristic curve of hysteresis effect of driving transistor in the prior art, refer to Figure 1 The horizontal axis is the gate-source voltage difference of the driving transistor, and the vertical axis is the driving current. Curve 1 is the characteristic curve of the driving transistor in the light-emitting stage, and curve 2 is the characteristic curve of the driving transistor in the initialization stage. Due to the hysteresis effect of the driving transistor, its characteristic curves in the initialization stage and the light-emitting stage do not overlap, and the characteristics of the driving transistor drift. Even if the voltage written to the gate of the driving transistor is the same in the next frame and the current frame, due to the hysteresis effect, the voltage of its first pole (source) is different. Therefore, the gate-source voltage difference of the driving transistor is different, resulting in different driving currents. As a result, the luminance of the light-emitting element is different, causing the display brightness of the display panel to be unstable, and then flickering. Flicker is especially noticeable at low frequencies and low brightness.

[0078] In view of the above problems, an embodiment of the present invention provides a pixel circuit to improve the display quality of a display panel using the pixel circuit. Figure 2 A schematic diagram of a pixel circuit according to an embodiment of the present invention is provided. Figure 2The pixel circuit includes a driving module 110, a first voltage writing module 120, a storage module 130, a pre-charging module 140, a second voltage writing module 150, and a light-emitting module 170. The pre-charging module 140 is connected to at least the data line and the storage module 130. During the pre-charging phase, the pre-charging module 140 is configured to transmit the data voltage Vdata on the data line to the first terminal a of the storage module 130, and to transmit the first power supply voltage VDD transmitted on the first power line L1 to the second terminal b of the storage module 130. For example, the first terminal of the pre-charging module 140 is connected to the data line, the second terminal of the pre-charging module 140 is connected to the first power line L1, the third terminal of the pre-charging module 140 is connected to the first terminal a of the storage module 130, and the fourth terminal of the pre-charging module 140 is connected to the second terminal b of the storage module 130. During the pre-charging phase, the pre-charging module 140 is turned on to write the data voltage Vdata on the data line to the first terminal a of the storage module 130, and to write the first power supply voltage VDD transmitted on the first power line L1 to the second terminal b of the storage module 130.

[0079] The second voltage writing module 150 is connected to at least the first terminal S of the driver module 110 and the storage module 130. For example, the first terminal of the second voltage writing module 150 is connected to the first terminal a of the storage module 130, the second terminal of the second voltage writing module 150 is connected to the second terminal b of the storage module 130, the third terminal of the second voltage writing module 150 is connected to the control terminal G of the driver module 110, and the fourth terminal of the second voltage writing module 150 is connected to the first terminal S of the driver module 110. The second voltage writing module 150 is configured to connect the second terminal b of the storage module 130 to the first terminal of the driver module 110 and the first terminal a of the storage module 130 to the control terminal G of the driver module 110 during the first initialization phase. With this configuration, the voltage difference across the storage module 130 can be applied to the first terminal S and the control terminal G of the driver module 110 during the first initialization phase, so that the gate-source voltage difference of the driver transistor in the driver module 110 during the first initialization phase and the light-emitting phase is close to or consistent, thereby ensuring that the characteristics of the driver transistor in the driver module 110 during the first initialization phase and the light-emitting phase are close to or consistent.

[0080] The first voltage writing module 120 is used to transmit the data voltage Vdata on the data line to the driving module 110 during the data writing phase, so that the data voltage Vdata is written to the control terminal G of the driving module 110; the driving module 110 and the light-emitting module 170 are connected between the first power line L1 and the second power line L2, and the driving module 110 is used to drive the light-emitting module 170 to emit light during the light-emitting phase.

[0081] Specifically, the first power line L1 is used to transmit a first power supply voltage VDD, and the second power line L2 is used to transmit a second power supply voltage VSS. One of the first power supply voltage VDD and the second power supply voltage VSS is a high voltage, and the other is a low voltage. The driver module 110 and the light-emitting module 170 are connected between the first power line L1 and the second power line L2. When the connection path between the first power line L1 and the second power line L2 is conductive, the driver module 110 is configured to drive the light-emitting module 170 to emit light during the light-emitting phase of a display cycle based on the voltages at its control terminal G and first terminal S. A light-emitting control module 180 may be provided on this connection path to ensure light-emitting reliability.

[0082] The pixel circuit provided in this embodiment includes at least a pre-charging stage, a first initialization stage, a data writing stage and a light emitting stage, wherein in a display cycle, the pre-charging stage is located before the first initialization stage.

[0083] by Figure 2 Taking the pixel circuit shown as an example, in the pre-charging stage, the pre-charging module 140 is turned on, and the data voltage Vdata on the data line is transmitted to the first end a of the storage module 130 via the first end and the third end of the pre-charging module 140, and the first power supply voltage VDD on the first power line L1 is transmitted to the second end b of the storage module 130 via the second end and the fourth end of the pre-charging module 140. Therefore, the data voltage Vdata and the first power supply voltage VDD are respectively stored on the storage module 130.

[0084] During the first initialization phase, the first and third terminals of the second voltage write module 150 are electrically connected, as are the second and fourth terminals of the second voltage write module 150. The data voltage Vdata at the first terminal a of the storage module 130 is transmitted to the control terminal G of the driver module 110 via the first and third terminals of the second voltage write module 150. The first power supply voltage VDD at the second terminal b of the storage module 130 is transmitted to the first terminal S of the driver module 110 via the second and fourth terminals of the second voltage write module 150. During the first initialization phase, the voltage difference between the first terminal S and the control terminal G of the driver module 110 is VDD-Vdata.

[0085] In the data writing phase, the first voltage writing module 120 is turned on, and the data voltage Vdata is written to the control terminal G of the driving module 110 via the first voltage writing module 120 .

[0086] During the light-emitting phase, the connection path between the first power line L1 and the second power line L2 is conductive, and the driver module 110 generates a driving current based on the voltages at its control terminal G and first terminal S, thereby driving the light-emitting module 170 to emit light. At this time, the voltage at the first terminal S of the driver module 110 is the first power supply voltage VDD, the voltage at the control terminal G is Vdata, and the voltage difference between the first terminal S and the control terminal G of the driver module 110 is VDD-Vdata.

[0087] In this embodiment, since the voltage difference between the first terminal S and the control terminal G of the driving module 110 is close to or the same during the first initialization phase and the light-emitting phase, the characteristics of the driving transistor included in the driving module 110 do not change, so that the characteristic curve of the driving transistor can overlap or approximately overlap during the first initialization phase and the light-emitting phase (during the data writing phase, the driving transistor writes data in a diode state, and its characteristic curve does not shift), thereby improving the flicker phenomenon.

[0088] The technical solution provided by the embodiment of the present invention is to set a pre-charging module and a second voltage writing module. In the pre-charging stage before the first initialization stage, the pre-charging module is controlled to turn on and write the data voltage to the first end of the storage module, and the first power supply voltage is written to the second end of the storage module at the same time, so that the voltage difference between the two ends of the storage module is close to or equal to the difference between the first power supply voltage and the data voltage; and the driving module is reset with this voltage difference in the first initialization stage, so that the voltage difference between the first end and the control end of the driving module can be close to or remain constant in the first initialization stage and the light-emitting stage, thereby reducing the drift degree of the threshold voltage of the driving transistor included in the driving module, thereby reducing the hysteresis effect of the driving transistor, so that the display panel using the pixel circuit maintains consistent brightness when switching pictures, which is beneficial to improving the picture flickering phenomenon and thus improving the display quality.

[0089] In this embodiment, the pre-charging phase is located in the blank phase between the first initialization phase of the nth frame and the light-emitting phase of the n-1th frame, where n is an integer greater than 1. In other words, the pre-charging phase is located after the light-emitting phase of the current frame and before the first initialization phase of the next frame. Since the pre-charging phase is located in the blank phase between two adjacent frames, it does not occupy the time of other phases within a frame.

[0090] Figure 3 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 3On the basis of the above technical solution, optionally, the pre-charging module 140 includes a first charging unit 1401 and a second charging unit 1402; the control end of the first charging unit 1401 is connected to the first scan line, the first end of the first charging unit 1401 is connected to the data line, the second end of the first charging unit 1401 is connected to the first end a of the storage module 130, the first end of the second charging unit 1402 is connected to the first power line L1, the second end of the second charging unit 1402 is connected to the second end b of the storage module 130, and the control end of the second charging unit 1402 is connected to the second scan line.

[0091] The first scan line is used to transmit a first scan signal S1, and the second scan line is used to transmit a second scan signal S2. During the pre-charging phase, the first charging unit 1401 is used to conduct in response to the first scan signal S1 to transmit the data voltage on the data line to the first terminal a of the storage module 130; the second charging unit 1402 is used to conduct in response to the second scan signal S2 to transmit the first power supply voltage VDD on the first power line L1 to the second terminal b of the storage module 130.

[0092] Figure 4 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 4 On the basis of the above technical solution, optionally, the pixel circuit further includes a compensation module 190. The compensation module 190 is connected between the second terminal D and the control terminal G of the driving module 110, and the control terminal of the compensation module 190 is connected to the fifth scan line.

[0093] The control end of the first voltage writing module 120 is connected to the sixth scan line, the first end of the first voltage writing module 120 is connected to the data line, and the second end of the first voltage writing module 120 is connected to the first end S of the driving module 110 .

[0094] Continue to refer Figure 4 Optionally, a voltage divider module 210 is further included in the connection path between the first charging unit 1401 and the data line. The on-state voltage drop of the voltage divider module 210 is greater than the absolute value of the threshold voltage of the driver module 110. In this embodiment, the voltage divider module 210 is configured to be turned on during the pre-charging phase so that the voltage written to the first terminal a of the storage module 130 is the difference between the data voltage Vdata and the on-state voltage drop of the voltage divider module 210, so that the driver module 110 can write the data voltage Vdata during the data writing phase.

[0095] Optionally, the voltage dividing module 210 includes at least one diode. Figure 5 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, Figure 5 The schematic diagram shows the case where the voltage dividing module 210 includes two diodes. Figure 5The first diode DO1 and the second diode DO2 are connected in series between the data line and the first charging unit to increase the voltage drop between the data line and the first charging unit 1401. Figure 6 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 6 The diode includes a transistor with its gate and first pole short-circuited. The diode included in the voltage divider module 210 can also be composed of a transistor, with the gate of the transistor short-circuited with the first pole to form a diode connection structure, which can play a role in Figure 5 The same technical effect of the structure shown.

[0096] Figure 7 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 7 On the basis of the above technical solutions, optionally, the second voltage writing module 150 includes a first voltage writing unit 1501, the first end of the first voltage writing unit 1501 is connected to the second end b of the storage module 130, the second end of the first voltage writing unit 1501 is connected to the first end S of the driving module 110, and the control end of the first voltage writing unit 1501 is connected to the third scan line.

[0097] Specifically, the third scan line is used to transmit a third scan signal S3. The first end of the first voltage writing unit 1501 serves as the second end of the second voltage writing module 150, and the second end of the first voltage writing unit 1501 serves as the fourth end of the second voltage writing module 150. The first end of the second voltage writing module 150 and the third end of the second voltage writing module 150 are directly connected, so that the first end a of the storage module 130 is connected to the control end G of the driver module 110. During the first initialization phase, the first charging unit 1401 is turned off in response to the first scan signal S1, and the second charging unit 1402 is turned off in response to the second scan signal S2. The voltage difference between the two ends of the storage module 130 is VDD-Vdata. The first voltage writing unit 1501 is turned on in response to the third scan signal S3. The first power supply voltage VDD stored at the second end b of the storage module 130 is transmitted to the first end S of the driver module 110 via the first voltage writing unit 1501. The voltage difference between the first end S and the control end G of the driver module 110 is VDD-Vdata. This ensures that the voltage difference between the first terminal S and the control terminal G of the driving module 110 is the same or similar in the first initialization stage and the light-emitting stage, thereby reducing the drift of the threshold voltage of the driving module 110, effectively weakening the hysteresis effect, improving the problem of inconsistent brightness, and improving the display quality.

[0098] Figure 8 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 8Based on the above technical solutions, the second voltage writing module 150 optionally further includes a second voltage writing unit 1502. The first end of the second voltage writing unit 1502 is connected to the first end a of the storage module 130, the second end of the second voltage writing unit 1502 is connected to the control end G of the driving module 110, and the control end of the second voltage writing unit 1501 is connected to the fourth scan line. The second voltage writing unit 1502 is configured to be turned on in response to the fourth scan signal S4 transmitted on the fourth scan line during the first initialization phase, and transmit the voltage stored at the first end a of the storage module 130 to the control end G of the driving module 110.

[0099] The fourth scan line is used to transmit a fourth scan signal S4. The first end of the first voltage writing unit 1501 serves as the second end of the second voltage writing module 150, and the second end of the first voltage writing unit 1501 serves as the fourth end of the second voltage writing module 150. The first end of the second voltage writing unit 1502 serves as the first end of the second voltage writing module 150, and the second end of the second voltage writing unit 1502 serves as the third end of the second voltage writing module 150.

[0100] Optionally, in the pre-charging stage, the first charging unit 1401 and the second charging unit 1402 are turned on, and the first voltage writing unit 1501 is turned off. Optionally, the second voltage writing unit 1502 is turned off.

[0101] Optionally, in the first initialization stage, the first voltage writing unit 1501 is turned on, and the first charging unit 1401 and the second charging unit 1402 are both turned off; optionally, the second voltage writing unit 1502 is turned on.

[0102] In the data writing phase and the light emitting phase, the first charging unit 1401 is turned off, the second charging unit 1401 is turned on, the first voltage writing unit 1501 is turned off, and optionally, the second voltage writing unit 1502 is turned on.

[0103] Optionally, when the display brightness value (DBV) of the display panel is less than a preset value, which is equivalent to a low brightness mode, at least one first display cycle includes a pre-charging stage, a first initialization stage, a data writing stage and a light emitting stage.

[0104] Figure 9 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, specifically Figure 8 The partial modules of the pixel circuit shown are refined into a schematic diagram of the device structure, refer to Figure 9On the basis of the above technical solution, optionally, the first charging unit 1401 includes a first transistor M1, the gate of the first transistor M1 being the control terminal of the first charging unit 1401 and being connected to the first scan line, the first pole of the first transistor M1 being the first end of the first charging unit 1401 and being connected to the data line, specifically being connected to the data line via the voltage divider module 210, the second pole of the first transistor M1 being the second end of the first charging unit 1401 and being connected to the first end a of the storage module 130; the second charging unit 1402 includes a second transistor M2, the gate of the second transistor M2 being the control terminal of the second charging unit 1402 and being connected to the second scan line, the first pole of the second transistor M2 being the first end of the second charging unit 1402 and being connected to the first power line L1, and the second pole of the second transistor M2 being the second end of the second charging unit 1402 and being connected to the second end b of the storage module 130.

[0105] The first voltage writing unit 1501 includes a third transistor M3, the gate of the third transistor M3 is the control end of the first voltage writing unit 1501, the first pole of the third transistor M3 is the first end of the first voltage writing unit 1501, and is connected to the second end b of the storage module 130, and the second pole of the third transistor M3 is the second end of the first voltage writing unit 1501, and is connected to the first end S of the driving module 110; the second voltage writing unit 1502 includes a fourth transistor M4, the gate of the fourth transistor M4 is the control end of the second voltage writing unit 1502, the first pole of the fourth transistor M4 is the first end of the second voltage writing unit 1502 and is connected to the first end a of the storage module 130, and the second pole of the fourth transistor M4 is connected to the second end of the second voltage writing unit 1502 and the control end G of the driving module 110; the storage module 130 includes a capacitor C, the first pole of the capacitor C is the first end a of the storage module 130, and the second pole of the capacitor C is the second end b of the storage module 130.

[0106] In this embodiment, the scan signals transmitted by the first scan line, the second scan line, the third scan line and the fourth scan line meet the following conditions: in the pre-charging stage, the first transistor M1 and the second transistor M2 are turned on, and the third transistor M3 and the fourth transistor M4 are turned off; in the first initialization stage, the first transistor M1 and the second transistor M2 are turned off, and the third transistor M3 and the fourth transistor M4 are turned on; in the data writing stage, the fourth transistor M4 and the second transistor M2 remain turned on so that the capacitor C can store the voltage of the control terminal G of the driving module 110, and the first transistor M1 and the third transistor M3 are both turned off; in the light-emitting stage, the fourth transistor M4 and the second transistor M2 remain turned on, and the first transistor M1 and the third transistor M3 are both turned off.

[0107] Continue to refer Figure 9The pixel circuit further includes a first initialization module 161 connected to the driver module 110. For example, the first initialization module 161 is connected to the control terminal G of the driver module 110. The first initialization module 161 is configured to transmit a first initialization voltage Vref1 to the control terminal G of the driver module 110 during a first initialization phase when the display brightness value (DBV) of the display panel is less than a preset value. At low brightness, when DBV is less than the preset value, the data voltage Vdata is relatively high, the driver transistor in the driver module 110 is in a subthreshold conduction state, and the gate-source voltage difference of the driver transistor in the driver module 110 is less than the threshold voltage Vth5.

[0108] The first initialization module 161 is configured to transmit a first initialization voltage to the control terminal G of the driver module 110 during a first initialization phase when the display brightness of the display panel is less than a preset value. Optionally, during the first initialization phase, the first initialization module 161 may not operate, i.e., may not be turned on, and does not need to transmit the first initialization voltage to the control terminal G of the driver module 110.

[0109] Optionally, the first initialization module 161 is configured to transmit a first initialization voltage to the control terminal G of the driving module 110 in a second initialization phase when the display brightness value of the display panel is greater than a preset value.

[0110] Optionally, when the display brightness value of the display panel is greater than a preset value, at least one second display period includes a second initialization phase, a data writing phase and a light emitting phase, which is equivalent to not setting a pre-charging phase.

[0111] Optionally, in the second initialization stage when the display brightness value of the display panel is greater than a preset value, the first charging unit 1401 is turned off, the second charging unit 1402 is turned on, the first voltage writing unit 1501 is turned off, and optionally, the second voltage writing unit 1502 is turned on.

[0112] Specifically, when the display brightness value of the display panel is less than a preset value, in the pre-charging stage, the first charging unit 1401 is turned on in response to the first scan signal S1, the second charging unit 1402 is turned on in response to the second scan signal S2, the first voltage writing unit 1501 is turned off in response to the third scan signal S3, and the second voltage writing unit 1502 is turned off in response to the fourth scan signal S4. The voltage at the first terminal a of the storage module 130 is Vdata-VD, and the voltage at the second terminal b is VDD. The voltage difference between the two ends of the storage module 130 is VDD-Vdata+VD. Wherein, VD is the on-state voltage drop of the voltage divider module 210.

[0113] During the first initialization phase, the first charging unit 1401 is turned off in response to the first scan signal S1, and the second charging unit 1402 is turned off in response to the second scan signal S2. The voltage difference across the storage module 130 is VDD-Vdata+VD, where VD is the on-state voltage drop of the voltage divider module 210. The first initialization module 161 is turned on, and the first initialization voltage VREF1 is transmitted to the control terminal G of the driver module 110 via the first initialization module 161, resetting the voltage of the control terminal G of the driver module 110. Simultaneously, the first voltage writing unit 1501 is turned on in response to the third scan signal S3, and the second voltage writing unit 1502 is turned on in response to the fourth scan signal S4. The first initialization voltage VREF1 at the control terminal G of the driver module 110 is transmitted to the first terminal a of the storage module 130 via the second voltage writing unit 1502. As a result, the voltage at the first terminal a of the storage module 130 jumps from Vdata-VD to the first initialization voltage VREF1. Under the coupling effect of the storage module 130, the voltage at its second terminal b is coupled to VDD+VREF1-Vdata+VD. Since the first voltage writing unit 1501 is turned on, the potential of the first terminal S of the driver module 110 is reset to VDD+VREF1-Vdata+VD. Here, compared to when no pre-charge phase is provided, the voltage difference between the first terminal S and the control terminal G of the driver module 110 in the initialization phase is close to VDD-VREF1. When the pre-charge phase is provided, the voltage difference between the first terminal S and the control terminal G of the driver module 110 in the first initialization phase is VDD-Vdata+VD, which is closer to the voltage difference between the first terminal S and the control terminal G of the driver module 110 in the light-emitting phase (VDD-Vdata-Vth5), where Vth5 is the threshold voltage of the driver transistor in the driver module 110. This ensures that the voltage difference between the first terminal S and the control terminal G of the driving module 110 is the same or similar in the first initialization stage and the light-emitting stage, thereby reducing the drift of the threshold voltage of the driving module 110, effectively weakening the hysteresis effect, improving the problem of inconsistent brightness, and improving the display quality.

[0114] Figure 10 A schematic diagram of another pixel circuit according to an embodiment of the present invention is provided. Figure 10 On the basis of the above technical solution, optionally, the pixel circuit further includes a first light-emitting control unit 1801 and a second light-emitting control unit 1802, the first light-emitting control unit 1801 is connected between the first power line L1 and the first end S of the driving module 110, the second light-emitting control unit 1802 is connected between the second end D of the driving module 110 and the first end of the light-emitting module 170, the second end of the light-emitting module 170 is connected to the second power line L2, and the control end of the first light-emitting control unit 1801 and the control end of the second light-emitting control unit 1802 are both connected to the light-emitting control signal line.

[0115] Optionally, the control end of the first initialization module 161 is connected to the seventh scan line, the first end of the first initialization module 161 is connected to the first initialization signal line, and the second end of the first initialization module 161 is connected to the control end G of the driving module 110 .

[0116] Optionally, the pixel circuit further includes a second initialization module 162 , a control end of the second initialization module 162 connected to the eighth scan line, a first end of the second initialization module 162 connected to the second initialization signal line, and a second end of the second initialization module 162 connected to the first end of the light emitting module 170 .

[0117] Figure 11 A schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, specifically Figure 10 The pixel circuit shown is refined into a structural schematic diagram of the device, wherein the driving module 110 includes a fifth transistor M5, the first voltage writing module 120 includes a sixth transistor M6, the compensation module 190 includes a seventh transistor M7, the first initialization module 161 includes an eighth transistor M8, the first light-emitting control unit 1801 includes a ninth transistor M9, the second light-emitting control unit 1802 includes a tenth transistor M10, the second initialization module 162 includes an eleventh transistor M11, and the light-emitting module 170 includes a light-emitting diode D1.

[0118] Specifically, the gate of the sixth transistor M6 is connected to the sixth scan line to receive the sixth scan signal S6 transmitted on the sixth scan line, the first electrode of the sixth transistor M6 is connected to the data line, and the second electrode of the sixth transistor M6 is connected to the first electrode of the fifth transistor M5; the gate of the seventh transistor M7 is connected to the fifth scan line to receive the fifth scan signal S5 transmitted on the fifth scan line, the first electrode of the seventh transistor M7 is connected to the second electrode of the fifth transistor M5, and the second electrode of the seventh transistor M7 is connected to the gate of the fifth transistor M5; the gate of the eighth transistor M8 is connected to the seventh scan line to receive the seventh scan signal S7 transmitted on the seventh scan line, the first electrode of the eighth transistor M8 is connected to the first initialization signal line to receive the first initialization voltage VREF1 transmitted on the first initialization signal line, and the second electrode of the eighth transistor M8 is connected to the gate of the fifth transistor M5; the gate of the ninth transistor M9 is connected to the seventh scan line to receive the seventh scan signal S7 transmitted on the seventh scan line, the first electrode of the eighth transistor M8 is connected to the first initialization signal line to receive the first initialization voltage VREF1 transmitted on the first initialization signal line, and the second electrode of the eighth transistor M8 is connected to the gate of the fifth transistor M5; The gate of the tenth transistor M10 is connected to the light-emitting control signal line to receive the light-emitting control signal EM transmitted on the light-emitting control signal line. The first electrode of the ninth transistor M9 is connected to the first power line L1. The second electrode of the ninth transistor M9 is connected to the first electrode of the fifth transistor M5. The first electrode of the tenth transistor M10 is connected to the second electrode of the fifth transistor M5. The second electrode of the tenth transistor M10 is connected to the first electrode (which may be an anode) of the light-emitting diode D1. The second electrode (which may be a cathode) of the light-emitting diode D1 is connected to the second power line L2. The gate of the eleventh transistor M11 is connected to the eighth scan line to receive the eighth scan signal S8 transmitted on the eighth scan line. The first electrode of the eleventh transistor M11 is connected to the second initialization signal line to receive the second initialization voltage VREF2 transmitted on the second initialization signal line. The second electrode of the eleventh transistor M11 is connected to the first electrode of the light-emitting diode D1.

[0119] Optionally, Figure 12 A driving timing diagram of a pixel circuit provided in an embodiment of the present invention is applicable to display driving when the display brightness value (DBV) of the display panel is less than a preset value, for example, Figure 11 The pixel circuit shown, wherein Figure 7 As shown in FIG, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the seventh transistor M7, and the eighth transistor M8 are all N-type transistors, and the other transistors are all P-type transistors. Figure 7 Only one structure of the pixel circuit is schematically shown. In other embodiments, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the seventh transistor M7, and the eighth transistor M8 may also be P-type transistors. Figure 11 and Figure 12 The specific working process of the pixel circuit provided by the embodiment of the present invention is as follows:

[0120] In the pre-charge phase T1, the first transistor M1 is turned on in response to the high-level first scan signal S1, the second transistor M2 is turned on in response to the high-level second scan signal S2, and the remaining transistors are turned off. Therefore, the first transistor M1 transmits the data voltage Vdata to the first electrode of the capacitor C via the turned-on voltage divider module 210, and the second transistor M2 transmits the first power supply voltage VDD to the second electrode of the capacitor C, so that the data voltage Vdata, the on-state voltage drop of the voltage divider module 210, and the first power supply voltage VDD are stored on the capacitor C. At this time, the voltage difference between the two ends of the capacitor C is VDD-Vdata+VD. Among them, when the brightness is low, when DBV is less than the preset value, the data voltage Vdata is large, and Vdata is greater than VDD.

[0121] During the first initialization phase T2, the eighth transistor M8 is turned on in response to the high-level seventh scan signal S7, the third transistor M3 is turned on in response to the high-level third scan signal S3, and the fourth transistor M4 is turned on in response to the high-level fourth scan signal S4. The eighth transistor M8 transmits the first initialization voltage VREF1 to the gate of the fifth transistor M5, initializing the gate of the fifth transistor M5. Simultaneously, the fourth transistor M4 transmits the first initialization voltage VREF1 to the first electrode of the capacitor C. The voltage at the first electrode of the capacitor C jumps from Vdata-VD to the first initialization voltage VREF1. Under the coupling effect of the capacitor C, the voltage change at the first electrode is coupled to the second electrode of the capacitor C, and the voltage at the second electrode of the capacitor C is coupled to VDD+VREF1-Vdata+VD. Therefore, the voltage at the first electrode of the fifth transistor M5 is VDD+VREF1-Vdata+VD, achieving a reset operation for the first electrode of the fifth transistor M5. Optionally, during the first initialization phase T2, the eighth transistor M8 can also be turned off.

[0122] In the first initialization stage T2, the voltage difference between the first electrode and the gate of the fifth transistor M5 is VDD-Vdata+VD.

[0123] Optionally, in the first initialization stage T2 , the eleventh transistor M11 is turned on in response to the low-level eighth scan signal S8 , transmitting the second initialization voltage VREF2 to the first electrode of the light emitting diode D1 , and resetting the potential of the first electrode of the light emitting diode D1 .

[0124] In the data writing phase T3, the second transistor M2 is turned on in response to the high-level second scan signal S2, the fourth transistor M4 is turned on in response to the high-level fourth scan signal S4, the seventh transistor M7 is turned on in response to the high-level fifth scan signal S5, and the sixth transistor M6 is turned on in response to the low-level sixth scan signal S6, so that the gate voltage of the fifth transistor M5 is initially Vdata-VD, VD is greater than the absolute value of Vth5, and the voltage at the first electrode of the fifth transistor M5 is Vdata, so as to ensure that the gate-source voltage difference of the fifth transistor M5 is less than Vth5, thereby ensuring that the fifth transistor M5 can be turned on initially and threshold compensation can be achieved; that is, the data voltage Vdata is written to the gate of the fifth transistor M5 via the sixth transistor M6, the fifth transistor M5, and the seventh transistor M7 until the gate voltage of the fifth transistor M5 reaches Vdata+Vth5, at which time the fifth transistor M5 is turned off, and the gate voltage of the fifth transistor M5 is stored on the capacitor C. Wherein, Vth5 is a threshold voltage of the fifth transistor M5 , the fifth transistor M5 is a P-type transistor, Vth5 is a negative value, and here, the fifth transistor M5 is a driving transistor.

[0125] During the light-emitting phase T4, the second transistor M2 is turned on in response to the high-level second scan signal S2, the fourth transistor M4 is turned on in response to the high-level fourth scan signal S4, the ninth transistor M9 and the tenth transistor M10 are turned on in response to the light-emitting control signal EM, and the fifth transistor M5 generates a drive current based on its gate voltage and the voltage at its first electrode, driving the light-emitting diode D1 to emit light. Here, the first electrode voltage of the fifth transistor M5 is VDD, the gate voltage is Vdata+Vth5, and the voltage difference between the first electrode and the gate of the fifth transistor M5 is VDD-Vdata-Vth5. When the brightness is low, when DBV is less than the preset value, the data voltage Vdata is large, the fifth transistor M5 is in a subthreshold conduction state, and the gate-source voltage difference of the fifth transistor M5 is slightly less than the threshold voltage Vth5.

[0126] Since the voltage difference between the first electrode and the gate of the fifth transistor M5 in the first initialization stage T2 is VDD-Vdata+VD, and the voltage difference between the first electrode and the gate in the light-emitting stage T4 is VDD-Vdata-Vth5, and VD is slightly larger than the absolute value of Vth5, the voltage difference between the first electrode and the gate of the fifth transistor M5 is the same or similar in the initialization stage T2 and the light-emitting stage T4, thereby reducing the drift of the threshold voltage Vth5 of the fifth transistor M5, effectively reducing the hysteresis effect, improving the flicker problem caused by inconsistent brightness, and improving display quality.

[0127] Optionally, by setting the channel type of each transistor, multiple scan lines can be merged to reduce the number of scan lines. Optionally, the second transistor M2 and the third transistor M3 have different channel types and can be connected to the same scan line. Optionally, the first transistor M1 and the fourth transistor M4 have different channel types and can be connected to the same scan line.

[0128] Figure 13 Another pixel circuit driving timing diagram provided in an embodiment of the present invention shows that when the display brightness value (DBV) of the display panel is greater than a preset value, there is no pre-charging phase, or, during the pre-charging phase, the storage module 130 is not pre-charged. For example, the first charging unit 1401 may be turned off, and the second charging unit 1402 may be turned on or off, and the pixel circuit directly enters the second initialization phase T2'. That is, when the display brightness value of the display panel is greater than the preset value, at least one display cycle (such as the second display cycle) includes the second initialization phase T2', the data writing phase T3, and the light-emitting phase T4. During the second initialization phase T2', the first charging unit 1401 is turned off, the second charging unit 1402 is turned on, the first voltage writing unit 1501 is turned off, and the second voltage writing unit 1502 is turned on. Flicker is also not noticeable in this phase. This is because each DBV instruction corresponds to a display brightness of the maximum grayscale of the display panel. When the display brightness corresponding to the maximum grayscale changes, the display brightness corresponding to other grayscales also changes. The larger the DBV, the greater the display brightness of the display panel. When the DBV exceeds a certain preset value, the display panel is in a high-brightness state. When switching the screen, the human eye is not easy to detect the change in brightness. At this time, you can use Figure 13 When the display brightness value of the display panel is greater than the preset value, Vdata is less than VDD.

[0129] Figure 14 A schematic diagram of another pixel circuit structure provided by an embodiment of the present invention, relative to Figure 11 The pixel circuit shown, Figure 14 The pixel circuit shown does not include the second switch unit 1502 , and the first terminal a of the storage module 130 is directly connected to the control terminal G of the driving module 110 . Figure 15 Another driving timing diagram of a pixel circuit provided in an embodiment of the present invention is applicable to the case where the display brightness value of the display panel is less than a preset value. Figure 14 The pixel circuit shown is driven by Figure 14 and Figure 15 , the eighth transistor M8 remains in the off state in response to the low-level seventh scanning signal S7. The working process of the pixel circuit includes:

[0130] During the pre-charging phase T1, the first transistor M1 is turned on in response to a high-level first scan signal S1, the second transistor M2 is turned on in response to a high-level second scan signal S2, and the remaining transistors are turned off. Therefore, the first transistor M1 transmits the data voltage Vdata via the turned-on voltage divider module 210 to the first electrode of the capacitor C and the gate of the fifth transistor M5, and the second transistor M2 transmits the first power supply voltage VDD to the second electrode of the capacitor C. At this point, the voltage difference across the capacitor C is VDD-Vdata+VD.

[0131] In the first initialization phase T2, the third transistor M3 is turned on in response to the high-level third scan signal S3, and the voltage at the second electrode of the capacitor C is transmitted to the first electrode of the fifth transistor M5. The voltage difference between the first electrode and the gate of the fifth transistor M5 is VDD-Vdata+VD, where Vdata is greater than VDD.

[0132] The working process of data writing stage T3 and light emitting stage T4 is the same as Figure 12 At low brightness, when DBV is less than the preset value, the data voltage Vdata is large, the fifth transistor M5 is in a subthreshold conduction state, and the gate-source voltage difference of the fifth transistor M5 is slightly less than the threshold voltage Vth5.

[0133] Optionally, Figure 16 Another driving timing diagram of a pixel circuit provided in an embodiment of the present invention is applicable to the case where the display brightness value of the display panel is greater than a preset value. Figure 14 The pixel circuit shown is driven, and its working process is similar to Figure 13 The working process of the driving timing shown is the same and will not be repeated here.

[0134] Optionally, the present invention further provides a method for driving a pixel circuit, which can be used to drive the pixel circuit provided by any embodiment of the present invention. Figure 17 A flowchart of a driving method of a pixel circuit provided by an embodiment of the present invention is provided. Figure 2 and Figure 17 , the driving method of the pixel circuit includes:

[0135] S110 . In the pre-charging stage, control the pre-charging module to transmit the data voltage on the data line to the first end of the storage module, and to transmit the first power supply voltage transmitted on the first power supply line to the second end of the storage module.

[0136] S120 , in a first initialization phase, connecting the second end of the storage module to the first end of the driving module, and connecting the first end of the storage module to the control end of the driving module.

[0137] S130 , in the data writing phase, controlling the first voltage writing module to transmit the data voltage transmitted on the data line to the driving module, so that the data voltage is written to the control terminal of the driving module.

[0138] S140 , in the light-emitting stage, controlling the driving module to drive the light-emitting module to emit light.

[0139] The technical solution provided by the embodiment of the present invention is to set a pre-charging module and a second voltage writing module. In the pre-charging stage before the first initialization stage, the pre-charging module is controlled to turn on and write the data voltage to the first end of the storage module, and the first power supply voltage is written to the second end of the storage module at the same time, so that the voltage difference between the two ends of the storage module is close to or equal to the difference between the first power supply voltage and the data voltage; and the driving module is reset with this voltage difference in the first initialization stage, so that the voltage difference between the first end and the control end of the driving module can be close to or remain constant in the first initialization stage and the light-emitting stage, thereby reducing the drift degree of the threshold voltage of the driving transistor included in the driving module, thereby reducing the hysteresis effect of the driving transistor, so that the display panel using the pixel circuit maintains consistent brightness when switching pictures, which is beneficial to improving the picture flickering phenomenon and thus improving the display quality.

[0140] Optionally, combined Figure 8 In the pixel circuit shown, the pre-charging module 140 includes a first charging unit 1401 and a second charging unit 1402; the control end of the first charging unit 1401 is connected to the first scan line, the first end of the first charging unit 1401 is connected to the data line, the second end of the first charging unit 1401 is connected to the first end a of the storage module 130, the first end of the second charging unit 1402 is connected to the first power line L1, the second end of the second charging unit 1402 is connected to the second end b of the storage module 130, and the control end of the second charging unit 1402 is connected to the second scan line.

[0141] The second voltage writing module 150 includes a first voltage writing unit 1501, a first end of the first voltage writing unit 1501 is connected to the second end b of the storage module 130, a second end of the first voltage writing unit 1501 is connected to the first end S of the driving module 110, and a control end of the first voltage writing unit 1501 is connected to the third scan line;

[0142] The first terminal a of the storage module 130 is connected to the control terminal G of the driving module 110 .

[0143] Alternatively, the voltage writing module 150 also includes a second voltage writing unit 1502, the first end of the second voltage writing unit 1502 is connected to the first end a of the storage module 130, the second end of the second voltage writing unit 1502 is connected to the control end G of the driving module 110, and the control end of the second voltage writing unit 1502 is connected to the fourth scan line.

[0144] Step S110 specifically includes:

[0145] In the pre-charging stage, the first charging unit is controlled to be turned on in response to the first scanning signal on the first scanning line to transmit the data voltage on the data line to the first end of the storage module, and the second charging unit is controlled to be turned on in response to the second scanning signal on the second scanning line to transmit the first power supply voltage transmitted on the first power supply line to the second end of the storage module.

[0146] Step S120 specifically includes:

[0147] In the first initialization stage, the second voltage writing unit is controlled to be turned on in response to the fourth scanning signal on the fourth scanning line to transmit the data voltage to the first end of the storage module; at the same time, the first voltage writing unit is controlled to be turned on in response to the third scanning signal on the third scanning line to write the voltage at the second end of the storage module into the first end of the driving module.

[0148] Optionally, the pixel circuit further includes a compensation module 190 connected between the second terminal D and the control terminal G of the driving module 110. A voltage divider module 210 is further included in the connection path between the first charging unit 1401 and the data line. The voltage divider module 210 includes at least one diode; the on-state voltage drop of the voltage divider module 210 is greater than the absolute value of the threshold voltage of the driving module 110. The pixel circuit further includes a first initialization module connected to the driving module. When the display brightness value of the display panel is less than a preset value, step S110 includes:

[0149] In the pre-charging stage, the first charging unit is controlled to be turned on in response to the first scanning signal on the first scanning line, so as to transmit the data voltage on the data line to the first end of the storage module through the voltage divider module, and the second charging unit is controlled to be turned on in response to the second scanning signal on the second scanning line, so as to transmit the first power supply voltage transmitted on the first power supply line to the second end of the storage module.

[0150] Step S120 includes:

[0151] In the first initialization stage, the first initialization module is controlled to transmit the first initialization voltage to the control end of the driving module, and the second voltage writing unit is controlled to be turned on in response to the fourth scanning signal on the fourth scanning line, so as to transmit the first initialization voltage to the first end of the storage module; at the same time, the first voltage writing unit is controlled to be turned on in response to the third scanning signal on the third scanning line, so as to write the voltage at the second end of the storage module into the first end of the driving module.

[0152] Step S130 includes:

[0153] In the data writing phase, the first voltage writing module is controlled to transmit the data voltage transmitted on the data line to the control end of the driving module via the compensation module.

[0154] For the relevant description of the pre-charging stage and the first initialization stage, reference may be made to the description in the above embodiment, which will not be repeated here.

[0155] Optionally, the present invention further provides a display panel, which includes the pixel circuit provided by any embodiment of the present invention. Therefore, the display panel also has the beneficial effects described in any of the above embodiments. Figure 18 A schematic diagram of a display panel according to an embodiment of the present invention is provided. In this embodiment, the display panel 200 can be applied to Figure 18 The mobile phone panel shown can also be applied to any electronic product with a display function, including but not limited to the following categories: televisions, laptops, desktop monitors, tablet computers, digital cameras, smart bracelets, smart glasses, car displays, medical equipment, industrial control equipment, touch interactive terminals, etc. The embodiments of the present invention do not specifically limit this.

[0156] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. This is not limited herein.

[0157] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A pixel circuit, characterized in that: include: A driving module, a first voltage writing module, a storage module, a pre-charging module, a second voltage writing module and a light emitting module; The pre-charging module is connected to at least the data line and the storage module, and is configured to transmit the data voltage on the data line to the first end of the storage module and transmit the first power supply voltage transmitted on the first power line to the second end of the storage module during the pre-charging phase; The second voltage writing module is connected to at least the first terminal of the driving module and the storage module, and is used to connect the second terminal of the storage module to the first terminal of the driving module and the first terminal of the storage module to the control terminal of the driving module in a first initialization phase; The first voltage writing module is used to transmit the data voltage to the driving module during the data writing phase; The driving module and the light-emitting module are connected between the first power line and the second power line, and the driving module is used to drive the light-emitting module to emit light in the light-emitting stage; The pre-charging stage is before the first initialization stage.

2. The pixel circuit according to claim 1, wherein: The pre-charging module includes a first charging unit and a second charging unit; The control end of the first charging unit is connected to the first scan line, the first end of the first charging unit is connected to the data line, the second end of the first charging unit is connected to the first end of the storage module, the first end of the second charging unit is connected to the first power line, the second end of the second charging unit is connected to the second end of the storage module, and the control end of the second charging unit is connected to the second scan line.

3. The pixel circuit according to claim 2, wherein: The first charging unit includes a first transistor, the gate of the first transistor is the control terminal of the first charging unit, the first pole of the first transistor is the first terminal of the first charging unit, and the second pole of the first transistor is the second terminal of the first charging unit; The second charging unit includes a second transistor, a gate of the second transistor is a control terminal of the second charging unit, a first pole of the second transistor is a first terminal of the second charging unit, and a second pole of the second transistor is a second terminal of the second charging unit.

4. The pixel circuit according to claim 2, wherein: A voltage divider module is also included in the connection path between the first charging unit and the data line, and the voltage divider module includes at least one diode; the on-state voltage drop of the voltage divider module is greater than the absolute value of the threshold voltage of the driving module; the voltage divider module is turned on in the pre-charging stage.

5. The pixel circuit according to claim 4, wherein: The diode includes a transistor with a gate and a first terminal short-circuited.

6. The pixel circuit according to claim 4, wherein: The voltage dividing module includes a first diode and a second diode connected in series.

7. The pixel circuit according to claim 2, wherein: The second voltage writing module includes a first voltage writing unit; a first end of the first voltage writing unit is connected to the second end of the storage module, a second end of the first voltage writing unit is connected to the first end of the driving module, and a control end of the first voltage writing unit is connected to the third scan line; The first end of the storage module is connected to the control end of the driving module, or the second voltage writing module further includes a second voltage writing unit, the first end of the second voltage writing unit is connected to the first end of the storage module, the second end of the second voltage writing unit is connected to the control end of the driving module, and the control end of the second voltage writing unit is connected to the fourth scan line.

8. The pixel circuit according to claim 7, wherein: The first voltage writing unit includes a third transistor, the gate of the third transistor is the control terminal of the first voltage writing unit, the first terminal of the third transistor is the first terminal of the first voltage writing unit, and the second terminal of the third transistor is the second terminal of the first voltage writing unit; The second voltage writing unit includes a fourth transistor, the gate of the fourth transistor is the control end of the second voltage writing unit, the first pole of the fourth transistor is the first end of the second voltage writing unit, and the second pole of the fourth transistor is the second end of the second voltage writing unit.

9. The pixel circuit according to claim 7, wherein: The storage module includes a capacitor, a first pole of the capacitor is a first end of the storage module, and a second pole of the capacitor is a second end of the storage module.

10. The pixel circuit according to claim 7, wherein: The first scan line, the second scan line, the third scan line and the fourth scan line are used to transmit scan signals. In the pre-charging stage, the first charging unit and the second charging unit are turned on, the first voltage writing unit is turned off, and the second voltage writing unit is turned off; In the first initialization stage, the first voltage writing unit is turned on, the second voltage writing unit is turned on; the first charging unit and the second charging unit are both turned off; During the data writing phase and the light emitting phase, the first charging unit is turned off, the second charging unit is turned on, the first voltage writing unit is turned off, and the second voltage writing unit is turned on.

11. The pixel circuit according to claim 10, wherein: When the display brightness value of the display panel is less than a preset value, at least one first display period includes the pre-charging stage, the first initialization stage, the data writing stage and the light emitting stage.

12. The pixel circuit according to claim 7 or 10, characterized in that: The pixel circuit further includes a first initialization module connected to the driving module. The first initialization module is configured to transmit a first initialization voltage to the control terminal of the driving module during the first initialization phase when the display brightness value of the display panel is less than a preset value; And / or, the first initialization module is configured to transmit a first initialization voltage to the control terminal of the driving module in a second initialization phase when the display brightness value of the display panel is greater than a preset value.

13. The pixel circuit according to claim 12, wherein: When the display brightness value of the display panel is greater than a preset value, at least one second display period includes the second initialization phase, the data writing phase and the light emitting phase.

14. The pixel circuit according to claim 12, wherein: In the second initialization stage when the display brightness value of the display panel is greater than a preset value, the first charging unit is turned off, the second charging unit is turned on, the first voltage writing unit is turned off, and the second voltage writing unit is turned on.

15. The pixel circuit according to claim 12, wherein: The control end of the first initialization module is connected to the seventh scan line, the first end of the first initialization module is connected to the first initialization signal line, and the second end of the first initialization module is connected to the control end of the driving module.

16. The pixel circuit according to claim 1, wherein: The pixel circuit also includes a compensation module; the compensation module is connected between the second end and the control end of the driving module, and the control end of the compensation module is connected to the fifth scan line; the control end of the first voltage writing module is connected to the sixth scan line, the first end of the first voltage writing module is connected to the data line, and the second end of the first voltage writing module is connected to the first end of the driving module.

17. The pixel circuit according to claim 16, wherein: The pixel circuit further includes a first light emitting control unit and a second light emitting control unit; The first light-emitting control unit is connected between the first power line and the first end of the driving module, the second light-emitting control unit is connected between the second end of the driving module and the first end of the light-emitting module, the second end of the light-emitting module is connected to the second power line, and the control end of the first light-emitting control unit and the control end of the second light-emitting control unit are both connected to the light-emitting control signal line.

18. The pixel circuit according to claim 16, wherein: The pixel circuit further includes a second initialization module, a control end of the second initialization module is connected to the eighth scan line, a first end of the second initialization module is connected to the second initialization signal line, and a second end of the second initialization module is connected to the first end of the light emitting module.

19. A method for driving a pixel circuit, characterized in that: The pixel circuit includes a driving module, a first voltage writing module, a storage module, a pre-charging module, a second voltage writing module and a light-emitting module, wherein the pre-charging module is connected to at least a data line and the storage module, the second voltage writing module is connected to at least a first end of the driving module and the storage module, and the driving module and the light-emitting module are connected between a first power line and a second power line; The driving method of the pixel circuit includes: In the pre-charging stage, controlling the pre-charging module to transmit the data voltage on the data line to the first end of the storage module, and transmitting the first power supply voltage transmitted on the first power line to the second end of the storage module; In a first initialization phase, the second end of the storage module is connected to the first end of the driving module, and the first end of the storage module is connected to the control end of the driving module; In the data writing phase, controlling the first voltage writing module to transmit the data voltage transmitted on the data line to the driving module, so that the data voltage is written to the control terminal of the driving module; In the light-emitting stage, the driving module is controlled to drive the light-emitting module to emit light.

20. The driving method of the pixel circuit according to claim 19, wherein: The pre-charging module includes a first charging unit and a second charging unit, wherein the control end of the first charging unit is connected to the first scan line, the first end of the first charging unit is connected to the data line, the second end of the first charging unit is connected to the first end of the storage module, the first end of the second charging unit is connected to the first power line, the second end of the second charging unit is connected to the second end of the storage module, and the control end of the second charging unit is connected to the second scan line; the second voltage writing module includes a first voltage writing unit, the first end of the first voltage writing unit is connected to the second end of the storage module, the second end of the first voltage writing unit is connected to the first end of the driving module, and the control end of the first voltage writing unit is connected to the third scan line; The first end of the storage module is connected to the control end of the driving module, or the second voltage writing module further includes a second voltage writing unit, the first end of the second voltage writing unit is connected to the first end of the storage module, the second end of the second voltage writing unit is connected to the control end of the driving module, and the control end of the second voltage writing unit is connected to the fourth scan line; In the pre-charging stage, the step of controlling the pre-charging module to transmit the data voltage on the data line to the first end of the storage module and transmitting the first power supply voltage transmitted on the first power line to the second end of the storage module includes: In the pre-charging stage, the first charging unit is controlled to be turned on in response to a first scan signal on the first scan line so as to transmit the data voltage on the data line to the first end of the storage module, and the second charging unit is controlled to be turned on in response to a second scan signal on the second scan line so as to transmit the first power supply voltage transmitted from the first power supply line to the second end of the storage module. In the first initialization phase, the steps of connecting the second end of the storage module to the first end of the driving module and connecting the first end of the storage module to the control end of the driving module include: In the first initialization stage, the second voltage writing unit is controlled to be turned on in response to the fourth scanning signal on the fourth scanning line, and the data voltage is transmitted to the first end of the storage module; at the same time, the first voltage writing unit is controlled to be turned on in response to the third scanning signal on the third scanning line, and the voltage at the second end of the storage module is written into the first end of the driving module.

21. The driving method of the pixel circuit according to claim 20, wherein: The pixel circuit further includes a compensation module connected between the second terminal and the control terminal of the driving module, wherein the control terminal of the compensation module is connected to the fifth scan line; a voltage divider module is further included on the connection path between the first charging unit and the data line, wherein the voltage divider module includes at least one diode; and a forward voltage drop of the voltage divider module is greater than the absolute value of the threshold voltage of the driving module; The pixel circuit further includes a first initialization module connected to the driving module; when the display brightness value of the display panel is less than a preset value, in a pre-charging stage, the steps of controlling the pre-charging module to transmit the data voltage on the data line to the first end of the storage module and transmitting the first power supply voltage transmitted on the first power line to the second end of the storage module include: In the pre-charging stage, the first charging unit is controlled to be turned on in response to a first scan signal on the first scan line, so as to transmit the data voltage on the data line to the first end of the storage module via the voltage divider module, and the second charging unit is controlled to be turned on in response to a second scan signal on the second scan line, so as to transmit the first power supply voltage transmitted from the first power supply line to the second end of the storage module; In the first initialization phase, the steps of connecting the second end of the storage module to the first end of the driving module and connecting the first end of the storage module to the control end of the driving module include: In the first initialization stage, the first initialization module is controlled to transmit the first initialization voltage to the control terminal of the driving module, and the second voltage writing unit is controlled to be turned on in response to the fourth scan signal on the fourth scan line to transmit the first initialization voltage to the first terminal of the storage module; and the first voltage writing unit is controlled to be turned on in response to the third scan signal on the third scan line to write the voltage at the second terminal of the storage module into the first terminal of the driving module. In the data writing phase, the step of controlling the first voltage writing module to transmit the data voltage transmitted on the data line to the driving module so that the data voltage is written to the control terminal of the driving module includes: In the data writing phase, the first voltage writing module is controlled to transmit the data voltage transmitted on the data line to the control end of the driving module via the compensation module.

22. A display panel, characterized in that: The method comprises the pixel circuit according to any one of claims 1 to 18.

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