A signal power control circuit for communication system equipment
By designing a signal power control circuit, using resistors, potentiometers and operational amplifiers, the limit detection and adjustment of communication signals is realized, and the bandwidth narrowing problem caused by biasing methods in the prior art is solved, and the initial amplification state is The callback function is detected to ensure the effectiveness of signal amplification and bandwidth maintenance.
Patent Information
- Application Number
- CN202311050243.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-21
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2043-08-21
AI Technical Summary
The prior art causes the bandwidth to narrow through bias during the amplification of communication signals, and it is impossible to effectively perform limiting detection and adjustment.
A signal power control circuit is designed, using components such as the first resistor, the second resistor, the third potentiometer, the operational amplifier and transistor. By feedback amplifying and adjusting the signal, the signal limit detection and adjustment is realized, and bias is avoided. The bandwidth narrowing problem caused by the method and has the function of detecting callback in the initial amplification state.
The amplification limit detection and adjustment of the communication signal is realized, which avoids the problem of narrowing bandwidth. It also has the detection callback function of the initial amplification state, ensuring effective amplification of the signal and bandwidth maintenance.
Smart Images
Figure CN116760379B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of data communication, and in particular to a signal power control circuit of a communication system device. Background Art
[0002] Publication No.: CN116131780A discloses a power amplifier circuit and a power amplifier method, which performs power amplification on an initial power signal received by the amplifier circuit and performs power detection on the amplified signal to determine whether to shut down the bias circuit. However, setting a bias voltage in the amplifier circuit will narrow the bandwidth used by the actual communication signal. Summary of the invention
[0003] In view of the above technical problems, the purpose of the present invention is to provide a signal power control circuit of a communication system equipment, including a first resistor R1, a second resistor R2, a third potentiometer R3, a fourth resistor R4, a fifth resistor R5, a first operational amplifier U1, a first pin PA_1, and a second pin PA_2, wherein one end of the first resistor R1 is connected to the first pin PA_1, the other end of the first resistor R1 and the tap end of the first resistor R1 are connected to the in-phase end of the first operational amplifier U1 and one end of the second resistor R2, the output end of the first operational amplifier U1 is connected to the 12th pin of the third potentiometer R3 and the second pin PA_2, the 11th pin and the 10th pin of the third potentiometer R3 are connected to one end of the fifth resistor R5, the 4th pin of the third potentiometer R3 is connected to the power supply, the 5th pin of the third potentiometer R3 is connected to one end of the fourth resistor R4, and the other end of the second resistor R2, the other end of the fifth resistor R5, and the other end of the fourth resistor R4 are connected to the ground.
[0004] Furthermore, it also includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a second operational amplifier U2, and a first transistor Q1, one end of the sixth resistor R6 is connected to the collector of the first transistor Q1 and the output end of the second operational amplifier U2, the in-phase end of the second operational amplifier U2 is connected to one end of the seventh resistor R7 and one end of the eighth resistor R8, the other end of the seventh resistor R7 is connected to the power supply, and the other end of the eighth resistor R8, the emitter of the first transistor Q1, the other end of the sixth resistor R6 and the ground are connected.
[0005] Furthermore, it also includes a ninth resistor R9, a tenth resistor R10, a third operational amplifier U3, a fourth operational amplifier U4, a second MOS tube Q2, and a third MOS tube Q3. The third operational amplifier U3 is connected to the same phase end of the first operational amplifier U1, the third operational amplifier U3 is connected to the inverting end of the ninth resistor R9 and the tenth resistor R10, the other end of the ninth resistor R9 is connected to the output end of the third operational amplifier U3 and the inverting end of the fourth operational amplifier U4, the fourth operational amplifier U4 is connected to the same phase end of the second operational amplifier U2 and the inverting end of the second operational amplifier U2, the output end of the fourth operational amplifier U4 is connected to the gate of the second MOS tube Q2 and the gate of the third MOS tube Q3, the drain of the second MOS tube Q2 is connected to one end of the fourth resistor R4, and the drain of the third MOS tube Q3 is connected to the base of the first triode Q1.
[0006] Furthermore, it also includes an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, and a fourteenth resistor R14, one end of the eleventh resistor R11 is connected to the source of the second MOS tube Q2 and one end of the twelfth resistor R12, the other end of the twelfth resistor R12 is connected to one end of the thirteenth resistor R13 and a power supply, and the other end of the thirteenth resistor R13 is connected to one end of the fourteenth resistor R14 and the source of the third MOS tube Q3.
[0007] Furthermore, it also includes a fifteenth resistor R15, one end of the fifteenth resistor R15 is connected to the 3rd pin of the third potentiometer R3, and the other end of the fifteenth resistor R15 is connected to the collector of the first transistor Q1.
[0008] Furthermore, a sixteenth resistor R16 is included, one end of the sixteenth resistor R16 is connected to the gate of the second MOS transistor Q2, and the other end of the sixteenth resistor R16 is connected to the ground.
[0009] Furthermore, it also includes C1, one end of C1 is connected to the power supply and the other end of C1 is connected to the ground.
[0010] Furthermore, the ninth resistor R9 is an adjustable potentiometer.
[0011] The beneficial effects of the present invention compared with the prior art are:
[0012] The present invention can perform limit detection and adjustment on the amplification of communication signals. The amplification process does not adopt a biasing method, which can prevent the problem of bandwidth narrowing. At the same time, it has a detection callback function of the initial amplification state. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the prior art and the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0014] Figure 1 This is a schematic diagram of the structure of a signal power control circuit of a communication system device provided by the present invention. DETAILED DESCRIPTION
[0015] In order to make the objects and advantages of the present invention more clearly understood, the present invention is specifically described below in conjunction with embodiments. It should be understood that the following text is only used to describe one or several specific implementations of the present invention, and does not strictly limit the scope of protection specifically requested by the present invention.
[0016] Referring to the accompanying drawings, the present invention is a signal power control circuit of a communication system device, comprising a first resistor R1, a second resistor R2, a third potentiometer R3, a fourth resistor R4, a fifth resistor R5, a first operational amplifier U1, a first pin PA_1, and a second pin PA_2, wherein one end of the first resistor R1 is connected to the first pin PA_1, the other end of the first resistor R1 and the tap end of the first resistor R1 are connected to the in-phase end of the first operational amplifier U1 and one end of the second resistor R2, the output end of the first operational amplifier U1 is connected to the 12th pin of the third potentiometer R3 and the second pin PA_2, the 11th pin and the 10th pin of the third potentiometer R3 are connected to one end of the fifth resistor R5, the 4th pin of the third potentiometer R3 is connected to a power supply, the 5th pin of the third potentiometer R3 is connected to one end of the fourth resistor R4, and the other end of the second resistor R2, the other end of the fifth resistor R5, and the other end of the fourth resistor R4 are connected to the ground.
[0017] Specifically, it also includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a second operational amplifier U2, and a first transistor Q1. One end of the sixth resistor R6 is connected to the collector of the first transistor Q1 and the output end of the second operational amplifier U2. The in-phase end of the second operational amplifier U2 is connected to one end of the seventh resistor R7 and one end of the eighth resistor R8. The other end of the seventh resistor R7 is connected to a power supply. The other end of the eighth resistor R8, the emitter of the first transistor Q1, and the other end of the sixth resistor R6 are connected to the ground.
[0018] Specifically, it also includes a ninth resistor R9, a tenth resistor R10, a third operational amplifier U3, a fourth operational amplifier U4, a second MOS tube Q2, and a third MOS tube Q3. The third operational amplifier U3 is connected to the same phase end of the first operational amplifier U1, the third operational amplifier U3 is connected to the opposite phase end of the ninth resistor R9 and the tenth resistor R10, the other end of the ninth resistor R9 is connected to the output end of the third operational amplifier U3 and the opposite phase end of the fourth operational amplifier U4, the fourth operational amplifier U4 is connected to the opposite phase end of the second operational amplifier U2, the output end of the fourth operational amplifier U4 is connected to the gate of the second MOS tube Q2 and the gate of the third MOS tube Q3, the drain of the second MOS tube Q2 is connected to one end of the fourth resistor R4, and the drain of the third MOS tube Q3 is connected to the base of the first triode Q1.
[0019] Specifically, it also includes an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, and a fourteenth resistor R14. One end of the eleventh resistor R11 is connected to the source of the second MOS tube Q2 and one end of the twelfth resistor R12. The other end of the twelfth resistor R12 is connected to one end of the thirteenth resistor R13 and a power supply. The other end of the thirteenth resistor R13 is connected to one end of the fourteenth resistor R14 and the source of the third MOS tube Q3.
[0020] Specifically, a fifteenth resistor R15 is also included, one end of the fifteenth resistor R15 is connected to the 3rd pin of the third potentiometer R3, and the other end of the fifteenth resistor R15 is connected to the collector of the first transistor Q1.
[0021] Specifically, a sixteenth resistor R16 is also included, one end of the sixteenth resistor R16 is connected to the gate of the second MOS transistor Q2, and the other end of the sixteenth resistor R16 is connected to the ground end.
[0022] Specifically, it also includes C1, one end of C1 is connected to the power supply and the other end of C1 is connected to the ground.
[0023] Specifically, the ninth resistor R9 is an adjustable potentiometer.
[0024] Specifically, the first pin PA_1 is used for communication signal input, the second pin PA_2 is used for outputting communication amplified signals, the first resistor R1 and the second resistor R2 are used to configure the signal voltage divider input at the in-phase end of the first operational amplifier U1, the fifth resistor R5 and the third potentiometer R3 are used to amplify the feedback coefficient at the output end of the first operational amplifier U1, the fourth resistor R4 is used for the initial configuration of the 5-pin signal of the third potentiometer R3, the first operational amplifier U1 is input to the second pin PA_2 after feedback from the third potentiometer R3 and the fourth resistor R4, the second operational amplifier U2 is used to detect the saturation signal amplified by the first operational amplifier U1, the inverting end of the second operational amplifier U2 is set to approach the saturation threshold through the seventh resistor R7 and the eighth resistor R8, and the threshold potential can also be set through the power supply, and the approaching saturation threshold is less than the maximum output of the power supply after passing through the operational amplifier when setting. , the upper interval from the threshold to the maximum output is used as one of the basic conditions for the callback of the subsequent circuit, and the other limiting condition is based on the adjustment range of the third potentiometer R3, and the range is a span ratio signal when the 11th pin to the 12th pin or the 11th pin to the 10th pin of the third potentiometer R3 is adjusted, and the span ratio needs to be smaller than the set approaching saturation threshold to the maximum output interval of the operational amplifier. The third operational amplifier U3, the ninth resistor R9, and the tenth resistor R10 are used to set the callback origin when the third potentiometer R3 is called back. The second MOS tube Q2 and the third MOS tube Q3 control the states of the 5th pin and the 3rd pin of the third potentiometer R3 based on the output of the fourth operational amplifier U4. When the second operational amplifier U2 outputs, it controls the 3rd pin of the third potentiometer R3, and uses the output state of the fourth operational amplifier U4 to adjust the control of the 5th pin of the third potentiometer R3.
[0025] Specifically, the signal control process is that when a signal is input to the first pin PA_1, the signal is fed back and amplified through the first operational amplifier U1, the third potentiometer R3 and the fifth resistor R5 and input to the second pin PA_2 and the inverting end of the second operational amplifier U2 (to detect whether the current amplified signal exceeds the saturation threshold), and the other way is fed back and amplified through the third operational amplifier U3, the ninth resistor R9 and the tenth resistor R10 and input to the inverting end of the fourth operational amplifier U4 (to detect whether the signal output to the second pin PA_2 is consistent with the initial feedback amplification factor). When the signal exceeds the saturation threshold set at the in-phase end of the second operational amplifier U2, the second operational amplifier U4 will amplify the signal. The amplifier U2 outputs a low potential signal to the 3rd pin of the third potentiometer R3. At this time, if the signal fed back to the second pin PA_2 by the first operational amplifier U1 after passing through the third potentiometer R3 and the fifth resistor R5 is consistent with the initial signal (the adjustment midpoint of the 11th pin of the third potentiometer R3 is one more span ratio away from the 12th or 10th pin in one direction in the initial state), the fourth operational amplifier U4 outputs, the second MOS tube Q2 and the third MOS tube Q3 are turned off, and at the same time, the output of the second operational amplifier U2 causes the third potentiometer R3 to be reversely adjusted to the direction of the pin with one more span ratio away from the signal After the signal input is amplified and falls below the regional saturation threshold, it stops. At this time, the second operational amplifier U2 outputs a high potential signal which is fed back to the 3-pin of the third potentiometer R3 through the fifteenth resistor R15, while the fourth operational amplifier U4 has no output. The second MOS tube Q2 and the third MOS tube Q3 are turned on. The third MOS tube Q3 is turned on to turn on the first triode Q1, so that the second operational amplifier U2 outputs to the 3-pin end of the third potentiometer R3 and pulls down the potential. At the same time, because the second MOS tube Q2 is turned on, the 5-pin of the third potentiometer R3 is in a high potential state. After the third potentiometer R3 is adjusted back to the initial state, the fourth operational amplifier U4 outputs, and the second operational amplifier U 2 The signal at the output end is fed back to the pin 3 of the third potentiometer R3 through the fifteenth resistor R15, and the third potentiometer R3 stops adjusting. The second MOS tube Q2 and the third MOS tube Q3 are configured to use the eleventh resistor R11, the twelfth resistor R12, the thirteenth resistor R13, and the fourteenth resistor R14 for voltage division and power supply. The sixteenth resistor R16 is used for the gate loop of the second MOS tube Q2 and the third MOS tube Q3. The fifteenth resistor R15 further pulls down the potential signal of the collector end of the first triode Q1. C1 is used for filtering. The ninth resistor R9 can be replaced by a potentiometer for reconfiguration when the third potentiometer R3 is replaced.
[0026] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations within the meaning and scope of the equivalent elements of the claims be included in the invention. Any marking in a claim should not be considered as limiting the claim to which it relates.
Claims
1. A signal power control circuit for a communication system device, characterized in that: It includes a first resistor, a second resistor, a third potentiometer, a fourth resistor, a fifth resistor, a first operational amplifier, a first pin, and a second pin, wherein one end of the first resistor is connected to the first pin, the other end of the first resistor and the tap end of the first resistor are connected to the in-phase end of the first operational amplifier and one end of the second resistor, the output end of the first operational amplifier is connected to the 12th pin and the second pin of the third potentiometer, the 11th pin and the 10th pin of the third potentiometer are connected to one end of the fifth resistor, the 4th pin of the third potentiometer is connected to the power supply, the 5th pin of the third potentiometer is connected to one end of the fourth resistor, and the other end of the second resistor, the other end of the fifth resistor, and the other end of the fourth resistor are connected to the ground; It also includes a sixth resistor, a seventh resistor, an eighth resistor, a second operational amplifier, and a first triode, wherein one end of the sixth resistor is connected to the collector of the first triode and the output end of the second operational amplifier, the in-phase end of the second operational amplifier is connected to one end of the seventh resistor and one end of the eighth resistor, the other end of the seventh resistor is connected to a power supply, and the other end of the eighth resistor, the emitter of the first triode, the other end of the sixth resistor, and the grounding end are connected; It also includes a ninth resistor, a tenth resistor, a third operational amplifier, a fourth operational amplifier, a second MOS tube, and a third MOS tube. The third operational amplifier is connected to the first operational amplifier in-phase end, the third operational amplifier is connected to the ninth resistor and the tenth resistor in-phase end, the ninth resistor is connected to the output end of the third operational amplifier and the inverting end of the fourth operational amplifier, the fourth operational amplifier is connected to the inverting end of the second operational amplifier, the fourth operational amplifier is connected to the second MOS tube gate and the third MOS tube gate, the second MOS tube drain is connected to the fourth resistor and the third MOS tube drain is connected to the first transistor base.
2. The signal power control circuit of the communication system equipment according to claim 1, characterized in that: It also includes an eleventh resistor, a twelfth resistor, a thirteenth resistor, and a fourteenth resistor, wherein one end of the eleventh resistor is connected to the source of the second MOS tube and one end of the twelfth resistor, the other end of the twelfth resistor is connected to one end of the thirteenth resistor and a power supply, and the other end of the thirteenth resistor is connected to one end of the fourteenth resistor and the source of the third MOS tube.
3. The signal power control circuit of the communication system equipment according to claim 1, characterized in that: It also includes a fifteenth resistor, one end of which is connected to the 3rd pin of the third potentiometer, and the other end of the fifteenth resistor is connected to the collector of the first transistor.
4. The signal power control circuit of the communication system equipment according to claim 1, characterized in that: The invention also includes a sixteenth resistor, one end of which is connected to the gate of the second MOS tube, and the other end of which is connected to the ground.
5. The signal power control circuit of the communication system equipment according to claim 1, characterized in that: It also includes C1, one end of which is connected to a power source and the other end of which is connected to a ground.
6. The signal power control circuit of the communication system equipment according to claim 1, characterized in that: The ninth resistor is an adjustable potentiometer.