Semiconductor structure, method of manufacturing the same, and semiconductor memory device

Abstract

The embodiments of the present disclosure provide a semiconductor structure, a preparation method thereof and a semiconductor storage device. The method comprises: providing a semiconductor substrate, the semiconductor substrate having a trench; forming a first oxide layer with uniform thickness on the inner wall of the trench; forming an oxygen barrier layer on the surface of the first oxide layer at the bottom of the trench; forming a second oxide layer between the first oxide layer and the inner wall of the trench by using an in-situ water vapor generation process; and removing the oxygen barrier layer. The preparation method of the embodiments of the present disclosure improves the gate-induced drain leakage current of the semiconductor structure, and the process is simple.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing technology, and in particular to a semiconductor structure and its preparation method, and a semiconductor memory device. Background Technology

[0002] Dynamic Random Access Memory (DRAM) is a commonly used semiconductor storage device in computers, consisting of many repeating memory cells. Each memory cell is electrically connected to a word line and a bit line to perform its storage function.

[0003] However, in related technologies, the gate oxide layer of the buried word lines in DRAM has a uniform thickness, resulting in a large gate-induced drain leakage (GIDL) current, which in turn affects the performance of DRAM.

[0004] The information disclosed in the background section is only intended to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute related technology known to those skilled in the art. Summary of the Invention

[0005] This disclosure provides a method for fabricating a semiconductor structure that can form gate oxide layers of different thicknesses, thereby improving gate-induced drain leakage current.

[0006] This disclosure also provides a semiconductor structure and a semiconductor memory device, wherein the gate oxide layer has different thicknesses, which improves the gate-induced drain leakage current and enhances the electrical performance of the semiconductor structure.

[0007] According to one aspect of this disclosure, a method for fabricating a semiconductor structure is provided, comprising: providing a semiconductor substrate having trenches; forming a first oxide layer of uniform thickness on the inner wall of the trenches; forming an oxygen barrier layer on the surface of the first oxide layer located at the bottom of the trenches; forming a second oxide layer between the first oxide layer and the inner wall of the trenches using an in-situ water vapor generation process; and removing the oxygen barrier layer.

[0008] According to an exemplary embodiment of this disclosure, the oxygen barrier layer's ability to block oxygen gradually weakens along the direction from the bottom of the trench to the opening of the trench.

[0009] According to an exemplary embodiment of this disclosure, the density of the oxygen barrier layer gradually decreases along the direction from the bottom end of the trench to the opening of the trench.

[0010] According to an exemplary embodiment of this disclosure, the thickness of the oxygen barrier layer gradually decreases along the direction from the bottom end of the trench to the opening of the trench.

[0011] According to an exemplary embodiment of this disclosure, the oxygen barrier layer includes at least one of silicon nitride and silicon oxynitride.

[0012] According to an exemplary embodiment of this disclosure, the pressure at which the second oxide layer is formed using the in-situ water vapor generation process is greater than or equal to 760 Torr.

[0013] According to an exemplary embodiment of the present disclosure, the oxygen barrier layer is formed on the surface of the first oxide layer located on the sidewall of the trench in a direction from the bottom end of the trench to the opening of the trench.

[0014] According to an exemplary embodiment of this disclosure, the pressure at which the second oxide layer is formed using the in-situ water vapor generation process is less than or equal to 300 Torr.

[0015] According to an exemplary embodiment of the present disclosure, the first oxide layer is formed by an atomic layer deposition process.

[0016] According to exemplary embodiments of this disclosure, the atomic layer deposition process uses Si2Cl6 and C6H as reaction precursors. 17 NSi and C8H 22 At least one of N2Si, and the reacting gas is O2.

[0017] According to an exemplary embodiment of this disclosure, the reactant gas in the in-situ water vapor generation process is a mixture of at least one of hydrogen and nitric oxide with oxygen.

[0018] According to exemplary embodiments of the present disclosure, both the first oxide layer and the second oxide layer comprise silicon oxide.

[0019] According to an exemplary embodiment of the present disclosure, the thickness of the first oxide layer is 35 to 60 angstroms, and the thickness of the second oxide layer at the bottom of the trench is 0.01 to 15 angstroms.

[0020] According to an exemplary embodiment of the present disclosure, after the oxygen barrier layer is removed, a metal layer is filled in the trench having the first oxide layer and the second oxide layer, the height of the metal layer being less than the height of the trench.

[0021] According to an exemplary embodiment of this disclosure, the process used to remove the oxygen barrier layer is a wet etching process.

[0022] According to another aspect of this disclosure, a semiconductor structure is provided, which is made by the preparation method described in any of the above embodiments.

[0023] According to another aspect of this disclosure, a semiconductor memory device is provided, comprising the semiconductor structure described in any of the above embodiments.

[0024] As can be seen from the above technical solution, this disclosure possesses at least one of the following advantages and positive effects:

[0025] A barrier layer is formed on the surface of the first oxide layer at the bottom of the trench, and a second oxide layer is formed between the first oxide layer and the inner wall of the trench. Since the barrier layer is located at the bottom of the trench, the second oxide layer at the bottom of the trench is thinner. The thickness of the gate oxide layer gradually increases from the bottom to the top, which improves the gate-induced drain leakage current. The thickness of the second oxide layer can be further controlled by controlling the thickness of the oxygen barrier layer. The process is simple and the thickness of the second oxide layer can be controlled more precisely. Attached Figure Description

[0026] The above and other features and advantages of this disclosure will become more apparent from a detailed description of exemplary embodiments thereof with reference to the accompanying drawings.

[0027] Figure 1 This is a flowchart of a method for fabricating a semiconductor structure according to an embodiment of the present disclosure;

[0028] Figure 2 This is a schematic diagram of a trenched semiconductor substrate according to an embodiment of the present disclosure;

[0029] Figure 3 This is a schematic diagram of the formation of a first oxide layer in a trench according to an embodiment of the present disclosure;

[0030] Figure 4 This is a schematic diagram of an oxygen barrier layer formed at the bottom of the first oxide layer in one embodiment of the present disclosure;

[0031] Figure 5 This is a schematic diagram of the formation of a second oxide layer in one embodiment of the present disclosure;

[0032] Figure 6 This is a schematic diagram of the semiconductor structure after removing the oxygen barrier layer in one embodiment of the present disclosure;

[0033] Figure 7 This is a schematic diagram of filling a metal layer in a trench having a first oxide layer and a second oxide layer according to an embodiment of the present disclosure;

[0034] Figure 8 This is a schematic diagram of filling a metal insulating layer on a metal layer in one embodiment of the present disclosure;

[0035] Figure 9 This is a schematic diagram of an oxygen barrier layer formed at the bottom and sidewalls of the first oxide layer in another embodiment of the present disclosure;

[0036] Figure 10 This is a schematic diagram of the formation of a second oxide layer in another embodiment of this disclosure.

[0037] Explanation of reference numerals in the attached figures:

[0038] 1. Semiconductor substrate; 11. Source; 12. Drain; 2. Trench; 3. First oxide layer; 4. Oxygen barrier layer; 5. Second oxide layer; 6. Metal layer; 7. Metal insulating layer; a. First position; b. Second position; c. Third position. Detailed Implementation

[0039] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore their detailed description will be omitted.

[0040] In the following description of various exemplary embodiments of this disclosure, the accompanying drawings form part of this disclosure, and different exemplary structures that can implement various aspects of this disclosure are shown by way of example. It should be understood that other specific solutions for components, structures, exemplary devices, systems, and steps may be used, and structural and functional modifications may be made without departing from the scope of this disclosure. Moreover, although the terms “above,” “between,” “within,” etc., may be used in this specification to describe different exemplary features and elements of this disclosure, these terms are used herein only for convenience, such as the orientation according to the examples in the drawings. Nothing in this specification should be construed as requiring a specific three-dimensional orientation of the structure to fall within the scope of this disclosure. Furthermore, the terms “first,” “second,” etc., in the claims are used only as illustrative marks and are not intended to limit the number of objects thereof.

[0041] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily have to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the specific circumstances.

[0042] Furthermore, in the description of this disclosure, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. "Above" and "below" are technical terms indicating location, which are used merely for clarity and are not intended to be limiting.

[0043] According to one aspect of this disclosure, a method for fabricating a semiconductor structure is provided. For example... Figures 1 to 10 As shown, where, Figure 1 A flowchart illustrating a method for fabricating a semiconductor structure according to an embodiment of the present disclosure is shown; Figures 2 to 8 A schematic diagram of the semiconductor structure according to an embodiment of the present disclosure during the fabrication process is shown; Figure 9 and Figure 10 Schematic diagrams of a semiconductor structure forming an oxygen barrier layer 4 and a second oxide layer 5 in another embodiment are shown. Figure 1 As shown, the method for fabricating the semiconductor structure according to an embodiment of this disclosure includes:

[0044] Step S200: Provide a semiconductor substrate 1, the semiconductor substrate 1 having trenches 2.

[0045] Step S400: A first oxide layer 3 of uniform thickness is formed on the inner wall of the trench 2.

[0046] Step S600: An oxygen barrier layer 4 is formed on the surface of the first oxide layer 3 located at the bottom of the trench 2.

[0047] Step S800: A second oxide layer 5 is formed between the first oxide layer 3 and the inner wall of the trench 2 using an in-situ water vapor generation process.

[0048] Step S1000: Remove the oxygen barrier layer 4.

[0049] The semiconductor structure fabrication method of this disclosure involves forming a barrier layer on the surface of the first oxide layer 3 at the bottom of the trench 2, and forming a second oxide layer 5 between the first oxide layer 3 and the inner wall of the trench 2. Since the barrier layer is located at the bottom of the trench 2, the second oxide layer 5 at the bottom of the trench 2 is thinner, and the thickness of the gate oxide layer gradually increases from the bottom to the top, which improves the problem of gate-induced drain leakage current. The thickness of the second oxide layer 5 can also be further controlled by controlling the thickness of the oxygen barrier layer 4. The process is simple and the thickness of the second oxide layer 5 can be controlled more precisely.

[0050] The method for fabricating the semiconductor structure according to the embodiments of this disclosure will be described in detail below.

[0051] Step S200: Provide a semiconductor substrate 1 having trenches 2.

[0052] like Figure 2 As shown, the semiconductor substrate 1 in this embodiment can be made of silicon, silicon carbide, silicon nitride, silicon-on-insulator, silicon-on-insulator stacked, silicon-on-insulator stacked, silicon-on-insulator, silicon-on-insulator, or germanium-on-insulator, etc. The semiconductor substrate 1 can also be implanted with certain dopant particles to change its electrical parameters according to design requirements. For example, the semiconductor substrate 1 can be doped to form an N-type polycrystalline silicon substrate or a P-type polycrystalline silicon substrate; no special limitation is made here.

[0053] In some embodiments, shallow trench isolation (not shown) is formed on the semiconductor substrate 1, and an active region is provided between the shallow trench isolations. In embodiments of this disclosure, the trench 2 is located in at least one of the active region and the shallow trench isolation.

[0054] The formation process of trench 2 in semiconductor substrate 1 is as follows: A mask layer with a trench pattern is formed on the surface of semiconductor substrate 1, and the openings in the trench pattern correspond to the locations of trench 2. The semiconductor substrate 1 is etched using the trench pattern of the mask layer to form trench 2. The size of trench 2 can be set according to actual needs, and the size of trench 2 can be controlled by controlling the etching conditions; no special limitations are made here.

[0055] Step S400: A first oxide layer 3 of uniform thickness is formed on the inner wall of the trench 2.

[0056] like Figure 3 As shown, in some embodiments, an atomic layer deposition (ALD) process can be used to form a first oxide layer 3 of uniform thickness on the inner wall surface of the trench 2. Uniform thickness means that the first oxide layer 3 formed on the inner wall of the trench 2 has the same or approximately the same thickness. "Approximately the same" can be understood as meaning that the thickness of the first oxide layer 3 is not strictly uniform; different locations may have thickness differences within the allowable error range due to process conditions or operation.

[0057] In some embodiments, the reaction precursors used in the atomic layer deposition process are Si2Cl6 and C6H. 17 NSi and C8H 22 At least one of N2Si, and the reactant gas is O2. A first oxide layer 3 is formed by reacting O2 with the aforementioned precursor. Since the precursor contains silicon, the first oxide layer 3 comprises silicon oxide. When the semiconductor substrate 1 is a silicon substrate, the silicon oxide has better adhesion to the inner wall surface of the trench 2, improving the stability of the first oxide layer 3 and preventing peeling.

[0058] In some embodiments, the thickness of the first oxide layer 3 can be 35 to 60 angstroms. Specifically, in addition to the two extreme values ​​mentioned above, the thickness value can also be 40 angstroms, 45 angstroms, 50 angstroms, or 55 angstroms. The first oxide layer 3 with a certain thickness can be formed according to the specific circumstances, and no special limitation is made here.

[0059] Step S600: An oxygen barrier layer 4 is formed on the surface of the first oxide layer 3 located at the bottom of the trench 2.

[0060] like Figure 4As shown, in some embodiments, an oxygen barrier layer 4 can be formed on the surface of the first oxide layer 3 located at the bottom of the trench 2 using a deposition process. This deposition process can be physical vapor deposition (PVD) or chemical vapor deposition (CVD), and is not specifically limited here.

[0061] The oxygen barrier layer 4 may include at least one of silicon nitride and silicon oxynitride, or materials with the same properties as silicon nitride and silicon oxynitride. These will not be listed individually here, and can be selected according to the actual situation. The bottom of the trench 2 refers to the portion extending upwards (towards the opening of the trench 2) from the bottom end of the trench 2 along the inner walls on both sides of the trench 2. This distance is less than half the depth of the trench 2; for example, this distance can be one-fifth, one-quarter, or one-third of the depth of the trench 2, allowing for a smooth transition in the thickness of the subsequent second oxide layer 5 at the bottom and sidewalls of the trench. The oxygen barrier layer 4 can, to a certain extent, block oxygen from passing through the first oxide layer 3. In other words, the oxygen barrier layer 4 is formed to reduce the rate at which the subsequent in-situ water vapor generation process forms the second oxide layer 5, so that a relatively thin second oxide layer 5 can be formed on the inner wall of the trench 2 corresponding to the oxygen barrier layer 4.

[0062] The process of forming the oxygen barrier layer 4 is as follows: An oxygen barrier layer 4 is formed on the surface of the first oxide layer 3 using a deposition process; the oxygen barrier layer 4 located above the bottom of the trench 2 is then removed, for example, by an etching process. At this time, as... Figure 4 As shown, an oxygen barrier layer 4 is formed only at the bottom of trench 2.

[0063] Of course, in other embodiments, besides forming an oxygen barrier layer 4 at the bottom of the trench 2, such as Figure 9 As shown, an oxygen barrier layer 4 can also be formed on the entire inner wall of the trench 2. By adjusting the thickness or density of the oxygen barrier layer 4, the oxygen barrier layer 4 can have different blocking abilities against oxygen, thereby allowing the subsequently formed second oxide layer 5 to have different thicknesses.

[0064] The greater the density and thickness of the oxygen barrier layer 4, the stronger its ability to block oxygen; conversely, the smaller the density and thickness of the oxygen barrier layer, the weaker its ability to block oxygen. Therefore, by adjusting the density and thickness of the oxygen barrier layer 4, its ability to block oxygen can be changed, thereby affecting the thickness of the second oxide layer 5 for in-situ water vapor generation.

[0065] To improve GIDL, the thickness of the gate oxide layer located on the inner wall of the trench 2 can gradually increase along the direction from the bottom of the trench 2 towards the opening of the trench 2, that is, the thickness of the gate oxide layer is smaller closer to the bottom. Therefore, in the embodiments of this disclosure, whether the oxygen barrier layer 4 is formed only on the first oxide layer 3 located at the bottom of the trench 2 or on the entire first oxide layer 3, the oxygen barrier layer 4 can be configured to gradually weaken its ability to block oxygen elements along the direction from the bottom of the trench 2 towards the opening of the trench 2.

[0066] For ease of understanding and description of the technical solution, the direction from the bottom end of trench 2 to the opening of trench 2 can also be referred to as the bottom-up direction. Taking the semiconductor structure shown in the accompanying drawings of this disclosure as an example, the bottom of trench 2 can be defined as being located below its opening. The terms "up" and "down" are used merely for illustrative purposes and are not intended to be limiting.

[0067] In some embodiments, the density of the oxygen barrier gradually decreases along the direction from the bottom end of the trench 2 to the opening of the trench 2. In this case, the first embodiment allows the oxygen barrier layer 4 to have a uniform thickness, so only the density of the oxygen barrier layer 4 needs to be controlled during its formation. Of course, the second embodiment allows the oxygen barrier layer 4 to have different thicknesses. For example, the thickness of the oxygen barrier layer 4 gradually decreases along the direction from the bottom end of the trench 2 to the opening of the trench 2, meaning the change trend of the thickness and density of the oxygen barrier layer 4 is the same. This also allows the thickness of the second oxide layer 5 to gradually increase from the bottom end of the trench 2 to the opening. Compared to the first embodiment described above, the difference between the thickness of the second oxide layer 5 at the bottom end and the thickness at the top end is larger, making the change in the thickness of the second oxide layer 5 more obvious. In addition to the two embodiments described above, a third embodiment involves gradually increasing the thickness of the oxygen barrier layer 4 along the direction from the bottom of the trench 2 towards its opening. However, this requires adjusting the density of the oxygen barrier layer 4. Compared to the first and second embodiments, the density of the oxygen barrier layer 4 can be adjusted to decrease more significantly from the bottom to the top. In short, regardless of the embodiment, the ability of the oxygen barrier layer 4 to block oxygen elements must be weakened along the direction from the bottom of the trench 2 towards its opening. The specific embodiment to be adopted can be selected based on the actual situation. For example, if a significant change in the thickness of the second oxide layer 5 is required, the second embodiment can be used; otherwise, the first embodiment can be used. When thickness control is easier than density control in the process of forming the oxygen barrier layer 4, the third embodiment can also be used. Those skilled in the art can choose the most advantageous approach, and no special limitations are made here.

[0068] In some embodiments, the thickness of the oxygen barrier layer 4 gradually decreases along the direction from the bottom end of the trench 2 to the opening of the trench 2. In this case, the first embodiment allows the oxygen barrier layer 4 to have a uniform density, so only the thickness of the oxygen barrier layer 4 needs to be controlled during its formation. Of course, the second embodiment allows the oxygen barrier layer 4 to have different densities. For example, the density of the oxygen barrier layer 4 gradually decreases along the direction from the bottom end of the trench 2 to the opening of the trench 2, meaning that the density and thickness of the oxygen barrier layer 4 change in the same direction. This also allows the thickness of the second oxide layer 5 to gradually increase from the bottom end of the trench 2 to the opening. Compared to the first embodiment described above, the difference between the thickness of the second oxide layer 5 at the bottom end and the thickness at the top end is larger, making the change in the thickness of the second oxide layer 5 more pronounced. In addition to the two embodiments described above, a third embodiment involves gradually increasing the density of the oxygen barrier layer 4 along the direction from the bottom of the trench 2 towards its opening. However, this requires adjusting the thickness of the oxygen barrier layer 4. Compared to the first and second embodiments, the thickness of the oxygen barrier layer 4 can be adjusted to decrease more significantly from the bottom to the top. In short, regardless of the embodiment, the ability of the oxygen barrier layer 4 to block oxygen elements must be weakened along the direction from the bottom of the trench 2 towards its opening. The specific embodiment to be adopted can be selected based on the actual situation. For example, if a more significant change in the thickness of the second oxide layer 5 is required, the second embodiment can be used; otherwise, the first embodiment can be used. When density control is easier than thickness control in the process of forming the oxygen barrier layer 4, the third embodiment can also be used. Those skilled in the art can choose the most advantageous approach, and no special limitations are made here.

[0069] In some embodiments, when the oxygen barrier layer 4 is formed only at the bottom of the trench 2, the oxygen barrier layer 4 can also be configured to have the same ability to block oxygen, that is, the entire oxygen barrier layer 4 has the same thickness and density. Because no oxygen barrier layer 4 is formed on the sidewall of the trench 2 from the bottom upwards, during in-situ water vapor generation, oxygen can pass through only the first oxide layer 3. Compared to the portion with the oxygen barrier layer 4, the oxygen passes through at a faster rate, and the second oxide layer 5 formed has a greater thickness than the second oxide layer 5 formed at the bottom of the trench 2. Therefore, in this process, there is no need to adjust the thickness or density of the oxygen barrier layer 4, making the process simpler. Those skilled in the art can choose according to actual needs, and no special limitations are made here.

[0070] Step S800: A second oxide layer 5 is formed between the first oxide layer 3 and the inner wall of the trench 2 using an in-situ water vapor generation process.

[0071] like Figure 5 and Figure 10As shown, after the oxygen barrier layer 4 is formed, the second oxide layer 5 is formed between the first oxide layer 3 and the inner wall of the trench 2 using an in-situ water vapor process.

[0072] In-situ water vapor generation is a process for growing an oxide layer in a high-temperature water vapor atmosphere. It uses oxygen doped with a small amount of hydrogen as the reactant gas. At high temperatures, hydrogen and oxygen react to generate a large amount of gaseous atomic oxygen. This atomic oxygen can penetrate the first oxide layer 3 and the oxygen barrier layer 4 to react with the semiconductor substrate 1, forming the second oxide layer 5. Because atomic oxygen has a strong oxidizing effect, the second oxide layer 5 formed by the in-situ water vapor generation process has fewer internal defects. Furthermore, the second oxide layer 5 formed through reaction with the semiconductor substrate 1 has better interfacial contact with the substrate, making it more stable, less prone to peeling, and more dense, thus providing better insulation. By adjusting the oxygen barrier layer 4's ability to block oxygen, the speed at which atomic oxygen passes through the oxygen barrier layer 4 and the first oxide layer 3 can be controlled. Therefore, the thickness of the second oxide layer 5 can be adjusted using the in-situ water vapor generation process, further allowing for adjustments to the thickness of the gate oxide layer.

[0073] In some embodiments, the reactant gas in the in-situ water vapor generation process is a mixture of at least one of hydrogen and nitric oxide with oxygen. For example, the reactant gas can be a mixture of hydrogen and oxygen, a mixture of nitric oxide and oxygen, or a mixture of hydrogen, oxygen, and nitric oxide. By adjusting the content of hydrogen and nitric oxide, the reaction rate of the in-situ water vapor generation process can be further controlled, thereby more precisely controlling the thickness of the second oxide layer 5.

[0074] In some embodiments, the pressure used to form the second oxide layer 5 using the in-situ water vapor generation process is greater than or equal to 760 Torr. For example, the pressure can be constant, such as 700 Torr, 720 Torr, 750 Torr, 770 Torr, 780 Torr, or 800 Torr, or it can vary within the range of 700 Torr to 800 Torr. When the pressure is adjusted to the above values, even without forming an oxygen barrier layer 4, a second oxide layer 5 with a thickness that gradually increases from the bottom end to the opening direction can be formed on the inner wall of the trench 2. To make this thickness variation more obvious, in this embodiment, an oxygen barrier layer 4 is formed at the bottom of the first oxide layer 3 or on the entire first oxide layer 3. Adjusting the pressure in the in-situ water vapor generation process to be greater than or equal to 760 Torr allows for a faster formation of the second oxide layer 5 with a thickness that gradually increases from the bottom end to the opening direction.

[0075] In some embodiments, an oxygen barrier layer 4 is formed on the surface of the first oxide layer 3 located on the sidewall of the trench 2, in the direction from the bottom end of the trench 2 to the opening of the trench 2; that is, an oxygen barrier layer 4 is formed on the entire surface of the first oxide layer 3. In this case, the pressure for forming the second oxide layer 5 using the in-situ water vapor generation process is less than or equal to 300 Torr. For example, this pressure can be constant, such as 200 Torr, 230 Torr, 250 Torr, 280 Torr, 320 Torr, 350 Torr, 380 Torr, or 400 Torr, or it can vary within the range of 200 Torr to 400 Torr. When the pressure is adjusted to the above values, a second oxide layer 5 of uniform thickness can be formed on the inner wall of the trench 2 without the oxygen barrier layer 4. In this embodiment, by providing an oxygen barrier layer 4 on the first oxide layer 3, and controlling the ability of the oxygen barrier layer 4 to block oxygen elements to gradually decrease from the bottom end to the opening, the thickness of the second oxide layer 5 can be controlled to gradually increase in the direction from the bottom end to the opening of the trench 2. In addition, a low-pressure environment can prevent the generation of impurities and is more conducive to the formation of the second oxide layer 5.

[0076] In some embodiments, the thickness of the second oxide layer 5 is 0.01 to 15 angstroms. For example, in addition to the two extreme values ​​of the above range, its thickness can be 1 angstrom, 5 angstroms, 8 angstroms, 10 angstroms, 12 angstroms, or 14 angstroms, without any particular limitation. The thickness of the second oxide layer 5 is much smaller than that of the first oxide layer 3. During the in-situ water vapor generation process, it can prevent excessive reaction between oxygen atoms and the semiconductor substrate 1 (the sidewall of the trench 2), reduce the consumption of the semiconductor substrate 1, and ensure the integrity of the source 11 and drain 12 in the semiconductor substrate 1.

[0077] In some embodiments, by controlling the oxygen barrier layer 4's ability to block oxygen, and in conjunction with pressure control, a final structure can be formed as shown in the figure. Figure 5 and Figure 10 As shown in the figure, the second oxide layer 4 has the smallest thickness at the first position a (bottom of trench 2), the second oxide layer 5 at the second position b (middle of the trench sidewall) is thicker than the second oxide layer 5 at the first position a (at the trench opening), and the second oxide layer 5 at the third position c is thicker than the second oxide layer 5 at the second position b. In the direction from the bottom of trench 2 to the opening, the second position b is located between the first position a and the third position c. Therefore, a second oxide layer 5 with gradually increasing thickness is formed along the direction from the bottom of trench 2 to the opening.

[0078] In some embodiments, the semiconductor substrate 1 is selected as a silicon substrate, therefore the formed second oxide layer 5 includes silicon oxide. Of course, those skilled in the art can choose other substrate materials according to the actual situation, and no special limitation is made here. The first oxide layer 3 and the second oxide layer 5 together form the gate oxide layer.

[0079] Step S1000: Remove oxygen barrier layer 4.

[0080] like Figure 6 As shown, after the second oxide layer 5 is formed, the oxygen barrier layer 4 can be removed using an etching process. The etching process can be wet etching or dry etching. Wet etching can use concentrated sulfuric acid and hydrogen peroxide as etchants; the etching degree can be controlled by adjusting the concentration of the etchant. Dry etching can be plasma etching; the etching gas used in plasma etching can be chlorine gas. The etching degree can be controlled by controlling the amount of etching gas used to ensure complete removal of the oxygen barrier layer 4. Those skilled in the art can choose the etching process according to the actual situation; no special limitations are made here.

[0081] like Figure 7 As shown, the method for fabricating a semiconductor structure according to an embodiment of this disclosure may further include step S1200: after removing the oxygen barrier layer 4, a metal layer 6 is filled in the trench 2 having a first oxide layer 3 and a second oxide layer 5, wherein the height of the metal layer 6 is less than the height of the trench 2.

[0082] A metal layer 6 is filled into the trench 2 where the gate oxide layer is formed. This metal layer 6 can be deposited from the surface of the first oxide layer 3 located at the bottom of the trench 2 using a deposition process. The height of the metal layer 6 is less than the height of the trench 2. Alternatively, the height of the metal layer 6 can be the same as the height of the trench 2, i.e., the top surface of the metal layer 6 is flush with the top of the opening of the trench 2, and then the metal layer 6 is etched back to a certain height. This height is not specifically limited; those skilled in the art can set the height of the metal layer 6 according to actual needs.

[0083] In some embodiments, the metal layer 6 may include at least one of W, Ti, and TiN.

[0084] like Figure 8 As shown, the method for fabricating the semiconductor structure in this embodiment may further include step S1400: forming a metal insulating layer 7 on the metal layer 6, making the metal layer 6 a buried word line. The metal insulating layer 7 may be silicon nitride or silicon oxynitride. Then, the metal insulating layer 7 is polished flat by a chemical mechanical polishing (CMP) process, making the metal insulating layer 7 flush with the surface of the semiconductor substrate 1.

[0085] The method for fabricating the semiconductor structure according to embodiments of this disclosure may further include forming a source 11 and a drain 12 on both sides of the trench 2 using an ion implantation process. The methods for forming the source 11 and the drain 12 are well known to those skilled in the art and are not specifically limited herein.

[0086] In summary, the semiconductor structure fabrication method of this disclosure forms a barrier layer on the surface of the first oxide layer 3 at the bottom of the trench 2, and forms a second oxide layer 5 between the first oxide layer 3 and the inner wall of the trench 2. Since the barrier layer is located at the bottom of the trench 2, the second oxide layer 5 at the bottom of the trench 2 is thinner, and the thickness of the gate oxide layer gradually increases from the bottom to the top, which improves the problem of gate-induced drain leakage current. The thickness of the second oxide layer 5 can also be further controlled by controlling the thickness of the oxygen barrier layer 4. Moreover, the process is simple and the thickness of the second oxide layer 5 can be controlled more precisely.

[0087] According to another aspect of this disclosure, a semiconductor structure is provided, which is fabricated by the preparation method of any of the above embodiments.

[0088] The semiconductor structure includes a semiconductor substrate 1, a second oxide layer 5, and a first oxide layer 3. The semiconductor substrate 1 has a trench 2. The second oxide layer 5 is located on the inner wall of the trench 2, and the portion of the second oxide layer 5 at the bottom of the trench 2 is the thinnest. In some embodiments, the thickness of the second oxide layer 5 gradually increases along the direction from the bottom of the trench 2 towards the opening of the trench 2. The first oxide layer 3 is located on the side of the second oxide layer 5 away from the inner wall of the trench 2, and the first oxide layer 3 has a uniform thickness, i.e., the thickness of the first oxide layer 3 is the same at all locations. The steps for forming the various parts of this semiconductor structure are the same as those in the above embodiments and will not be repeated here.

[0089] In the semiconductor structure, the first oxide layer 3 and the second oxide layer 5 together form the gate oxide layer. Since the first oxide layer 3 has a uniform thickness, the portion of the second oxide layer 5 located at the bottom of the trench 2 is the thinnest, resulting in the thinnest portion of the gate oxide layer at the bottom of the trench 2, while the gate oxide layer on the sidewall above the bottom of the trench 2 has a thicker thickness. Of course, in some embodiments, when the second oxide layer 5 gradually increases in thickness along the direction from the bottom of the trench 2 towards the opening, the thickness variation of the gate oxide layer is the same. Therefore, gate oxide layers with different thicknesses are formed, improving the problem of gate-induced drain leakage current and enhancing the electrical performance of the semiconductor structure.

[0090] The semiconductor structure of this embodiment further includes a buried word line (metal layer 6) and a metal insulating layer 7, which are located in a trench 2 in which a gate oxide layer is formed. The height of the buried word line is less than the height of the trench 2. The metal insulating layer 7 is located in the trench 2 and on the buried word line. The top surface of the metal insulating layer 7 is flush with the top surface of the semiconductor substrate 1.

[0091] According to another aspect of this disclosure, a semiconductor memory device is provided, including the semiconductor structure in any of the above embodiments, and further including bit lines and capacitor structures, wherein the bit lines are electrically connected to the drain of the semiconductor structure through bit line contact plugs, and the capacitor structure is electrically connected to the source 11 through a memory node contact structure to realize the memory function. The specific connection relationship and position setting are well known in the art and will not be described in detail here.

[0092] The semiconductor memory device of this disclosure includes the semiconductor structure in the above embodiments, thus improving the problem of gate-induced drain leakage current and enhancing the electrical performance of the semiconductor memory device.

[0093] It should be understood that this disclosure is not limited to the detailed structure and arrangement of the components presented in this specification. This disclosure is capable of other embodiments and can be implemented and performed in various ways. The foregoing variations and modifications fall within the scope of this disclosure. It should be understood that this disclosure, as disclosed and defined in this specification, extends to all alternative combinations of two or more individual features mentioned or apparent in the text and / or drawings. All these different combinations constitute multiple alternative aspects of this disclosure. The embodiments described in this specification illustrate the best known mode for implementing this disclosure and will enable those skilled in the art to utilize this disclosure.

Claims

1. A method for fabricating a semiconductor structure, characterized in that, include: A semiconductor substrate is provided, the semiconductor substrate having trenches; A first oxide layer of uniform thickness is formed on the inner wall of the trench; An oxygen barrier layer is formed on the surface of the first oxide layer located at the bottom of the trench; A second oxide layer is formed between the first oxide layer and the inner wall of the trench using an in-situ water vapor generation process; Remove the oxygen barrier layer.

2. The method according to claim 1, characterized in that, The oxygen barrier layer's ability to block oxygen gradually weakens along the direction from the bottom of the trench towards the opening of the trench.

3. The method according to claim 2, characterized in that, The density of the oxygen barrier layer gradually decreases along the direction from the bottom of the trench to the opening of the trench.

4. The method according to claim 2, characterized in that, The thickness of the oxygen barrier layer gradually decreases along the direction from the bottom of the trench to the opening of the trench.

5. The method according to claim 2, characterized in that, The oxygen barrier layer includes at least one of silicon nitride and silicon oxynitride.

6. The method according to any one of claims 2 to 5, characterized in that, The pressure at which the second oxide layer is formed using the in-situ water vapor generation process is greater than or equal to 760 Torr.

7. The method according to any one of claims 2 to 5, characterized in that, An oxygen barrier layer is formed on the surface of the first oxide layer located on the sidewall of the trench, in a direction from the bottom end of the trench to the opening of the trench.

8. The method according to claim 7, characterized in that, The pressure at which the second oxide layer is formed using the in-situ water vapor generation process is less than or equal to 300 Torr.

9. The method according to claim 1, characterized in that, The first oxide layer is formed by atomic layer deposition.

10. The method according to claim 9, characterized in that, The atomic layer deposition process uses Si2Cl6 and C6H as reaction precursors. 17 NSi and C8H 22 At least one of N2Si, and the reacting gas is O2.

11. The method according to claim 1, characterized in that, The reaction gas in the in-situ water vapor generation process is a mixture of at least one of hydrogen and nitric oxide with oxygen.

12. The method according to claim 1, characterized in that, Both the first oxide layer and the second oxide layer comprise silicon oxide.

13. The method according to claim 1, characterized in that, The thickness of the first oxide layer is 35 to 60 angstroms, and the thickness of the second oxide layer at the bottom of the trench is 0.01 to 15 angstroms.

14. The method according to claim 1, characterized in that, After the oxygen barrier layer is removed, a metal layer is filled into the trench having the first oxide layer and the second oxide layer, the height of the metal layer being less than the height of the trench.

15. The method according to claim 1, characterized in that, The oxygen barrier layer is removed using a wet etching process.

16. A semiconductor structure, characterized in that, The semiconductor structure is prepared by any one of claims 1 to 15.

17. A semiconductor memory device, characterized in that, include: The semiconductor structure as described in claim 16.

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