System and method for motor drive using gan synchronous rectification

Abstract

The present disclosure relates to systems and methods for motor drive using GAN synchronous rectification. Systems and methods for GaN-based motor drive circuits using synchronous rectification are disclosed. In one aspect, a method of operating a motor drive circuit includes providing a half-bridge circuit including a high-side GaN switch and a low-side GaN switch coupled in series at an output node; providing a motor coupled to the output node; turning on the high-side GaN switch to cause a first current to flow through the motor; turning off the high-side GaN switch; turning on the low-side GaN switch when a voltage at the output node falls below a predetermined threshold voltage; sensing a magnitude of a second current flowing through the low-side GaN switch using a sensing device coupled to the low-side GaN switch; and turning off the low-side GaN switch when the magnitude of the second current falls below a predetermined threshold current.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to U.S. Provisional Patent Application Serial No. 63 / 323,442, filed March 24, 2022, entitled “System and Methods for Motor Drive Using Gan Synchronous Rectification,” which is incorporated herein by reference in its entirety for all purposes. Technical Field

[0003] The described implementation scheme relates generally to motor drive circuitry, and more specifically, this implementation scheme relates to systems and methods for motor drives using gallium nitride (GaN) synchronous rectification. Background Technology

[0004] Circuits can be used to control inductive loads, such as those constructed using power stages (e.g., coils of individual phases of a motor). Because many electrical devices are sensitive to the size and efficiency of power stages, new power stages can provide relatively higher efficiency and smaller size for electrical devices. Summary of the Invention

[0005] In some embodiments, a method of operating a motor drive circuit is disclosed. The method includes: providing a half-bridge circuit having: a high-side gallium nitride (GaN) switch having a first gate terminal, a first drain terminal, and a first source terminal; and a low-side GaN switch having a second gate terminal, a second drain terminal, and a second source terminal, wherein the first drain terminal is coupled to a power supply, the first source terminal is coupled to the second drain terminal at an output node, and the second source terminal is coupled to ground; providing a motor coupled to the output node; turning on the high-side GaN switch to allow a first current to flow through the motor; turning off the high-side GaN switch; turning on the low-side GaN switch when the voltage between the second drain terminal and the second source terminal drops below a predetermined threshold voltage; sensing the magnitude of a second current flowing through the low-side GaN switch using a sensing device coupled to the low-side GaN switch; and turning off the low-side GaN switch when the magnitude of the second current drops below the predetermined threshold current.

[0006] In some implementations, the low-side GaN switch is turned on within a predetermined time period after the control signal controlling the conduction state of the high-side GaN switch goes high.

[0007] In some embodiments, the method further includes turning off the low-side GaN switch before turning on the high-side GaN switch if a control signal controlling the conduction state of the high-side GaN switch goes high after the low-side GaN switch is turned on.

[0008] In some implementations, the predetermined threshold current is 10% of the rated current of the low-side GaN switch.

[0009] In some embodiments, the predetermined threshold voltage is a first predetermined threshold voltage, and the method further includes transmitting a release signal to the low-side GaN switch when the voltage between the second drain terminal and the second source terminal exceeds the second predetermined threshold voltage, and the release signal goes low before the low-side GaN switch is turned on.

[0010] In some implementations, the first predetermined threshold voltage is -1.0V and the second predetermined threshold voltage is 12.0V.

[0011] In some implementations, the half-bridge circuit is a first half-bridge circuit and the output node is a first output node, wherein the method of operating the motor drive circuit further includes providing a second half-bridge circuit having a second output node, wherein the motor is coupled between the first output node and the second output node.

[0012] In some embodiments, a circuit is disclosed. The circuit includes: a high-side gallium nitride (GaN) switch having a first gate terminal, a first drain terminal, and a first source terminal; a low-side GaN switch having a second gate terminal, a second drain terminal, and a second source terminal, wherein the first drain terminal is coupled to a power supply, the first source terminal is coupled to the second drain terminal at an output node, and the second source terminal is coupled to ground; a driving circuit coupled to the high-side GaN switch and the low-side GaN switch; and a sensing device. A backup circuit is connected to the low-side GaN switch and arranged to sense the magnitude of the current flowing through the low-side GaN switch; wherein the drive circuit is arranged to: turn on the high-side GaN switch when a control signal controlling the conduction state of the high-side GaN switch goes high; turn off the high-side GaN switch when the control signal goes low; turn on the low-side GaN switch when the voltage between the second drain terminal and the second source terminal drops below a predetermined threshold voltage; and turn off the low-side GaN switch when the magnitude of the current drops below a predetermined threshold current.

[0013] In some implementations, the drive circuit is also arranged to turn on the low-side GaN switch for a predetermined period of time after the control signal goes high.

[0014] In some implementations, the drive circuit is also arranged to turn off the low-side GaN switch before turning on the high-side GaN switch if the control signal goes high after the low-side GaN switch is turned on.

[0015] In some implementations, the predetermined threshold current is 10% of the rated current of the low-side GaN switch.

[0016] In some embodiments, the predetermined threshold voltage is a first predetermined threshold voltage, and the drive circuit is further arranged to transmit a release signal to the low-side GaN switch when the voltage between the second drain terminal and the second source terminal exceeds the second predetermined threshold voltage, and to set the release signal to a low state before the low-side GaN switch is turned on.

[0017] In some implementations, the first predetermined threshold voltage is -1.0V, and the second predetermined threshold voltage is 12.0V.

[0018] In some implementations, the drive circuit is formed in silicon.

[0019] In some embodiments, a method of operating a motor drive circuit is disclosed. The method includes: providing a half-bridge circuit including: a high-side gallium nitride (GaN) switch having a first gate terminal, a first drain terminal, and a first source terminal; and a low-side GaN switch having a second gate terminal, a second drain terminal, and a second source terminal, wherein the first drain terminal is coupled to a power supply, the first source terminal is coupled to the second drain terminal at an output node, and the second source terminal is coupled to ground; providing a motor coupled to the output node; turning on the high-side GaN switch to allow a first current to flow through the motor; turning off the high-side GaN switch; turning on the low-side GaN switch when the voltage between the second drain terminal and the second source terminal drops below a predetermined threshold voltage; and turning off the low-side GaN switch when the voltage between the second drain terminal and the second source terminal exceeds the predetermined threshold voltage.

[0020] In some implementations, the low-side GaN switch is turned on within a predetermined time period after the control signal controlling the conduction state of the high-side GaN switch goes high.

[0021] In some embodiments, the method further includes providing a drive circuit coupled to the high-side GaN switch and the low-side GaN switch.

[0022] In some implementations, the drive circuit includes a comparator arranged to detect the voltage between the second drain terminal and the second source terminal. Attached Figure Description

[0023] Figure 1 A schematic diagram of a GaN half-bridge motor drive circuit according to one embodiment of the present disclosure is shown; Figure 2 An embodiment of the present disclosure is shown. Figure 1 Current flow in the GaN half-bridge motor drive circuit; Figure 3 This illustrates the pass / fail operation when the high-side GaN switch is in the off state after the motor inductor is magnetized. Figure 1 Current flow in the GaN half-bridge motor drive circuit; Figure 4 Steps associated with a method for autonomously controlling a low-side GaN switch in a half-bridge circuit, according to certain embodiments, are shown. Figure 5A A schematic diagram of an autonomous turn-on circuit for turning on the low-side GaN switch in a half-bridge circuit according to one embodiment of the present disclosure is shown. Figure 5B A schematic diagram of a pulse generator circuit for an autonomous turn-on circuit according to one embodiment of the present disclosure is shown; Figure 6 It is shown according to certain implementation schemes Figure 5A and Figure 5B Various signals at different nodes of the circuit; and Figure 7A A schematic diagram of a GaN half-bridge motor drive circuit according to one embodiment of the present disclosure is shown. Figure 7B A schematic diagram of a composite switch along with a zero-current detection circuit according to one embodiment of the present disclosure is shown. Detailed Implementation

[0024] The circuits, devices, and related technologies disclosed herein generally relate to motor drive circuits using gallium nitride (GaN) switches. More specifically, this disclosure relates to systems and methods for motor drive circuits using synchronous rectification in GaN half-bridge circuits. The GaN half-bridge circuit may include a high-side switch and a low-side switch. In some embodiments, the low-side switch can autonomously control its on and off states when the high-side switch is turned off, causing the low-side switch to enter its third-quadrant operating mode. The low-side switch can detect when it enters the third-quadrant operating mode and turn itself on, and it can also detect when the third-quadrant operating mode ends and turn itself off. The third-quadrant operating mode is the current flowing from the source terminal to the drain terminal of the GaN switch. Embodiments of this disclosure can significantly increase the operating efficiency of GaN motor drive circuits by causing the low-side switch to turn on during the third-quadrant operating mode and to quickly turn itself off at the end of the third-quadrant operating mode. Specifically, embodiments of this disclosure may be advantageous when the GaN switch lacks a body diode, or when the GaN switch may have a body diode with a relatively high operating voltage, which can result in relatively high power losses in the body diode during third-quadrant operation. During third-quadrant operation, the relatively high power losses in the body diode can lead to reduced operating efficiency of the motor drive circuitry. In some embodiments, the control circuitry may transmit a relatively short pulse to the low-side switch, thereby indicating that the low-side switch can be turned off after initiating autonomous turn-on.

[0025] In some embodiments, the GaN half-bridge circuit can be driven by a drive circuit formed within the same GaN die that includes the switch of the GaN half-bridge circuit. The drive circuit may also include a high-voltage GaN-based voltage sensing transistor. By forming the drive circuit and the high-voltage sensing transistor within a monolithic GaN die, the drive circuit and the half-bridge GaN circuit can be tightly coupled to avoid transmitting control, sensing, and drive signals to a separate integrated circuit (IC). Transmitting control, sensing, and drive signals (especially high-voltage and / or high-speed signals) through electronic packaging and across a circuit board can introduce unwanted ringing and oscillations, as well as potential signal corruption, leading to malfunctions in the motor drive circuit. In various embodiments, the disclosed autonomous turn-on and turn-off techniques can be used to control the conduction state of individual switches. Individual switches can be arranged to generate signals that provide their terminal voltages and / or current flowing through the switches.

[0026] In various embodiments, the motor drive circuit prevents unnecessary switching of the low-side GaN switch. Unnecessary switching of the low-side GaN switch can occur due to relatively large voltage oscillations at the switching nodes of the half-bridge in the motor drive circuit. These relatively large voltage oscillations at the switching nodes can frequently occur in motor drives due to the relatively large inductance of the motor. Various embodiments are illustrated in figures showing the GaN half-bridge circuit, control, and drive circuitry. Various inventive embodiments, including methods, processes, systems, devices, etc., are described herein.

[0027] Several exemplary embodiments will now be described with respect to the accompanying drawings, which form a part thereof. The following description provides embodiments only and is not intended to limit the scope, applicability, or configuration of this disclosure. Rather, the subsequent description of the embodiments will provide those skilled in the art with an enabling description for implementing one or more embodiments. It should be understood that various changes may be made in terms of the function and arrangement of elements without departing from the spirit and scope of this disclosure. In the following description, specific details are set forth for illustrative purposes to provide a thorough understanding of certain inventive embodiments. However, it will be apparent, however, that various embodiments may be practiced without these specific details. The drawings and description are not intended to be limiting. The words “example” or “exemplary” are used herein to mean “serves as an example, instance, or illustration.” Any embodiment or design described herein as “exemplary” or “example” is not necessarily to be construed as preferred or advantageous over other embodiments or designs.

[0028] Figure 1 A schematic diagram of a GaN half-bridge motor drive circuit 100 according to one embodiment of the present disclosure is shown. The GaN half-bridge motor drive circuit 100 may include a first GaN half-bridge circuit having a high-side GaN switch 102 connected in series at a first switching node 110 to a low-side GaN switch 104. The low-side GaN switch 104 may include a drain terminal 134, a source terminal 132, and a gate terminal 158. The GaN half-bridge motor drive circuit 100 may also include a second GaN half-bridge circuit having a high-side GaN switch 106 connected in series at a second switching node 112 to a second half-bridge low-side GaN switch 108. The low-side GaN switch 108 may include a drain terminal 135, a source terminal 133, and a gate terminal 159. In various embodiments, the GaN half-bridge motor drive circuit 100 may include a third half-bridge circuit having a high-side GaN switch and a low-side GaN switch.

[0029] The first GaN half-bridge circuit and the second GaN half-bridge circuit are connected between Vdd terminal 122 and ground node 124. Motor 118 can be connected between first switching node 110 and second switching node 112. The GaN half-bridge motor drive circuit 100 may further include a first drive circuit 114 coupled to the first GaN half-bridge circuit and a second drive circuit 116 coupled to the second GaN half-bridge circuit. The first drive circuit 114 may be coupled to drain terminal 134 at node 184. The second drive circuit 116 may be coupled to drain terminal 135 at node 188. The first drive circuit 114 and the second drive circuit 116 may be coupled to control circuit 120, respectively. Control circuit 120 may be arranged to send control signals to the first drive circuit 114 and the second drive circuit 116. Control circuit 120 may be further arranged to receive sensing signals from the first drive circuit 114 and the second drive circuit 116.

[0030] Figure 2 The diagram illustrates the current flow through a GaN half-bridge motor drive circuit 100 according to one embodiment of the present disclosure. Figure 2 Similar to Figure 1 The difference lies in Figure 2 In this circuit, motor 118 has been replaced by an equivalent motor inductor 218. Control circuit 120 can be arranged to generate control signals to control the conduction states of the GaN switches in the first and second half-bridge circuits. The INH1 signal can be a control signal for controlling the conduction state of the high-side GaN switch 102. The INH2 signal can be a control signal for controlling the conduction state of the high-side GaN switch 106. The INL1 signal can be a control signal for controlling the conduction state of the low-side GaN switch 104. The INL2 signal can be a control signal for controlling the conduction state of the low-side GaN switch 108. During a first time period when INH1 and INL2 are high, current 202 can flow from the high-side GaN switch 102 to the motor inductor 218, and then to the low-side GaN switch 108 of the second half-bridge. When the INH signal goes low, the high-side GaN switch 102 can be turned off.

[0031] Figure 3The diagram illustrates the current flow when the high-side GaN switch 102 is in the off state after the motor inductor 218 is magnetized. The signal INH goes low, thus turning off the high-side GaN switch 102. The low-side GaN switch 104 can be turned on so that a freewheeling current 302 can flow through it. In this operating mode, current 302 can flow from the source terminal 132 to the drain terminal 134 of the low-side GaN switch 104. This is when the low-side GaN switch 104 can operate in its third quadrant operating mode, i.e., the voltage at the source terminal 132 can be at a higher voltage than the voltage at the drain terminal 134. The GaN switch may not have a body diode, or its body diode may have a relatively high on-resistance during turn-on.

[0032] To prevent high conduction losses in the third quadrant operating mode, the low-side GaN switch 104 can be turned on to allow current 302 to flow from its source terminal 132 to its drain terminal 134. In some embodiments, the low-side GaN switch 104 may have bidirectional characteristics to allow current to flow from its source terminal to its drain terminal. By turning on the low-side GaN switch 104 during its third quadrant operating mode, the operating efficiency of the GaN half-bridge motor drive circuit 100 can be increased by avoiding losses associated with the body diode of the low-side GaN switch 104. Embodiments of this disclosure achieve precise on and off of the low-side GaN switch 104, thereby improving the efficiency of the motor drive circuit. In some embodiments, the low-side GaN switch 104 can be turned on automatically when current flows from the source terminal 142 to the drain terminal 144 in the high-side GaN switch 102.

[0033] Figure 4 The steps associated with a method 400 for autonomously controlling a low-side GaN switch in a half-bridge circuit according to certain embodiments are shown. In step 410, the high-side control signal (INH) goes low. In step 420, the drain terminal voltage of the low-side GaN switch 104 is sensed to detect when the low-side GaN switch 104 enters its third-quadrant operating mode. In step 430, when the low-side GaN switch 104 enters its third-quadrant operating mode, the low-side GaN switch 104 autonomously turns on for a fixed period of time after INH goes low. In step 440, the low-side GaN switch 104 is turned off if INH comes in to turn on the high-side GaN switch 102, i.e., continuous conduction mode (CCM operation), then the low-side GaN switch 104 is turned off first, and then the high-side GaN switch 102 can be turned on. In step 450, the low-side GaN switch 104 may autonomously turn off when it detects that it is no longer operating in the third-quadrant operating mode. It should be understood that method 400 is exemplary and variations and modifications are possible. Steps described as sequential can be executed in parallel, the order of steps can be changed, and steps can be modified, combined, added, or omitted.

[0034] Figure 5A A schematic diagram of an autonomous turn-on circuit 500 for turning on a low-side GaN switch 104 according to one embodiment of the present disclosure is shown. In some embodiments, the autonomous turn-on circuit 500 may be included as part of a first drive circuit 114 and a second drive circuit 116. The circuit 500 may include an input node 502 coupled to an inverter 504 having an output node 506. The output of the inverter 504 may be connected to an input of a first pulse generator circuit 508. The output node 510 of the first pulse generator circuit 508 may be connected to an inverter 526 having an output node 528.

[0035] Circuit 500 may also include a third quadrant voltage detector circuit 512. The third quadrant voltage detector circuit 512 may include a sensing transistor 514. In various embodiments, the sensing transistor 514 may be GaN-based. In some embodiments, the sensing transistor 514 may have a relatively high operating voltage, such as 650V. The gate 556 of the sensing transistor 514 may be connected to the intermediate node of a resistive voltage divider formed by resistors 516 and 520. The drain 554 of the sensing transistor 514 may be coupled to the drain terminal 134 of the low-side GaN switch 104. The source 558 of the sensing transistor 514 may be connected to the Vdd node 560 via resistor 518. The low-side node of circuit 500 may be connected to node 561. In some embodiments, node 561 may be connected to a switching node (such as the first switching node 110). In other embodiments, node 561 may be connected to a ground node 124.

[0036] The output of the third quadrant voltage detector circuit 512 can be connected to an inverter 522 with output node 524. Output node 524 can be connected to an inverter 530 with output node 532. Output node 524 can also be connected to the second pulse generator circuit 534. Output node 536 of the second pulse generator circuit 534 can be connected to an inverter 538 with output node 540. Output node 540 can be connected to the input node of the third pulse generator circuit 542. Output node 544 of the third pulse generator circuit 542 can be connected to the reset input of the SR latch 550. Output nodes 528 of inverter 526 and 532 of inverter 530 can be connected to the input of a NOR gate 546 with output node 548. Output node 548 can be connected to the setting input of the SR latch 550. Output node 552 of the SR latch can be coupled to the gate of the low-side GaN switch 104. In some implementations, the output node 552 of the SR latch can be coupled to the gate of the low-side GaN switch 104 via a gate driver circuit.

[0037] Figure 5BA schematic diagram of a pulse generator circuit 590 according to one embodiment of the present disclosure is shown. The pulse generator circuit 590 can be used in circuit 500. The pulse generator circuit 590 may include an input node 572, an output node 576, and a low-side node 578. In some embodiments, the low-side node 578 may be connected to a switching node (such as a first switching node 110). In various embodiments, the low-side node 578 may be connected to ground. The pulse generator circuit 590 may also include a capacitor 574 and a resistor 570. The capacitance value C of the capacitor 574 and the resistance value R of the resistor 570 can set a time constant of the pulse generator circuit 590 that is proportional to the value of RC.

[0038] The operation of circuit 500 will now be described, with reference to... Figure 1 , Figure 2 , Figure 3 , Figure 5A , Figure 5B and Figure 6 When the drain-source (VDS) voltage of the low-side GaN switch 104 is high, for example, 12.5V, it indicates that the low-side GaN switch 104 is off. When VDS is high, the first drive circuit 114 can generate a high-state release signal, indicating that the drive circuit can operate in synchronous rectification mode. When VDS drops below a predefined threshold (e.g., -1 volt), the autonomous turn-on circuit 500 can automatically activate itself without using any signal from the control circuit 120 and send a high signal to the gate terminal 158 of the low-side GaN switch 104. In some embodiments, a minimum on-time (MOT blanking signal), such as 80 ns, can be used to reject any ringing / noise. In various embodiments, a zero-current detection (ZCD) comparator can be used to send a turn-off signal to the low-side GaN switch 104. During the period when the MOT blanking signal is low, the signal indicating that the low-side GaN switch 104 is off at the gate terminal 158 can be ignored. Once the low-side GaN switch 104 is turned on, the release signal can go low. This indicates that the low-side GaN switch 104 is on and in operating mode.

[0039] When a third-quadrant voltage is detected on the drain of the low-side GaN switch 104 within a fixed duration after the high-side signal INH goes low, the circuit 500 can automatically turn on the low-side GaN switch 104. The high-side signal INH can be received at the input node 502. Figure 6Various signals at different nodes of circuit 500 and pulse generator circuit 590 are shown. When the high-side signal INH transitions from high to low as shown in Figure 602, it turns off the high-side GaN switch 102. The output signal at output node 506 is shown in Figure 604, where the signal transitions from low to high. The signal at output node 506 is received by the first pulse generator circuit 508 and generates the output signal at node 510 as shown in Figure 606. Figure 5A As shown, the resistance value R and capacitance value C in the first pulse generator circuit 508 can be set to a fixed duration. As shown in Figure 606, a pulse is generated that decays with a time constant proportional to the value of RC.

[0040] The pulse signal at node 510 is received by inverter 526 and, as shown in Figure 608, generates the output signal at node 528. When the signal in Figure 606 exceeds the first threshold voltage value V... T1 When the inverter 526 is triggered, it generates an output signal at node 528 that is the inverted signal of its input, i.e., a low signal. When the signal in Figure 606 drops below the first threshold voltage value V... T1 At this time, inverter 526 is triggered and generates an output signal as an inverted signal at node 528, i.e., a high signal is generated. Therefore, the signal (C) at node 528 is a pulse signal with a fixed duration.

[0041] The third quadrant voltage detector circuit 512 can be coupled to the drain of the low-side GaN switch 104. When the high-side GaN switch 102 is off, current 302 can flow through the second half-bridge low-side GaN switch 108. Current 302 can also flow through the body of the low-side GaN switch 104, resulting in a relatively large voltage drop from the source terminal 132 to the drain terminal 134. The drain 554 of the sensing transistor 514 is connected to the drain 134 of the low-side GaN switch 104. Therefore, if the voltage at the drain 554 drops below the gate voltage of the sensing transistor 514 minus its threshold voltage (Vth), as shown in FIG610, the source 558 of the sensing transistor 514 is pulled down. The gate voltage at the gate 556 of the sensing transistor 514 can be biased by the resistor divider ratio of resistors 516 and 520. When the voltage at the source 558 goes low, the output signal at the output node 524 goes high, as shown in FIG612. Therefore, the signal at node 532 becomes low, as shown in Figure 614, because the signal at node 532 is the inverted version of the signal at output node 524.

[0042] NOR gate 546 can receive signals at nodes 528 and 532, where NOR gate 546 generates a pulse at node 548, as shown in Figure 616. The signal at node 548 is received by the setting input of latch 550, which generates an output signal at node 552, as shown in Figure 618. The signal at node 552 can be used to turn on the gate of the low-side GaN switch 104. The signal at output node 524 can be received by the second pulse generator circuit 534, where the second pulse generator circuit 534 can generate a signal at output node 536, as shown in Figure 620. Similar to the above description of the operation relative to the first pulse generator circuit 508 and inverter 526, a fixed-duration pulse 622 is generated at node 540. The signal at node 540 is received by the third pulse generator circuit 542, where the third pulse generator circuit 542 generates an output signal 624 at node 544. In some implementations, the durations of the second pulse generator circuit 534 and the third pulse generator circuit 542 can be set based on the motor drive system specifications. The signal at node 544 can be received by the reset input of latch 550 and used to reset latch 550. Therefore, the gate signal on the gate of the low-side GaN switch 104 goes low.

[0043] In various implementations, according to certain implementations, the low-side GaN switch 104 can be turned off by using zero-current detection (ZCD) technology. Figure 7A A schematic diagram of a GaN half-bridge motor drive circuit 700 according to one embodiment of the present disclosure is shown. The GaN half-bridge motor drive circuit 700 is similar to the GaN half-bridge motor drive circuit 100, except that switches 102, 104, 106, and 108 are replaced by composite switches 702 (S1), 704 (S2), 706 (S3), and 708 (S4), respectively. Each of the composite switches S1, S2, S3, and S4 may include a GaN power switch coupled to a sensing device and a zero-current detection (ZCD) circuit. In some embodiments, the ZCD circuit may be integrated on the same GaN-based die as the GaN power switch. In various embodiments, the ZCD circuit may be integrated into a first drive circuit 114 and a second drive circuit 116. The ZCD circuit can detect when the current through the GaN power switch reaches zero or substantially zero, and in response, can turn off the GaN power switch. In some embodiments, the ZCD circuit may be formed in a separate silicon-based die.

[0044] Figure 7B A schematic diagram of a composite switch 720 together with a ZCD circuit 710 according to one embodiment of the present disclosure is shown. Figure 7BAs shown, each of the composite switches S1, S2, S3, and S4 may include a composite switch 720. Composite switch 720 may include a GaN power switch 750 having a drain terminal 752, a gate terminal 756, and a source terminal 754. Composite switch 720 may also include a sensing switch 760 coupled in parallel with the GaN power switch 750. Sensing switch 760 may have a drain terminal 762, a gate terminal 764, and a source terminal 766. Sensing switch 760 may be arranged to detect the magnitude and polarity of the current flowing from drain terminal 752 to source terminal 754. Sensing switch 760 may also be arranged to transmit a first signal, the first signal including at least one of the magnitude and polarity of the current flowing through GaN power switch 750. In some embodiments, composite switch 720 may be GaN-based.

[0045] ZCD circuit 710 may be coupled to composite switch 720. ZCD circuit 710 may be arranged to receive a first signal from composite switch 720. ZCD circuit may include a first driver circuit coupled to gate terminal 756. The first driver circuit may be arranged to transmit a control signal to gate terminal 756 based on the signal from composite switch 720. ZCD circuit may turn off composite switch S2 when the magnitude of the current flowing through source terminal 754 to drain terminal 752 drops below a predefined threshold (e.g., 10% of the rated current of GaN power switch 750). As will be understood by those skilled in the art who benefit from this disclosure, the predefined threshold may be set to any suitable value. In some embodiments, ZCD circuit 710 may be formed in a silicon die and composite switch 720 may be formed in a GaN die and both dies may be integrated in a single semiconductor package. In various embodiments, ZCD circuit 710 may be formed as part of driver circuits 114 and / or 116. In some implementations, both the ZCD circuit 710 and the composite switch 720 can be formed in a GaN-based die.

[0046] In some embodiments, the GaN power switch 750 may be rated from 0.1A to 15A. In various embodiments, the GaN power switch 750 may be rated from 5A to 12A, while in other embodiments, the GaN power switch 750 may be rated from 7A to 9A. As will be understood by those skilled in the art who benefit from this disclosure, the rated current of the GaN power switch 750 may be set to any suitable value. After the current through S2 becomes substantially zero and when the VDS of the GaN power switch 750 goes high, the release signal may go high again. When the release signal is low, it prevents unnecessary switching of the GaN power switch 750, which may occur due to ringing at the first switching node 110. In some embodiments, the voltage at the drain terminal 752 may be monitored and the GaN power switch 750 may be turned off when the voltage at the drain terminal drops below a predetermined threshold.

[0047] In some implementations, the method of turning off the low-side GaN switch 104 can be performed by including an internal fixed duration after the INH signal goes high. In various implementations, the internal fixed duration can be implemented within the driver circuitry. In some implementations, the low-side GaN switch 104 can be turned off via an external fixed duration using an additional pin in the driver circuitry integrated circuit (IC). The control circuitry 120 can control the fixed duration based on the expected third-quadrant operating mode of the low-side GaN switch 104.

[0048] In some embodiments, the low-side GaN switch 104 can be turned off without using an additional pin by sending a relatively short external pulse (e.g., 20 ns) to the low-side control signal (INL) pin. The short-duration pulse indicates that the low-side GaN switch 104 can be turned off after its autonomous turn-on has begun. The low-side GaN switch 104 can be turned on when the drain-source (VDS) voltage of the low-side GaN switch 104 becomes negative. A timer can then be started. The timer period can be of any suitable length, for example, one hundred nanoseconds. In some embodiments, it can be microseconds. After the timer expires, the low-side GaN switch 104 can be turned off. In various embodiments, the low-side GaN switch 104 can be turned off without using an additional pin by sending a relatively short external pulse (e.g., 20 ns) to the high-side control signal (INH) pin. The relatively short-duration external pulse can be encoded to indicate that when the gate of the low-side GaN switch 104 is turned on, and when it receives the relatively short-duration pulse, the low-side GaN switch 104 will be turned off.

[0049] In some implementations, when the motor drive circuit is in continuous current mode (CCM) operation, the low-side GaN switch 104 can be turned off before the control circuit 120 turns on the high-side GaN switch 102. In this implementation, when the low-side GaN switch 104 is in its third quadrant operating mode, and when the control circuit 120 sends an INH high signal to the high-side GaN switch 102, the low-side logic circuit can intercept the INH signal of the high-side GaN switch 102, check whether the low-side GaN switch 104 is turned on, and if the low-side GaN switch 104 is turned on, turn it off before sending an INH high signal to the high-side GaN switch 102. If the low-side GaN switch 104 is not turned on, the low-side logic directly sends an INH high signal to the high-side GaN switch 102.

[0050] In various implementations, a method similar to that described above can be used to turn off the high-side GaN switch 102 when INL goes high. When the high-side GaN switch 102 is in its third quadrant operating mode, and when the control circuit 120 sends an INL high signal to the low-side GaN switch 104, the low-side logic circuit can intercept the INH signal of the high-side GaN switch 102, check whether the low-side GaN switch 104 is on, and if the low-side GaN switch 104 is on, turn it off before sending an INH high signal to the high-side GaN switch 102. If the low-side GaN switch 104 is not on, the low-side logic directly sends an INH high signal to the high-side GaN switch 102.

[0051] In some implementations, when control circuit 120 sends an INL high signal, the low-side logic can first send a turn-off signal to the high-side GaN switch. This is independent of whether the high-side GaN switch is on or off. Subsequently, the low-side logic can send an turn-on signal to the high-side GaN switch after a predetermined time period. This prevents the high-side and low-side GaN switches from being turned on simultaneously.

[0052] In various embodiments, the disclosed motor drive circuit can be monolithically integrated onto a single die. In some embodiments, the disclosed motor drive circuit may include a first half-bridge circuit, a second half-bridge circuit, and a third half-bridge circuit. In various embodiments, the first half-bridge circuit, the second half-bridge circuit, and the third half-bridge circuit can be formed within independent, separate dies. In some embodiments, the first half-bridge circuit, the second half-bridge circuit, and the third half-bridge circuit, along with the drive circuit and any combination thereof, can be formed in groups on independent dies; for example, the first half-bridge circuit, the second half-bridge circuit, and the third half-bridge circuit can be formed on a single die, and the drive circuit can be formed on an independent die, or the first half-bridge circuit, the second half-bridge circuit, and the third half-bridge circuit can be formed on the same die as the drive circuit. In various embodiments, the first half-bridge circuit, the second half-bridge circuit, and the third half-bridge circuit, along with the drive circuit, can be formed on the same GaN die. In some embodiments, the first half-bridge circuit, the second half-bridge circuit, and the third half-bridge circuit, along with the drive circuit, can be formed on the same die as the controller.

[0053] In some embodiments, the described switch may be formed of silicon or any other semiconductor material. In various embodiments, the described switch may be a metal-oxide-semiconductor field-effect transistor (MOSFET). In some embodiments, the disclosed MOSFET may be formed entirely on a single die well.

[0054] In various embodiments, the first, second, and third half-bridge circuits, the drive circuitry, and the logic and control circuitry can all be integrated into a single electronic package, such as, but not limited to, a quad flat no-lead (QFN) package, a dual flat no-lead (DFN) package, or a ball grid array (BGA) package. In some embodiments, the first, second, and third half-bridge circuits can be packaged separately into an electronic package. In various embodiments, the controller circuitry and / or control logic circuitry can be integrated together with the disclosed motor drive circuitry into a single die.

[0055] In some embodiments, combinations of the circuits and methods disclosed herein can be used to improve the efficiency of motor drive circuits. Although circuits and methods with respect to several specific configurations of motor drive circuits are described and illustrated herein, embodiments of this disclosure are applicable to other power converter circuits, such as, but not limited to, buck converters.

[0056] In the foregoing description, numerous specific details have been described with reference to embodiments of this disclosure, which may vary depending on the specific implementation. Therefore, the description and drawings should be considered illustrative rather than restrictive. The unique and exclusive indication of the scope of this disclosure, and what the applicant wishes to define as the scope of this disclosure, is the literal and equivalent scope of the claims published in this application, taking the specific form published by those claims, including any subsequent amendments. Specific details of particular embodiments may be combined in any suitable manner without departing from the spirit and scope of embodiments of this disclosure.

[0057] Furthermore, spatially relative terms such as “bottom” or “top” may be used to describe the relationship of one element and / or feature to another element and / or feature, as illustrated in the figure. It should be understood that spatially relative terms are intended to cover different orientations of the device in use and / or operation other than the orientation depicted in the figure. For example, if the device in the figure is flipped, the element described as the “bottom” surface may then be oriented “above” other elements or features. The device may be oriented in other ways (e.g., rotated 90 degrees or otherwise) and may be interpreted accordingly by the spatially relative descriptors used herein.

[0058] As used herein, the terms “and,” “or,” and “and / or” can have a variety of meanings, which are also expected to depend at least in part on the context in which these terms are used. Generally, “or,” when used in a list of associations (such as A, B, or C), is intended to mean A, B, and C (used herein in an inclusive sense) and A, B, or C (used herein in an exclusive sense). Furthermore, as used herein, the term “one or more” can be used to describe any feature, structure, or characteristic in the singular or a combination thereof that can be used to describe a feature, structure, or characteristic. However, it should be noted that this is merely an illustrative example and the claimed subject matter is not limited to this example. Additionally, the term “at least one,” when used in a list of associations (such as A, B, or C), can be interpreted to mean any combination of A, B, and / or C, such as A, B, C, AB, AC, BC, AA, AAB, ABC, AABBCCC, etc.

[0059] Throughout this specification, references to “an example,” “example,” “some examples,” or “exemplary embodiment” mean that a particular feature, structure, or characteristic described in conjunction with a feature and / or example may be included in at least one feature and / or example of the claimed subject matter. Therefore, the phrases “in an example,” “example,” “in some examples,” “in some embodiments,” or other similar phrases appearing throughout this specification do not necessarily refer to the same feature, example, and / or limitation. Furthermore, a particular feature, structure, or characteristic may be combined into one or more examples and / or features.

[0060] In the foregoing detailed description, numerous specific details have been set forth to provide a thorough understanding of the claimed subject matter. However, those skilled in the art will understand that the claimed subject matter can be practiced without these specific details. In other instances, methods and apparatus known to those of ordinary skill in the art have not been described in detail to avoid obscuring the claimed subject matter. Therefore, the claimed subject matter is not limited to the specific examples disclosed, but rather includes all aspects falling within the scope of the appended claims and their equivalents.

Claims

1. A method for operating a motor drive circuit, the method comprising: A half-bridge circuit is provided, the half-bridge circuit comprising: A high-side gallium nitride (GaN) switch, the high-side GaN switch having a first gate terminal, a first drain terminal, and a first source terminal; and A low-side GaN switch having a second gate terminal, a second drain terminal, and a second source terminal, wherein the first drain terminal is coupled to a power supply, the first source terminal is coupled to the second drain terminal at an output node, and the second source terminal is coupled to ground. Provide a motor coupled to the output node; Turn on the high-side GaN switch to allow a first current to flow through the motor; Turn off the high-side GaN switch; When the voltage between the second drain terminal and the second source terminal drops below a predetermined threshold voltage, the low-side GaN switch is turned on. The magnitude of a second current flowing through the low-side GaN switch is sensed using a sensing device coupled to the low-side GaN switch; and When the value of the second current drops below a predetermined threshold current, the low-side GaN switch is turned off.

2. The method of claim 1, wherein the low-side GaN switch is turned on within a predetermined time period after the control signal controlling the conduction state of the high-side GaN switch goes high.

3. The method according to claim 1, further comprising turning off the low-side GaN switch before turning on the high-side GaN switch if a control signal controlling the conduction state of the high-side GaN switch becomes high after the low-side GaN switch is turned on.

4. The method of claim 1, wherein the value of the predetermined threshold current is 10% of the rated current of the low-side GaN switch.

5. The method of claim 1, wherein the predetermined threshold voltage is a first predetermined threshold voltage, and wherein the method of claim 1 further comprises transmitting a release signal to the low-side GaN switch when the voltage between the second drain terminal and the second source terminal exceeds a second predetermined threshold voltage, and wherein the release signal goes low before the low-side GaN switch is turned on.

6. The method of claim 5, wherein the value of the first predetermined threshold voltage is -1.0V, and wherein the value of the second predetermined threshold voltage is 12.0V.

7. The method of claim 1, wherein the half-bridge circuit is a first half-bridge circuit and the output node is a first output node, and wherein the method of claim 1 further comprises a second half-bridge circuit having a second output node, wherein the motor is coupled between the first output node and the second output node.

8. A circuit, the circuit comprising: A high-side gallium nitride (GaN) switch, the high-side GaN switch having a first gate terminal, a first drain terminal, and a first source terminal; A low-side GaN switch having a second gate terminal, a second drain terminal, and a second source terminal, wherein the first drain terminal is coupled to a power supply, the first source terminal is coupled to the second drain terminal at an output node, and the second source terminal is coupled to ground. A driving circuit is coupled to the high-side GaN switch and the low-side GaN switch; and A sensing device coupled to the low-side GaN switch and arranged to sense the magnitude of the current flowing through the low-side GaN switch; The drive circuit is arranged as follows: When the control signal controlling the conduction state of the high-side GaN switch goes high, the high-side GaN switch is turned on. When the control signal goes low, the high-side GaN switch is turned off; When the voltage between the second drain terminal and the second source terminal drops below a predetermined threshold voltage, the low-side GaN switch is turned on. as well as When the magnitude of the current drops below a predetermined threshold current, the low-side GaN switch is turned off.

9. The circuit of claim 8, wherein the driving circuit is further arranged to turn on the low-side GaN switch for a predetermined time period after the control signal goes high.

10. The circuit of claim 8, wherein the driving circuit is further arranged to turn off the low-side GaN switch before turning on the high-side GaN switch if the control signal goes high after the low-side GaN switch is turned on.

11. The circuit of claim 8, wherein the value of the predetermined threshold current is 10% of the rated current of the low-side GaN switch.

12. The circuit of claim 8, wherein the predetermined threshold voltage is a first predetermined threshold voltage, and wherein the driving circuit is further arranged to transmit a release signal to the low-side GaN switch when the voltage between the second drain terminal and the second source terminal exceeds a second predetermined threshold voltage, and to set the release signal to a low state before the low-side GaN switch is turned on.

13. The circuit of claim 8, wherein the driving circuit is formed in silicon.

14. A method for operating a motor drive circuit, the method comprising: A half-bridge circuit is provided, the half-bridge circuit comprising: A high-side gallium nitride (GaN) switch, the high-side GaN switch having a first gate terminal, a first drain terminal, and a first source terminal; and A low-side GaN switch having a second gate terminal, a second drain terminal, and a second source terminal, wherein the first drain terminal is coupled to a power supply, the first source terminal is coupled to the second drain terminal at an output node, and the second source terminal is coupled to ground. Provide a motor coupled to the output node; Turn on the high-side GaN switch to allow a first current to flow through the motor; Turn off the high-side GaN switch; When the voltage between the second drain terminal and the second source terminal drops below a predetermined threshold voltage, the low-side GaN switch is turned on; and When the voltage between the second drain terminal and the second source terminal exceeds the predetermined threshold voltage, the low-side GaN switch is turned off.

15. The method of claim 14, wherein the low-side GaN switch is turned on within a predetermined time period after the control signal controlling the conduction state of the high-side GaN switch goes high.

16. The method of claim 14, further comprising turning off the low-side GaN switch before turning on the high-side GaN switch if a control signal controlling the conduction state of the high-side GaN switch becomes high after the low-side GaN switch is turned on.

17. The method of claim 14, wherein the predetermined threshold voltage is a first predetermined threshold voltage, and wherein the method of claim 1 further comprises transmitting a release signal to the low-side GaN switch when the voltage between the second drain terminal and the second source terminal exceeds a second predetermined threshold voltage, and wherein the release signal becomes low before the low-side GaN switch is turned on.

18. The method of claim 17, wherein the value of the first predetermined threshold voltage is -1.0V, and wherein the value of the second predetermined threshold voltage is 12.0V.

19. The method of claim 14, further comprising providing a driving circuit coupled to the high-side GaN switch and the low-side GaN switch.

20. The method of claim 19, wherein the driving circuit includes a comparator arranged to detect the voltage between the second drain terminal and the second source terminal.

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