UPS system startup control method and UPS system

Abstract

This application provides a UPS system startup control method and a UPS system. The UPS system input terminal includes a parallel buffer circuit and a main circuit, wherein the buffer circuit includes a buffer relay and a buffer circuit connected in series, and the main circuit includes a main relay; the method includes: acquiring voltage sampling values ​​at the UPS system input terminal; determining a target buffer coefficient based on the voltage sampling values; wherein, the larger the deviation of the voltage sampling values, the smaller the corresponding target buffer coefficient; the voltage sampling values ​​include positive voltage values ​​and negative voltage values; calculating a reference voltage value based on the voltage sampling values ​​and the target buffer coefficient, and acquiring the bus voltage value after controlling the buffer relay to close; when the bus voltage value matches the reference voltage value, controlling the main relay to close. This application determines the target buffer coefficient based on the voltage sampling values, making the buffer coefficient adjustable, thereby improving the UPS system's applicability to the power grid and avoiding the UPS's inability to start for a long time due to the inability of the UPS input terminal to complete buffering when there are large harmonics in the power grid.

Description

Technical Field

[0001] This application relates to the field of power supply technology, and in particular to a UPS system startup control method and a UPS system. Background Technology

[0002] Uninterruptible power supplies (UPS) are widely used in industries such as computers, transportation, banking, securities, telecommunications, medical, and industrial control, and are rapidly entering homes. A UPS connects to the mains power supply. When the mains input is normal, the UPS stabilizes the mains power and supplies it to the terminal equipment. An AC relay is typically installed at the UPS's mains input. In case of a mains power failure, the AC relay is shut down while battery power is activated to ensure uninterrupted power supply to the load. To avoid the impact of the UPS input switch closing, current practices generally use a buffer resistor connected in series with the AC relay for initial buffering before closing the AC relay.

[0003] In the process of implementing the solution of this application, at least the following problems were found in the relevant technologies:

[0004] The current buffer coefficient is based on a relatively stable power grid quality setting. When the mains power fluctuates within a stable range, the preset bus voltage value can be reached after buffering. However, when the UPS is applied to remote areas or other areas with poor power grid quality, the harmonics in the power grid are large. It is entirely possible that the power grid sampling value meets the UPS startup conditions, but it is difficult to reach the preset bus voltage value, which will cause the UPS to fail to start for a long time. Summary of the Invention

[0005] This application provides a UPS system startup control method and a UPS system to solve the problem that the power grid has large harmonics, and the power grid sampling value may meet the UPS startup conditions, but it is difficult to reach the preset bus voltage value, thus causing the UPS to fail to start for a long time.

[0006] In a first aspect, embodiments of this application provide a UPS system startup control method, wherein the input terminal of the UPS system includes a buffer circuit and a main circuit connected in parallel, wherein the buffer circuit includes a buffer relay and a buffer circuit connected in series, and the main circuit includes a main relay; the method includes:

[0007] Obtain the voltage sampling value at the input terminal of the UPS system;

[0008] The target buffer coefficient is determined based on the voltage sample values; wherein, the larger the deviation of the voltage sample values, the smaller the corresponding target buffer coefficient; the voltage sample values ​​include positive voltage values ​​and negative voltage values;

[0009] A reference voltage value is calculated based on the voltage sampling value and the target buffer coefficient. The bus voltage value is then obtained after the buffer relay is closed. When the bus voltage value matches the reference voltage value, the main relay is closed.

[0010] In one possible implementation, when the buffer circuit is a controllable rectifier circuit, the method further includes:

[0011] The rectification coefficient of the controllable rectifier circuit is adjusted according to the target buffer coefficient, wherein the rectification coefficient is inversely correlated with the target buffer coefficient.

[0012] In one possible implementation, the inverse correlation specifically means that the rectification coefficient and the target buffer coefficient are inversely proportional.

[0013] In one possible implementation, matching the bus voltage value with the reference voltage value includes:

[0014] The bus voltage value is equal to the reference voltage value; or...

[0015] The difference between the bus voltage value and the reference voltage value is less than a set value.

[0016] In one possible implementation, determining the target buffer coefficient based on the voltage sample value includes:

[0017] When the deviation of the voltage sampled values ​​obtained by continuous sampling is not greater than the preset range, the target buffer coefficient is determined to be a constant value;

[0018] Otherwise, the target buffer coefficient is determined as a variable value from high to low.

[0019] In one possible implementation, when the target buffer coefficient is determined to be a variable value from high to low, the duration of the buffer time period corresponding to different target buffer coefficients is different;

[0020] Among them, the duration of the consecutive buffer time periods increases from short to long from front to back.

[0021] In one possible implementation, the target buffer coefficient is within a set buffer range; the set buffer range is 0.9 to 1.414.

[0022] Secondly, embodiments of this application provide a UPS system start-up control device, wherein the UPS system input terminal includes a parallel buffer circuit and a main circuit, wherein the buffer circuit includes a buffer relay and a buffer circuit connected in series, and the main circuit includes a main relay; the device includes:

[0023] The acquisition module is used to acquire the voltage sampling value at the input terminal of the UPS system;

[0024] A determining module is used to determine a target buffer coefficient based on the voltage sampled values; wherein, the larger the deviation of the voltage sampled values, the smaller the corresponding target buffer coefficient; the voltage sampled values ​​include positive voltage values ​​and negative voltage values;

[0025] The control module is used to calculate a reference voltage value based on the voltage sampling value and the target buffer coefficient, and to control the buffer relay to close to obtain the bus voltage value. When the bus voltage value matches the reference voltage value, the control module controls the main relay to close.

[0026] In one possible implementation, when the buffer circuit is a controllable rectifier circuit, the control module is further configured to adjust the rectification coefficient of the controllable rectifier circuit according to the target buffer coefficient, wherein the rectification coefficient is inversely correlated with the target buffer coefficient.

[0027] In one possible implementation, the inverse correlation specifically means that the rectification coefficient and the target buffer coefficient are inversely proportional.

[0028] In one possible implementation, matching the bus voltage value with the reference voltage value includes:

[0029] The bus voltage value is equal to the reference voltage value; or...

[0030] The difference between the bus voltage value and the reference voltage value is less than a set value.

[0031] In one possible implementation, the determining module is specifically used to determine the target buffer coefficient as a constant value when the deviation of the continuously sampled voltage values ​​is not greater than a preset range; otherwise, it determines the target buffer coefficient as a variable value from high to low.

[0032] In one possible implementation, when the target buffer coefficient is determined to be a variable value from high to low, the duration of the buffer time period corresponding to different target buffer coefficients is different;

[0033] Among them, the duration of the consecutive buffer time periods increases from short to long from front to back.

[0034] In one possible implementation, the target buffer coefficient is within a set buffer range; the set buffer range is 0.9 to 1.414.

[0035] Thirdly, embodiments of this application provide a UPS system, wherein the input terminal of the UPS system includes a buffer circuit and a main circuit connected in parallel, wherein the buffer circuit includes a buffer relay and a buffer circuit connected in series, and the main circuit includes a main relay, and the UPS system is started according to the method described in the first aspect above or any possible implementation of the first aspect.

[0036] Fourthly, embodiments of this application provide an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the method as described in the first aspect or any possible implementation of the first aspect above.

[0037] Fifthly, embodiments of this application provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the method as described in the first aspect or any possible implementation of the first aspect.

[0038] This application provides a UPS system startup control method and UPS system. It acquires voltage sampling values ​​at the UPS system input terminal, determines a target buffer coefficient based on these values, and calculates a reference voltage value using both the voltage sampling values ​​and the target buffer coefficient. After the buffer relay closes, it acquires the bus voltage value and controls the main relay to close when the bus voltage value matches the reference voltage value. Since the UPS system input voltage is not adjustable, adjusting the reference voltage value based on the target buffer coefficient allows the main relay to close when the bus voltage reaches or is within a voltage range close to the reference voltage value, thus completing the UPS startup. This application determines the target buffer coefficient based on the voltage sampling value, making the buffer coefficient adjustable to improve the UPS system's adaptability to the power grid. This avoids the UPS system failing to start due to not reaching the preset fixed buffer voltage, and also avoids the preset fixed buffer voltage being too low to effectively reduce the closing impact of the main relay.

[0039] On the other hand, when the buffer circuit is set as a controllable rectifier circuit, the rectification coefficient of the rectifier circuit (such as adjusting the conduction angle of the rectifier circuit or the boost coefficient of the rectifier circuit) is inversely correlated with the target buffer coefficient. The larger the deviation of the voltage sampling value, the smaller the target buffer coefficient, and the larger the corresponding rectification coefficient, that is, the greater the gain of the rectifier circuit, so that the bus voltage value detected at the bus is larger, reaching the reference voltage value to complete the buffering, thereby completing the UPS startup. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 This is a flowchart illustrating the implementation of a UPS system startup control method according to an embodiment of this application;

[0042] Figure 2 This is a schematic diagram of the structure of a UPS system start-up control device provided in an embodiment of this application;

[0043] Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0044] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0045] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.

[0046] Unless otherwise stated, the term "multiple" means two or more.

[0047] In this embodiment, the character " / " indicates that the objects before and after it are in an "or" relationship. For example, A / B means: A or B.

[0048] The term "and / or" describes an association between objects, indicating that three relationships can exist. For example, A and / or B means: A or B, or A and B.

[0049] The terms used in this application are for describing embodiments only and are not intended to limit the claims. As used in the description of embodiments and claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Similarly, the term “and / or” as used herein refers to including one or more of the associated listed elements and all possible combinations thereof. Additionally, when used in this application, the terms “comprise” and its variations “comprises” and / or “comprising” refer to the presence of stated features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. Without further limitations, an element defined by the phrase “comprising an…” does not exclude the presence of additional identical elements in the process, method, or apparatus that includes said element. In this application, each embodiment may focus on the differences from other embodiments, and similar or identical parts between embodiments can be referred to mutually. For methods, products, etc., disclosed in the embodiments, if they correspond to the method portion disclosed in the embodiments, the relevant details can be found in the description of the method portion.

[0050] In this embodiment, the UPS system input includes a parallel buffer circuit and a main circuit. The buffer circuit includes a buffer relay and a buffer circuit connected in series, and the main circuit includes a main relay. When the buffer relay closes, the buffer circuit buffers the input voltage to obtain a buffered voltage, i.e., the bus voltage. The buffered bus voltage reduces the closing impact of the main relay, preventing damage to UPS components and the safety of subsequent loads.

[0051] Traditional UPS systems have a fixed buffer coefficient. This application aims to enhance the grid adaptability of the system by adjusting the target buffer coefficient. In the case of large harmonics in the power grid, it is entirely possible that the sampled value of the power grid meets the UPS startup conditions. Based on the target buffer coefficient, the reference value of the bus voltage is adjusted under the condition of meeting the operational safety requirements, thereby avoiding the UPS from failing to start for a long time.

[0052] To make the objectives, technical solutions, and advantages of this application clearer, the following description will be provided in conjunction with the accompanying drawings and specific embodiments.

[0053] Figure 1 This is a flowchart illustrating the implementation of a UPS system startup control method according to an embodiment of this application, as follows: Figure 1 As shown, the method includes the following steps:

[0054] S101, obtain the voltage sampling value at the input terminal of the UPS system.

[0055] In this embodiment, the main component of the UPS system startup control method is a controller, which is capable of controlling the closed state of the main relay. Optionally, the controller is an independently configured controller. Optionally, the controller is the controller of the UPS system, which has the function of controlling the closing of the main relay.

[0056] Voltage sampling values ​​are acquired by a voltage sensor installed at the input of the UPS system. The controller acquires the voltage sampling values ​​via wired or wireless communication. Since the voltage input to the UPS system is the mains voltage, step S101 acquires the voltage sampling value at the UPS system input to determine the power grid quality.

[0057] S102, determine the target buffer coefficient based on the voltage sampling value; wherein, the larger the deviation of the voltage sampling value, the smaller the corresponding target buffer coefficient; the voltage sampling value includes positive voltage value and negative voltage value.

[0058] Under conditions of good or stable power grid quality, voltage sampling value fluctuations conform to a sinusoidal wave pattern. A larger deviation in the voltage sampling value indicates higher harmonic content, signifying poorer power grid quality. In practical implementation, to avoid sampling deviations caused by sampling time or frequency affecting the accuracy of the judgment, variance can be calculated based on the voltage sampling values, and the power grid quality can be judged based on the variance calculation results. Specifically, a larger variance indicates a higher degree of dispersion in the voltage sampling values, signifying poorer power grid quality; conversely, a lower degree of dispersion in the voltage sampling values ​​indicates better power grid quality.

[0059] Under theoretical derivation, for rated AC input, i.e., mains input, buffered by uncontrolled rectification of a full-bridge circuit, the bus voltage value and the effective value of the mains input voltage should satisfy a relationship of √2:1 (i.e., 1.414 times). The corresponding buffer coefficient is 1.414. Therefore, when the mains input voltage quality is poor, in order to ensure that the buffering result is judged as complete as possible and to enhance the grid adaptability of the system, the target buffer coefficient needs to be reduced when the deviation of the voltage sampling value is larger. For example, the target buffer coefficient can be set to 1.1 times.

[0060] In one possible implementation, determining the target buffer coefficient based on the voltage sample value includes:

[0061] When the deviation of the voltage sampled values ​​obtained by continuous sampling is not greater than the preset range, the target buffer coefficient is determined to be a constant value;

[0062] Otherwise, the target buffer coefficient is determined as a variable value from high to low.

[0063] Specifically, when the deviation of the continuously sampled voltage values ​​is within a preset range, the power grid quality is relatively stable, and the target buffer coefficient is set to a constant value. However, when the continuously sampled voltage values ​​are not pure sine waves, the input harmonics are large, and the target buffer coefficient is set to a variable value that gradually decreases. This prevents the UPS from failing to reach the voltage reference value, thus preventing the UPS system from failing to start, and also prevents the reference voltage value from being too low, which would not effectively reduce the closing impact of the main relay, thereby improving the UPS's adaptability to the power grid.

[0064] S103 calculates the reference voltage value based on the voltage sampling value and the target buffer coefficient, and controls the buffer relay to close to obtain the bus voltage value. When the bus voltage value matches the reference voltage value, it controls the main relay to close.

[0065] The reference voltage value, i.e. the target bus voltage value, is calculated based on the voltage sampling value and the target buffer coefficient. When the bus voltage value reaches or approaches the target bus voltage value, it can ensure that no large current fluctuation will occur at the moment the main relay closes.

[0066] In different embodiments, the method for determining whether the bus voltage value matches the reference voltage value in step S103 is different.

[0067] In one possible implementation, the bus voltage value is matched with the reference voltage value, including: the bus voltage value is equal to the reference voltage value, ensuring that the UPS and subsequent loads are relatively safe when the main control relay is closed.

[0068] In one possible implementation, the bus voltage value is matched with a reference voltage value, including: the difference between the bus voltage value and the reference voltage value is less than a set value. Since errors are inevitable during voltage measurement and calculation, controlling the main relay to close when the bus voltage value is equal to or close to the reference voltage value can shorten the startup delay without affecting the normal and safe operation of the UPS and subsequent loads.

[0069] Optional, the setting value is -5V to 5V. This setting value should not be too high to avoid a large voltage difference between the buffer voltage and the input voltage, which would generate a large current at the moment the main relay closes, affecting the safe operation of the UPS.

[0070] In one possible implementation, when the buffer circuit is a controllable rectifier circuit, the method further includes:

[0071] The rectification coefficient of the controllable rectifier circuit is adjusted according to the target buffer coefficient, wherein the rectification coefficient is inversely correlated with the target buffer coefficient.

[0072] The controllable rectifier circuit features an adjustable output voltage; the bus voltage can be changed by adjusting the rectification coefficient. Unlike adjusting the reference voltage, the rectification coefficient and the target buffer coefficient are inversely related. For example, when the bus voltage is lower than the parameter voltage, the bus voltage is increased by increasing the rectification coefficient of the controllable rectifier circuit to meet the matching requirement between the bus voltage and the reference voltage. However, adjusting the reference voltage requires decreasing the buffer coefficient to lower the reference voltage, ensuring that the bus voltage remains constant while still meeting the matching requirement.

[0073] In one possible implementation, the inverse correlation is specifically that the rectification coefficient and the target buffer coefficient are inversely proportional.

[0074] In a specific implementation, adjusting the rectification coefficient of the controllable rectifier circuit requires adjusting the rectification coefficient state. Therefore, the rectification coefficient and the target buffer coefficient are inversely correlated, specifically the rectification coefficient (or the rectifier system state) and the target buffer coefficient are inversely proportional.

[0075] In one possible implementation, when the target buffer coefficient is determined to be a variable value from high to low, the duration of the buffer time period corresponding to different target buffer coefficients is different;

[0076] Among them, the duration of multiple consecutive buffer periods increases from short to long.

[0077] When the target buffer coefficient is determined to be a variable value from high to low, the buffering process is a continuous process. In the initial stage of buffering, the voltage difference before and after buffering is large. During the buffering process, the voltage value gradually decreases, and the difference is small in the later stage of buffering. Therefore, controlling the initial buffering time to be shorter can reduce voltage fluctuations during the buffering process and meet the safe operation requirements of UPS.

[0078] Optionally, the buffer period can be 30-45 seconds long.

[0079] In one possible implementation, the target buffer coefficient is within a set buffer range; the set buffer range is 0.9 to 1.414.

[0080] To illustrate with a specific embodiment, when the target buffer coefficient is determined to be a variable value from high to low, with target buffer coefficients of 1.414, 1.3 and 1.2 respectively, the target buffer coefficient of 1.414 is maintained for buffering for 30 seconds, the target buffer coefficient of 1.3 is maintained for buffering for 40 seconds, and the target buffer coefficient of 1.2 is maintained for buffering for 45 seconds.

[0081] In this embodiment, the voltage sampling value at the input terminal of the UPS system is acquired, a target buffer coefficient is determined based on the voltage sampling value, and a reference voltage value is calculated based on the voltage sampling value and the target buffer coefficient. After the buffer relay closes, the bus voltage value is acquired, and when the bus voltage value matches the reference voltage value, the main relay is controlled to close. Since the input voltage of the UPS system is not adjustable, adjusting the reference voltage value based on the target buffer coefficient allows the main relay to close when the bus voltage value reaches or is within a voltage range close to the reference voltage value, thus completing the UPS startup. This application determines the target buffer coefficient based on the voltage sampling value, making the buffer coefficient adjustable to improve the UPS system's applicability to the power grid. This avoids the UPS system failing to start due to the inability to reach the preset fixed buffer voltage, and also avoids the preset fixed buffer voltage being too low, which would not effectively reduce the closing impact of the main relay.

[0082] On the other hand, when the buffer circuit is set as a controllable rectifier circuit, the rectification coefficient of the rectifier circuit (such as adjusting the conduction angle of the rectifier circuit or the boost coefficient of the rectifier circuit) is inversely correlated with the target buffer coefficient. The larger the deviation of the voltage sampling value, the smaller the target buffer coefficient, and the larger the corresponding rectification coefficient, that is, the greater the gain of the rectifier circuit, so that the bus voltage value detected at the bus is larger, reaching the reference voltage value to complete the buffering, thereby completing the UPS startup.

[0083] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0084] The following are device embodiments of this application. For details not described in detail, please refer to the corresponding method embodiments described above.

[0085] Figure 2 This is a schematic diagram of the structure of a UPS system start-up control device provided in an embodiment of this application, as shown below. Figure 2 As shown, for ease of explanation, only the parts related to the embodiments of this application are shown, such as... Figure 2 As shown, the device includes:

[0086] The acquisition module 201 is used to acquire the voltage sample value at the input terminal of the UPS system;

[0087] The determination module 202 is used to determine the target buffer coefficient based on the voltage sampled values; wherein, the larger the deviation of the voltage sampled values, the smaller the corresponding target buffer coefficient; the voltage sampled values ​​include positive voltage values ​​and negative voltage values.

[0088] The control module 203 is used to calculate the reference voltage value based on the voltage sampling value and the target buffer coefficient, and to control the buffer relay to close to obtain the bus voltage value. When the bus voltage value matches the reference voltage value, it controls the main relay to close.

[0089] In one possible implementation, when the buffer circuit is a controllable rectifier circuit, the control module 203 is also used to adjust the rectification coefficient of the controllable rectifier circuit according to the target buffer coefficient, wherein the rectification coefficient is inversely correlated with the target buffer coefficient.

[0090] In one possible implementation, the inverse correlation is specifically that the rectification coefficient and the target buffer coefficient are inversely proportional.

[0091] In one possible implementation, the bus voltage value is matched with a reference voltage value, including:

[0092] The bus voltage value is equal to the reference voltage value; or,

[0093] The difference between the bus voltage value and the reference voltage value is less than the set value.

[0094] In one possible implementation, the determining module 202 is specifically used to determine the target buffer coefficient as a constant value when the deviation value of the continuously sampled voltage values ​​is not greater than a preset range; otherwise, it determines the target buffer coefficient as a variable value from high to low.

[0095] In one possible implementation, when the target buffer coefficient is determined to be a variable value from high to low, the duration of the buffer time period corresponding to different target buffer coefficients is different;

[0096] Among them, the duration of multiple consecutive buffer periods increases from short to long.

[0097] In one possible implementation, the target buffer coefficient is within a set buffer range; the set buffer range is 0.9 to 1.414.

[0098] In this embodiment, the voltage sampling value at the input terminal of the UPS system is acquired, a target buffer coefficient is determined based on the voltage sampling value, and a reference voltage value is calculated based on the voltage sampling value and the target buffer coefficient. After the buffer relay closes, the bus voltage value is acquired, and when the bus voltage value matches the reference voltage value, the main relay is controlled to close. Since the input voltage of the UPS system is not adjustable, adjusting the reference voltage value based on the target buffer coefficient allows the main relay to close when the bus voltage value reaches or is within a voltage range close to the reference voltage value, thus completing the UPS startup. This application determines the target buffer coefficient based on the voltage sampling value, making the buffer coefficient adjustable to improve the UPS system's applicability to the power grid. This avoids the UPS system failing to start due to the inability to reach the preset fixed buffer voltage, and also avoids the preset fixed buffer voltage being too low, which would not effectively reduce the closing impact of the main relay.

[0099] On the other hand, when the buffer circuit is set as a controllable rectifier circuit, the rectification coefficient of the rectifier circuit (such as adjusting the conduction angle of the rectifier circuit or the boost coefficient of the rectifier circuit) is inversely correlated with the target buffer coefficient. The larger the deviation of the voltage sampling value, the smaller the target buffer coefficient, and the larger the corresponding rectification coefficient, that is, the greater the gain of the rectifier circuit, so that the bus voltage value detected at the bus is larger, reaching the reference voltage value to complete the buffering, thereby completing the UPS startup.

[0100] This application provides a UPS system. The input terminal of the UPS system includes a buffer circuit and a main circuit connected in parallel. The buffer circuit includes a buffer relay and a buffer circuit connected in series, and the main circuit includes a main relay. The UPS system is started according to any of the above possible implementation methods.

[0101] Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. For example... Figure 3 As shown, the electronic device 3 in this embodiment includes: a processor 30, a memory 31, and a computer program 32 stored in the memory 31 and executable on the processor 30. When the processor 30 executes the computer program 32, it implements the steps in the various UPS system startup control method embodiments described above, for example... Figure 1 Steps S101 to S103 are shown. Alternatively, when the processor 30 executes the computer program 32, it implements the functions of each module / unit in the above-described device embodiments, for example... Figure 2 The functions of each module are shown.

[0102] For example, the computer program 32 can be divided into one or more modules / units, which are stored in the memory 31 and executed by the processor 30 to complete this application. The one or more modules / units can be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program 32 in the electronic device 3. For example, the computer program 32 can be divided into... Figure 2 The modules shown.

[0103] The electronic device 3 can be a desktop computer, laptop, handheld computer, or cloud server, etc. The electronic device 3 may include, but is not limited to, a processor 30 and a memory 31. Those skilled in the art will understand that... Figure 3 This is merely an example of electronic device 3 and does not constitute a limitation on electronic device 3. It may include more or fewer components than shown, or combine certain components, or different components. For example, the electronic device may also include input / output devices, network access devices, buses, etc.

[0104] The processor 30 may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0105] The memory 31 can be an internal storage unit of the electronic device 3, such as a hard disk or memory. The memory 31 can also be an external storage device of the electronic device 3, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., equipped on the electronic device 3. Furthermore, the memory 31 can include both internal and external storage units of the electronic device 3. The memory 31 is used to store the computer program and other programs and data required by the electronic device. The memory 31 can also be used to temporarily store data that has been output or will be output.

[0106] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0107] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0108] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed in this application can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0109] In the embodiments provided in this application, it should be understood that the disclosed devices / electronic devices and methods can be implemented in other ways. For example, the device / electronic device embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual couplings or direct couplings or communication connections may be through some interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0110] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0111] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0112] If the integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various UPS system startup control method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc.

[0113] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A UPS system startup control method, characterized in that, The UPS system input terminal includes a parallel buffer circuit and a main circuit, wherein the buffer circuit includes a buffer relay and a buffer circuit connected in series, and the main circuit includes a main relay; the method includes: Obtain the voltage sampling value at the input terminal of the UPS system; The target buffer coefficient is determined based on the voltage sample values; wherein, the larger the deviation of the voltage sample values, the smaller the corresponding target buffer coefficient; the voltage sample values ​​include positive voltage values ​​and negative voltage values; A reference voltage value is calculated based on the voltage sampling value and the target buffer coefficient. The bus voltage value is then obtained after the buffer relay is closed. When the bus voltage value matches the reference voltage value, the main relay is closed. When the buffer circuit is a controllable rectifier circuit, the method further includes: The rectification coefficient of the controllable rectifier circuit is adjusted according to the target buffer coefficient, wherein the rectification coefficient is inversely correlated with the target buffer coefficient.

2. The UPS system startup control method according to claim 1, characterized in that, Specifically, the inverse correlation means that the rectification coefficient and the target buffer coefficient are inversely proportional.

3. The UPS system startup control method according to claim 1 or 2, characterized in that, The matching of the bus voltage value with the reference voltage value includes: The bus voltage value is equal to the reference voltage value; or... The difference between the bus voltage value and the reference voltage value is less than a set value.

4. The UPS system startup control method according to claim 1 or 2, characterized in that, Determining the target buffer coefficient based on the voltage sample value includes: When the deviation of the voltage sampled values ​​obtained by continuous sampling is not greater than the preset range, the target buffer coefficient is determined to be a constant value; Otherwise, the target buffer coefficient is determined as a variable value from high to low.

5. The UPS system startup control method according to claim 4, characterized in that, When the target buffer coefficient is determined to be a variable value from high to low, the duration of the buffer period is different for different target buffer coefficients; Among them, the duration of multiple consecutive buffer periods increases from short to long.

6. The UPS system startup control method according to claim 1 or 2, characterized in that, The target buffer coefficient is within the set buffer range; the set buffer range is 0.9~1.

414.

7. A UPS system start-up control device, characterized in that, The UPS system input terminal includes a parallel buffer circuit and a main circuit, wherein the buffer circuit includes a buffer relay and a buffer circuit connected in series, and the main circuit includes a main relay; the device includes: The acquisition module is used to acquire the voltage sampling value at the input terminal of the UPS system; A determining module is used to determine a target buffer coefficient based on the voltage sampled values; wherein, the larger the deviation of the voltage sampled values, the smaller the corresponding target buffer coefficient; the voltage sampled values ​​include positive voltage values ​​and negative voltage values; The control module is used to calculate a reference voltage value based on the voltage sampling value and the target buffer coefficient, and to control the buffer relay to close to obtain the bus voltage value. When the bus voltage value matches the reference voltage value, the module controls the main relay to close. When the buffer circuit is a controllable rectifier circuit, the control module is further configured to adjust the rectification coefficient of the controllable rectifier circuit according to the target buffer coefficient, wherein the rectification coefficient and the target buffer coefficient are inversely correlated.

8. The UPS system start-up control device according to claim 7, characterized in that, The matching of the bus voltage value with the reference voltage value includes: The bus voltage value is equal to the reference voltage value; or... The difference between the bus voltage value and the reference voltage value is less than a set value.

9. A UPS system, wherein the input terminal of the UPS system includes a buffer circuit and a main circuit connected in parallel, wherein, The buffer circuit includes a buffer relay and a buffer circuit connected in series, and the main circuit includes a main relay. The UPS system is characterized in that it is started according to the method described in any one of claims 1 to 6 above.

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