FPGA-based DRM and analog broadcast transmitter adapter board
By using an FPGA-based DRM/analog broadcast transmitter adapter board, the compatibility and cost issues of the transmitter adapter board were resolved, enabling flexible switching between analog and DRM broadcast modes, and improving processing speed and integration.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-05-22
- Publication Date
- 2026-04-03
AI Technical Summary
Existing transmitter adapter boards suffer from poor compatibility, high cost, slow processing speed, and poor functional expandability and integration. In particular, the DRM transmitter adapter board is incompatible with analog transmitters.
The DRM/analog broadcast transmitter adapter board based on FPGA is adopted, which includes a data input module, a signal modulation module, a clock module and a power management module. The working mode is switched by using DIP switches, and the programmable logic device FPGA is integrated to realize signal processing and mode switching.
It improves the compatibility of transmitter adapter boards, reduces costs, enhances processing speed and functional scalability, and enables flexible switching between analog and DRM broadcast modes.
Smart Images

Figure CN116865771B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of broadcasting technology, and in particular to an FPGA-based DRM / analog broadcast transmitter adapter board. Background Technology
[0002] With the rapid development of wireless communication technology, DRM (Digital Radio Mondiale) technology has become an important development direction for the broadcasting industry. Compared with traditional analog broadcasting, digital broadcasting has advantages such as higher signal transmission quality, wider coverage, and higher efficiency, and more and more broadcasting organizations are beginning to adopt digital broadcasting technology.
[0003] However, most of the transmitters currently in use are still analog transmitters. Upgrading the entire transmitter system would result in huge costs. In addition, analog transmitters can meet the requirements in some situations where the coverage area is not very large and the transmission requirements are not very demanding. Moreover, the maintenance cost of analog transmitters is relatively low. Therefore, users still need analog transmitters to work in some specific situations.
[0004] Currently available DRM transmitter adapter boards can only be used with DRM transmitters, resulting in poor compatibility. Furthermore, most existing DRM transmitter adapter board technologies implement the DRM coding modulator on a computer, or integrate the channel coding module and OFDM module onto a digital signal processor (DSP). However, these technologies are costly, slow, and have poor scalability and integration. Summary of the Invention
[0005] This invention provides an FPGA-based DRM / analog broadcast transmitter adapter board to address the problems of existing transmitter adapter boards, such as poor technical compatibility, high cost, slow processing speed, and poor scalability and integration.
[0006] On one hand, embodiments of the present invention provide an FPGA-based DRM / analog broadcast transmitter adapter board, including:
[0007] The module includes a data input module, a signal modulation module, a clock module, and a power management module.
[0008] The data input module is used to convert external input data and send it to the signal modulation module. The data input module includes: an audio signal receiving unit, a digital signal receiving unit, a DIP switch, an analog-to-digital converter, and an interface unit; the DIP switch has two states.
[0009] The signal modulation module is used to process the converted data. The signal modulation module includes: a programmable logic device (FPGA), a digital-to-analog converter, an output amplifier, and a digital radio frequency exciter. The programmable logic device (FPGA) integrates several functional units.
[0010] The clock module is used to provide clock signals to the programmable logic device FPGA and control the coordinated operation of the plurality of functional units.
[0011] The power management module is used to supply power to the data input module, the signal modulation module and the clock module.
[0012] In one possible implementation, the audio signal receiving unit and the digital signal receiving unit are both electrically connected to the DIP switch. The DIP switch is electrically connected to the analog-to-digital converter and the interface unit, respectively. The analog-to-digital converter, the interface unit, the clock module, and the power management module are all electrically connected to the programmable logic device (FPGA). The FPGA is electrically connected to the digital-to-analog converter and the digital radio frequency exciter, respectively. The digital-to-analog converter is electrically connected to the output amplifier. The output amplifier and the digital radio frequency exciter are used to electrically connect to the transmitter.
[0013] In one possible implementation, the plurality of functional units include:
[0014] The system includes a digital filtering unit, a digital modulation unit, a frequency synthesis unit, an energy diffusion unit, a channel coding unit, a unit interleaving unit, a pilot generator unit, an OFDM unit mapping unit, an OFDM symbol generation unit, and a modulator unit.
[0015] In one possible implementation, the FPGA-based DRM / analog broadcast transmitter adapter board includes two operating modes, which are switched by adjusting two states of the DIP switch; the two operating modes include: analog broadcast mode and DRM broadcast mode.
[0016] In one possible implementation, the simulated broadcast mode includes the following steps:
[0017] The audio signal passes sequentially through the audio signal receiving unit, the analog-to-digital converter, the programmable logic device FPGA, the digital-to-analog converter, and the output amplifier to obtain an output audio signal, which is then transmitted to the transmitter by the output amplifier.
[0018] In one possible implementation, the programmable logic device (FPGA) invokes the digital filtering unit, digital modulation unit, and frequency synthesis unit to operate on the passed signal.
[0019] In one possible implementation, the DRM broadcast mode includes the following steps:
[0020] The digital signal passes sequentially through the digital signal receiving unit, the interface unit, and the programmable logic device FPGA to obtain a DRM baseband signal. The DRM baseband signal is divided into two paths: one path passes through the digital-to-analog converter and the output amplifier to obtain an output audio signal, and the other path passes through the digital radio frequency exciter to obtain an output carrier signal. The output amplifier and the digital radio frequency exciter transmit the output audio signal and the output carrier signal to the transmitter, respectively.
[0021] In one possible implementation, the programmable logic device (FPGA) invokes the energy diffusion unit, the channel coding unit, the unit interleaving unit, the pilot generator unit, the OFDM unit mapping unit, the OFDM symbol generation unit, and the modulator unit to operate on the passing signal.
[0022] The FPGA-based DRM / analog broadcast transmitter adapter board of this invention has the following advantages:
[0023] The proposed DIP switch enables switching of the adapter board's operating mode, exhibiting strong compatibility. The proposed programmable logic device (FPGA) integrates several functional units, reducing costs and improving processing speed, as well as functional expandability and integration. Attached Figure Description
[0024] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0025] Figure 1 This is a schematic diagram of the structure of the FPGA-based DRM and analog broadcast transmitter adapter board and transmitter provided in an embodiment of the present invention. Detailed Implementation
[0026] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0027] Figure 1This is a schematic diagram of the structure of an FPGA-based DRM / analog broadcast transmitter adapter board and transmitter provided in an embodiment of the present invention. The embodiment of the present invention provides an FPGA-based DRM / analog broadcast transmitter adapter board, comprising:
[0028] The module includes a data input module, a signal modulation module, a clock module, and a power management module.
[0029] The data input module is used to convert external input data and send it to the signal modulation module. The data input module includes: an audio signal receiving unit, a digital signal receiving unit, a DIP switch, an analog-to-digital converter, and an interface unit; the DIP switch has two states.
[0030] The signal modulation module is used to process the converted data. The signal modulation module includes: a programmable logic device (FPGA), a digital-to-analog converter, an output amplifier, and a digital radio frequency exciter. The programmable logic device (FPGA) integrates several functional units.
[0031] The clock module is used to provide clock signals to the programmable logic device FPGA and control the coordinated operation of the plurality of functional units.
[0032] The power management module is used to supply power to the data input module, the signal modulation module and the clock module.
[0033] In this embodiment, the interface unit is a UART serial interface. In other possible embodiments, an AES interface or an Ethernet port may also be selected.
[0034] For example, the audio signal receiving unit and the digital signal receiving unit are both electrically connected to the DIP switch. The DIP switch is electrically connected to the analog-to-digital converter and the interface unit, respectively. The analog-to-digital converter, the interface unit, the clock module, and the power management module are all electrically connected to the programmable logic device (FPGA). The programmable logic device (FPGA) is electrically connected to the digital-to-analog converter and the digital radio frequency exciter, respectively. The digital-to-analog converter is electrically connected to the output amplifier. The output amplifier and the digital radio frequency exciter are used to electrically connect to the transmitter.
[0035] For example, the plurality of functional units include:
[0036] The system includes a digital filtering unit, a digital modulation unit, a frequency synthesis unit, an energy diffusion unit, a channel coding unit, a unit interleaving unit, a pilot generator unit, an OFDM unit mapping unit, an OFDM symbol generation unit, and a modulator unit.
[0037] Specifically, the digital filtering unit performs digital filtering operations; the digital modulation unit performs digital modulation operations; the frequency synthesis unit performs frequency synthesis operations; the energy diffusion unit performs energy diffusion operations, providing randomization of digital bits to reduce unnecessary regularity in the transmitted signal and improve the signal's anti-interference performance; the channel coding unit performs channel coding processing, adding redundant bits to the data in a defined manner for error protection and correction, and defining the mapping of digital coding information to the QAM unit to improve signal reliability and error resistance; and the interleaving unit randomly arranges the continuous data stream in time and frequency to cope with the transmission channel. The time and frequency dispersion is eliminated to avoid continuous bit errors and improve channel stability; the pilot generator unit is used to insert pilot sequences into the signal for coherent demodulation and channel estimation at the receiver to improve channel synchronization and resistance to multipath fading; the OFDM unit mapping unit is used to map the transmitted QAM symbols onto different subcarriers to convert the data sequence into a signal in the time domain; the OFDM symbol generation unit is used to convert the frequency domain information of the transmitted channel into time domain information, add a cyclic prefix, generate OFDM symbols, and insert pilot sequences into the symbols; the modulator unit is used to convert the complex form OFDM symbols into time-domain digital waveforms that can be actually transmitted.
[0038] For example, the FPGA-based DRM / analog broadcast transmitter adapter board includes two operating modes, which are switched by adjusting the two states of the DIP switch; the two operating modes include: analog broadcast mode and DRM broadcast mode.
[0039] For example, the simulated broadcast mode includes the following operational steps:
[0040] The audio signal passes sequentially through the audio signal receiving unit, the analog-to-digital converter, the programmable logic device FPGA, the digital-to-analog converter, and the output amplifier to obtain an output audio signal, which is then transmitted to the transmitter by the output amplifier.
[0041] For example, the programmable logic device FPGA invokes the digital filtering unit, digital modulation unit, and frequency synthesis unit to operate on the passed signal.
[0042] Specifically, after the audio signal passes through the audio signal receiving unit, it is converted into a digital signal by an analog-to-digital converter and then transmitted to a programmable logic device (FPGA). The FPGA performs digital filtering, digital modulation, and frequency synthesis on the digital signal. The signal processed by the FPGA is then converted into an audio signal to be amplified by a digital-to-analog converter. Finally, it is amplified by an output amplifier. The power amplification increases the signal strength and coverage, resulting in an output audio signal that is transmitted to the transmitter.
[0043] For example, the DRM broadcast mode includes the following steps:
[0044] The digital signal passes sequentially through the digital signal receiving unit, the interface unit, and the programmable logic device FPGA to obtain a DRM baseband signal. The DRM baseband signal is divided into two paths: one path passes through the digital-to-analog converter and the output amplifier to obtain an output audio signal, and the other path passes through the digital radio frequency exciter to obtain an output carrier signal. The output amplifier and the digital radio frequency exciter transmit the output audio signal and the output carrier signal to the transmitter, respectively.
[0045] The digital signal in this embodiment is a DRM standard format digital signal.
[0046] For example, the programmable logic device FPGA invokes the energy diffusion unit, the channel coding unit, the unit interleaving unit, the pilot generator unit, the OFDM unit mapping unit, the OFDM symbol generation unit, and the modulator unit to operate on the passing signal.
[0047] Specifically, after the digital signal passes through the digital signal receiving unit, it is transmitted to the programmable logic device (FPGA) through the interface unit. The FPGA performs operations such as energy diffusion, channel coding, cell interleaving, pilot generation, OFDM cell mapping, OFDM symbol generation, and modulation on the digital signal to obtain the DRM baseband signal. The DRM baseband signal is divided into two paths: one path passes through a digital-to-analog converter and an output amplifier to obtain the output audio signal, and the other path passes through a digital radio frequency exciter for phase modulation to obtain the output carrier signal. The output amplifier and the digital radio frequency exciter transmit the output audio signal and the output carrier signal to the transmitter, respectively.
[0048] The DIP switch proposed in this embodiment can realize the switching of the working mode of the adapter board, with strong compatibility. The proposed programmable logic device FPGA integrates several functional units, which reduces costs and improves processing speed, as well as the scalability and integration of functions.
[0049] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.
[0050] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.
Claims
1. An FPGA-based DRM / analog broadcast transmitter adapter board, characterized in that, include: Data input module, signal modulation module, clock module, and power management module; The data input module is used to convert external input data and send it to the signal modulation module. The data input module includes: an audio signal receiving unit, a digital signal receiving unit, a DIP switch, an analog-to-digital converter, and an interface unit; the DIP switch has two states. The signal modulation module is used to process the converted data. The signal modulation module includes: a programmable logic device (FPGA), a digital-to-analog converter, an output amplifier, and a digital radio frequency exciter; the programmable logic device (FPGA) integrates several functional units. The clock module is used to provide clock signals to the programmable logic device FPGA and control the coordinated operation of the plurality of functional units; The power management module is used to supply power to the data input module, the signal modulation module and the clock module; The plurality of functional units include: Digital filtering unit, digital modulation unit, frequency synthesis unit, energy diffusion unit, channel coding unit, unit interleaving unit, pilot generator unit, OFDM unit mapping unit, OFDM symbol generation unit, and modulator unit; The FPGA-based DRM / analog broadcast transmitter adapter board includes two operating modes, which are switched by adjusting the two states of the DIP switch; the two operating modes include: analog broadcast mode and DRM broadcast mode. The analog broadcast mode includes the following steps: The audio signal passes sequentially through the audio signal receiving unit, the analog-to-digital converter, the programmable logic device FPGA, the digital-to-analog converter, and the output amplifier to obtain an output audio signal, and the output amplifier transmits the output audio signal to the transmitter; The DRM broadcast mode includes the following steps: The digital signal passes sequentially through the digital signal receiving unit, the interface unit, and the programmable logic device FPGA to obtain a DRM baseband signal. The DRM baseband signal is divided into two paths: one path passes through the digital-to-analog converter and the output amplifier to obtain an output audio signal, and the other path passes through the digital radio frequency exciter to obtain an output carrier signal. The output amplifier and the digital radio frequency exciter transmit the output audio signal and the output carrier signal to the transmitter, respectively.
2. The FPGA-based DRM / analog broadcast transmitter adapter board according to claim 1, characterized in that, The audio signal receiving unit and the digital signal receiving unit are both electrically connected to the DIP switch. The DIP switch is electrically connected to the analog-to-digital converter and the interface unit, respectively. The analog-to-digital converter, the interface unit, the clock module, and the power management module are all electrically connected to the programmable logic device (FPGA). The programmable logic device (FPGA) is electrically connected to the digital-to-analog converter and the digital radio frequency exciter, respectively. The digital-to-analog converter is electrically connected to the output amplifier. The output amplifier and the digital radio frequency exciter are used to electrically connect to the transmitter.
3. The FPGA-based DRM / analog broadcast transmitter adapter board according to claim 1, characterized in that, When the operating mode is analog broadcast mode, the programmable logic device FPGA calls the digital filtering unit, digital modulation unit and frequency synthesis unit to operate on the passed signal.
4. The FPGA-based DRM / analog broadcast transmitter adapter board according to claim 1, characterized in that, When the operating mode is DRM broadcast mode, the programmable logic device FPGA calls the energy diffusion unit, the channel coding unit, the unit interleaving unit, the pilot generator unit, the OFDM unit mapping unit, the OFDM symbol generation unit, and the modulator unit to operate on the passing signal.
Citation Information
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