Method for measuring high resistance test samples

Abstract

To measure the resistance-area product of a high resistivity layer, sandwiched between two conductive layers, using a microscopic multi-point probe. Multiple electrode configurations / positions are used to perform three voltage or resistance measurements. An equivalent circuit model / three-layer model is used to determine the resistance-area product as a function of the three measurements.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to European Patent Application No. 21207514 filed on November 10, 2021 and U.S. Application No. 63 / 192102 filed on May 24, 2021, the disclosures of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to measuring / determining electrical properties, such as resistance-area product, of a multilayer test sample (such as a semiconductor wafer). Specifically, the present disclosure includes measuring / determining the resistance-area product of a layer having high resistivity (ie, being a poor conductor). Background Art

[0004] It is desirable to use a microscopic multi-point probe to perform electrical property measurements. This is a probe with multiple contact probes for contacting the test sample so that current can be injected into the test sample, and the pitch between the contact probes is in the micrometer range. However, it can be difficult to establish an electrical connection between the contact probes and the high resistivity layer. Using a macroscopic probe is also not feasible because the probe contact points are too large or may damage the sample.

[0005] It is known to use a microscopic multi-point probe to measure the tunnel junction and determine the electrical characteristics of the tunnel junction by an equivalent circuit model, for example in US6927569. However, such a test sample is a three-layer test sample. Therefore, it is not a test sample with a bottom conductive layer and a top insulating / high resistivity layer. In addition, the tunnel junction test sample is not a test sample with a high resistivity layer because there is no ohmic transport of electrons in the tunneling barrier. Summary of the invention

[0006] In order to achieve the purpose of measuring the resistance-area product of the high resistivity layer of a test sample using a microscopic multi-point probe, a conductive top layer is added to the test sample on top of the high resistivity layer so that the test sample has a three-layer structure including the high resistivity layer sandwiched between top and bottom conductive layers. The resistance-area product is determined using an equivalent circuit model having the injected current value and the measured voltage or resistance value as input.

[0007] A first aspect of the present disclosure is a method for determining electrical properties (e.g., the resistance-area product) of a multilayer test sample. The multilayer test sample has: a bottom layer, which constitutes a first conductive or semiconductor layer (e.g., a wafer substrate); an interface layer; and a top layer, which constitutes the second conductive or semiconductor layer. The interface layer is disposed between the bottom layer and the top layer, and has a lower conductivity than the bottom layer and the top layer, and also has a thickness such that the interface layer substantially constitutes an ohmic conductor, and electron transport through the interface layer by quantum tunneling is negligible (e.g., the total transport of electrons through the interface layer is less than 1%). This electron transport through the interface layer is shielded by measurement noise. The method includes providing the test sample, providing a microscopic multi-point probe, the probe having a set of contact probes for contacting the top layer, contacting the top layer with the set of contact probes, and measuring a plurality of voltages or resistances for each of a plurality of contact probe intervals. Each resistance or voltage measurement uses a pair of contact probes. A model for determining the resistance-area product of the interface layer is provided. The model receives the plurality of voltages or resistances as inputs and returns the resistance-area product as output. The resistance-area product is determined by the model.

[0008] If the top layer is not already provided, it can be provided by depositing it on top of the interface layer / high resistivity layer so that the microscopic multi-point probe can land on the top conductive layer and electrical contact can be established. The top layer can be a metal or semiconductor layer. The top layer can also be called a top electrode.

[0009] For example, the interface layer / high resistivity layer may be an oxide layer on top of the wafer or a material such as high-k, indium gallium zinc oxide (IGZO) or phase change material (PCM). Other materials are possible.

[0010] For an ohmic conductor, the current passing through it is proportional to the voltage across it (i.e., following Ohm's law). The tunneling barrier is not an ohmic conductor. However, electron transport by quantum mechanical tunneling cannot be excluded, but it will be negligible for the material to be measured, which means that it will be so small that the measurement noise will increase it. Therefore, it is impossible to measure because the signal-to-noise ratio in the measurement is too low.

[0011] Contact probes are also referred to as pins / electrodes. The contact probes may have each probe tip / probe end positioned along a line with equal spacing / pitch between each tip (eg, co-linear equidistant probes).

[0012] Specifically, three different pin / contact probe configurations may be used. For example, for the first current injection / measurement, the two outermost pins may be used to inject the current, and the two innermost pins may be used for voltage measurement.

[0013] For the second current injection, the current may be injected using the two left outer pins, and the voltage may be measured using the two right outer pins.

[0014] For the third current injection, the outermost pin and the center pin may be used to inject the current (ie, with a voltage pin in between).

[0015] In order to make the three measurements mathematically independent, a probe having at least five pins may be used. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] For a more complete understanding of the nature and purpose of the present disclosure, reference should be made to the following detailed description taken in conjunction with the accompanying drawings, in which:

[0017] Figure 1 An exemplary wafer having three layers is shown; and

[0018] Figures 2a to 2c Shows the configuration of the probe's current and voltage pins. DETAILED DESCRIPTION

[0019] The present disclosure will be explained in more detail below by way of examples. However, the present disclosure may be embodied in forms other than those described below, and should not be construed as being limited to any of the examples set forth herein. On the contrary, any examples are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art.

[0020] Figure 1 A wafer 10 is shown having three layers. A top layer 12, which may be tungsten, is deposited on an interface layer 14, which is the layer to be measured. The wafer substrate 16 constitutes the bottom layer.

[0021] Generally, the top layer 12 should be a metal material that is easy to contact, such as Ru, W or TiN. The sheet resistance of the top layer 12 can be three times the sheet resistance of the bottom layer or bottom electrode. This sheet resistance can provide the desired measurement results.

[0022] The bottom layer may be the wafer substrate 16 or a layer on top of the wafer substrate 16. The bottom layer may be made of Ru, W, TiN or doped Si.

[0023] The interface layer 14 may have a resistance area product greater than 1000 ohm*um^2. For example, the resistance area product of the interface layer 14 may be greater than 10 megaohm*um^2, 100 megaohm*um^2, or 1000 megaohm*um^2.

[0024] To provide the desired measurements, the interface layer 14 may have a thickness greater than 2 nm and a conductivity that is one-tenth the conductivity of the bottom or top layers 12. Other resistance area products, thicknesses, and conductivities are possible. These are examples only.

[0025] Conventional microscopic four-point measurements on this material stack provide the sheet resistance, which, in a three-layer model, is the combination of the sheet resistance of the top and bottom layers and the resistance-area product (RA) of the interface layer. These parameters define the transport length (designated L or λ), which is the characteristic lateral length scale for current transport in the sample.

[0026] The results of a four-point probe measurement can have large differences depending on the ratio of the probe pitch to L. Typically, a small probe pitch primarily probes the top layer, and a large probe pitch primarily probes the parallel resistance of the top and bottom layers.

[0027] Measurements over a range of probe pitches around λ are required to determine the properties of all three layers.

[0028] In an embodiment, the value of L ranges from 100um to 300um (micrometers). If the top or bottom layer of the stack has a resistance that is several times (e.g. > 5) that of the other layer, then a measurement with a 1000um pitch will be less sensitive to the high resistivity layer. In addition, this measurement will also be less sensitive to high resistance interface layers. Therefore, unless all layers have similar resistance, such measurements may be unreliable when monitoring process variations in a multilayer stack.

[0029] Figures 2a to 2c Three different configurations of the current and voltage pins of the probes are shown. Only four pins are shown here. The voltmeter is shown as a single-circle circuit symbol, and the current source is shown as a double-circle circuit symbol. The contact probes / pins are shown as rectangular arrow circuit symbols. Although four probes / pins are shown, more or fewer probes / pins are possible. In the example, more than four probes / pins are used.

[0030] The probes may have a distance of at least 4 um between adjacent contact probes, although other dimensions are possible. In an example, the probes have a distance of less than 3 mm between the two outermost contact probes.

[0031] In the following, it is assumed that there is no in-plane current in the interface layer, which is equivalent to the interface layer being highly resistive and thin compared to the top and bottom layers. The conductivity of the bottom layer should be more than 100 times better than that of the interface layer to maintain and be able to use the model given below.

[0032] When the probe is bonded to a multi-layer sample, it will measure a combination of the resistance of the bottom layer (Rb) and the top layer (Rt) and the interface resistance area product (RA = rho*t), where rho and t are the resistance and thickness of the interface layer, respectively.

[0033] In an example, the contact probe may land on a conductive or semiconducting layer, or on a contact pad connected to the conductive or semiconducting layer. The conductive or semiconducting layer may be in the top layer 12.

[0034] For a collinear equidistant probe (ie, a probe where all electrodes are in one line and are equally spaced), the resistance measured in the A, B, and C configurations is defined by the following model.

[0035]

[0036]

[0037]

[0038] R A is used Figure 2a Resistance measured by the probe in the configuration shown. R B is Figure 2b Resistance measured using a probe in the configuration shown. R C is used Figure 2c Resistance measured by the probe in the configuration shown.

[0039] K0(x) is the second kind zero-order Bessel function, s is the electrode pitch, and λ is the characteristic length given by the following formula.

[0040]

[0041] The relationship between the resistance area product and the sheet resistance is as follows.

[0042]

[0043] The model can then be numerically solved to obtain the resistance-area product (RA) of the interface layer. Thus, the resistance-area product of the interface layer is determined as a function of the resistance measurement. Alternatively, instead of entering the measured resistance, the values ​​of the injected current and measured voltage can be input, since resistance is voltage divided by current.

[0044] In an embodiment, a first current is injected into the test sample through a first pair of contact probes of the contact probe set. A second current is injected into the test sample through a second pair of contact probes of the contact probe set. A third current is injected into the test sample through a third pair of contact probes of the contact probe set. There is a distance between the first pair of contact probes, the second pair of contact probes, and the third pair of contact probes. These distances can be the same, or different, depending on the probes that make up the pair.

[0045] The controller may be coupled to the probe and communicate electronically with the probe. The controller typically includes a programmable processor that is programmed in software and / or firmware to perform the functions described herein, and appropriate digital and / or analog interfaces for connecting to other elements of the system. Additionally or alternatively, the controller includes hard-wired and / or programmable hardware logic circuits that perform at least some of the functions of the controller. In practice, the controller may include a plurality of interconnected control units with appropriate interfaces for receiving and outputting the signals described herein. Program code or instructions for the controller to implement the various methods and functions disclosed herein may be stored in a readable storage medium, such as a memory or other memory in the controller.

[0046] Although the present disclosure has been described with respect to one or more specific embodiments, it should be understood that other embodiments of the present disclosure can be made without departing from the scope of the present disclosure. Therefore, the present disclosure is considered to be limited only by the appended claims and reasonable interpretations thereof.

Claims

1. A method for determining electrical properties of a multi-layer test sample, comprising: The multi-layer test sample is provided, wherein the multi-layer test sample comprises: a bottom layer, which constitutes a first conductive or semiconductive layer; Interface layer; a top layer constituting a second conductive or semiconducting layer, wherein the interfacial layer is disposed between the bottom layer and the top layer, wherein the interfacial layer has a lower conductivity than the bottom layer and the top layer; and wherein the interfacial layer has a thickness such that the interfacial layer substantially constitutes an ohmic conductor and such that electron transport through the interfacial layer by quantum tunneling is negligible compared to total electron transport through the interfacial layer; providing a microscopic multi-point probe having a contact probe set for contacting the top layer; contacting the top layer with the contact probe set; measuring a plurality of voltages or resistances at each of a plurality of intervals of contact probes, wherein a pair of contact probes is used for each resistance or voltage measurement; providing a model for determining a resistance-area product of the interface layer, wherein the model receives the plurality of voltages or resistances as inputs and returns the resistance-area product as output; and The resistance-area product is determined by the model. 2 . The method of claim 1 , wherein the electron transport through the interface layer by quantum tunneling is masked by measurement noise. 3 . The method of claim 1 , wherein the electron transport through the interface layer by quantum tunneling is less than 1% of the total electron transport through the interface layer.

4. The method according to claim 1, further comprising: injecting a first current into the test sample using a first pair of contact probes of the contact probe set, the first pair of contact probes having a first distance therebetween; injecting a second current into the test sample using a second pair of contact probes of the contact probe set, the second pair of contact probes having a second distance therebetween; and A third current is injected into the test sample using a third pair of contact probes of the contact probe set, the third pair of contact probes having a third distance therebetween. 5 . The method of claim 1 , further comprising landing the contact probe set on the second conductive or semiconductive layer, or on a contact pad connected to the second conductive or semiconductive layer. The method of claim 1 , wherein the contact probe set includes more than four contact probes.

7. The method of claim 1, wherein the first conductive or semiconductive layer constitutes a wafer substrate. The method of claim 1 , wherein the semiconductor layer in the bottom layer is a wafer substrate.

9. The method of claim 1, wherein the interface layer has a resistance area product greater than 1000 ohm*um^2.

10. The method of claim 9, wherein the resistance area product is greater than 10 megaohm*um^2.

11. The method of claim 1, wherein the microscopic multi-point probes have a distance of at least 4 um between adjacent contact probes.

12. The method of claim 11, wherein the microscopic multi-point probe has a distance between two outermost portions of the contact probes of less than 3 mm.

13. The method of claim 1, wherein the interfacial layer has a thickness greater than 2 nm.

14. The method of claim 1, wherein the interface layer has an electrical conductivity that is one tenth of that of the bottom layer or the top layer.

15. The method according to claim 1, wherein the model constitutes an electrical equivalent circuit of the first conductive or semiconductive layer, the interfacial layer, and the second conductive or semiconductive layer.

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