A high-frequency surgical apparatus control system

Abstract

This invention discloses a high-frequency surgical equipment control system, including a rectifier and voltage regulator circuit, a voltage regulation circuit, an inverter output circuit, and a drive control circuit. The mains power supply outputs a BOOST voltage HVDC+ after rectification and regulation. The BOOST voltage HVDC+ serves as the power input voltage regulator circuit. The voltage regulator circuit outputs an adjustable voltage VB+ as the power supply for the inverter output circuit, which then delivers a high-frequency output to the load. Simultaneously, the drive control circuit's control chip U5 outputs an enable signal BOOST EN to the rectifier and voltage regulator circuit to control it. The control chip U5 outputs a PWM signal I_set to control the set current of the voltage regulation circuit, and a PWM signal V_set to control the set voltage of the voltage regulation circuit. The control chip U5 also outputs PWM signals PWM1B and PWM1A to drive the inverter output circuit's full-bridge output. This invention achieves clinical application requirements through hardware sampling, closed-loop feedback, and output control.

Description

Technical Field

[0001] This invention belongs to the technical field of high-frequency surgical equipment for medical use, and specifically relates to a control system for high-frequency surgical equipment. Background Technology

[0002] High-frequency surgical equipment operates at frequencies between 1.7MHz and 4.0MHz. Compared with traditional electrosurgical equipment (operating frequencies between 300kHz and 500kHz), it has advantages in clinical use such as high cutting efficiency and less thermal damage, and has a promising future in electrosurgical procedures.

[0003] However, due to its high operating frequency, it places higher demands on the performance of driving devices and sampling networks. The heat loss of the driving devices and the frequency characteristics of the sampling network are crucial indicators determining the reliability, safety, and effectiveness of high-frequency surgical equipment. Existing high-frequency surgical equipment has the following shortcomings: 1) It uses a power frequency transformer to convert AC to DC output, resulting in large size, heavy weight, and a narrow power supply adaptability range; 2) The high-frequency output uses linear drive transistors to drive the high-frequency energy output, resulting in high losses, high heat generation, and difficulty in long-term operation; 3) The energy output curve uses a software sampling closed-loop feedback method, leading to poor control accuracy. Summary of the Invention

[0004] To overcome the shortcomings of existing technologies, this invention provides a solution for a high-frequency surgical equipment control system, the specific technical solution of which is as follows:

[0005] A high-frequency surgical equipment control system includes a rectifier and voltage regulator circuit, a voltage regulator circuit, an inverter output circuit, and a drive control circuit. The rectifier and voltage regulator circuit is unidirectionally connected to the voltage regulator circuit, and the voltage regulator circuit is unidirectionally connected to the inverter output circuit. The drive control circuit is connected to the rectifier and voltage regulator circuit, the voltage regulator circuit, and the inverter output circuit. The mains power supply outputs a BOOST voltage HVDC+ after passing through the rectifier and voltage regulator circuit. The BOOST voltage HVDC+ serves as the power input to the voltage regulator circuit. The voltage regulator circuit outputs an adjustable voltage VB+ as the power supply to the inverter output circuit, which then delivers a high-frequency output to the load. Simultaneously, the drive control circuit outputs an enable signal BOOST through its control chip U5. EN controls the rectifier and voltage regulator circuit; the control chip U5 outputs a PWM signal I_set to control the set current of the voltage regulation circuit, and outputs a PWM signal V_set to control the set voltage of the voltage regulation circuit; and the control chip U5 outputs PWM signals PWM1B and PWM1A to drive the inverter full-bridge output of the inverter output circuit.

[0006] Furthermore, in the drive control circuit, pin 61 of the control chip U5 outputs an enable signal BOOST EN to the rectifier and voltage regulator circuit to control the rectifier and voltage regulator circuit; pin 66 of the control chip U5 outputs a PWM signal I_set to control the set current of the voltage regulation circuit; pin 67 of the control chip U5 outputs a PWM signal V_set to control the set voltage of the voltage regulation circuit; pin 68 of the control chip U5 outputs a PWM signal PWM1B and pin 69 outputs a PWM signal PWM1A to drive the inverter full-bridge output of the inverter output circuit.

[0007] Furthermore, the rectifier and voltage regulator circuit includes a rectifier module, a voltage regulator module, and a voltage regulator drive module. The rectifier module converts the industrial frequency AC power into DC output, providing DC input to the DC voltage regulator module. The voltage regulator module converts the rectified DC voltage into a stable DC voltage output through a Boost circuit structure with FPC function. The rectifier module and the voltage regulator module are connected through a rectifier bridge BD1. The rectifier module is connected to the input pin of the rectifier bridge BD1, and the voltage regulator module is connected to the output pin of the rectifier bridge BD1. The input pin of the rectifier bridge BD1 is connected to the mains power supply AC_L and AC_N. The mains power supply AC_L and AC_N pass through capacitor C2 and varistor R5 to filter out harmonics in the mains power supply, through thermistor RT1 to suppress surge current of the equipment, through common-mode inductor L3 to suppress common-mode interference, through inductor L1 to suppress differential-mode interference, through capacitor C1 to filter out harmonics, and finally through rectifier bridge BD1 to rectify the mains power supply into a DC voltage signal V. DC .

[0008] Furthermore, the voltage regulator drive module includes a control chip N1. The control chip N1 outputs a PWM control signal Boost DR to drive the field-effect transistor Q2 of the voltage regulator module to turn on or off, thereby charging or discharging the inductor L2 of the voltage regulator module, and then charging the capacitor CE1 of the voltage regulator module and providing energy to the load. When Q2 is on, the current of inductor L2 increases, thereby charging and storing energy in inductor L2. At this time, the load is powered by capacitor CE1. When Q2 is off, inductor L2 charges and stores energy in capacitor D2 through diode D2 and provides energy to the load. The voltage sampling signal BOOST_FB is fed back to pin 11 of the control chip N1, and the control chip N1 then adjusts the duty cycle of the PWM control signal Boost DR according to the feedback signal.

[0009] Furthermore, the voltage regulation circuit includes a feedback circuit, a control circuit, and a power drive circuit. The feedback circuit includes four operational amplifiers. The input terminal of operational amplifier N2A is electrically connected to the current setting signal I_SET, and its output terminal outputs a current control signal I_CTL electrically connected to the input terminal of operational amplifier N2C. The two input terminals of operational amplifier N2C are electrically connected to the voltage setting signal V_SET and the voltage sampling signal VB_FB, respectively. Its output terminal outputs a control signal V_CTL connected to the negative input terminal of operational amplifier N2D and the input terminal of operational amplifier N2A. The input terminal of operational amplifier N4C is connected to... The current sampling signal IB_S1 is connected to the current feedback signal IB_S, which is then connected to the positive input of the operational amplifier N2D. The output of the operational amplifier N2D outputs a feedback control signal DC_FB, which is connected to the input of the control circuit. The output of the control circuit is electrically connected to the power drive circuit. The power drive circuit outputs the current sampling signal IB_S1, the voltage sampling signal VB_FB, and the adjustable voltage VB+. The control chip N3 of the control circuit adjusts the duty cycle of the PWM control signal of the power drive circuit according to the voltage feedback control signal DC_FB, thereby controlling the power output.

[0010] Furthermore, the control chip N3 of the control circuit outputs a PWM control signal DC_GD to drive the MOSFETs Q1 and Q3 of the power drive circuit to turn on or off, energizing the primary coil of the transformer T1 in the power drive circuit. Energy is then transferred to the inductor L4, capacitor CE2, and load terminal through the secondary coil of transformer T1. When MOSFETs Q1 and Q3 are on, the primary coil of transformer T1 experiences a DC voltage HVDC+, increasing the current and transferring energy to the secondary side. In the secondary circuit, current flows through diode D3, charging and storing energy for inductor L4 and capacitor CE2, and providing energy to the load. When MOSFETs Q1 and Q3 are off, the primary coil of transformer T1 freewheels and demagnetizes through diodes D4 and D6. In the secondary circuit, inductor L4 freewheels and releases energy through diode D5, and CE2 provides energy to the load. The voltage regulation circuit provides feedback on the output voltage signal through a voltage sampling signal VB_FB and on the output current signal through current sampling signals IB_S1+ and IB_S1-.

[0011] Furthermore, when the feedback circuit is in steady-state operation, the operational amplifier N2C is in negative feedback mode, and the voltage setting signal V_SET input to the positive input pin 10 is the same as the voltage feedback signal VFB input to the negative input pin 9; the operational amplifier N2D is in negative feedback mode, and the current feedback signal IB_S input to the positive input pin 12 is the same as the voltage control signal V_CTL input to the negative input pin 9.

[0012] Furthermore, when the current feedback signal IB_S is less than the current setting signal I_SET_2, the current control signal I_CTL equals 0, the voltage sampling signal VB_FB equals the feedback signal VFB, and the feedback signal VFB equals the voltage setting signal V_SET. That is, the voltage sampling signal VB_FB equals the voltage setting signal V_SET, and the circuit operates in constant voltage source mode. When the current feedback signal IB_S is greater than the current setting signal I_SET_2, the feedback signal VFB equals the sum of the voltage sampling signal VB_FB and the current control signal I_CTL. At this time, the operational amplifier N2A is in negative feedback state, the voltage control signal V_CTL equals the current setting signal I_SET_2, and the voltage control signal V_CTL equals the current feedback signal IB_S. Therefore, the current setting signal I_SET_2 equals the current feedback signal IB_S, and the circuit operates in constant current source mode.

[0013] Furthermore, the inverter output circuit is used to output a high-frequency energy signal by receiving a high-frequency drive signal from the drive control circuit and a voltage signal from the voltage regulation output; it includes a drive chip U1, a drive chip U2, field-effect transistors Q5, Q6, Q7, Q8, and a transformer T2. In this circuit, the PWM control signal PWM1A enters pin 1 INA of the drive chip U1 through resistor R58, and controls the on and off of the field-effect transistor Q5 through output pin 15 OUTA; the PWM control signal PWM1B enters pin 2 INB of the drive chip U1 through resistor R59, and controls the on and off of the field-effect transistor Q7 through output pin 10 OUTB; the PWM control signal PWM1B enters pin 1 INA of the drive chip U2 through resistor R65, and controls the on and off of the field-effect transistor Q6 through output pin 15 OUTA; the PWM control signal PWM1A enters pin 2 INB of the drive chip U2 through resistor R66, and controls the on and off of the field-effect transistor Q8 through output pin 10 OUTB. Among them, the PWM control signals PWM1A and PWM1B are two sets of complementary control signals. When PWM1A is high, PWM1B is low; when PWM1A is low, PWM1B is high.

[0014] Specifically, the PWM control signal PWM1A controls the simultaneous on / off of MOSFETs Q5 and Q8, and the PWM control signal PWM1B controls the simultaneous on / off of MOSFETs Q6 and Q7. When MOSFETs Q5 and Q8 are on and Q6 and Q7 are off, the primary winding current of transformer T2 flows from pin 1 to pin 2; when MOSFETs Q6 and Q7 are on and Q5 and Q8 are off, the primary winding current of transformer T2 flows from pin 2 to pin 1, realizing the inverter output function of the transformer. Among them, inductors L5 and L6, capacitors C31 and C32 realize the hardware impedance matching function of the output circuit.

[0015] Compared with the prior art, the present invention has the following advantages:

[0016] The rectifier module converts the mains frequency AC power (AC220V / 50Hz) into DC output, providing DC input for the DC voltage regulator module. The voltage regulator module uses a Boost circuit structure with FPC function (PFC control chip) to convert the rectified DC voltage into a stable DC voltage output. After the voltage regulation output mode is activated, the DC output voltage is not affected by mains power fluctuations (requiring ±10%). The power factor adjustment function can improve the power factor of the equipment and achieve a wide range of input voltage.

[0017] The voltage regulation circuit adjusts the output power through closed-loop control, and can achieve power regulation by controlling the output voltage and output current. Through voltage sampling and feedback, it achieves a stable DC power supply output function. Through current sampling and feedback, it achieves output current limit and realizes current source output function in low impedance mode. When the output load is high impedance (greater than the rated load), it operates in voltage source mode, and when the impedance is low (less than the rated load), it realizes current source mode, thereby controlling the power curve.

[0018] The inverter output circuit receives the high-frequency drive signal from the drive control circuit and the voltage signal from the voltage regulation output, and outputs a high-frequency energy signal. Inductors L5 and L6, capacitors C31 and C32 realize the hardware impedance matching function of the output circuit, reducing the dependence on the sampling and feedback network, and achieving high accuracy and high safety.

[0019] It uses high-speed switching transistors to drive high-frequency energy output, which solves the switching loss, improves energy output efficiency, and reduces energy loss; it meets the requirements of clinical use through hardware sampling, closed-loop feedback, and output control, which does not rely on software computing power and has high safety; it also has the advantages of real-time feedback control and fast response speed. Attached Figure Description

[0020] Figure 1 This is a system diagram of the present invention;

[0021] Figure 2 The present invention relates to a rectifier module and a voltage regulator module;

[0022] Figure 3 This is the voltage regulator drive module of the present invention;

[0023] Figure 4 This is the feedback circuit of the voltage regulation circuit of the present invention;

[0024] Figure 5 This is the control circuit for the voltage regulation circuit of the present invention;

[0025] Figure 6 This is the power drive circuit of the voltage regulation circuit of the present invention;

[0026] Figure 7 This is the inverter circuit of the present invention;

[0027] Figure 8 This is the driving control circuit of the present invention;

[0028] Figure 9 This invention relates to a foot switch circuit;

[0029] Figure 10 This is the speaker circuit of the present invention;

[0030] Figure 11 This is the panel display circuit of the present invention. Implementation

[0031] The following description, in conjunction with the accompanying drawings, further illustrates a high-frequency surgical equipment control system according to the present invention.

[0032] like Figure 1The high-frequency surgical equipment control system shown includes a rectifier and voltage regulator circuit, a voltage regulator circuit, an inverter output circuit, and a drive control circuit. The rectifier and voltage regulator circuit is unidirectionally connected to the voltage regulator circuit, and the voltage regulator circuit is unidirectionally connected to the inverter output circuit. The drive control circuit is connected to the rectifier and voltage regulator circuit, the voltage regulator circuit, and the inverter output circuit. The mains power supply outputs a BOOST voltage HVDC+ after being rectified and regulated. The BOOST voltage HVDC+ serves as the power input voltage regulator circuit. The voltage regulator circuit outputs an adjustable voltage VB+ as the power supply for the inverter output circuit, which then delivers a high-frequency output to the load. Simultaneously, the drive control circuit outputs an enable signal BOOST through pin 61 of the control chip U5. The EN pin of the rectifier and voltage regulator circuit controls the rectifier and voltage regulator circuit. Pin 66 of the control chip U5 outputs the PWM signal I_set to control the set current of the voltage regulation circuit. Pin 67 of the control chip U5 outputs the PWM signal V_set to control the set voltage of the voltage regulation circuit. Pin 68 of the control chip U5 outputs the PWM signal PWM1B and pin 69 outputs the PWM signal PWM1A to drive the inverter full-bridge output of the inverter output circuit.

[0033] Specifically, the rectifier and voltage regulator circuit includes, for example: Figure 2 The rectifier module and voltage regulator module shown, as well as... Figure 3 The voltage regulator module shown converts the mains AC power (AC220V / 50Hz) to DC output, providing DC input for the DC voltage regulator module. The voltage regulator module uses a Boost circuit structure (PFC control chip) with FPC function to convert the rectified DC voltage into a stable DC output voltage. In regulated output mode, the DC output voltage is unaffected by mains power fluctuations (requiring ±10%). The power factor adjustment function improves the power factor of the equipment.

[0034] The rectifier module and the voltage regulator module are connected via rectifier bridge BD1. The rectifier module is connected to the input pin of rectifier bridge BD1, and the voltage regulator module is connected to the output pin of rectifier bridge BD1. The input pin of rectifier bridge BD1 is connected to the mains power supply AC_L and AC_N. The mains power supply AC_L and AC_N pass through capacitor C2 and varistor R5 to filter out harmonics from the mains power supply, through thermistor RT1 to suppress surge current of the equipment, through common-mode inductor L3 to suppress common-mode interference, through inductor L1 to suppress differential-mode interference, through capacitor C1 to filter out harmonics, and finally through rectifier bridge BD1 to rectify the mains power supply into a DC voltage signal V. DCThe rectifier bridge BD1 has two output pins: one grounded and the other outputting the BOOST voltage HVDC+. The grounded output pin of rectifier bridge BD1 is connected to resistor R31, with resistors R9 and R10 electrolytically connected across R31. Resistor R9 is connected to signal BSH+, and resistor R10 is connected to signal BSH-. The output pin of rectifier bridge BD1, which outputs the BOOST voltage HVDC+, is connected in sequence to inductor L2, diode D2, and diode D1 connected in parallel with inductor L2 and diode D2. Resistors R2 and R3 are connected between the output pin of rectifier bridge BD1 and inductor L2. The other end of resistor R2 is connected to Vrms, and the other end of resistor R3 is connected to Vac. The two output pins of rectifier bridge BD1 are connected in sequence to MOSFET Q2, capacitor CE1, resistor R4, and resistor R8. Pin 1 of MOSFET Q2 is connected to the PWM control signal Boost. DR, pin 2 of MOSFET Q2 is connected between inductor L2 and diode D2, and pin 3 of MOSFET Q2 is grounded; one end of capacitor CE1 is grounded, and the other end is synchronously connected to diodes D1 and D2; one end of resistor R4 is connected to the output BOOST voltage HVDC+ terminal, and the other end is connected to the voltage sampling signal BOOST_FB terminal; one end of resistor R8 is connected to the voltage sampling signal BOOST_FB terminal, and the other end is grounded.

[0035] The voltage regulator driver module includes a control chip N1. Pin 1 of the control chip N1 is grounded. Pin 2 is synchronously connected to resistors R15 and R22, and capacitor C4. The other end of capacitor C4 is grounded. The other end of resistor R15 outputs the signal BSh- and is connected to resistor R17. The other end of resistor R17 is connected to pin 5 of the control chip N1, and capacitor C5 is connected between it and pin 5. The other end of capacitor C5 is grounded. The other end of resistor R22 is synchronously connected to pin 9 of the control chip N1, capacitor C6, resistor R20, and resistor R19, i.e., the control chip... Pin 9 of N1 is synchronously connected to resistor R22, capacitor C6, resistor R20, and resistor R19; the other end of capacitor C6 is grounded and connected to capacitor C7, the other end of which is connected to pin 15 of control chip N1 and power supply VCC; the other end of resistor R20 is synchronously connected to pin 6 of control chip N1, resistor R35, and capacitor C17, with the other end of resistor R35 outputting signal Vac, and the other end of capacitor C17 grounded; the other end of resistor R19 is synchronously connected to resistors R14 and R18, and capacitor C3, with the other end of capacitor C3 grounded. The other end of resistor R14 outputs the signal BSH+. The other end of resistor R18 is connected to pin 4 of control chip N1, and capacitor C9 and resistor R23 are connected between pin 4 and pin 3 of control chip N1. Pin 6 of control chip N1 is also connected to resistor R35, and the other end of resistor R35 outputs the signal Vac. Pins 7 and 11 of control chip N1 are connected to output the voltage sampling signal BOOST_FB, and capacitor C8 and resistor R21 are connected between pins 7 and 11 in sequence. Pin 10 of control chip N1 is connected to the enable signal B. OOST_EN; Pin 8 of control chip N1 is connected to resistor R43 and outputs signal Vrms; Pin 13 of control chip N1 is connected to capacitor C23 and then grounded; and capacitor C22 is connected between resistor R43 and capacitor C23. One end of capacitor C22 is grounded, and the other end is connected to the output signal Vrms; Pin 12 of control chip N1 is connected to resistor R57 and then grounded; Pin 14 of control chip N1 is connected to capacitor C27 and then grounded; Pin 16 of control chip N1 is connected to resistor R44 and outputs PWM control signal Boost DR.

[0036] It can be understood that the rectifier and voltage regulator circuit achieves a stable output of the BOOST voltage HVDC+ through output control, sampling feedback, and duty cycle adjustment. Specifically, the voltage regulator drive module outputs a PWM control signal Boost DR through the voltage regulator control chip N1, driving the MOSFET Q2 of the voltage regulator module to turn on or off, thereby charging or discharging the inductor L2, which in turn charges the capacitor CE1 and provides energy to the load. When Q2 is on, the current in inductor L2 increases, charging and storing energy in the inductor; at this time, the load is powered by capacitor CE1. When Q2 is off, inductor L2 charges and stores energy in the capacitor through diode D2 and provides energy to the load. The voltage sampling signal BOOST_FB is fed back to pin 11 of the control chip N1, and the control chip N1 then adjusts (increases or decreases) the duty cycle of the PWM control signal Boost DR based on the feedback signal.

[0037] The voltage regulation circuit adjusts the output power through closed-loop control, and can achieve power regulation by controlling both the output voltage and output current. The voltage regulation circuit includes, for example... Figure 4 The feedback loop shown is as follows: Figure 5 The control circuit shown and as Figure 6The power drive circuit shown is a feedback loop consisting of operational amplifiers N2A, N2C, N2D, and N4C. The negative input pin 2 of operational amplifier N2A is connected to the current setting signal I_SET. This current setting signal I_SET is filtered by resistor R25, capacitor C11, and resistor R26, forming the current setting signal I_SET_2, which then enters the negative input pin 2 of operational amplifier N2A. The positive input pin 3 is connected to ground via resistor R30 and capacitor C14. The output pin 1 is electrically connected to the negative input pin 9 of operational amplifier N2C, and capacitor C10 is connected in series between the negative input pin 2 and the output pin 1. The negative input pin 9 of operational amplifier N2C is connected to the voltage sampling signal VB_FB. The voltage sampling signal VB_FB is connected in series with resistor R37 and then enters the negative input pin 9 of operational amplifier N2C. The positive input terminal of operational amplifier N2C is connected to the voltage setting signal V_SET. The voltage setting signal V_SET is connected in series with resistor R45 and then enters the positive input pin 10 of operational amplifier N2C. The output pin 8 of operational amplifier N2C is connected in series with resistor R40 and then connected to the negative input pin 13 of operational amplifier N2D. Furthermore, the negative input pin 9 and the output pin 8 of operational amplifier N2C are connected in series with resistor R32 and capacitor C15. The negative input pin 9 of operational amplifier N2C and the output pin 1 of operational amplifier N2A are connected in series with diode D7 and resistor R24. The positive input pin 3 of operational amplifier N2A and the output pin 8 of operational amplifier N2C are electrically connected with resistor R31. The positive input pin 10 of operational amplifier N4C is connected to the current sampling signal IB_S1+. The current sampling signal IB_S1+ is filtered by resistor R53 and capacitor C26, and then connected in series with resistor R54 before entering the positive input pin 10 of operational amplifier N4C. The negative input pin 9 of operational amplifier N4C is connected to the current sampling signal IB_S1-. The current sampling signal IB_S1- is filtered by resistor R52 and capacitor C24, and then connected in series with resistor R51 before entering the negative input pin 9 of operational amplifier N4C. The output pin 8 of operational amplifier N4C is connected to ground in series with resistor R55. The positive input pin 10 of operational amplifier N4C is connected to ground in series with resistor R56. R47 is connected between the output pin 8 and the positive input pin 12 of operational amplifier N2D. Resistor R48 is connected between the negative input pin 9 and the output pin 8 of operational amplifier N4C. One end of resistor R48 is connected to the negative input pin 9 of operational amplifier N4C, and the other end is connected between R47 and the output pin 8. The positive input pin 12 of operational amplifier N2D is connected to resistor R47; the negative input pin 13 is connected to resistor R40, and the other end of resistor R40 is connected to the output pin 8 of operational amplifier N2C; the output pin 14 of operational amplifier N2D is connected in series with resistor R46 to output the feedback control signal DC_FB, and a capacitor C16 and a resistor R34 are connected in series between the output pin 14 and the negative input pin 13 of operational amplifier N2D.

[0038] The control circuit includes a control chip N3. The COMP pin of control chip N3 is connected to the voltage feedback control signal DC_FB. Specifically, the voltage feedback control signal DC_FB is connected sequentially to resistors R27, R28, and R29 before entering the COMP pin of control chip N3. One end of capacitor C13 is connected between resistors R27 and R29, and the other end of capacitor C13 is grounded. The Vfb pin of control chip N3 is connected between resistors R28 and R29. The OUT pin of control chip N3 is connected to resistor R33 and outputs the control signal DC_GD. The Vref pin of control chip N3 is simultaneously connected to the 3C pin of transistor Q4, resistor R38, and capacitor C20. The other end of capacitor C20 is grounded, and the other pin of resistor R38 is connected to the transistor. Pin 1B of transistor Q4 and pin 2E of transistor Q4 are connected to resistor R50 and then grounded. The Rt / Ct pin of control chip N3 is connected to pin 1B of transistor Q4 and capacitor C19, with the other end of capacitor C19 grounded. The Isense pin of control chip N3 is connected to capacitor C18, resistors R41, R42 and R36. The other ends of capacitor C18 and resistor R41 are grounded. The other end of resistor R42 is connected to resistor R50 and then grounded. The other end of resistor R36 is connected to resistor R39 and capacitor C21, with the other end of capacitor C21 grounded. The other end of resistor R39 is connected to resistor R49 and capacitor C25, with the other end of capacitor C25 grounded. The other end of resistor R49 outputs the threshold voltage DC_Isense+.

[0039] The power drive circuit includes MOSFETs Q1 and Q3, and a transformer T1. Pin 1 of MOSFET Q1 receives the control signal DC_GD. Pin 2 of MOSFET Q1 is connected to the DC voltage HVDC+. Pin 3 of MOSFET Q1 is simultaneously connected to pin 1 of transformer T1 and S1_DCDC. A resistor R1 is connected between the control signal DC_GD and S1_DCDC; one end of resistor R1 is connected to pin 1 of MOSFET Q1, and the other end is connected to pin 3 of MOSFET Q1, then to diode D4, and finally to ground. Pin 1 of MOSFET Q3 receives the control signal DC_GD. Pin 2 of MOSFET Q3 is simultaneously connected to pin 2 of transformer T1 and diode D6, with the other end of diode D6 connected to the DC voltage HVDC+. Pin 3 of MOSFET Q3 is connected to resistor RS3 and the threshold voltage DC_Isense+, with the other end of resistor RS3 grounded. The control signal DC_GD and the threshold voltage DC_Isense+ are connected to resistor R16. Pin 4 of transformer T1 is connected to diode D3. The other end of diode D3 is connected to diode D5 and inductor L4. The other end of diode D5 is connected to pin 3 of transformer T1. The other end of inductor L4 is connected to capacitor CE2 and resistor R6, and then to VB+. The other end of capacitor CE2 is connected to resistor RS2, resistor R13, and ground. The other end of resistor R13 outputs the current sampling signal IB_S1+. Resistor RS2 and diode D5 are connected to resistor R12, and then output the current sampling signal IB_S1-. The other end of resistor R6 is connected to resistor R11 and then to ground. Resistor R6 and resistor R11 are connected to output the voltage sampling signal VB_FB.

[0040] It can be understood that the current sampling signals IB_S1+ and IB_S1- are filtered by resistors R52 and R53 and capacitors C24 and C26 respectively, and then input to the differential input pins 9 and 10 of operational amplifier N4C by resistors R51 and R54 respectively. After differential amplification by feedback resistors R48 and R56, the current feedback signal IB_S is obtained. The current setting signal I_SET is filtered by resistor R25 and capacitor C11 and then input to resistor R26 to form the current setting signal I_SET_2. The current setting signal I_SET_2 is input to the negative input pin 2 of operational amplifier N2A. The control signal V_CTL output by the voltage of pin 8 of operational amplifier N2C is input to the positive input pin of operational amplifier N2A by resistor R31. After processing by operational amplifier N2A, the current control signal I_CTL is output from pin 1. The voltage setting signal V_SET enters the positive input pin 10 of operational amplifier N2C through resistor R45; the voltage sampling signal VB_FB enters the negative input pin 9 of operational amplifier N2C through resistor R37; simultaneously, the current control signal I_CTL enters the negative input pin 9 of operational amplifier N2C through resistor R24 ​​and diode D7; the negative input pin 9 of operational amplifier N2C inputs the feedback signal VFB, and after processing by operational amplifier N2C, pin 8 outputs the voltage control signal V_CTL. The current feedback signal IB_S enters the positive input pin 12 of operational amplifier N2D through resistor R47; the voltage control signal V_CTL enters the negative input pin 13 of operational amplifier N2D through resistor R40; after processing by operational amplifier N2D, pin 14 outputs the voltage feedback control signal DC_FB.

[0041] When the circuit is operating in steady state, the operational amplifier N2C is in negative feedback mode, and the voltage setting signal V_SET input to the positive input pin 10 is the same as the voltage feedback signal VFB input to the negative input pin 9; the operational amplifier N2D is in negative feedback mode, and the current feedback signal IB_S input to the positive input pin 12 is the same as the voltage control signal V_CTL input to the negative input pin 9.

[0042] When the current feedback signal IB_S (which is the same as the voltage control signal V_CTL) is less than the current setting signal I_SET_2, the current control signal I_CTL equals 0, the voltage sampling signal VB_FB equals the feedback signal VFB, and the feedback signal VFB equals the voltage setting signal V_SET. In other words, the voltage sampling signal VB_FB equals the voltage setting signal V_SET, and the circuit operates in constant voltage source mode. When the current feedback signal IB_S (which is the same as the voltage control signal V_CTL) is greater than the current setting signal I_SET_2, the feedback signal VFB equals the sum of the voltage sampling signal VB_FB and the current control signal I_CTL. At this time, the operational amplifier N2A is in negative feedback mode, and the voltage control signal V_CTL equals the current setting signal I_SET_2. Since the voltage control signal V_CTL equals the current feedback signal IB_S, meaning the current setting signal I_SET_2 equals the current feedback signal IB_S, the circuit operates in constant current source mode.

[0043] In summary, the voltage regulation of this invention works as follows: The control chip N3 outputs a PWM control signal DC_GD to drive the MOSFETs Q1 and Q3 to turn on or off, energizing the primary coil of transformer T1. Energy is then transferred to inductor L4, capacitor CE2, and the load via the secondary coil of transformer T1. When MOSFETs Q1 and Q3 are on, the primary coil of transformer T1 experiences a DC voltage HVDC+, increasing the current and transferring energy to the secondary winding. In the secondary circuit, current flows through diode D3, charging inductor L4 and capacitor CE2 and providing energy to the load. When MOSFETs Q1 and Q3 are off, the primary coil of transformer T1 freewheels through diodes D4 and D6 to demagnetize. In the secondary circuit, inductor L4 freewheels through diode D5 and releases energy, while CE2 provides energy to the load. The circuit provides feedback on the output voltage signal through a voltage sampling signal VB_FB and on the output current signal through current sampling signals IB_S1+ and IB_S1-.

[0044] like Figure 7As shown, the inverter output circuit receives a high-frequency drive signal from the drive control circuit and a voltage signal from the voltage regulator output, and outputs a high-frequency energy signal. The inverter output circuit includes a driver chip U1, a driver chip U2, MOSFETs Q5, Q6, Q7, Q8, and a transformer T2. In this circuit, the PWM control signal PWM1A enters pin 1 (INA) of driver chip U1 through resistor R58, and controls the on / off state of MOSFET Q5 through output pin 15 (OUTA); the PWM control signal PWM1B enters pin 2 (INB) of driver chip U1 through resistor R59, and controls the on / off state of MOSFET Q7 through output pin 10 (OUTB); the PWM control signal PWM1B enters pin 1 (INA) of driver chip U2 through resistor R65, and controls the on / off state of MOSFET Q6 through output pin 15 (OUTA); the PWM control signal PWM1A enters pin 2 (INB) of driver chip U2 through resistor R66, and controls the on / off state of MOSFET Q8 through output pin 10 (OUTB). Among them, the PWM control signals PWM1A and PWM1B are two sets of complementary control signals. When the PWM control signal PWM1A is high, the PWM control signal PWM1B is low; when the PWM control signal PWM1A is low, the PWM control signal PWM1B is high.

[0045] In this inverter output circuit, the PWM control signal PWM1A controls the simultaneous on / off of MOSFETs Q5 and Q8, and the PWM control signal PWM1B controls the simultaneous on / off of MOSFETs Q6 and Q7. When MOSFETs Q5 and Q8 are on and Q6 and Q7 are off, the primary winding current of transformer T2 flows from pin 1 to pin 2; when MOSFETs Q6 and Q7 are on and Q5 and Q8 are off, the primary winding current of transformer T2 flows from pin 2 to pin 1, thus realizing the inverter output function of the transformer. Inductors L5 and L6, and capacitors C31 and C32 implement the hardware impedance matching function of the output circuit.

[0046] like Figure 8 As shown, in the drive control circuit, pin 61 of the control chip U5 outputs an enable signal BOOST EN to the rectifier and voltage regulator circuit to control the rectifier and voltage regulator circuit; pin 66 of the control chip U5 outputs a PWM signal I_set to control the set current of the voltage regulation circuit; pin 67 of the control chip U5 outputs a PWM signal V_set to control the set voltage of the voltage regulation circuit; pin 68 of the control chip U5 outputs a PWM signal PWM1B and pin 69 outputs a PWM signal PWM1A to drive the inverter full-bridge output of the inverter output circuit.

[0047] In addition, the control chip U5 also identifies the COAG mode setting status of the foot switch through the input signal COAG_KEY on pin 74; identifies the CUT mode setting status of the foot switch through the input signal CUT_KEY on pin 75; identifies the insertion status of the foot switch through the input signal FP_IN on pin 76; sets the working status of the segment display driver chip through the output signal CS on pin 1; provides a communication clock function for the segment display driver chip through the output signal CLK on pin 2; outputs display data to the segment display driver chip through the output signal DIN on pin 3; identifies the status data of the segment display driver chip by reading the output signal DOUT on pin 4; and drives the sound output by outputting the frequency sound control signal SOUND on pin 63.

[0048] like Figure 9 In the speaker circuit shown, the sound control signal SOUND drives the transistor Q9 to amplify the output signal through resistor R73, and adjusts the input signal through potentiometer R75. Finally, the sound is driven and output through the volume driver chip U4.

[0049] like Figure 10 The foot switch circuit shown uses resistors R85 and R86 and capacitor C44 to implement a fixed impedance range time-of-use function for the foot pedal insertion recognition signal FP_IN; resistors R80 and R83 and capacitor C43 to implement a fixed impedance range time-of-use function for the cut button signal CUT_KEY; and resistors R77 and R79 and capacitor C9 to implement a fixed impedance range recognition function for the coagulation button signal COAG_KEY.

[0050] like Figure 11 The panel display circuit shown has the driver chip U3 inputting the data signal DIN at pin 1, the selection signal CS at pin 12, and the clock signal CLK at pin 13. The panel segment code display function is achieved by outputting segment signals A / B / C / D / E / F / G / DP and bit selection signals DIG0 / DIG1 / DIG2 / DIG3 / DIG4 / DIG5. The segment codes indicate the output energy level, the energy output status, and the horn indicates the energy output status.

[0051] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A high-frequency surgical equipment control system, characterized in that, The control system includes a rectifier and voltage regulator circuit, a voltage regulator circuit, an inverter output circuit, and a drive control circuit. The rectifier and voltage regulator circuit is unidirectionally connected to the voltage regulator circuit, and the voltage regulator circuit is unidirectionally connected to the inverter output circuit. The drive control circuit is connected to the rectifier and voltage regulator circuit, the voltage regulator circuit, and the inverter output circuit. The grid power supply outputs a BOOST voltage HVDC+ after passing through the rectifier and voltage regulator circuit. The BOOST voltage HVDC+ serves as the power input to the voltage regulator circuit. The voltage regulator circuit outputs an adjustable voltage VB+ as the power supply to the inverter output circuit, which then delivers a high-frequency output to the load. Simultaneously, the drive control circuit outputs an enable signal BOOST through its control chip U5. EN controls the rectifier and voltage regulator circuit; the control chip U5 outputs a PWM signal I_set to control the set current of the voltage regulation circuit, and outputs a PWM signal V_set to control the set voltage of the voltage regulation circuit; and the control chip U5 outputs PWM signals PWM1B and PWM1A to drive the inverter full-bridge output of the inverter output circuit.

2. The high-frequency surgical equipment control system according to claim 1, characterized in that, In the drive control circuit, pin 61 of the control chip U5 outputs an enable signal BOOST EN to the rectifier and voltage regulator circuit to control the rectifier and voltage regulator circuit; pin 66 of the control chip U5 outputs a PWM signal I_set to control the set current of the voltage regulation circuit; pin 67 of the control chip U5 outputs a PWM signal V_set to control the set voltage of the voltage regulation circuit; pin 68 of the control chip U5 outputs a PWM signal PWM1B and pin 69 outputs a PWM signal PWM1A to drive the inverter full-bridge output of the inverter output circuit.

3. The high-frequency surgical equipment control system according to claim 2, characterized in that, The rectifier and voltage regulator circuit includes a rectifier module, a voltage regulator module, and a voltage regulator drive module. The rectifier module converts the mains frequency AC power into DC output, providing DC input to the DC voltage regulator module. The voltage regulator module uses a Boost circuit structure with FPC function to convert the rectified DC voltage into a stable DC voltage output. The rectifier module and the voltage regulator module are connected via a rectifier bridge BD1. The rectifier module is connected to the input pin of the rectifier bridge BD1, and the voltage regulator module is connected to the output pin of the rectifier bridge BD1. The input pin of the rectifier bridge BD1 is connected to the mains power supply AC_L and AC_N. The mains power supply AC_L and AC_N pass through capacitor C2 and varistor R5 to filter out harmonics in the mains power supply, through thermistor RT1 to suppress surge current of the equipment, through common-mode inductor L3 to suppress common-mode interference, through inductor L1 to suppress differential-mode interference, through capacitor C1 to filter out harmonics, and finally through rectifier bridge BD1 to rectify the mains power supply into a DC voltage signal V. DC .

4. The high-frequency surgical equipment control system according to claim 3, characterized in that, The voltage regulator drive module includes a control chip N1. The control chip N1 outputs a PWM control signal Boost DR to drive the field-effect transistor Q2 of the voltage regulator module to turn on or off, thereby charging or discharging the inductor L2 of the voltage regulator module, and then charging the capacitor CE1 of the voltage regulator module and providing energy to the load. When Q2 is on, the current in inductor L2 increases, charging and storing energy in the inductor. At this time, the load is powered by capacitor CE1. When Q2 is off, inductor L2 charges and stores energy in the capacitor through diode D2 and provides energy to the load. The voltage sampling signal BOOST_FB is fed back to pin 11 of the control chip N1, and the control chip N1 then adjusts the duty cycle of the PWM control signal Boost DR according to the feedback signal.

5. A high-frequency surgical equipment control system according to claim 2, characterized in that, The voltage regulation circuit includes a feedback circuit, a control circuit, and a power drive circuit. The feedback circuit includes four operational amplifiers. The input of operational amplifier N2A is electrically connected to the current setting signal I_SET, and its output output, the current control signal I_CTL, is electrically connected to the input of operational amplifier N2C. The two inputs of operational amplifier N2C are electrically connected to the voltage setting signal V_SET and the voltage sampling signal VB_FB, respectively. Its output output, the control signal V_CTL, is connected to the negative input of operational amplifier N2D and the input of operational amplifier N2A. The input of operational amplifier N4C is connected to the current sampling signal IB_S1, and its output output, the current feedback signal IB_S, is connected to the positive input of operational amplifier N2D. The output of operational amplifier N2D outputs the feedback control signal DC_FB, which is connected to the input of the control circuit. The output of the control circuit is electrically connected to the power drive circuit. The power drive circuit outputs the current sampling signal IB_S1, the voltage sampling signal VB_FB, and an adjustable voltage VB+. The control chip N3 of the control circuit adjusts the duty cycle of the PWM control signal of the power drive circuit according to the voltage feedback control signal DC_FB to control the power output.

6. A high-frequency surgical equipment control system according to claim 5, characterized in that, The control chip N3 of the control circuit outputs a PWM control signal DC_GD to turn the MOSFETs Q1 and Q3 of the power drive circuit on or off, energizing the primary coil of the transformer T1 in the power drive circuit. Energy is then transferred to the inductor L4, capacitor CE2, and load terminal through the secondary coil of transformer T1. When MOSFETs Q1 and Q3 are on, the primary coil of transformer T1 experiences a DC voltage HVDC+, increasing the current and transferring energy to the secondary side. In the secondary circuit, current flows through diode D3, charging and storing energy for inductor L4 and capacitor CE2, and providing energy to the load. When MOSFETs Q1 and Q3 are off, the primary coil of transformer T1 freewheels and demagnetizes through diodes D4 and D6. In the secondary circuit, inductor L4 freewheels and releases energy through diode D5, and CE2 provides energy to the load. The voltage regulation circuit provides feedback on the output voltage signal through the voltage sampling signal VB_FB and on the output current signal through the current sampling signals IB_S1+ and IB_S1-.

7. A high-frequency surgical equipment control system according to claim 6, characterized in that, When the feedback circuit is in steady-state operation, the operational amplifier N2C is in negative feedback mode, and the voltage setting signal V_SET input to the positive input pin 10 is the same as the voltage feedback signal VFB input to the negative input pin 9; the operational amplifier N2D is in negative feedback mode, and the current feedback signal IB_S input to the positive input pin 12 is the same as the voltage control signal V_CTL input to the negative input pin 9.

8. A high-frequency surgical equipment control system according to claim 6, characterized in that, When the current feedback signal IB_S is less than the current setting signal I_SET_2, the current control signal I_CTL equals 0, the voltage sampling signal VB_FB equals the feedback signal VFB, and the feedback signal VFB equals the voltage setting signal V_SET. That is, the voltage sampling signal VB_FB equals the voltage setting signal V_SET, and the circuit operates in constant voltage source mode. When the current feedback signal IB_S is greater than the current setting signal I_SET_2, the feedback signal VFB equals the sum of the voltage sampling signal VB_FB and the current control signal I_CTL. At this time, the operational amplifier N2A is in negative feedback state, the voltage control signal V_CTL equals the current setting signal I_SET_2, and the voltage control signal V_CTL equals the current feedback signal IB_S. Therefore, the current setting signal I_SET_2 equals the current feedback signal IB_S, and the circuit operates in constant current source mode.

9. A high-frequency surgical equipment control system according to any one of claims 1-8, characterized in that, The inverter output circuit is used to receive high-frequency drive signals from the drive control circuit and voltage signals from the voltage regulation output, and output high-frequency energy signals. It includes drive chip U1, drive chip U2, field-effect transistors Q5, Q6, Q7, Q8, and transformer T2. In this circuit, the PWM control signal PWM1A enters pin 1, INA of drive chip U1 through resistor R58, and controls the on / off state of field-effect transistor Q5 through output pin 15, OUTA; the PWM control signal PWM1B enters pin 2, INB of drive chip U1 through resistor R59, and controls the on / off state of field-effect transistor Q7 through output pin 10, OUTB; the PWM control signal PWM1B enters pin 1, INA of drive chip U2 through resistor R65, and controls the on / off state of field-effect transistor Q6 through output pin 15, OUTA; the PWM control signal PWM1A enters pin 2, INB of drive chip U2 through resistor R66, and controls the on / off state of field-effect transistor Q6 through output pin 10, OUTB. OUTB controls the on / off state of the MOSFET Q8. The PWM control signals PWM1A and PWM1B are two complementary sets of control signals. When PWM1A is high, PWM1B is low; when PWM1A is low, PWM1B is high.

10. A high-frequency surgical equipment control system according to claim 9, characterized in that, The PWM control signal PWM1A controls the simultaneous on / off of MOSFETs Q5 and Q8, and the PWM control signal PWM1B controls the simultaneous on / off of MOSFETs Q6 and Q7. When MOSFETs Q5 and Q8 are on and Q6 and Q7 are off, the primary winding current of transformer T2 flows from pin 1 to pin 2; when MOSFETs Q6 and Q7 are on and Q5 and Q8 are off, the primary winding current of transformer T2 flows from pin 2 to pin 1, realizing the inverter output function of the transformer. Among them, inductors L5 and L6, capacitors C31 and C32 realize the hardware impedance matching function of the output circuit.

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